JP2006164186A - Method and program of debugging integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To specify present configuration in dynamic reconfigurable LSI rapidly without increasing memory capacity. <P>SOLUTION: In state that executing of program of dynamic reconfigurable LSI is stopped according to setting, a debugger 24 which acquires configuration data and its source data memorized by a main memory and configuration data stored in an executing bank of configuration memory memorizes to a main memory 60, as static variable, bank name of supply origin of configuration which should be stored in an executing bank (bank 0) when heteronomouse dynamic reconfiguration by processor core occurs, acquires bank-originated value from a matrix 32 upon executing stop of program, compares static variable with the bank-originated value, and determines that autonomouse dynamic reconfiguration occurs when these are disagreement. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a debugging method and a debugging program in a dynamically reconfigurable LSI.

  In recent years, hardware capable of reconfiguring a part of a circuit constituting an LSI by software has been provided. Furthermore, in Patent Document 1, the basic unit to be reconfigured is an arithmetic unit having an arithmetic function of a certain scale, such as from the gate level to ALU, and a plurality of types of arithmetic units are arranged in a matrix form for reconfiguration. It is disclosed to reduce the time required. A system in which a plurality of arithmetic units are arranged in a matrix can be regarded as a system having a large number of hardware resources suitable for parallel processing because each arithmetic unit can execute processing in parallel. .

At present, as described in Non-Patent Document 2, in a dynamically reconfigurable LSI developed by the present applicant, a RISC processor core (hereinafter simply referred to as a “processor core”) mainly responsible for sequential processing. And “DNA (distributed) of a two-dimensional array structure in charge of large-scale data processing and arithmetic processing.
Network Architecture) matrix ”. This “DNA matrix” corresponds to a portion where the circuit configuration can be dynamically switched. This dynamically reconfigurable portion (hereinafter referred to as “matrix”) has a structure in which circuit components such as arithmetic units and memories are arranged in a two-dimensional array. By changing the connection relationship of these circuit components, it is possible to freely set a parallel operation or a combination of operations (product-sum operation).

  In the dynamically reconfigurable LSI described in Patent Document 2, a plurality of (for example, four) configurations of the matrix are stored simultaneously, and an application is executed at high speed while switching between them. For example, as shown in FIG. 3, there are one execution bank configuration and three background bank configurations as configurations that can be stored in the matrix, and each data is stored in each bank. The area is transferred from an external memory or the like.

  Actually, when configuration data is written to the execution bank while the matrix is operating, the processing contents are affected. Therefore, normally, the configuration data is written in any bank, and the background bank configuration data is transferred to the execution bank as necessary.

In the switching of the configuration, there are one in which an instruction is given to the matrix by control of a program executed on the processor core, and one that is autonomously performed by an internal factor in the matrix. Here, the former is called other-order dynamic reconfiguration, and the latter is called autonomous dynamic reconfiguration.
International Publication WO03 / 007155 Yasunori Sugawara and Tomomi Sato, “Device Architecture of DAPDNA”, Design Wave Magazine August 2004, “Special Feature: Dynamically Reconfigurable Devices, Features and Capabilities, Chapter 2”, CQ Publishing Company, 2004 August, pp. 30-38

  The designer loads the above bank and creates circuit information for operating the matrix. At that time, the designer checks whether the circuit is operating as desired, and corrects the defective part. Usually do.

The creation of the circuit information is realized by the following procedure, for example.
(1) The designer follows the data flow to configure circuit elements (PE: Processing) constituting the logic circuit in the matrix.
element) on the editor. As a result, a primary file including the arranged PEs and logical connection information therebetween is generated.
(2) Next, the primary file is converted by the compiler into a secondary file including information on the circuit elements at specific positions that actually constitute the matrix and the physical wiring between the circuit elements at the specific positions. The information of the secondary file is loaded into the bank, so that the matrix can operate.

  The debugger that realizes debugging pauses program execution, and in that state, obtains debugging information from the main memory, that is, configuration source data and configuration data, and configuration data from the execution bank of the matrix. Read out and perform necessary processing such as collating them. The debugger also allows reading and setting of register values in the matrix, setting of matrix breakpoints, and the like.

  As described above, in the dynamically reconfigurable LSI devised by the present applicant, the other-order dynamic reconfiguration in which the configuration is changed by the operation of the program running on the processor core and the matrix itself are configured. And autonomous dynamic reconfiguration that changes the configuration.

  For other-order dynamic reconfiguration, the processor core keeps track of configuration changes, so a table (bank information table) that keeps track of which configuration is stored in which bank is held in the main memory. It is possible to know which configuration is stored in the execution bank when the execution of the program is stopped.

  On the other hand, in the autonomous dynamic reconfiguration, since the matrix itself changes the configuration, the processor core cannot know the occurrence from the outside. Therefore, even if the configuration stored in the execution bank is checked with reference to the bank information table of the main memory, there is a problem that the configuration actually stored in the execution bank may be different.

  For example, the processor core stores the history of all the configuration data loaded in the configuration memory, and when the program execution is stopped, the configuration data that was actually stored in the execution bank and remains in the history It is also conceivable to perform matching with all configuration data and specify the configuration stored in the execution bank. However, leaving a history of all configuration data requires a huge memory capacity, and in some cases, the memory may fail. Another problem is that much time is required for matching.

  An object of the present invention is to provide a debugging method and a debugging program for quickly identifying a current configuration in a dynamically reconfigurable LSI without increasing the memory capacity.

An object of the present invention is to change the connection between circuit components of a processor core that mainly performs sequential processing, and data processing and calculation, and that has a two-dimensional array structure. A dynamically reconfigurable LSI comprising a dynamically changeable matrix,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory A debugging method for a debugger that acquires data,
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Obtaining the bank-derived value from the matrix when the execution of the program is stopped;
Comparing the stored static variables with bank-derived values and determining that an autonomous dynamic reconfiguration has occurred if they do not match; and
When it is determined that the autonomous dynamic reconfiguration has not occurred, reading the configuration data from the bank information table according to the bank information table;
When it is determined that the autonomous dynamic reconfiguration has occurred, reading the configuration data indicated by the bank-derived value in the bank information table;
And updating the static variable and the bank information table so as to match the bank-derived value (claim 1: first method).

  According to the present invention, at the time of other-order dynamic reconfiguration, from which bank the configuration was copied to the execution bank, that is, a static variable indicating the data supply source is stored in the main memory, When the program stops, the occurrence of autonomous dynamic reconfiguration is detected by comparing the bank-derived value in the configuration memory with a static variable. When it is determined that autonomous dynamic reconfiguration has occurred, the data of the bank can be acquired according to the memory-derived value in the configuration memory.

In a preferred embodiment, the step of obtaining the bank-derived value from the matrix upon execution of a load instruction by the processor core;
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and the bank information table to match the bank-derived values. (Claim 2: second method).

  In this embodiment, when data is loaded into the configuration memory bank, the occurrence of autonomous dynamic reconfiguration is detected by comparing the bank-derived value with a static variable. If it is determined here that autonomous dynamic reconfiguration has occurred, it is stored in the execution bank by updating static variables and the bank information table, just as if other-order dynamic reconfiguration has occurred. Appropriately understand the configured configuration.

  For example, the step of updating the static variable and bank information table includes storing a bank-derived value as a value of the static variable, and storing a bank-derived value in association with the execution bank in the bank information table; (Claim 3).

Another object of the present invention is to change the connection between circuit components of a two-dimensional array structure, which is mainly in charge of data processing and computation, and a processor core that executes sequential processing. A dynamically reconfigurable LSI comprising a matrix capable of dynamically changing the configuration,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory A debugging method for a debugger that acquires data,
Generating a pattern for specifying the configuration data to be loaded when executing the load instruction of the processor core, and storing the pattern in association with the bank to be loaded in the main memory;
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Reading the configuration data stored in the execution bank of the configuration memory when the execution of the program is stopped;
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank and identifying a bank associated with a matching or most similar pattern;
And reading the configuration data indicated by the information of the specified bank in the bank information table. This is achieved by a debugging method (claim 4: third method).

  According to the present invention, the configuration data pattern stored in association with the bank in the main memory is compared with the configuration data pattern actually read from the execution bank, and stored in the execution bank. Judging the configuration. If this method is used, it is sufficient to have as many configuration data patterns as the number of banks, and a large memory capacity is not required. In addition, a dynamic reconfiguration pattern that cannot be detected by the method according to claims 1 to 3 (after the configuration data is loaded, autonomous dynamic reconfiguration occurs more than once, and the execution bank Even when configuration data having the same bank as the supply source is stored), it is possible to specify the correct configuration by applying the present invention.

In a more preferred embodiment, the method further comprises the step of determining whether the identified bank is an execution bank;
When the specified bank is an execution bank, reading configuration data indicated by the execution bank in the bank information table;
When the specified bank is other than the execution bank, reading the configuration data indicated by the information of the specified bank in the bank information table;
And updating the bank information table so as to be consistent with the information of the specified bank.

In another preferred embodiment, the step of obtaining the bank-derived value from the matrix when executing a load instruction by the processor core; and
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and bank information table to match the bank-derived values;
Reading the configuration data stored in the execution bank of the configuration memory when the static variable and the bank-derived value match; and
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank and identifying a bank associated with a matching or most similar pattern;
Updating the bank information table so as to be consistent with the information of the specified bank (Claim 6: Fourth Method).

  Further, according to the present embodiment, after the configuration data is loaded, autonomous dynamic reconfiguration occurs more than once, and the execution bank has a configuration in which the same bank as the original supply source is the supply source. Even when configuration data is stored and configuration data is loaded in the same bank, it is possible to specify the configuration appropriately.

  For example, the step of generating the pattern generates a presence pattern including a bit string indicating whether or not each circuit component in the matrix is used. Alternatively, the step of generating the pattern may generate an existing pattern in which a bit string indicating whether or not each of the circuit components in the matrix is used is encoded (claim 8). By employing the latter, the pattern comparison process can be significantly shortened.

  The step of generating the pattern may include a step of encoding at least a part of the configuration data. Here, the entire configuration data may be encoded, or the portion corresponding to the configuration to be changed in the matrix may be excluded from the configuration data and the remaining portion may be encoded.

Another object of the present invention is to change the connection between circuit components of a two-dimensional array structure, which is mainly in charge of data processing and computation, and a processor core that executes sequential processing. A dynamically reconfigurable LSI comprising a matrix capable of dynamically changing the configuration,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory As a debugger for acquiring data, in order to operate the computer, a debugging program that can be read by the computer,
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Obtaining the bank-derived value from the matrix when the execution of the program is stopped;
Comparing the stored static variables with bank-derived values and determining that an autonomous dynamic reconfiguration has occurred if they do not match;
When it is determined that the autonomous dynamic reconfiguration has not occurred, reading the configuration data from the bank information table according to the bank information table;
When it is determined that the autonomous dynamic reconfiguration has occurred, reading the configuration data indicated by the bank-derived value in the bank information table; and
The present invention is also achieved by a debugging program that executes a step of updating the static variable and the bank information table so as to be consistent with the bank-derived value (claim 10).

In a preferred embodiment, the computer further includes:
Obtaining the bank-derived value from the matrix upon execution of a load instruction by the processor core; and
The stored static variable is compared with the bank-derived value, and if they do not match, the step of updating the static variable and the bank information table so as to be consistent with the bank-derived value is executed. Item 11).

In a preferred embodiment, in the step of updating the static variable and bank information table, the computer
Storing a bank-derived value as the value of a static variable, and
A step of storing a bank-derived value in association with the execution bank in the bank information table is executed (claim 12).

Furthermore, an object of the present invention is to provide a processor core that mainly performs sequential processing, and data processing and calculation, and by changing the connection between circuit components of the two-dimensional array structure, A dynamically reconfigurable LSI comprising a matrix capable of dynamically changing the configuration,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified in accordance with the execution of the load instruction and the configuration change instruction. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data stored in the main memory and its source data, and the configuration stored in the execution bank of the configuration memory As a debugger for acquiring data, in order to operate the computer, a debugging program that can be read by the computer,
Generating a pattern for specifying the configuration data to be loaded when executing the load instruction of the processor core, and storing the pattern in association with the bank to be loaded in the main memory;
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Reading configuration data stored in an execution bank of the configuration memory when the execution of the program is stopped;
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank to identify a bank associated with a matching or most similar pattern; and
This is also achieved by a debugging program that executes a step of reading configuration data indicated by the specified bank information in the bank information table.

In a preferred embodiment, the computer further includes:
Determining whether the identified bank is an execution bank;
When the specified bank is an execution bank, reading configuration data indicated by the execution bank in the bank information table;
When the specified bank is other than the execution bank, reading configuration data indicated by the information of the specified bank in the bank information table; and
The step of updating the bank information table so as to be consistent with the information of the specified bank is executed (claim 14).

In another preferred embodiment, the computer further comprises:
Obtaining the bank-derived value from the matrix when a load instruction is executed by the processor core;
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and bank information table to match the bank-derived values;
Reading the configuration data stored in the execution bank of the configuration memory when the static variable and the bank-derived value match; and
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank to identify a bank associated with a matching or most similar pattern; and
The step of updating the bank information table so as to be consistent with the information of the specified bank is executed (claim 15).

  The step of generating the pattern may cause the computer to execute a step of generating a presence pattern including a bit string indicating whether or not each of the circuit components in the matrix is used. . Alternatively, the step of generating the pattern may cause the computer to execute a step of generating a presence pattern in which a bit string indicating whether or not each circuit component in the matrix is used is encoded ( Claim 17). Further, in the step of generating the pattern, the computer may be caused to execute a step of encoding at least a part of the configuration data.

  According to the present invention, it is possible to provide a debugging method and a debugging program for specifying the current configuration in a dynamically reconfigurable LSI quickly without increasing the memory capacity.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing an outline of a circuit design system according to the present embodiment. The present embodiment is configured to design a dynamically reconfigurable LSI composed of a processor core and a matrix described in Patent Document 1 and Non-Patent Document 2 described above. However, FIG. 1 basically shows in detail the components for designing the matrix.

  As shown in FIG. 1, a circuit design system 10 according to the present exemplary embodiment includes an algorithm design unit 12 that generates a processor core and matrix algorithm according to a designer's input, for example, by C language description, and algorithm design. A profiler 14 for determining whether the algorithm by the unit 12 should be processed by a processor core or a matrix, and decomposing the algorithm; a first compiler 16 for compiling an algorithm to be processed by the processor core; A DFC compiler 18 that accepts a DFC (Data Flow C) described in C language with an expanded data flow corresponding to an algorithm to be processed by a matrix, generates a configuration file to be described later based on the DFC, and a configuration Rationf Of the processor cores generated by the second compiler 20 that arranges the circuit elements (processing elements: PE) constituting the matrix on the two-dimensional array, and the first compiler and the second compiler, respectively. Based on the source code and the placement and routing information of the PEs in the matrix, the simulator / emulator 22 that executes simulation or emulation, and the matrix is debugged at the configuration level based on the simulation or emulation result. And a debugger 24.

  A designer operates an input device (not shown) to describe an algorithm that is required to be realized by LSI in C language. The C description of this algorithm (see reference numeral 101 in FIG. 1) is given to the profiler 14, and the profiler 14 checks which function in the algorithm is suitable for the data flow (whether the processing load is heavy). A description (see reference numeral 103) corresponding to a data flow function is input to the DFC compiler 18. The DFC compiler 18 generates a configuration file (see reference numeral 104) based on the C description for the matrix. In the configuration file, a data flow including an arithmetic unit (ALU, register, etc.) and a connection between them is formed to realize the algorithm.

  Further, the first compiler 16 compiles the part excluding the DFC function from the algorithm. At that time, a wrapper function (see reference numeral 105) generated by the DFC compiler 18 is also compiled by the first compiler 16.

  The configuration file 104 generated by the DFC compiler 18 is input to the second compiler 20. The second compiler determines the wiring between the actual PEs constituting the matrix according to the configuration.

  The object code 106 is completed by linking the C description of the compiled processor core, the configuration wrapper, and the placement and routing information of the PEs forming the matrix.

  The simulator / emulator 22 can simulate the operation of an LSI including a processor core and a matrix. The simulator / emulator 22 inputs the object code generated by the first compiler 16 and the placement and routing information of PEs constituting the matrix, and analyzes the number of execution cycles of the LSI, the operation of the matrix and the processor core, and the like in detail. can do.

  The debugger 24 can debug the matrix at the configuration level. Although not shown, the debugger 24 can also debug the C description of the processor core or the assembly language level. In the debugger 24, conditional breakpoints can be set for both the processor core and the matrix.

  An LSI designed by the circuit design system configured as described above will be briefly described. FIG. 2 is a block diagram showing an outline of the LSI according to the present embodiment. As shown in FIG. 2, this LSI has a processor core 30 and a matrix 32, and can be dynamically reconfigured by changing the connection between PEs (for example, reference numeral 38) in the matrix.

  The matrix 32 includes a load buffer 34 for supplying data to the PE 38, a store buffer 36 for temporarily storing calculation results, a configuration memory 40 for storing arrangement and wiring information of a plurality of PEs, and a matrix 32 from outside the LSI. A direct I / O 42 for controlling input / output of a command or the like directly given to the computer.

  The processor core 30 is, for example, a 32-bit RISC, incorporates a general-purpose register (not shown), and is connected to the instruction cache 44 and the data cache 44. Further, since the LSI is a broadband data input / output essential for high-speed computation, a switch bus 48, which is a kind of crossbar switch circuit, and various interfaces / controllers 50 including a PSI interface, a DDR / SDRAM interface, a DMA controller, and the like. And have.

  In an LSI, configuration data stored in an external memory of a processor (that is, placement and routing information of PEs constituting a matrix designed by the circuit design system according to the present embodiment) is loaded into the configuration memory 40. Then, the PE connection in the matrix 32 is changed according to the configuration data (that is, the matrix is rewritten).

  FIG. 3 is a block diagram showing the configuration of the configuration memory 40 in more detail. As shown in FIG. 3, in this embodiment, four types of configuration data can be stored. In FIG. 3, bank 0 (zero) is an execution bank (see reference numeral 300), and the configuration stored in the execution bank 300 is used as the placement and routing information of the matrix 40.

  Banks 1 to 3 are background banks (refer to reference numerals 301 to 303), and the selection circuit 304 is switched in accordance with the switching of the configuration in the matrix (other-order dynamic reconfiguration and autonomous dynamic reconfiguration). Then, it is loaded into bank 0, which is the execution bank, and can be used as placement and routing information.

  In the case of other-order dynamic reconfiguration, usually, any of the PE placement and routing information (configuration data) stored in bank 1 to bank 3 is the function of the program running on the processor core. The following is the current configuration. Here, the current configuration refers to a configuration that is stored in the execution bank (bank 0) and reflected in the arrangement and wiring of the matrix at that time.

  In debugging according to the present embodiment, configuration source data (hereinafter referred to as “configuration debug information” or simply “debug information”) is arranged in the main memory together with the configuration data, and the configuration data. Is loaded into a bank, the pointer to the debug information area of the configuration is stored in a table for each bank (hereinafter referred to as “bank information table”). In addition to the functions of the control library for debugging and the control library for standby and normal operation, the library of the processor core program that supports having such a debug information area has debugging processing. The program that has been debugged can be executed without extra processing using the control library for normal operation. On the other hand, if the debug control library is used, it is possible to stop the execution depending on the state, monitor the state in the middle of execution, and operate the application while performing a debugging operation such as changing the state.

  The control library will be briefly described below. Reading the matrix into the bank and switching the configuration are realized by the processor core via the I / O port. These operations performed by the processor core are described in a library function. A library including a library function in which these operations are described is referred to as a control library. Examples of the functions included in the control library include the following.

Matrix_load (int bank): Reading configuration data to the specified bank Matrix_change (int bank): Executing the other-order configuration under the control of the processor core and changing the current configuration (bank 0) to the specified bank Switch to configuration As described above, the debug control library including the debug process is used for debugging, and the normal operation control library with the debug process removed is used for normal operation. Is done.

  FIG. 4 is a block diagram showing the configuration of the debugger according to the present embodiment and members (main memory, etc.) related to the debugger. As shown in FIG. 4, the debugger 24 includes a debug monitor 52, a configuration reading unit 54, and a configuration determination unit 56 that determines a configuration to be output to the debug monitor 52.

  The debug monitor 52 can read information for debugging from the memory space in which execution is temporarily stopped, and can read register values and settings in the matrix. In addition, the designer can set registers and breakpoints in the matrix by giving instructions to the debug monitor 52.

  The configuration reading unit 54 can read configuration data in order to know the current state of an application whose execution has been stopped midway. In the present embodiment, the configuration reading unit 54 reads the configuration data of bank 0 stored in the configuration memory 40 of the matrix 32, and stores it in bank 0 in the bank information table 62 in the main memory 60. It is possible to read the configuration data and debug information of the associated configuration from the main memory 60, compare them, and check whether the configuration is correctly loaded.

  In the present embodiment, the processor core 30 uses a function “matrix_load” in the control library, for example, from the main memory 60 to store predetermined configuration data (for example, configuration name = A (reference numeral 62 − 1))) is read and loaded into a desired bank (eg bank 1) of the configuration memory 40. In association with this operation, the bank information table 66 is updated by writing a pointer indicating that configuration data (configuration name = A) has been loaded for the bank 1 in the bank information table 66.

  Also, when other-order dynamic reconfiguration occurs, the configuration data stored in any one of banks 1 to 3 is stored in bank 0 using the function “matrix_change” in the control library. make a copy. Also in this case, the bank information table 66 is updated for the bank 0. As described above, in other-order dynamic reconfiguration, information (for example, configuration name) indicating the configuration stored in each bank described in the bank information table 66 and the actual configuration memory 40 are stored. It matches the configuration data stored in each bank.

  However, in the autonomous dynamic reconfiguration, in the matrix 32, the configuration of the banks 1 to 3 is autonomously read into the bank 0 and the configuration switching is executed. Unless it is done, there is a problem that it is impossible to know from the outside when and which configuration switching has occurred.

  In the debugger 24, if the application being debugged has stopped for some reason and an autonomous dynamic reconfiguration has occurred, the information (configuration name) associated with bank 0 in the bank information table is meaningless. Become.

  In the present embodiment, the configuration reading unit 54 writes in which of the banks 1 to 3 the configuration data stored in the bank 0 of the configuration memory 40 is loaded. It is configured to be able to read data from specific fields inside. Thereby, it is determined that the autonomous dynamic reconfiguration has occurred, and the debug information having the configuration name stored in the bank indicated by the load source is read from the main memory 60. By adopting such a configuration, it is possible to acquire debug information of a correct configuration even when autonomous dynamic reconfiguration occurs.

However, in the following cases, even if the configuration described above is adopted, debug information with a correct configuration cannot be acquired.
(1) When the instruction “matrix_load” is executed by the processor core after the occurrence of autonomous dynamic reconfiguration (2) The autonomous dynamic reconfiguration occurs multiple times, and the current configuration includes the original bank In the case where the instruction “matrix_load” is executed in the middle of the process, the configuration of the debugger 24 for solving these problems will be described in detail below.

[First method]
First, the state of each bank of the configuration memory when autonomous dynamic reconfiguration occurs will be described. FIGS. 5A and 5B are diagrams showing an example of an event that causes a configuration, a configuration data name stored in the configuration memory, and a bank information table, respectively.

  In FIG. 5, arrow-shaped blocks (for example, see reference numeral 501) described as “load”, “autonomous”, and “other rules” line up three events that change the state of each bank of the configuration memory. At a certain time, only one of the three events can occur. In FIG. 5, an arrow block with hatching (for example, see reference numeral 602) indicates an event that occurred at that time. FIG. 5 (a) shows that another dynamic reconfiguration has occurred at that time, and bank 1 has been targeted at that time.

  A rectangular block 510 described as bank 0 to bank 3 indicates a bank of the configuration memory. The alphabets in the blocks related to the respective banks (for example, reference numerals 511 and 512) indicate the configuration names stored in the banks. For example, the configuration data of configuration name = A is stored in the block of bank 0 (see reference numeral 511). In the block 511 of the bank 0, the configuration name indicated in parentheses () on the left side is the configuration name stored in the bank 0 in the main memory bank information table (see reference numeral 44 in FIG. 4). Indicates. Further, in the block 511 of the bank 0, the configuration name indicated in parentheses [] is a value indicating the current configuration, that is, the bank-derived configuration (hereinafter, the configuration of the bank 0). This is also referred to as “bank-derived value”). Therefore, the bank name indicated in parentheses [] can be acquired by the configuration reading unit 54 according to the present embodiment.

  In FIG. 5A, other-order dynamic reconfiguration occurs, and the configuration data of bank 1 (configuration name = A) is changed to the current configuration (bank 0) by the function “matrix_change” of the control library. To be copied. Therefore, in bank 0, bank-derived value = 1. Along with this, the bank information table of the main memory is rewritten (see reference numeral 520).

  Here, as shown in FIG. 5B, autonomous dynamic reconfiguration occurs in the matrix, and the configuration data (configuration name = B) in bank 2 is copied to the current configuration (bank 0). Then, consider a case where the execution of the program is stopped by the debugger 24 thereafter. Since the autonomous dynamic reconfiguration is not recognized by the processor core, the bank information table is not changed as shown in FIG. On the other hand, actually, bank 0 stores configuration data derived from bank 2 (configuration name = B). Therefore, in FIG. 5B, if the debugger 24 refers to the bank information table in the main memory and specifies the configuration name (= A) from which debug information is to be extracted, an error occurs.

  Therefore, in the present embodiment, as a first method, in the function “matrix_change” of the control library, the bank in which the configuration data set as the current configuration is stored, that is, the bank number of the bank that is the supply source is stored. Is stored in a static variable, and when the operation of the program is stopped, the configuration determination unit 56 of the debugger 24 compares the bank number obtained from the static variable with the bank-derived value obtained by the configuration reading unit 54. And detecting the occurrence of autonomous dynamic reconfiguration.

  More specifically, as shown in FIG. 6A, when other-order dynamic reconfiguration occurs during simulation or emulation (step 601), in the function “matrix_change” of the control library, the current The bank number of the bank in which the configuration data set as the configuration is stored is stored in the static variable pb (step 602). For example, in the example of FIG. 5A, the configuration data of the bank 1 is copied to the bank 0 by the other-order dynamic reconfiguration, so that the static variable pb = 1.

  When the debugger 24 stops executing the program under a set condition such as a breakpoint (step 611), the configuration reading unit 54 of the debugger 24 reads the bank-derived value from the configuration memory 40, and configures the configuration. The determination unit 56 compares the static variable pb with the acquired bank-derived value (step 612). If the two match (Yes in step 613), the debug monitor 52 acquires and outputs debug information of the configuration name indicated by bank 0 in the bank information table as usual (step 613). 614). On the other hand, if they do not match (No in step 613), the debugger 24 refers to the bank-derived value and debugs the configuration name indicated by the bank number corresponding to the bank-derived value. Information is acquired and output (step 615).

  When the autonomous dynamic reconfiguration shown in FIG. 5B occurs after the state of FIG. 5A and the program execution is stopped, the static variable pb = 1 while the bank-derived value Becomes “2”. Accordingly, since they do not match, the debug information of configuration name = B indicated by bank 2 corresponding to the bank-derived value is acquired.

  Thereafter, in order to enable debugging in subsequent program execution, the debugger 24 updates the static variable pb (in this example, “+1”) and the configuration name associated with bank 0 in the bank information table. Is updated to the one indicated by the bank-derived value (step 616).

  With such a configuration, it is possible to detect the occurrence of an autonomous configuration by determining whether the static variable matches the derived value.

[Second method]
Next, the second method according to the present embodiment will be described. For example, consider a case where after the autonomous dynamic reconfiguration occurs once, a new configuration is loaded by the function “matrix_load” of the control library, and then the execution of the program is stopped by the debugger 24.

  FIGS. 7A to 7C are diagrams showing a specific example of the above case. For example, consider using the first method to determine which debug information should be selected based on the match between the static variable pb and the bank-derived value. In FIG. 7A, the other-order dynamic reconfiguration occurs, and the configuration data of bank 1 (configuration name = A) is copied to bank 0, so that the static variable pb = 1. In addition, because of other-order dynamic reconfiguration, the bank information table of the main memory is also associated with bank 0 and stores configuration name = A.

  Next, as shown in FIG. 7B, autonomous dynamic reconfiguration occurs, the configuration data of bank 2 (configuration name = B) is copied to bank 0, and further shown in FIG. 7C. Thus, it is considered that new configuration data (configuration name = D) is loaded into the bank 2 by the function “matrix_load” of the control library. As the function “matrix_load” of the control library is executed, the configuration name = D is stored in association with bank 2 in the bank information table in the main memory.

  In this case, when the first method is used, pb = 1, while bank-derived value = 2, so the configuration name associated with bank 2 is acquired in the bank information table based on the bank-derived value. Then, “D” is obtained. However, as shown in FIG. 7C, the configuration data of configuration name = B is actually stored in bank 2 of the configuration memory, and the configuration name obtained as a result of the first method is stored. Does not match.

  Therefore, in the second technique, as shown in FIG. 8, in the function “matrix_load” of the control library (step 801), the static variable pb is acquired as the bank number at the time of other-order dynamic reconfiguration. The configuration reading unit 54 acquires the bank-derived value from the configuration memory 40, and the configuration determining unit 56 compares the static variable pb with the bank-derived value (step 802). If it is considered that autonomous dynamic reconfiguration has occurred, that is, if they do not match (No in step 803), the configuration determination unit 56 associates with bank 0 in the bank information table. The bank-derived value acquired by the configuration reading unit 54 is stored (step 804). Further, the static variable pb is updated to the bank-derived value (step 805). In other words, these states are matched as if the other-order dynamic reconfiguration occurred and the bank information table and the static variable were rewritten. Thereafter, the configuration data is stored in the designated bank of the configuration memory (step 806).

  With respect to the example shown in FIG. 7, the state of the static variable pb and the bank-derived value when the second method is applied will be described with reference to FIG. The state shown in FIG. 9A (the state in which other-order dynamic reconfiguration has occurred and the configuration data of bank 1 (configuration name = A) has been copied to bank 0) and the state shown in FIG. Autonomous dynamic reconfiguration occurs and the configuration data of bank 2 (configuration name = B) is copied to bank 0) matches the states of FIGS. 7A and 7B, respectively.

  On the other hand, the processing of the function “matrix_load” of the control library is started, and when the static variable pb is compared with the acquired bank number (bank-derived value), “1 ≠ 2”. It is judged as No (No). Therefore, “bank derived value = 2” is stored in association with bank 0 of the bank information table and is rewritten to “static variable pb = 2”.

  When the execution of the program by the debugger 24 is stopped, the processing shown in FIG. 6B is executed as in the first method. In the process of FIG. 6B, it is determined that the static variable pb and the bank-derived value read by the configuration reading unit 54 match, and that no autonomous dynamic reconfiguration has occurred (NO in step 613). No)), debug information of the configuration name (in this case “B”) associated with bank 0 of the bank information table is read from the main memory and output. In this way, a correct display can be made on the debug monitor 52.

[Third method]
Next, a third method according to the present embodiment will be described. For example, after new configuration data is loaded into the current configuration of the configuration memory by the control library “matrix_load”, autonomous dynamic reconfiguration occurs more than once, and then returns to the first bank number. Consider a case where execution of a program is stopped by the debugger 24.

  FIGS. 10A to 10D are diagrams showing a specific example of the above case. For example, consider using the first method to determine which debug information should be selected based on the match between the static variable pb and the bank-derived value. In this case, since the static variable matches the bank-derived value, the debug information having the configuration name indicated by bank 0 in the bank information table is extracted. However, in reality, new configuration data (configuration name = D) is loaded into the bank by the control library “matrix_load”, and the configuration data is further transferred to bank 0 by autonomous dynamic reconfiguration. Therefore, the debug information with the configuration name = D must be displayed.

  Therefore, in the third method, when the control library “matrix_load” is executed, a matching pattern for identifying the configuration is generated based on the configuration data, and this is stored in the main memory. When program execution is stopped by the debugger 24, the configuration determination unit 56 generates a matching pattern from the current configuration (configuration of bank 0), and the bank determined to be the closest is the current configuration supplier It is judged that.

[Specific Processing According to Third Method (Part 1)]
In the first specific process, the PE presence pattern in the matrix according to the configuration is encoded (for example, CRC encoding). Needless to say, encoding is not limited to CRC, and other encoding may be applied.

  As shown in FIG. 11A, in the function “matrix_load” of the control library (step 1101), the presence pattern of the PE according to the configuration is generated with reference to the configuration data (step 1102). The generation of the presence pattern is realized by expressing whether or not the PE at each physical position is used in the configuration by a bit of “1” or “0”.

  For example, the configuration data has 1 to 8 words of data for each PE. Therefore, when a certain PE requires a 5-word configuration, a data amount of 32 (bit = 1 word) × 5 = 160 bits is required. On the other hand, if the PE is used or not, one bit is sufficient, and the data capacity necessary for the existence pattern can be remarkably reduced, and the comparison processing described later can be realized in a short time.

  The existence pattern is stored in the main memory in association with the bank number of the bank information table (step 1103). For example, if the control library function “matrix_load” loads the configuration data with the configuration name = D into the bank 1, the presence pattern of the PE constituting the configuration data with the configuration name = D is the main pattern. In the memory, it is stored in association with bank 1.

  Also, when other-order dynamic reconfiguration occurs, when the configuration data of a certain bank is copied to bank 0 by the function “matrix_change” of the control library, the copy destination bank number and , PE presence patterns are associated with each other. Thereby, the presence pattern of the PE can be read from the main memory with reference to the bank number.

  As shown in FIG. 11B, when the execution of the program is stopped, the configuration reading unit 54 of the debugger 24 reads the configuration of the bank 0 in the matrix 32 (step 1111), and the configuration determining unit 56 A presence pattern of PEs constituting the read configuration is generated and encoded (step 1112). Next, the configuration determination unit 56 compares each of the existence patterns of the PEs associated with each bank of the bank information table and stored in the main memory with the existence pattern obtained in Step 1112, and matches. A thing is found (step 1113). The configuration determination unit 56 determines whether an existence pattern that matches the existence pattern obtained from the configuration data that actually exists in the bank 0 is associated with the bank 0 (step 1114).

  If NO in step 1114, the debug information of the configuration name corresponding to the bank number associated with the presence pattern that matches the presence pattern of the read configuration in the bank information table. Is acquired and output (step 1115), and the bank information table is updated so that the configuration name corresponding to the bank number is copied to bank 0 (step 1116). If it is determined as Yes in step 1114, the debug information of the configuration name of bank 0 may be read and output in the bank information table (step 1117).

  As described above, in the third method, the existence pattern of the configuration data read by the configuration reading unit 54 is compared with the existence patterns stored in the main memory from the bank 0 to the bank 3 so as to match. One (or the most similar one as will be described later) is determined to be the configuration supplied to bank 0, and the bank information table and static variables are updated.

[Specific Processing According to Third Method (Part 2)]
In the second specific process, in Steps 1102 and 1103 of FIG. 11, the existence pattern of the PE constituting the configuration is stored as it is without being encoded. Similarly, also in step 1112, the presence pattern of PE constituting the configuration is generated based on the configuration data acquired by the configuration reading. Further, in the presence pattern comparison (step 1113), even when both of the presence patterns do not completely match, the presence pattern most similar to the presence pattern based on the configuration data acquired by the configuration read is selected. Is done.

  In the first specific process, for example, since the CRC codes of the existing patterns may be compared, the comparison process can be realized at a very high speed, but cannot be handled when the configuration data is rewritten in the matrix. There is. On the other hand, in the second specific process, since the existence pattern is compared for each bit, the comparison itself takes time compared to the first specific process, but it is advantageous in that the configuration can be rewritten. There is.

  In the state shown in FIG. 10A, in the main memory, the existence pattern A (existence pattern related to configuration name = A, the same applies hereinafter), the existence pattern A, and the existence pattern B are associated with each of the banks 0 to 3. And the presence pattern C is stored (see FIG. 12A). In FIG. 10B, when the configuration with the configuration name = D is loaded into the bank 1 of the configuration memory by the function “matrix_load” of the control library, the configuration with the configuration name = D is associated with this. An existence pattern (existence pattern D) is generated for the distribution data. This is stored in the main memory in association with the bank 1 (see FIG. 12B). The bank information table is also rewritten.

  The autonomous dynamic reconfiguration shown in FIGS. 10C and 10D cannot be detected from outside the matrix. By executing the processing shown in FIG. 11B according to the third method, the configuration data actually stored in the bank 0 of the matrix configuration memory is stored in the bank 1 according to the bank information table. It is determined that the configuration has been made (configuration name = D). Therefore, the bank information table is updated as shown in FIG. 12C, and the static variable pb is also updated as shown in FIG.

[Fourth Method]
Next, the 4th method concerning this Embodiment is demonstrated. In the combined state of the state where the problem occurs in the first method and the state where the problem occurs in the second method, the correct configuration data cannot be specified even if the third method is used. For example,
(1) After new configuration data is loaded into the current configuration of the configuration memory by the function “matrix_load” of the control library,
(2) Autonomous dynamic reconfiguration occurs more than once, returning to the first bank number,
(3) Again, new configuration data is loaded into the same bank using the function “matrix_load” of the control library,
(4) Then, consider the case where the execution of the program is stopped by the debugger 24.

  FIGS. 13A to 13E are diagrams showing a specific example of the above case. FIGS. 13A to 13D are the same as FIGS. 10A to 10D, respectively. In this example, as shown in FIG. 13E, new configuration data (configuration name = E) is further stored in bank 1 of the configuration memory by the function “matrix_load” of the control library. .

  Using the third method, the configuration determination unit 56 compares the presence pattern of the configuration data read by the configuration reading unit 54 with the presence pattern associated with the bank number of the bank information table. Think about it. However, in the state shown in FIG. 13 (e), since configuration data with configuration name = E is loaded into bank 1, the configuration names = A, E, B, and C exist in the main memory. Only the pattern is left, so that it is impossible to specify an appropriate configuration name. In the fourth method, an appropriate configuration name is specified even in the above-described case, and the debugger monitor can output the debugger information.

  Also in the fourth method, when the function “matrix_load” of the control library is executed, an existence pattern of PEs constituting configuration data to be loaded is generated as shown in Step 1102 of FIG. It is stored in association with the bank number. Further, as shown in FIG. 14, in the function “matrix_load” of the control library (step 1401), the static variable pb is acquired as a bank number at the time of other-order dynamic reconfiguration, and the configuration reading unit 54 The bank-derived value is acquired from the configuration memory 40, and the configuration determining unit 56 compares the static variable pb with the bank-derived value (step 1402).

  When it is considered that the autonomous dynamic reconfiguration has not occurred, that is, when they match (Yes in Step 1403), the configuration determination unit 56 is acquired by the configuration reading unit 54. A presence pattern is generated based on the configuration data (step 1404).

  Next, the configuration determination unit 56 compares each of the existence patterns of the PEs associated with each bank of the bank information table and stored in the main memory with the existence pattern obtained in Step 1112, and matches. A thing is found (step 1405). Further, the configuration determination unit 56 updates the configuration name of the bank 0 to the configuration name of the matching existence pattern in the bank information table of the main memory (step 1406) and matches the presence name in the bank information table. The pattern configuration name is updated to the bank number that was stored (step 1407).

  When it is determined NO in step 1403, the second method is the same. In FIG. 14, steps 1408 and 1409 correspond to steps 804 and 805 of FIG. 8, respectively.

  After such processing, configuration data is loaded into the designated bank of the configuration memory (step 1410).

  FIGS. 15A and 15B show a bank information table and a configuration before loading the configuration data shown in FIG. 13D and before execution of the processing (steps 1404 to 1407) shown in FIG. The state of the configuration memory. FIGS. 15C and 15D show the state of the bank information table and the configuration memory before loading the configuration data shown in FIG. 13D and after the execution of the processing shown in FIG. Indicates.

  The configuration name of the configuration data read by the configuration read is D = D, and the comparison of the existence pattern shows that the same configuration data is associated with bank 1 in the bank information table of the main memory. . Therefore, as shown in FIG. 15C, the bank information table is updated so as to indicate that bank 0 stores configuration data of configuration name = D.

  FIGS. 16A to 16E are diagrams showing the state of the configuration memory when the fourth method is applied. FIGS. 16A to 16D correspond to FIGS. 13A to 13D, respectively. In FIG. 16 (e), configuration data of configuration name E is further loaded into the configuration memory from the state shown in FIG. 15 (c). Even in such a case, after the execution is stopped, the debugger 24 can read out and output debug information of an appropriate configuration based on the configuration name D of the bank 0 in the bank information table.

[Processing loads by the first method to the fourth method and their interrelationships]
FIG. 17 shows the processing load of the conventional technique and the first to fourth techniques according to the present embodiment. In FIG. 17, circles indicate processing executed in the method. Further, a cross indicates a process that is not executed in the method.

  As shown in FIG. 17, in the first method, when the other-order dynamic reconfiguration occurs (that is, when the function “matrix_change” of the control library is executed), the static configuration pb The bank number of the configuration to be stored is stored, and when the execution of the program is stopped, the coincidence between the static variable and the bank-derived value read from the configuration memory is determined. Thereby, occurrence of autonomous dynamic reconfiguration is detected.

  In the second technique, when the configuration variable bank is loaded, that is, when the function “matrix_load” of the control library is executed, if the static variable pb does not match the bank-derived value, at that time, Static variables are updated as if other-order dynamic reconfiguration occurred.

  On the other hand, in the third method, even when it is determined that the autonomous dynamic reconfiguration has not occurred in the first method, the autonomous dynamic reconfiguration occurs multiple times by comparing the existence patterns. If you have returned to the first bank number, you can handle it.

  Further, in the fourth method, in addition to the third method, when the configuration memory is loaded into the bank, a static variable is obtained by comparing the existence pattern as in the case of performing a certain process in the second method. The matching of pb is aimed at.

[Debugger selection]
In the present embodiment, the debugger 24 can operate by providing any one of the first to fourth methods according to the level required by the designer for the debugger. Further, without using the above-described method, the configuration name in the bank information table is simply identified according to the bank-derived value read from the configuration reading unit 54 and the debug information is acquired, as in the past. It is also possible to set as follows.

  Here, it is possible to consider an implementation that selects a static function (static implementation) and an implementation that allows function selection dynamically (dynamic implementation). In static implementation, a numerical value may be assigned to a macro in C language so that processing called in the library can be changed by the numerical value defined when compiling the application.

  In dynamic implementation, an application program is compiled so that it operates at the lowest debug level. However, a library function structure that returns processing based on the value of a static or global variable is constructed. If it is executed as it is, the value of the variable does not change, but the value of the variable can be rewritten before execution by the claimant of the debugger, and execution at the target debug level becomes possible.

  According to this embodiment, it is possible to perform debugging after the occurrence of autonomous dynamic reconfiguration. Further, when it is necessary to reduce the processing load of the debugger, it is possible to efficiently realize debugging by selecting a function.

  In the present embodiment, any one of when the debugger is stopped last time, when the function “matrix_load” of the control library is executed, or when the function “matrix_change” of the control library is executed. The current state is compared with the state obtained from the current state, and the debug information of the current configuration is acquired or the state of the debug information is updated. Therefore, even for applications where it is assumed that autonomous dynamic reconfiguration and “matrix_load” will be repeated many times, a program that does not require much storage capacity, that is, without damaging the main memory or the like Can be executed and debugged.

  The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the invention described in the claims, and these are also included in the scope of the present invention. Needless to say.

  For example, in the third method and the fourth method of the above-described embodiment, the presence pattern consisting of bits indicating whether or not to use the PE constituting the configuration is used as the matching pattern. However, the present invention is not limited to this. There is nothing. This may be encoded (eg, CRC encoded) using the entire configuration data. Further, encoding may be performed except for a configuration portion that may be changed during execution of the program in the matrix.

  In the above embodiment, the number of banks of the configuration memory is four, but it goes without saying that this number is not limited.

FIG. 1 is a block diagram showing an outline of a circuit design system according to the present embodiment. FIG. 2 is a block diagram showing an outline of the LSI according to the present embodiment. FIG. 3 is a block diagram showing the configuration of the configuration memory in more detail. FIG. 4 is a block diagram showing the configuration of the debugger according to the present embodiment and members (main memory, etc.) related to the debugger. FIGS. 5A and 5B are diagrams showing an example of an event that generates a configuration, a configuration name stored in the configuration memory, and a bank information table, respectively. FIG. 6 is a flowchart showing processing executed in the first method according to the present embodiment. FIGS. 7A to 7C are diagrams showing examples of the state of the configuration memory and the state of the bank information table according to the event, respectively. FIG. 8 is a flowchart showing processing executed in the second method according to the present embodiment. FIGS. 9A to 9C are diagrams illustrating examples of the state of the configuration memory and the state of the bank information table when the second method is applied, respectively. FIGS. 10A to 10D are diagrams showing examples of the state of the configuration memory and the state of the bank information table according to the event, respectively. FIG. 11 is a flowchart showing processing executed in the third method according to the present embodiment. FIGS. 12A to 12D are diagrams showing examples of the state of the configuration memory and the state of the bank information table when the third method is applied, respectively. FIGS. 13A to 13E are diagrams showing examples of the state of the configuration memory and the state of the bank information table according to the event, respectively. FIG. 14 is a flowchart showing processing executed in the fourth method according to the present embodiment. FIG. 15 is a diagram for specifically explaining the processing shown in FIG. 14. FIGS. 16A to 16E are diagrams showing examples of the state of the configuration memory and the state of the bank information table when the fourth method is applied, respectively. FIG. 17 is a diagram illustrating the mutual relationship between the first method to the fourth method according to the present embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 12 Algorithm design part 14 Profiler 16 1st compiler 18 DFC compiler 20 2nd compiler 22 Simulator / emulator 24 Debugger 52 Debug monitor 54 Configuration reading part 56 Configuration determination part

Claims (18)

A processor core that mainly executes sequential processing, and is in charge of data processing and computation, and its configuration can be changed dynamically by changing the connections between circuit components of the two-dimensional array structure. A dynamically reconfigurable LSI comprising a matrix,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory A debugging method for a debugger that acquires data,
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Obtaining the bank-derived value from the matrix when the execution of the program is stopped;
Comparing the stored static variables with bank-derived values and determining that an autonomous dynamic reconfiguration has occurred if they do not match; and
When it is determined that the autonomous dynamic reconfiguration has not occurred, reading the configuration data from the bank information table according to the bank information table;
When it is determined that the autonomous dynamic reconfiguration has occurred, reading the configuration data indicated by the bank-derived value in the bank information table;
And updating the static variable and bank information table so as to match the bank-derived value. Further, when executing a load instruction by the processor core, obtaining the bank-derived value from the matrix;
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and bank information table to match the bank-derived values. The debugging method according to claim 1, wherein: Updating the static variable and bank information table;
Storing a bank-derived value as the value of a static variable;
The debugging method according to claim 1, further comprising: storing a bank-derived value in association with the execution bank in the bank information table. A processor core that mainly executes sequential processing, and is in charge of data processing and computation, and its configuration can be changed dynamically by changing the connections between circuit components of the two-dimensional array structure. A dynamically reconfigurable LSI comprising a matrix,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory A debugging method for a debugger that acquires data,
Generating a pattern for specifying the configuration data to be loaded when executing the load instruction of the processor core, and storing the pattern in association with the bank to be loaded in the main memory;
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Reading the configuration data stored in the execution bank of the configuration memory when the execution of the program is stopped;
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank and identifying a bank associated with a matching or most similar pattern;
And a step of reading configuration data indicated by the specified bank information in the bank information table. And determining whether the identified bank is an execution bank;
When the specified bank is an execution bank, reading configuration data indicated by the execution bank in the bank information table;
When the specified bank is other than the execution bank, reading the configuration data indicated by the information of the specified bank in the bank information table;
The debugging method according to claim 4, further comprising a step of updating the bank information table so as to match the information of the specified bank. Further, when executing a load instruction by the processor core, obtaining the bank-derived value from the matrix;
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and bank information table to match the bank-derived values;
Reading the configuration data stored in the execution bank of the configuration memory when the static variable and the bank-derived value match; and
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank and identifying a bank associated with a matching or most similar pattern;
The debugging method according to claim 4, further comprising a step of updating the bank information table so as to match the information of the specified bank. 7. The step of generating the pattern includes a step of generating a presence pattern including a bit string indicating whether or not each of the circuit components in the matrix is used. The debugging method according to one item. The step of generating the pattern includes a step of generating a presence pattern obtained by encoding a bit string indicating whether or not each circuit component in the matrix is used. The debugging method according to any one of the above. The debugging method according to any one of claims 4 to 6, wherein the step of generating the pattern includes a step of encoding at least a part of the configuration data. A processor core that mainly executes sequential processing, and is in charge of data processing and computation, and its configuration can be changed dynamically by changing the connections between circuit components of the two-dimensional array structure. A dynamically reconfigurable LSI comprising a matrix,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory As a debugger for acquiring data, in order to operate the computer, a debugging program that can be read by the computer,
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Obtaining the bank-derived value from the matrix when the execution of the program is stopped;
Comparing the stored static variables with bank-derived values and determining that an autonomous dynamic reconfiguration has occurred if they do not match;
When it is determined that the autonomous dynamic reconfiguration has not occurred, reading the configuration data from the bank information table according to the bank information table;
When it is determined that the autonomous dynamic reconfiguration has occurred, reading the configuration data indicated by the bank-derived value in the bank information table; and
A debugging program characterized by causing the static variable and bank information table to be updated so as to match the bank-derived value. In addition, the computer
Obtaining the bank-derived value from the matrix upon execution of a load instruction by the processor core; and
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and the bank information table to match the bank-derived values. The program according to claim 10, wherein In the step of updating the static variable and bank information table, the computer
Storing a bank-derived value as the value of a static variable, and
The program according to claim 10 or 11, wherein a step of storing a bank-derived value in association with the execution bank in the bank information table is executed. A processor core that mainly executes sequential processing, and is in charge of data processing and computation, and its configuration can be changed dynamically by changing the connections between circuit components of the two-dimensional array structure. A dynamically reconfigurable LSI comprising a matrix,
The matrix has a configuration memory having a plurality of banks for storing configuration data representing each of a plurality of configurations, and based on configuration data stored in an execution bank among the plurality of banks. Configuration data stored in each bank is defined by other dynamic reconfiguration in accordance with instructions from the processor core or by autonomous dynamic reconfiguration by the matrix itself. By copying to the execution bank, the configuration was changed, and the configuration data copied to the execution bank became the source of the configuration change. Configured to store bank-derived values that identify the bank,
The processor core causes the configuration data stored in the main memory to be loaded into a desired bank of the configuration memory, and the configuration stored in any bank is copied to the execution bank, and so on. A configuration change instruction that generates dynamic reconfiguration can be executed, and the information specifying the bank in the main memory and the configuration are specified when the load instruction and the configuration change instruction are executed. In a dynamically reconfigurable LSI configured to update a bank information table associated with a configuration name
The execution of the program of the dynamically reconfigurable LSI is stopped according to the setting, and in that state, the configuration data and its source data stored in the main memory, and the configuration stored in the execution bank of the configuration memory As a debugger for acquiring data, in order to operate the computer, a debugging program that can be read by the computer,
Generating a pattern for specifying the configuration data to be loaded when executing the load instruction of the processor core, and storing the pattern in association with the bank to be loaded in the main memory;
Storing, as a static variable, a bank name of a configuration supply source to be stored in an execution bank at the time of occurrence of other-order dynamic reconfiguration by the processor core;
Reading configuration data stored in an execution bank of the configuration memory when the execution of the program is stopped;
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank to identify a bank associated with a matching or most similar pattern; and
A debugging program, comprising: executing a step of reading configuration data indicated by the specified bank information in the bank information table. In addition, the computer
Determining whether the identified bank is an execution bank;
When the specified bank is an execution bank, reading configuration data indicated by the execution bank in the bank information table;
When the specified bank is other than the execution bank, reading configuration data indicated by the information of the specified bank in the bank information table; and
14. The program according to claim 13, wherein the step of updating the bank information table so as to be consistent with the information of the specified bank is executed. In addition, the computer
Obtaining the bank-derived value from the matrix when a load instruction is executed by the processor core;
Comparing the stored static variables with bank-derived values and, if they do not match, updating the static variables and bank information table to match the bank-derived values;
Reading the configuration data stored in the execution bank of the configuration memory when the static variable and the bank-derived value match; and
Generating a pattern identifying the configuration memory read from the execution bank;
Comparing the generated pattern with a pattern stored in the main memory associated with each bank to identify a bank associated with a matching or most similar pattern; and
The program according to claim 13 or 14, wherein the step of updating the bank information table so as to be consistent with the information of the specified bank is executed. In the step of generating the pattern, the computer
The program according to any one of claims 13 to 15, wherein the program executes a step of generating a presence pattern including a bit string indicating whether or not each of the circuit components in the matrix is used. In the step of generating the pattern, the computer
16. The step of generating a presence pattern obtained by encoding a bit string indicating whether or not each circuit component in the matrix is used is executed. program. In the step of generating the pattern, the computer
The program according to any one of claims 13 to 15, wherein the program executes a step of encoding at least a part of the configuration data.

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