JP2006147775A - Method for mounting semiconductor package and circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method or connecting a printed wiring board by which the joint of a semiconductor package can be prevented from disconnection due to heat distortion of generated heat and the life reliability of a connection terminal can be ensured, and to provide a circuit board. <P>SOLUTION: The method for mounting a semiconductor package 9 is used to mount the land grid array semiconductor package 9 to a multilayer printed wiring board 1 including copper foil wiring layers 3, 4, 7, and 8 with more than three layers. In this case, a non-through hole to a copper foil wiring layer 3 on the inside from the outermost layer 7 among the copper foil wiring layers 3, 4, 7, and 8 is formed in the multilayer printed wiring board 1, and when the semiconductor package 9 is mounted, a part of the terminal of the semiconductor package 9 is joined with a solder 16 in the non-through hole. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a technique for mounting a semiconductor package on a printed wiring board used in an electronic device, and more particularly to a mounting technique for improving the soldering reliability of a land grid array (hereinafter referred to as “LGA”) type semiconductor package. .

  In recent years, devices such as portable electronic devices are becoming smaller and more functional. For this reason, electronic components are required to be compact, thin, and highly integrated. By connecting the connection terminals in a grid array on the bottom surface of the semiconductor package and connecting them with solder, the size is reduced. Is realized.

  On the other hand, these connection methods have less stress relaxation in the connection portion than the connection method using leads such as a quad flat package. For this reason, there has been a problem that quality deterioration is likely to be caused such that the connection portion is disconnected due to a stress caused by thermal strain due to heat generation of the semiconductor package.

In view of this, a technique has been proposed that disperses stress and extends the reliability life by disposing reinforcing connection terminals having areas larger than those of other connection terminals at the four corners where stress is most easily applied (for example, patents). Reference 1).
JP-A-9-162241 (FIG. 2)

  However, in the conventional technique as described above, an effect of stress relaxation can be obtained by increasing the area of the reinforcing land, but the area for forming the reinforcing land in the semiconductor package is limited.

  In addition, as the mounting density increases, it is necessary to mask-print the solder at a high density, so a stencil with a thickness of about 100 microns is used, so the solder supplied to the connection terminals becomes very thin. Yes. For this reason, in the conventional structure as described above, since the LGA type semiconductor package that does not use solder balls for the connection terminals is connected only with the solder supplied by mask printing, the solder thickness of the connection terminal portion is extremely large. It will be thinner. In this structure, since the strain deformation amount of the solder is small, there is a problem that the effect of stress relaxation by the solder cannot be obtained, the joint portion is easily broken, and the life reliability cannot be sufficiently secured.

  The present invention solves the conventional problems as described above, and can prevent disconnection of a connection portion due to thermal distortion of heat generated in a semiconductor package, and can provide a connection method of a printed wiring board that can ensure the life reliability of a connection terminal and An object is to provide a circuit board.

  In order to achieve the above object, a semiconductor package mounting method of the present invention is a semiconductor package mounting method in which a land grid array type semiconductor package is mounted on a multilayer printed wiring board including three or more copper foil wiring layers. In the multilayer printed wiring board, a non-through hole reaching the copper foil wiring layer inside the outermost layer of the copper foil wiring layers is formed, and when the semiconductor package is mounted, the terminals of the semiconductor package are formed. Some terminals are joined to solder in the non-through hole.

The circuit board of the present invention is a circuit board in which a land grid array type semiconductor package is mounted on a multilayer printed wiring board including three or more copper foil wiring layers,
Non-through holes reaching the copper foil wiring layer inside the outermost layer of the copper foil wiring layers are formed in the multilayer printed wiring board, and some terminals of the terminals of the semiconductor package are formed in the non-through holes. It is characterized by being bonded to the inner solder.

  According to the present invention, when the LGA type semiconductor package is connected to the printed wiring board, the disconnection of the connection portion due to the thermal distortion of the heat generated in the semiconductor package can be prevented, and the life reliability of the connection terminal can be ensured.

  According to the present invention, since there is a portion where the thickness of the solder at the connection portion between the terminal of the semiconductor package and the multilayer printed wiring board is increased, the heat generated in the semiconductor package when the LGA type semiconductor package is connected to the printed wiring board. The disconnection of the connection portion due to the thermal strain can be prevented, and the life reliability of the connection terminal can be ensured.

  In the semiconductor package mounting method of the present invention, it is preferable that the part of the terminals are provided at four corners of the semiconductor package and have a larger area than terminals other than the part of the terminals. According to this configuration, the life reliability of the connection terminal can be further improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a multilayer printed wiring board according to an embodiment of the present invention. A multilayer printed wiring board 1 shown in FIG. 1 includes an insulating core resin layer 2, and copper foil wiring layers 3 and 4 are bonded to both surfaces of the core resin layer 2. A wiring pattern is formed on the copper foil wiring layers 3 and 4 by etching or the like. Laminated resin layers 5 and 6 are disposed on both surfaces of the core resin layer 2, and copper foil wiring layers 7 and 8 are bonded and laminated to the laminated resin layers 5 and 6, respectively. A wiring pattern is formed on the copper foil wiring layers 7 and 8 by etching or the like.

  FIG. 2 is a plan view of the connection terminal portion on the lower surface of the semiconductor package according to the embodiment of the present invention. The semiconductor package 9 shown in FIG. 2 is formed by arranging a plurality of connection terminals 10 in a grid pattern by a conductor pattern. Reinforcing terminals 11 having a larger area than the connecting terminals 10 are formed at the four corners of the semiconductor package 9.

  FIG. 3 shows a cross-sectional view of the multilayer printed wiring board shown in FIG. 1 during solder printing. On the copper foil wiring layer 7 on the surface on which the semiconductor package 9 is mounted, connection lands 12 are formed in accordance with the connection terminals 10. Further, a hole 13 which is a non-through hole is formed in the laminated resin layer 5 at a position corresponding to the reinforcing terminal 11 by a laser or the like. In the hole 13, the reinforcing land 14 formed by the wiring pattern in the copper foil wiring layer 3 is exposed before the solder 16 is filled.

  The printing mask 15 is formed by providing a plurality of through holes on a metal or resin plate having a uniform thickness in accordance with the wiring pattern of the multilayer printed wiring board 1. After the print mask 15 and the wiring pattern are aligned and arranged so as to overlap, paste solder 16 is arranged by squeezing.

  At this time, only the solder 16 corresponding to the thickness of the printing mask 15 is supplied to the position of the connection land 12, whereas the solder corresponding to the total thickness of the printing mask 15 and the laminated resin layer 5 is supplied to the position of the reinforcing land 13. 16 will be supplied.

  FIG. 4 shows a cross-sectional view of a circuit board according to an embodiment of the present invention. The circuit board shown in this figure is obtained by mounting the semiconductor package 9 shown in FIG. 2 on the multilayer printed wiring board shown in FIG. 1 by soldering. In the state of FIG. 3, after removing the printing mask 15, the semiconductor package 9 and other electronic components are aligned and placed on the multilayer printed wiring board 1 and reflow heated. Thus, the connection terminal 10 and the connection land 12 and the reinforcement terminal 11 and the reinforcement land 14 are mechanically and electrically connected via the solder 16.

  According to such soldering, since the thickness of the solder 16 between the reinforcing terminal 11 and the reinforcing land 14 can be increased, the stress of the thermal strain applied to the joint due to the heat generation of the semiconductor package 9 is relieved. It will be. For this reason, disconnection of the connection terminal can be prevented, and the life reliability can be improved.

  In the example of the above-described embodiment, the hole 13 that is a non-through hole has been described as reaching the copper foil wiring layer 3, but the hole 13 further reaches the lower copper foil wiring layer 4 or 8. May be.

  Moreover, although the copper foil wiring layer of the multilayer printed wiring board demonstrated in the example of 4 layers, it may be 3 layers and may be 5 layers or more. That is, the copper foil wiring layer may be three or more layers, and the hole 13 that is a non-through hole may reach the copper foil wiring layer inside the outermost copper foil wiring layer.

  As described above, the present invention can prevent disconnection of the connection portion due to heat distortion of the heat generation of the semiconductor package, and can provide a semiconductor package mounting method and circuit board that ensure the life reliability of the connection terminals. It is useful for mounting methods and circuit boards using packages.

Sectional drawing of the multilayer printed wiring board which concerns on one embodiment of this invention. The top view of the connecting terminal part of the lower surface of the semiconductor package which concerns on one embodiment of this invention. Sectional drawing at the time of the solder printing of the multilayer printed wiring board shown in FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Multilayer printed wiring board 2 Core resin layer 3, 4, 7, 8 Copper foil wiring layer 5, 6 Laminated resin layer 9 Semiconductor package 10 Connection terminal 11 Reinforcement terminal 12 Connection land 13 Hole 14 Reinforcement land 15 Print mask 16 Solder

Claims (3)

A semiconductor package mounting method for mounting a land grid array type semiconductor package on a multilayer printed wiring board including three or more copper foil wiring layers,
In the multilayer printed wiring board, a non-through hole reaching the copper foil wiring layer inside the outermost layer among the copper foil wiring layers is formed,
A method of mounting a semiconductor package, comprising: bonding a part of the terminals of the semiconductor package to solder in the non-through hole when mounting the semiconductor package.   2. The method of mounting a semiconductor package according to claim 1, wherein the some of the terminals are terminals provided at four corners of the semiconductor package and having a larger area than terminals other than the one or more terminals. A circuit board in which a land grid array type semiconductor package is mounted on a multilayer printed wiring board including three or more copper foil wiring layers,
In the multilayer printed wiring board, non-through holes reaching the copper foil wiring layer inside the outermost layer among the copper foil wiring layers are formed,
A circuit board, wherein some of the terminals of the semiconductor package are joined to solder in the non-through hole.

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