JP2006133368A - Image display apparatus and image processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display apparatus whose display performance is improved, and to provide a driving method for the same. <P>SOLUTION: The liquid crystal display 100 of the invention comprises an image processor 110 for generating an image data by sharpening the inputted video data; a source driver 104 for outputting a display signal based on an image data; and a liquid crystal panel 101 for displaying image based on the display signal. The image display signal is generated by processing the video data of adjoining three pixels, sequentially in the inputted order using a 1×3 matrix filter 115. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image display device and an image processing method, and more particularly to an image display device and an image processing method that suppress an increase in circuit scale necessary for image processing.

  When an image is displayed on an image display device such as a liquid crystal display device, image processing is performed to improve display performance and contrast. As one of image processing, so-called sharpening processing (sharpness processing) is known. When sharpening is performed, it is possible to improve the image quality by clarifying the outline of a blurred image, or by removing high-frequency noise at the expense of sharpness (sharpness). .

As is widely known, various filters having different frequency characteristics, such as a smoothing filter and a differential filter, are used for the sharpening process. For example, the smoothing filter is used to remove high-frequency noise contained in the image. In addition, the differential filter is used to emphasize high frequency components and enhance edges in the image (see, for example, Non-Patent Document 1).
Junichi Kadoya, “Creation of Image Processing Application”, Interface, CQ Publishing, September 2004, p77-89

  Conventionally, in the sharpening process, as shown in FIG. 4, a high-pass filter 10 made of a 3 × 3 matrix has been used. As shown in FIG. 4, in the high-pass filter 10, the surrounding eight coefficients other than the center coefficient are the same, and the absolute value of the center coefficient is larger than the sum of the absolute values of the surrounding coefficients. When image processing is performed using this filter, it is possible to emphasize clearly a portion where the luminance change is large, that is, a fine portion.

  In recent years, compact and lightweight image display devices such as camera-equipped mobile phones and high-resolution digital cameras have become widespread. In these image display apparatuses, when the sharpening process is performed using the 3 × 3 high-pass filter 10 described above, a three-line memory is required. For this reason, the circuit scale has increased, and there has been a problem that it is difficult to mount in a small image display apparatus.

  The present invention has been made in the background of such circumstances, and an object of the present invention is to provide an image display device and an image processing method that suppress an increase in circuit scale.

  An image display device according to a first aspect of the present invention includes: an image processing unit that generates a second signal by performing a sharpening process on an input first signal; and a display based on the second signal. An image display device having a drive unit that outputs a signal and an image display unit that displays an image based on the display signal, wherein the image processing unit is in the order of input of the first signal. The second signal is generated by processing the first signals for three adjacent pixels with a 1 × 3 matrix filter. Thereby, the expansion of the circuit scale can be suppressed.

  In the image display device according to the second aspect of the present invention, in the image display device described above, the sign of the coefficient at both ends of the filter is the same, and the sign of the coefficient at both ends is different from the sign of the coefficient at the center. is there. Further, the absolute value of the coefficient at the center of the filter is larger than twice the absolute value of the coefficients at both ends. Thereby, the display performance can be improved.

  In the image display device according to the third aspect of the present invention, in the above image display device, the absolute value of the coefficient at the center of the filter is 3 to 6 times the absolute value of the coefficients at both ends. Thereby, the display performance can be further improved.

  An image display device according to a fourth aspect of the present invention is the image display device described above, wherein the absolute value of the coefficient at the center of the filter is an even multiple of the absolute value of the coefficients at both ends. As a result, the circuit configuration can be simplified.

  An image processing method according to a fifth aspect of the present invention is an image processing method for sharpening an image display, the step of holding first signals for three adjacent pixels according to the input order and the holding Generating a second signal using a 1 × 3 matrix filter for the first signal. Thereby, the expansion of the circuit scale can be suppressed.

  In the image processing method according to the sixth aspect of the present invention, in the image processing method described above, the sign of the coefficient at both ends of the filter is the same, and the sign of the coefficient at both ends is different from the sign of the center coefficient. Further, the absolute value of the coefficient at the center of the filter is larger than twice the absolute value of the coefficients at both ends. Thereby, the display performance can be further improved.

  In the image processing method according to the seventh aspect of the present invention, in the image processing method described above, the absolute value of the coefficient at the center of the filter is 3 to 6 times the absolute value of the coefficients at both ends. As a result, the display performance can be further improved.

  In the image processing method according to the eighth aspect of the present invention, in the above image processing method, the absolute value of the coefficient at the center of the filter is an even multiple of the absolute value of the coefficients at both ends. As a result, the circuit configuration can be simplified.

  In the image processing method according to the ninth aspect of the present invention, in the image processing method described above, the value of the first signal in a portion where there is no pixel is set to 0 when performing calculation processing of the pixel located at the end of the display area. The arithmetic processing is performed as follows.

  According to the present invention, it is possible to provide an image display device and an image processing method in which an increase in circuit scale is suppressed.

  Embodiments to which the present invention can be applied will be described below with reference to the drawings. The following description is to describe the embodiment of the present invention, and the present invention is not limited to the following embodiment. For clarity of explanation, the following description and drawings are omitted and simplified as appropriate. Moreover, those skilled in the art can easily change, add, and convert each element of the following embodiments within the scope of the present invention.

  A display device according to an embodiment of the present invention will be described with reference to FIG. Here, a TN type active matrix liquid crystal display device will be described as an example of the image display device. FIG. 1 is a block diagram of a liquid crystal display device 100 according to the present embodiment. The liquid crystal display device 100 includes a liquid crystal panel 101 that displays an image, a drive control circuit 102 that supplies control signals, display data, power, and the like, a gate driver 103, a source driver 104, a graphic controller 105, and the like.

  A liquid crystal panel 101 having a display area composed of a plurality of pixels has a configuration in which liquid crystal is sandwiched between a TFT (Thin Film Transistor) array substrate (not shown) and a counter substrate (not shown) arranged to face each other. is doing. On the TFT array substrate, gate lines (scanning lines) are formed in the horizontal direction, and source lines (signal lines) are formed in the vertical direction, and TFTs are provided near the intersections of the gate lines and the source lines. In addition, a plurality of pixel electrodes are formed in a matrix between the gate line and the source line. The gate of the TFT is connected to the gate line, the source is connected to the source line, and the drain is connected to the pixel electrode.

  On the other hand, a common electrode and R (red), G (green) and B (blue) color filters are formed on the counter substrate. The common electrode is actually a transparent electrode formed on the substantially entire surface of the counter substrate so as to face the pixel electrode. A scanning signal is supplied from the gate driver 103 to each gate line. All TFTs connected to one gate line selected by each scanning signal are turned on simultaneously. Then, a display signal is supplied from the source driver 104 to each source line, and charges corresponding to the display signal are accumulated in the pixel electrode.

  The arrangement of the liquid crystal between the pixel electrode and the common electrode changes in accordance with the potential difference between the pixel electrode and the common electrode where the display signal is written. Thereby, the transmission amount of light incident from a backlight (not shown) is controlled. Each pixel of the liquid crystal panel 101 displays various shades of color according to the amount of light transmitted and any one of RGB colors. In the case of monochrome display, a color filter may not be provided.

  The drive control circuit 102 is electrically connected to the liquid crystal panel 101. The drive control circuit 102 includes a drive voltage generation circuit 106, a scanning signal control circuit 107, a display signal control circuit 108, a timing control circuit 109, and the like. The drive voltage generation circuit 106 includes a DC / DC converter (not shown), and generates a voltage supplied to each circuit from a DC power supply supplied from an external power supply. A voltage from the DC / DC converter is supplied to each logic circuit provided in the gate driver 103, the source driver 104, and the drive control circuit 102 via each transmission line. The drive voltage generation circuit 106 generates a voltage for the common electrode.

  The graphic controller 105 includes a VRAM (Video Random Access Memory) 120 in which video data is stored. The graphic controller 105 is provided with an image processing unit 110 that sharpens an image. The image processing unit 110 and the image processing method will be described in detail later. Image data obtained by performing image processing on the synchronization signal and the video data is transferred from the graphic controller 105 to the drive control circuit 102. The transferred image data is input to the display signal control circuit 108 and converted into display data.

  In addition, a synchronization signal is input from the graphic controller 105 to the timing control circuit 109. The synchronization signal includes, for example, a dot clock signal that is an input cycle of a display signal for one pixel, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, and the like. The timing control circuit 109 processes the received signal and outputs various control signals to be supplied to the gate driver 103 and the source driver 104 at a necessary timing.

  The timing control circuit 109 supplies a control signal including several types of synchronization signals to the gate driver 103 and the source driver 104. The gate driver 103 and the source driver 104 output a scanning signal or a display signal at a timing according to the control signal.

  A start pulse signal, a clock signal, an enable signal, and the like are input to the gate driver 103 from the timing control circuit 109 via the scanning signal control circuit 107. The gate signal from which the start pulse signal outputs the ON signal is selected, and the enable signal controls the output of the scanning signal, whereby the ON signal is sequentially output from each gate line. Typically, the gate driver 103 outputs a scanning signal so as to sequentially scan pixels in each row from the first row toward the subsequent row.

  The source driver 104 supplies a display signal to each source line of the liquid crystal panel 101. A display signal generated based on display data transferred from the display signal control circuit 108 is supplied to the source line at a timing instructed by the timing control circuit 109.

  A display signal input from the source driver 104 is supplied to the pixel electrode via the source / drain of the TFT, and a display signal corresponding to the gradation is applied to the pixel electrode. Then, an electric field is applied to the liquid crystal between the pixel electrode and the counter electrode. In this way, when each switching element is driven and the amount of charge to be stored is controlled according to the gradation, the alignment state of the liquid crystal changes for each pixel, the light transmittance changes, and the brightness changes for each pixel. be able to.

  Here, the image processing unit 110 according to the present embodiment will be described with reference to FIG. FIG. 2 is a block diagram for explaining the image processing unit 110. The image processing unit 110 holds an input processing unit 111 to which video data is input from the VRAM 120 provided in the graphic controller 105 described above, an arithmetic processing unit 112 that performs sharpening processing, and data for three pixels 3 The pixel memory 113, an output processing unit 114 that outputs an image data signal after the arithmetic processing, and the like are included.

  The input processing unit 111 transfers the video data input from the VRAM 120 to the arithmetic processing unit 112. Of the transferred video data, video data for three adjacent pixels is held in the three-pixel memory 113. That is, video data for 9 subpixels is held at a time. Thereafter, arithmetic processing is performed for each of R (red), G (green), and B (blue) in the arithmetic processing unit 112. Thus, sharpened image data is generated based on the video data. The image data subjected to the arithmetic processing is sequentially transferred to the output processing unit 114 and stored in the VRAM 120 in the graphic controller 105 while collecting the data for each pixel by the RGB interface. The sharpened image data is transferred to the display signal control circuit 108 as described above, and display data is generated.

  The sharpening filter used in the arithmetic processing unit 112 has a 1 × 3 matrix configuration. As a result, the amount of video data temporarily held for arithmetic processing is equivalent to 3 pixels, so that the circuit scale can be reduced. Therefore, a sharpening circuit can be mounted even in a small image display device such as a mobile phone.

  In addition, the coefficient of the sharpening filter is, for example, [negative value positive value negative value] such as [-1 6 -1], or [positive value negative value] such as [1-6 1]. Value is a positive value. That is, the signs of the coefficients at both ends are the same, and the signs of the coefficients at both ends are different from the signs of the center coefficient. Further, the absolute value of the center coefficient is larger than twice the absolute value of the coefficients at both ends. Preferably, the absolute value of the central coefficient is 3 to 6 times the absolute value of the coefficients at both ends. Thereby, the edge portion of the display image can be clarified and the display performance can be improved.

  An example of calculation when sharpening processing is performed using the 1 × 3 sharpening filter 115 of [−0.25 1.5 −0.25] shown in FIG. 3 is shown below. The video data at the left end of the display screen is R1, G1, B1, the second pixel is R2, G2, B2, the third pixel is R3, G3, B3,. Further, in the calculation processing of the left end and the right end of the display area, since the adjacent pixels are only on one side, the video data without the adjacent pixels is calculated as 0. That is, when the leftmost pixel is arithmetically processed, there is no leftmost video data among the three-pixel video data. Therefore, the value of the video data corresponding to −0.25 on the left side of the sharpening filter 115 is set to 0.

Image data (R1-2out, G1-2out, B1-2out) generated when sharpening processing is performed on video data (R1-3, G1-3, B1-3) using the sharpening filter 115 described above. ) Is shown below.
R1out = {(− 0.25) × 0 + 1.5 × R1 + (− 0.25) × R2} / 1
G1out = {(− 0.25) × 0 + 1.5 × G1 + (− 0.25) × G2} / 1
B1out = {(− 0.25) × 0 + 1.5 × B1 + (− 0.25) × B2} / 1
R2out = {(− 0.25) × R1 + 1.5 × R2 + (− 0.25) × R3} / 1
G2out = {(− 0.25) × G1 + 1.5 × G2 + (− 0.25) × G3} / 1
R2out = {(− 0.25) × B1 + 1.5 × B2 + (− 0.25) × B3} / 1
...
Here, the last “1” in each equation is the absolute value of the sum of the coefficients of the 1 × 3 sharpening filter 115.

  In the 1 × 3 sharpening filter 115 described above, “× 0.25” can be calculated by shifting it to the right by 2 bits. Further, “× 1.5” can be calculated as the original value + the original value shifted to the right by 1 bit. In this way, by making the absolute value of the coefficient at the center of the sharpening filter 115 an even multiple of the absolute value of the coefficients at both ends, the circuit configuration can be simplified. Note that the image processing unit 110 may be provided with an error processing unit in a case where image data after image processing becomes a negative value.

  Further, in this sharpening process, only the outline of the display image may be extracted, and only that portion may be filtered. This contour extraction can be performed using a contour extraction filter in which the absolute value of the center coefficient is twice the absolute value of the coefficients at both ends. However, it is preferable to apply the sharpening process to the entire display screen because the overall contrast is improved.

  The image processing can be switched on / off according to user settings. For example, when the contrast is low, image processing may be turned on to display an image with high contrast. In addition, when it is not desired that others see the displayed screen, it can be turned off to display an image with low contrast.

  Here, an example in which the image processing unit 110 is configured as a circuit in the graphic controller 105 is shown, but the present invention is not limited to this, and the circuit may be configured in the driver IC. Moreover, you may comprise as a program (software). The image processing method according to the present invention can be used for various image display devices such as PDP and organic EL.

It is a block diagram which shows an example of a structure of the liquid crystal display device concerning this Embodiment. It is a block diagram for demonstrating the image process part concerning this Embodiment. It is a figure which shows the sharpening filter used for the image process concerning this Embodiment. It is a figure which shows the high pass filter used for the conventional image processing.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Liquid crystal display device 101 Liquid crystal panel 102 Drive control circuit 103 Gate driver 104 Source driver 105 Graphic controller 106 Drive voltage generation circuit 107 Scan signal control circuit 108 Display signal control circuit 109 Timing control circuit 110 Image processing part 111 Input processing part 112 Arithmetic processing Unit 113 3 pixel memory 114 output processing unit 120 VRAM

Claims (9)

An image processing unit that generates a second signal by performing a sharpening process on the input first signal;
A drive unit that outputs a display signal based on the second signal;
An image display unit for displaying an image based on the display signal;
An image display device comprising:
The image processing unit generates the second signal by processing the first signals of three pixels adjacent in the input order in the first signal with a 1 × 3 matrix filter. Display device. The signs of the coefficients at both ends of the filter are the same,
Unlike the sign of the coefficients at both ends and the sign of the center coefficient,
The image display apparatus according to claim 1, wherein an absolute value of a coefficient at a center of the filter is larger than twice an absolute value of coefficients at both ends.   The image display device according to claim 2, wherein an absolute value of a coefficient at the center of the filter is 3 to 6 times an absolute value of coefficients at both ends.   The image display device according to claim 2, wherein the absolute value of the coefficient at the center of the filter is an even multiple of the absolute value of the coefficients at both ends. An image processing method for sharpening an image display,
Holding a first signal for three adjacent pixels according to an input order;
Generating a second signal using a 1 × 3 matrix filter for the retained first signal;
An image processing method. The signs of the coefficients at both ends of the filter are the same,
Unlike the sign of the coefficients at both ends and the sign of the center coefficient,
The image processing method according to claim 5, wherein an absolute value of a coefficient at the center of the filter is larger than twice an absolute value of coefficients at both ends.   The image processing method according to claim 6, wherein an absolute value of a coefficient at the center of the filter is 3 to 6 times an absolute value of coefficients at both ends.   The image display device according to claim 6 or 7, wherein the absolute value of the coefficient at the center of the filter is an even multiple of the absolute value of the coefficients at both ends.   9. The image processing method according to claim 5, wherein when performing calculation processing on a pixel located at an edge of the display area, the calculation processing is performed with a value of the first signal in a portion where no pixel is set as 0. .

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