JP2006128259A - Semiconductor device and semiconductor device having cooler - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having improved heat radiation, and to provide a semiconductor device having a cooler. <P>SOLUTION: The semiconductor device 1A includes a silicon chip 34; electrodes 32, 36, 38; a resin section 46; inorganic hard films 48, 54; buffer layers 50, 56; and plated layers 52, 58. Insulating properties between micro channel coolers 11A, 12A made of metal and the electrodes 32, 36 are secured by the inorganic hard films 48, 54. Heat radiation surfaces of the electrodes 32, 36 project from the surface of the resin section 46, and adhesion between the micro channel coolers 11A, 12A and the heat radiation surface cannot be deteriorated by the resin section 46, thus causing an advantage in heat radiation. Fitness when joining the micro channel coolers 11A, 12A to the semiconductor device 1A is improved by the plated layers 52, 58, thus dispensing with the application of grease or the like and improving heat conduction. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a semiconductor device with a cooler, and more particularly to a power semiconductor device to which a cooler is attached.

  In recent years, electric vehicles, hybrid vehicles, and the like have attracted attention. In such applications, there is a demand for power semiconductor elements that are small, efficient, and reliable. Power semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors) handle a large amount of current, so heat dissipation during operation is important.

  Usually, since a semiconductor chip has a plate shape, it is ideal to radiate heat from both the front and back sides of the chip. Japanese Patent Laid-Open No. 2001-308245 (Patent Document 1) discloses such a double-sided heat radiation type power semiconductor module.

An insulating plate, a heat sink mass of a flat copper plate, and a flat refrigerant tube are disposed on each side of the double-sided heat radiation type semiconductor module, and are fastened by bolts and nuts from both sides, and the semiconductor module is supported by pressing.
JP 2001-308245 A JP 2002-237556 A

  However, because there are manufacturing errors in the power semiconductor module and the insulating plate, the copper plate heat sink mass and the flat refrigerant tube arranged on both sides, there is a manufacturing error, so the adhesion between the heat dissipation part of the power semiconductor module and the heat absorption part of the cooler There is room for improvement.

  In order to improve adhesion, grease or the like is applied. However, grease may protrude if the amount applied is too large, or if the coated surface is not horizontal, it will sag and the thickness may become uneven. , Handling was necessary.

  There are also manufacturing errors in the electrodes and substrates of the power semiconductor module, and there is room for improvement in the adhesion between components inside the semiconductor module.

  An object of the present invention is to provide a semiconductor device with good heat dissipation and improved performance and a semiconductor device with a cooler.

  In summary, the present invention is a semiconductor device comprising a flat semiconductor chip, a first heat transfer member connected to the first main surface of the semiconductor chip and having a first heat radiating surface, and the semiconductor chip. And a resin portion that supports and supports the first heat transfer member. The first heat radiating surface protrudes from the surface of the resin portion.

  Preferably, a plating layer is formed on the first heat dissipation surface.

  More preferably, the first heat transfer member includes an electrode that is electrically connected to the semiconductor chip, and an insulating layer that electrically insulates the electrode from the plating layer.

  Preferably, a resin layer having an insulating property is formed on the first heat dissipation surface.

  Preferably, the semiconductor chip further includes a second heat transfer member connected to the second main surface of the semiconductor chip and having a second heat radiating surface. The resin part further supports the second heat transfer member such that the second heat radiating surface protrudes from the surface of the resin part.

  According to another aspect of the present invention, a semiconductor device with a cooler, which is a flat semiconductor chip and a first heat transfer member connected to the first main surface of the semiconductor chip and having a first heat radiating surface. And a cooler joined to the first heat radiating surface, and a resin portion that houses the semiconductor chip and supports the first heat transfer member. The first heat radiating surface protrudes from the surface of the resin portion.

  Preferably, a plating layer is formed on at least one of the joint surface of the cooler with respect to the first heat dissipation surface and the first heat dissipation surface.

  Preferably, the first heat transfer member includes an electrode that is electrically connected to the semiconductor chip, and an insulating layer that electrically insulates the electrode and the plating layer.

  Preferably, the first heat radiation surface and the cooler are ultrasonically bonded or thermocompression bonded.

  Preferably, a resin layer having an insulating property is formed on at least one of the joint surface of the cooler to the first heat radiation surface and the first heat radiation surface.

  Preferably, the semiconductor device with a cooler further includes a second heat transfer member connected to the second main surface of the semiconductor chip and having a second heat radiating surface. The resin part further supports the second heat transfer member such that the second heat radiating surface protrudes from the surface of the resin part. The cooler is further joined to the second heat radiating surface.

  According to still another aspect of the present invention, a semiconductor device includes a flat semiconductor chip and a first heat transfer member formed of a porous metal and connected to the first main surface of the semiconductor chip. . The first heat transfer member has a first connection surface that is plastically deformed by being pressed against the semiconductor chip.

  Preferably, the semiconductor device further includes a second heat transfer member formed of a porous metal and connected to the second main surface of the semiconductor chip. The second heat transfer member has a second connection surface that is plastically deformed by being pressed against the semiconductor chip.

  Preferably, the first heat transfer member is a bus bar for supporting the semiconductor chip to dissipate heat and for exchanging high-frequency signals between the semiconductor chip and the outside.

  According to still another aspect of the present invention, a semiconductor device is formed of a semiconductor element and a porous metal, and is electrically connected to the semiconductor element to exchange high-frequency signals between the semiconductor chip and the outside. And a bus bar.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device and the semiconductor device with a cooler which improved the adhesiveness of the component of the thermal radiation path | route and improved heat dissipation are realizable.

  In addition, electrical characteristics at high frequencies can be improved.

  Hereinafter, the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

  FIG. 1 is a diagram showing the overall shape of a semiconductor device with a cooler according to the present invention.

  Referring to FIG. 1, a semiconductor device 100 with a cooler includes microchannel coolers 11 to 18 and semiconductor devices 1 to 7 sandwiched between microchannel coolers 11 to 18.

  The microchannel coolers 11 to 18 are formed of a metal having good thermal conductivity such as aluminum or copper. A cooling water flow path is formed inside each of the microchannel coolers 11 to 18, and fine fins are formed on the inner surface of the cooling water flow path.

  The semiconductor devices 1 to 7 are double-sided cooling type semiconductor devices. Each semiconductor device is cooled by being sandwiched between microchannel coolers. Since metals such as aluminum and copper have good electrical conductivity, the microchannel coolers 11 to 18 and the electrodes of the semiconductor devices 1 to 7 need to be insulated.

[Embodiment 1]
FIG. 2 is a cross-sectional view showing the configuration of the semiconductor device with a cooler 100A of the first embodiment.

  Referring to FIG. 2, semiconductor device 100A with a cooler includes microchannel coolers 11A and 12A and semiconductor device 1A. Although not shown, the same configuration is applied to the semiconductor devices 2 to 7 and the microchannel coolers 13 to 18 of FIG.

  The semiconductor device 1A includes a semiconductor chip 34, electrodes 32 and 36 electrically connected to both main surfaces of the semiconductor chip 34 by solder layers 40 and 42, respectively, and a wire connected to a gate electrode formed on one main surface. And an electrode 38 connected by 44. The electrodes 32 and 36 are main electrodes for transmitting and receiving a main current, and the electrode 38 is a control electrode.

  If the electrodes 32 and 36 are, for example, power semiconductor elements used in an inverter that drives a three-phase motor, P and N poles and U, V, and W phase outputs are connected.

  The electrode 32 corresponds to a “first heat transfer member” having a heat dissipation surface and connected to the first main surface of the semiconductor chip 34. The electrode 36 corresponds to a “second heat transfer member” having a heat dissipation surface and connected to the second main surface of the semiconductor chip 34. Although the case where the heat transfer member is also used as the electrode is shown, the heat transfer member and the electrode may be provided separately.

  The semiconductor device 1 </ b> A further includes a resin portion 46 that supports the electrodes 32 and 36 and accommodates the semiconductor chip 34, and an inorganic hard film 48 and 54 having electrical insulation that covers the heat radiation surfaces of the electrodes 32 and 36. Including. The heat radiation surfaces of the electrodes 32 and 36 protrude from the surface of the resin portion 46, and the resin portion 46 does not hinder the close contact between the microchannel coolers 11A and 12A and the heat radiation surface, which is advantageous for heat radiation.

  The inorganic hard films 48 and 54 ensure insulation between the metal microchannel coolers 11A and 12A and the electrodes 32 and 36. Therefore, in the past, in order to ensure insulation between the electrode and the cooler, a plate having a good thermal conductivity such as a ceramic substrate and having an excellent insulating property was sandwiched between them, but such a plate is not necessary. Accordingly, the semiconductor device can be brought closer to the cooler accordingly, and the thermal resistance is lowered, which is advantageous for cooling. In addition, since the entire semiconductor device with a cooler can be made small, it is advantageous when the space limitation for in-vehicle use is severe.

  As an example of the inorganic hard films 48 and 54, a DLC (Diamond Like Carbon) thin film or the like can be used. The DLC thin film can be formed by low temperature chemical vapor deposition. In addition, as another example of the inorganic hard films 48 and 54, ceramic coating or the like can be used.

  The semiconductor device 1A further includes buffer layers 50 and 56 provided between the heat radiation surfaces of the electrodes 32 and 36 and the inorganic hard films 48 and 54, respectively, and plating provided on the outer surfaces of the buffer layers 50 and 56, respectively. Layers 52 and 58.

  As the buffer layers 50 and 56, for example, polyimide or the like can be used. The buffer layers 50 and 56 absorb the difference in linear expansion coefficient and the Young's modulus between the electrodes 32 and 36 and the inorganic hard films 48 and 54 and prevent the inorganic hard films 48 and 54 from cracking. Can do.

  Each of the microchannel coolers 11A and 12A is formed on both sides of a metal cooler main body 20 in which fins are formed in an internal cooling water flow path and a cooler main body 20 in contact with a heat radiation surface of the semiconductor device. Plating layers 21 and 22. The metal cooler body 20 is made of, for example, aluminum or copper having good thermal conductivity.

  As the plating layers 21, 22, 52, 58, nickel plating which is softer than copper or the like can be used. The plating layers 21, 22, 52, 58 improve the familiarity when the microchannel coolers 11 </ b> A, 12 </ b> A and the semiconductor device 1 </ b> A are joined. The microchannel coolers 11A and 12A and the semiconductor device 1A are joined by ultrasonic joining or pressure welding.

  Conventionally, when a ceramic plate or the like is sandwiched to ensure insulation, grease is provided at two locations between the ceramic plate and the cooler and between the ceramic plate and the electrode in order to improve adhesion and improve thermal conductivity. It was necessary to apply etc. However, in the present invention, the ceramic plate is unnecessary, and since the joining is performed by ultrasonic joining or pressure welding, it is not necessary to apply grease or the like, and heat conduction is improved.

  In FIG. 2, the case where the plating layer is provided on both the joint surfaces of the microchannel coolers 11A and 12A and the semiconductor device 1A is shown as an example. Good.

  As described above, in the first embodiment, the thermal resistance between the cooler and the semiconductor device can be reduced, and the efficiency of heat dissipation is improved.

[Embodiment 2]
FIG. 3 is a cross-sectional view showing the configuration of the semiconductor device with a cooler 100B of the second embodiment.

  Referring to FIG. 3, semiconductor device 100B with a cooler includes microchannel coolers 11B and 12B and semiconductor device 1B. Although not shown, the same configuration is applied to the semiconductor devices 2 to 7 and the microchannel coolers 13 to 18 of FIG.

  Semiconductor device 1B includes insulating layers 72 and 74 in place of inorganic hard films 48 and 54, buffer layers 50 and 56, and plating layers 52 and 58 in the configuration of semiconductor device 1A in FIG.

  Each of the microchannel coolers 11B and 12B is formed on both surfaces of a metal cooler main body 20 in which fins are formed in the internal cooling water flow path and the cooler main body 20 in contact with the heat radiation surface of the semiconductor device. Insulating layers 61 and 62. The metal cooler body 20 is made of, for example, aluminum or copper having a good thermal conductivity.

  As the insulating layers 61, 62, 72, and 74, for example, an insulating resin coating material, an adhesive, or the like can be used. The microchannel coolers 11B and 12B are pressed against the semiconductor device 1B and connected by ultrasonic bonding or thermocompression bonding. As a result, the adhesion between the microchannel coolers 11B and 12B and the semiconductor device 1B can be improved without using grease.

  If insulating properties are ensured by interposing a ceramic plate or ceramic coating therebetween, for example, the microchannel coolers 11B and 12B and the semiconductor device 1B are connected with a conductive adhesive having a good thermal conductivity mixed with metal fine particles. It may be glued.

  As described above, in the second embodiment, as in the first embodiment, the thermal resistance between the cooler and the semiconductor device can be reduced, and the efficiency of heat dissipation is improved.

[Embodiment 3]
FIG. 4 is a cross-sectional view showing a configuration of a cooler-equipped semiconductor device 100C according to the third embodiment.

  Referring to FIG. 4, a semiconductor device 100C with a cooler includes microchannel coolers 11C and 12C and a semiconductor device 1C. Although not shown, the same configuration is applied to the semiconductor devices 2 to 7 and the microchannel coolers 13 to 18 of FIG.

  The semiconductor device 1C includes a semiconductor chip 84, electrodes 82 and 86 electrically connected to both main surfaces of the semiconductor chip 84 by porous metal layers 90 and 92, respectively, and a gate electrode formed on one main surface. And an electrode 88 connected by a wire 94. The electrodes 82 and 86 are main electrodes for transmitting and receiving a main current, and the electrode 88 is a control electrode.

  For example, if the electrodes 82 and 86 are power semiconductor elements used in an inverter that drives a three-phase motor, P and N poles and U, V, and W phase outputs are connected.

  The electrode 82 corresponds to a “first heat transfer member” having a heat dissipation surface and connected to the first main surface of the semiconductor chip 84. A porous metal layer 98 is provided on the heat dissipation surface of the electrode 82. The electrode 86 corresponds to a “second heat transfer member” having a heat dissipation surface and connected to the second main surface of the semiconductor chip 84. A porous metal layer 99 is provided on the heat dissipation surface of the electrode 86. Although the case where the heat transfer member is also used as the electrode is shown, the heat transfer member and the electrode may be provided separately.

  The semiconductor device 1 </ b> C further includes a resin portion 96 that supports the electrodes 82 and 86 and accommodates the semiconductor chip 84. The porous metal layers 98 and 99 provided on the heat dissipation surfaces of the electrodes 82 and 86 protrude from the surface of the resin portion 96, and the resin portion 96 inhibits the close contact between the microchannel coolers 11C and 12C and the heat dissipation surface. This is advantageous for heat dissipation.

  Each of the microchannel coolers 11C and 12C is formed on both surfaces of a metal cooler main body 20 in which fins are formed in an internal cooling water flow path and a cooler main body 20 in contact with a heat radiation surface of the semiconductor device. Insulating layers 61 and 62. The metal cooler body 20 is made of, for example, aluminum or copper having a good thermal conductivity.

  The insulating layers 61 and 62 ensure insulation between the metal microchannel coolers 11C and 12C and the electrodes 82 and 86. Therefore, in the past, in order to ensure insulation between the electrode and the cooler, a plate having a good thermal conductivity such as a ceramic substrate and having an excellent insulating property was sandwiched between them, but such a plate is not necessary. Accordingly, the semiconductor device can be brought closer to the cooler, and the thermal resistance is lowered, which is advantageous for cooling. In addition, since the entire semiconductor device with a cooler can be made small, it is advantageous when the space limitation for in-vehicle use is severe.

  As an example of the insulating layers 61 and 62, a DLC (Diamond Like Carbon) thin film or the like can be used. The DLC thin film can be formed by low temperature chemical vapor deposition. Further, as other examples of the insulating layers 61 and 62, ceramic coating, coating with insulating resin, or the like can be used.

  The porous metal is a metal such as a porous sponge, and the hardness can be adjusted by the ratio and size of the pores. The porous metal layers 98 and 99 are adjusted to be softer than copper or the like, and pressurizing and bonding to improve the familiarity when the microchannel coolers 11C and 12C and the semiconductor device 1C are bonded.

  Also in the third embodiment, the ceramic plate is unnecessary, and since the joining is performed by pressure welding, it is not necessary to apply grease or the like, and the heat conduction is improved.

  5 to 9 are diagrams for explaining a process of manufacturing the semiconductor device 1C in FIG.

  Referring to FIG. 5, porous metal layer 90 is attached to the portion of electrode 82 where the semiconductor chip is mounted, and porous metal layer 98 is attached to the heat dissipation surface of electrode 82.

  With reference to FIG. 6, the semiconductor chip 84 is pressed onto the upper portion of the porous metal layer 90. Since the porous metal layer 90 is crushed by pressurization, an extra thickness is provided in advance. By doing so, the insulation distance between the electrode 82 and the electrode 86 can be maintained even after pressurization.

  Referring to FIG. 7, as a result of pressing semiconductor chip 84 on top of porous metal layer 90, the thickness of porous metal layer 90 changes from d1 to d2, and porous metal layer 90 is plastically deformed to have a thickness. getting thin. Thereafter, the electrode 88 and the gate electrode on the semiconductor chip are connected by a wire 94.

  Referring to FIG. 8, the porous metal layers 92 and 99 are attached in advance to the electrode 86 in the same manner as described with reference to FIG. 5, and the semiconductor chip 84 and the porous metal layer 92 are adhered by pressing the electrode 86. To increase. The porous metal layer 92 also becomes thinner by pressurization than before pressurization. The porous metal layer 92 eliminates the need for a solder layer that has been used for conventional bonding.

  Referring to FIG. 9, resin portion 96 is formed by transfer molding in a state where porous metal layers 98 and 99 corresponding to the heat radiating surface protrude from the surface. The porous metal layers 90 and 92 are kept pressurized during molding, and the resin portion 96 is formed. When the resin part 96 is cured, the porous metal layer can be kept pressed against the semiconductor chip by the resin part 96.

  The porous metal layers 98 and 99 are heat dissipation surfaces connected to the microchannel coolers 11C and 12C as described with reference to FIG. 4, and the deformation of the porous metal layers 98 and 99 causes the microchannel coolers 11C and 12C to be deformed. Adhesion can be enhanced by absorbing manufacturing tolerances of surface dimensions.

[Embodiment 4]
FIG. 10 is a cross-sectional view showing a configuration of a semiconductor device 1D used in the semiconductor device with a cooler of the fourth embodiment.

  The semiconductor device with a cooler of the fourth embodiment uses a semiconductor device 1D instead of the semiconductor device 1C of the semiconductor device with a cooler 100C described in FIG.

  Referring to FIG. 10, a semiconductor device 1D is formed on one main surface of a semiconductor chip 104, electrodes 106 and 102 made of porous metal that are electrically connected to both main surfaces of the semiconductor chip 104, respectively. And an electrode 108 connected to the gate electrode by a wire 110. The electrodes 102 and 106 are main electrodes for transmitting and receiving a main current, and the electrode 108 is a control electrode.

  If the electrodes 102 and 106 are, for example, power semiconductor elements used in an inverter that drives a three-phase motor, P and N poles and U, V, and W phase outputs are connected.

  The electrode 102 corresponds to a “first heat transfer member” having a heat radiating surface and connected to the first main surface of the semiconductor chip 104. The electrode 106 corresponds to a “second heat transfer member” having a heat dissipation surface and connected to the second main surface of the semiconductor chip 104. Although the case where the heat transfer member is also used as the electrode is shown, the heat transfer member and the electrode may be provided separately.

  The semiconductor device 1 </ b> D further includes a resin portion 112 that supports the electrodes 102 and 106 and accommodates the semiconductor chip 104. The heat dissipating surfaces of the electrodes 102 and 106 protrude from the surface of the resin portion 112, and the resin portion 112 does not hinder the close contact between the microchannel cooler and the heat dissipating surface, which is advantageous for heat dissipation.

  By using the porous metal, the connection to the semiconductor chip 104 and the close contact with the cooler have the same effect as the semiconductor device 1C shown in FIG.

  FIG. 11 is a diagram for explaining the shape of the bus bar portion of the electrode 106 in FIG. 10.

  Referring to FIG. 11, electrode 106 is formed of a porous metal, and a large number of holes 120 are formed therein. For example, in a power semiconductor element used for an inverter of a three-phase motor, a high-frequency alternating current exceeding 10 KHz flows through the electrode 106 by PWM control. It is known that a high-frequency current flows only to a depth of several millimeters from the skin in a normal bus bar due to the skin effect. Therefore, conventionally, in order to flow a large current, the bus bar has been formed into a wide flat shape or a hollow pipe shape.

  However, by using a porous metal for the bus bar, a current flows through a hole in the deep part from the skin as well as the skin part. If a porous metal is used for the bus bar, the width can be made narrower than that of a normal bus bar even when the same current flows. Further, if porous metal is used for the bus bar, the weight can be reduced. Especially for automobiles, weight reduction is an important factor because it relates to fuel consumption.

  Further, the end of the bus bar is usually provided with a hole for fastening a bolt. If a porous metal is used for the bus bar, the tightening portion is difficult to tighten with respect to the tightening of the bolt, and an effect of preventing the bolt from loosening is obtained, and the fastening reliability is improved.

[Embodiment 5]
FIG. 12 is a cross-sectional view showing the configuration of the semiconductor device of the fifth embodiment.

  Referring to FIG. 12, the semiconductor device of the fifth embodiment includes a ceramic substrate 202 with good thermal conductivity, an electrode pattern 210 such as aluminum or copper brazed on the lower surface of the ceramic substrate 202, and a ceramic substrate 202. It includes a porous metal layer 204 provided on the upper surface, a semiconductor chip 206 pressed against the porous metal layer 204, and an upper block electrode 208 pressed against the upper surface of the semiconductor chip 206.

  The ceramic substrate 202, the electrode pattern 210, and the porous metal layer 204 correspond to a conventional DBA (Direct Brazed Aluminum) or DBC (Direct Brazed Copper) substrate.

  The semiconductor chip 206 is a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a thyristor.

  Porous metal is used for the electrode pattern on the ceramic substrate and the upper block electrode. Thereby, the porous metal plastically deforms and absorbs the dimensional variation within the manufacturing tolerance of the joint surface which becomes a problem at the time of press contact with the semiconductor chip.

  Further, since the pressure welding is performed, it is not necessary to provide a solder layer which has been necessary for conventional joining.

  FIG. 12 shows an example in which one semiconductor chip is mounted. For example, when a plurality of components are mounted on a ceramic substrate, a dimension between the plurality of components at the time of pressure contact is obtained by interposing a porous metal layer therebetween. Variations can be absorbed by the porous metal layer.

  In addition, with respect to heat dissipation, as in the first to fourth embodiments, the adhesion is improved, the thermal resistance between the substrate or electrode and the semiconductor chip can be reduced, and the efficiency of heat dissipation is improved.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is the figure which showed the whole shape of the semiconductor device with a cooler of this invention. FIG. 3 is a cross-sectional view showing a configuration of a cooler-equipped semiconductor device 100A in the first embodiment. It is sectional drawing which shows the structure of semiconductor device 100B with a cooler of Embodiment 2. FIG. It is sectional drawing which shows the structure of 100 C of semiconductor devices with a cooler of Embodiment 3. FIG. It is the figure which showed the 1st process of manufacturing the semiconductor device 1C in FIG. It is the figure which showed the 2nd process of manufacturing the semiconductor device 1C in FIG. It is the figure which showed the 3rd process of manufacturing the semiconductor device 1C in FIG. It is the figure which showed the 4th process of manufacturing the semiconductor device 1C in FIG. It is the figure which showed the 5th process of manufacturing 1 C of semiconductor devices in FIG. It is sectional drawing which shows the structure of semiconductor device 1D used with the semiconductor device with a cooler of Embodiment 4. FIG. It is a figure for demonstrating the shape of the bus-bar part of the electrode 106 in FIG. FIG. 10 is a cross-sectional view showing a configuration of a semiconductor device according to a fifth embodiment.

Explanation of symbols

  1-7, 1A-1D Semiconductor device, 11-18, 11A-11C, 12A-12C Microchannel cooler, 20 cooler body, 21, 22, 52, 58 plating layer, 32, 36, 38, 82, 86 , 88, 102, 106, 108 electrode, 34, 84, 104, 206 semiconductor chip, 40, 42 solder layer, 44, 94, 110 wire, 46, 96, 112 resin part, 48, 54 inorganic hard film, 50, 56 Buffer layer, 61, 62, 72, 74 Insulating layer, 90, 92, 98, 99, 204 Porous metal layer, 100, 100A to 100C Semiconductor device with cooler, 120 Air hole, 202 Ceramic substrate, 208 Upper block electrode 210 Electrode pattern.

Claims (15)

A flat semiconductor chip;
A first heat transfer member connected to the first main surface of the semiconductor chip and having a first heat dissipation surface;
A resin part that houses the semiconductor chip and supports the first heat transfer member;
The semiconductor device, wherein the first heat dissipation surface protrudes from the surface of the resin portion.   The semiconductor device according to claim 1, wherein a plating layer is formed on the first heat dissipation surface. The first heat transfer member is
An electrode electrically connected to the semiconductor chip;
The semiconductor device according to claim 2, further comprising an insulating layer that electrically insulates the electrode from the plating layer.   The semiconductor device according to claim 1, wherein an insulating resin layer is formed on the first heat dissipation surface. A second heat transfer member connected to the second main surface of the semiconductor chip and having a second heat dissipation surface;
The semiconductor device according to claim 1, wherein the resin portion further supports the second heat transfer member such that the second heat radiating surface protrudes from a surface of the resin portion. A flat semiconductor chip;
A first heat transfer member connected to the first main surface of the semiconductor chip and having a first heat dissipation surface;
A cooler joined to the first heat dissipation surface;
A resin part that houses the semiconductor chip and supports the first heat transfer member;
The semiconductor device with a cooler, wherein the first heat dissipation surface protrudes from the surface of the resin portion.   The semiconductor device with a cooler according to claim 6, wherein a plating layer is formed on at least one of a joint surface of the cooler with respect to the first heat dissipation surface and the first heat dissipation surface. The first heat transfer member is
An electrode electrically connected to the semiconductor chip;
The semiconductor device with a cooler according to claim 7, comprising an insulating layer that electrically insulates the electrode from the plating layer.   The semiconductor device with a cooler according to claim 7, wherein the first heat radiation surface and the cooler are joined by ultrasonic bonding or thermocompression bonding.   The semiconductor device with a cooler according to claim 7, wherein a resin layer having an insulating property is formed on at least one of a joint surface of the cooler to the first heat radiation surface and the first heat radiation surface. . A second heat transfer member connected to the second main surface of the semiconductor chip and having a second heat dissipation surface;
The resin part further supports the second heat transfer member such that the second heat radiating surface protrudes from the surface of the resin part,
The semiconductor device with a cooler according to claim 7, wherein the cooler is further joined to the second heat radiation surface. A flat semiconductor chip;
A first heat transfer member formed of a porous metal and connected to the first main surface of the semiconductor chip;
The first heat transfer member has a first connection surface that is plastically deformed by being pressed against the semiconductor chip. A second heat transfer member formed of a porous metal and connected to the second main surface of the semiconductor chip;
The semiconductor device according to claim 12, wherein the second heat transfer member has a second connection surface that is plastically deformed by being pressed by the semiconductor chip.   The semiconductor device according to claim 12, wherein the first heat transfer member is a bus bar that supports the semiconductor chip to dissipate heat and exchanges high-frequency signals between the semiconductor chip and the outside. A semiconductor element;
A semiconductor device comprising: a bus bar formed of a porous metal, electrically connected to the semiconductor element, and for transmitting and receiving a high-frequency signal between the semiconductor chip and the outside.

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