JP2006128178A - Fine tile-like element, method of manufacturing the same, semiconductor integrated circuit, an electro-optical device and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a fine tile-like element which can demonstrate a desired function with high reliability even if the part of the fine tile-like element has a defect or a crack, etc.; and to provide a method of manufacturing the fine tile-like element, a semiconductor integrated circuit, an electro-optical device, and an electronic apparatus. <P>SOLUTION: The fine tile-like element 1A includes at least an electronic functional device, such as a surface emitting laser 10, etc., and forms a tile shape (tile profile 2). The functional part of the electronic functional device (narrow segment 5, etc.) is arranged so that, when the flat surface of the tile shape is seen, it is arranged so as not to be lapped with the symmetrical axis 3 of the longitudinal direction in the flat surface. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a micro tile element, a method for manufacturing the micro tile element, a semiconductor integrated circuit, an electro-optical device, and an electronic apparatus.

  A gallium arsenide surface emitting laser (VCSEL), photodiode (PD), high electron mobility transistor (HEMT), etc. are provided on a silicon semiconductor substrate, and a thin film transistor (TFT) for each pixel of a liquid crystal display (LCD). A technique for forming a semiconductor element on a substrate made of a different material, such as attaching a micro silicon transistor to a glass substrate instead of the above, is considered.

  As an integrated circuit including semiconductors of different materials, an optoelectronic integrated circuit (OEIC) can be given. An optoelectronic integrated circuit is an integrated circuit provided with input / output means using light. Signal processing within the integrated circuit is performed using electrical signals, but input / output from / to the outside of the integrated circuit is performed using optical signals.

As a technique for forming a semiconductor element on a substrate made of a different material, there is an epitaxial lift-off (ELO) method. The epitaxial lift-off method is a method in which a semiconductor device (functional element) is formed on a semiconductor substrate, and only a surface layer (functional layer) including the semiconductor device on the substrate is separated from the semiconductor substrate into a fine tile shape. It is. The separated micro tile-like element constitutes a surface emitting laser made of a compound semiconductor, for example. The micro tile-like element is attached to, for example, a silicon substrate (final substrate) including an integrated circuit to constitute an optoelectronic integrated circuit (see, for example, Patent Document 1).
JP 2003-197881 A

By the way, as a manufacturing method of the micro tile element by the epitaxial lift-off method, the following steps are considered. FIG. 8 is a schematic cross-sectional view showing an example of the epitaxial lift-off method.
First, a sacrificial layer 51 is formed on the substrate 50, and a functional layer 52 is formed on the sacrificial layer 51 (see FIG. 8A).
Second, a separation groove 53 is formed on the upper surface side of the substrate 50 so as to surround a region to be a desired micro tile element. The depth of the separation groove 53 is made deeper than the sacrificial layer 51 (see FIG. 8A).
Third, a holding film (not shown) is attached to the upper surface of the functional layer 52.
Fourth, a selective etching solution is injected into the separation groove 53 and only the sacrificial layer 51 is selectively etched (see FIG. 8B).
Fifth, when all of the sacrificial layer 51 is etched, the functional layer 52 is separated from the substrate 50 in a micro tile shape, and the micro tile element 70 is formed (see FIG. 8C).
Sixth, the micro tile element 70 held on the holding film is transferred to the final substrate or the like.

  However, there is a problem in the fourth step in the above manufacturing method. That is, in the fourth step, the sacrificial layer 51 starts to be etched from the portion exposed in the separation groove 53, and the etching progresses substantially horizontally. The planar shape of the sacrificial layer 51 is surrounded by the separation groove 53 before the start of etching, and coincides with the outer shape of the micro tile element 70 formed thereafter (see FIG. 8A).

  Thereafter, the sacrificial layer 51 shrinks toward the center as the selective etching proceeds. In other words, the sacrificial layer 51 is deleted from the outer edge of the sacrificial layer 51 inward as selective etching proceeds. It has been empirically found that this etching proceeds at a substantially uniform speed in a plane. Therefore, just before the end of the selective etching, the sacrificial layer 51 is slightly left in the center of the micro tile element (functional layer 52) (see FIG. 8B).

  At this time, the functional layer 52 is supported on the substrate 50 via the slightly remaining sacrificial layer 51. When any external force such as impact or vibration is applied to the substrate 50 or the functional layer 52 in this state, stress is concentrated on the slight remaining sacrificial layer 51 and breakage occurs in the vicinity of the concentrated portion. There is no problem if the fracture surface 60 generated by this fracture stays inside the sacrificial layer 51. However, if such a fracture surface 60 enters the inside of the micro tile-like element 70 and the functional part of the micro tile-like element 70 is lost, a problem occurs.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a highly reliable micro tile-shaped element that is free from defects and the like, a method for manufacturing the micro tile-shaped element, a semiconductor integrated circuit, an electro-optical device, and an electronic apparatus. To do.
Further, the present invention provides a micro tile element that can reliably perform a desired function even if a part of the micro tile element has a defect or a crack, a method for manufacturing the micro tile element, a semiconductor integrated circuit, an electric circuit An object is to provide an optical device and an electronic device.
The present invention also provides a micro tile element and a micro tile element that can provide a high yield of micro tile elements that can perform a desired function even when a defect or crack occurs in a part of the micro tile elements in the manufacturing process. An object of the present invention is to provide a manufacturing method, a semiconductor integrated circuit, an electro-optical device, and an electronic apparatus.

In order to achieve the above object, the micro tile element of the present invention is provided with at least an electronic functional element and is a tile-shaped micro tile element, and the functional part of the electronic functional element has the tile shape. When the plane is viewed, it is arranged so as not to overlap with the longitudinal symmetry axis (center line) in the plane.
According to the present invention, it is possible to easily provide a highly reliable micro tile-shaped element that is free from defects and the like. That is, for example, when a micro tile element having a rectangular plane is manufactured by the epitaxial lift-off method, as shown in FIG. 8B, the sacrificial layer 51 is formed at the center of the plane (near the longitudinal axis of symmetry). Slightly remains. Thus, defects or cracks are likely to occur in the vicinity of the symmetry axis in the longitudinal direction. In the present invention, the functional portion is arranged avoiding the longitudinal axis of symmetry in the plane of the micro tile-like element. Therefore, the micro tile-like element of the present invention has a functional portion arranged in a region where no defects or cracks occur, so that a desired function can be obtained even if a part of the micro tile element has a defect or crack. Can be demonstrated with high reliability.
The planar shape of the micro tile-like element in the present invention can be a rectangle having, for example, several tens to several hundreds μm in length and width. In this case, for example, the functional unit of the electronic functional element may be arranged avoiding a region having a width of 5 μm around the symmetry axis in the longitudinal direction in the plane.

In order to achieve the above object, the micro tile element of the present invention is provided with at least an electronic functional element and is a tile-shaped micro tile element, and the functional part of the electronic functional element has the tile shape. When the plane is viewed, it is arranged in a region within a predetermined distance from the outer edge of the plane to the inside.
The predetermined distance is that the tile-shaped plane is gradually and gradually deleted inward from the entire outer edge of the tile shape, and the area of the remaining plane is a predetermined ratio of the area of the plane before deletion (for example, 5 %), The interval between the outer edge of the remaining plane and the outer edge of the plane before deletion is preferably set to the same value.
According to the present invention, for example, when a micro tile element is manufactured by the above-described epitaxial lift-off method, even if a defect or a crack occurs in a part of the micro tile element, the defect or the crack damages the functional part. Can be avoided. That is, when a micro tile-shaped element is manufactured by the epitaxial lift-off method, the sacrificial layer 51 slightly remains in the center of the plane as shown in FIG. The region where the sacrificial layer 51 remains slightly is a region where the entire outer edge of the micro tile-like element is gradually and gradually removed inward by etching. Then, when the area of the remaining plane (region) becomes a predetermined ratio (for example, 5%) of the area of the plane before deletion, there is a possibility that stress is concentrated on the slight remaining sacrificial layer 51 and breakage or the like occurs. Is expensive. Therefore, by locating the functional part so that it does not overlap with the slight remaining sacrificial layer 51 when the plane of the micro tile-like element is viewed, damage to the functional part due to the defect or the like can be avoided. Here, the region that does not overlap the slight remaining sacrificial layer 51 is a region within the predetermined distance from the outer edge of the micro tile-shaped element toward the inside. Therefore, the present invention can provide a high-yield micro-tile-shaped element that can exhibit a desired function even if a defect or a crack occurs in a part of the micro-tile-shaped element in the manufacturing process.

In the micro tile element of the present invention, it is preferable that the electronic functional element is any one of a light emitting element, a light receiving element, an amplifying element, and a switching element.
According to the present invention, for example, a micro tile-like element according to the present invention is attached to a final substrate including an integrated circuit and connected to a wiring, so that a high-density mounting optoelectronic integrated circuit or the like can be easily and low-cost. Can be configured.

  In the micro tile element of the present invention, the electronic functional element is preferably a surface emitting laser, a heterobipolar transistor, a photodiode, a light emitting diode, a high electron mobility transistor, an inductor, a capacitor, or a resistor. .

In the micro tile element of the present invention, it is preferable that the electronic functional element is a surface emitting laser and the functional part is a light emitting part of the surface emitting laser.
In the micro tile element of the present invention, it is preferable that the electronic functional element is a surface emitting laser and the functional part is a current confinement part of the surface emitting laser.
In the micro tile element of the present invention, it is preferable that the electronic functional element is a surface emitting laser and the functional part is a column part forming a part of a resonator of the surface emitting laser.
According to the present invention, when a micro tile-shaped element including a surface emitting laser is configured, even if a defect or a crack occurs in the manufacturing process of the micro tile element, the defect or the like affects the function of the surface emitting laser. Can be avoided. Therefore, the present invention can provide a surface emitting laser including a micro tile-like element that can increase the yield in the manufacturing process and can be manufactured at low cost.

In the micro tile element of the present invention, it is preferable that the electronic functional element is a hetero bipolar transistor, and the functional part is an emitter part of the hetero bipolar transistor.
In the micro tile element of the present invention, it is preferable that the electronic functional element is a hetero bipolar transistor, and the functional part is a base part of the hetero bipolar transistor.
According to the present invention, when a micro tile element including a hetero bipolar transistor is configured, even if a defect or a crack occurs in the manufacturing process of the micro tile element, the defect affects the function of the hetero bipolar transistor. Can be avoided. Therefore, the present invention can increase the yield in the manufacturing process, and can provide a heterobipolar transistor including a micro tile-shaped element that can be manufactured at low cost.

In the micro tile element of the present invention, it is preferable that the electronic functional element is a light receiving element, and the functional part is a light receiving part of the light receiving element.
According to the present invention, when a micro tile element including a light receiving element is configured, even if a defect or a crack occurs in the manufacturing process of the micro tile element, the defect affects the function of the light receiving element. You can avoid that. Therefore, the present invention can increase the yield in the manufacturing process, and can provide a light receiving element including a micro tile element that can be manufactured at low cost.

In order to achieve the above object, a semiconductor integrated circuit according to the present invention includes the micro tile element.
According to the present invention, for example, a micro tile-like element according to the present invention is attached to a final substrate equipped with an integrated circuit and connected by wiring, etc., so that various types of semiconductor integrated devices capable of high-density mounting and high-speed operation are provided. Circuits can be provided at low cost.

In order to achieve the above object, an electro-optical device according to the present invention includes the micro tile element or the semiconductor integrated circuit.
According to the present invention, it is possible to easily provide a compact and high-performance electro-optical device at low cost.

In order to achieve the above object, an electronic apparatus according to the present invention includes the micro tile element, the semiconductor integrated circuit, or the electro-optical device.
According to the present invention, it is possible to easily provide a compact and high-performance electronic device at low cost.

In order to achieve the above object, a method for producing a micro tile element according to the present invention includes a step of forming a sacrificial layer on a substrate, and a functional layer having an electronic functional element on the sacrificial layer. And the step of separating the functional layer from the substrate to form a micro tile element by etching the sacrificial layer, and the step of forming the functional layer forms the micro tile element. The functional part of the electronic functional element is arranged so as not to overlap with the longitudinal symmetry axis (center line) in the planar shape of the micro tile-like element formed in the step.
According to the present invention, in the step of forming the micro tile-like element by separating the functional layer from the substrate by etching, a defect or the like may occur in the central portion (near the longitudinal axis of symmetry) of the micro tile element. . However, the functional portion is arranged avoiding the vicinity of the symmetry axis in the longitudinal direction where the defect or the like is likely to occur. Therefore, according to the present invention, for example, when a micro tile element is manufactured using an epitaxial lift-off method, a micro tile element that can exhibit a desired function can be manufactured with a high yield.

Hereinafter, a micro tile element according to an embodiment of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a schematic plan view showing an example of a micro tile element according to the first embodiment of the present invention. In the present embodiment, a micro tile element 1A including a surface emitting laser as an electronic functional element will be described as an example.

  The micro tile element 1A of the present embodiment has a rectangular tile outer shape (tile shape) 2 when viewed from a plane. The size of the micro tile element 1A can be, for example, several tens to several hundreds μm in length and width, and several μm to several tens μm in thickness. FIG. 1 also shows a symmetry axis 3 in the longitudinal direction with respect to the tile outer shape 2 of the micro tile element 1A. The symmetry axis 3 is located exactly in the middle of the two opposing long sides in the tile outer shape 2.

  The surface emitting laser 10 provided in the micro tile-like element 1 </ b> A has at least a column part 4 and a constriction part (current constriction part) 5. The column part 4 and the constriction part 5 form a functional part of the surface emitting laser 10. The column part 4 forms at least a part of a resonator of the surface emitting laser 10. The resonator of the surface emitting laser 10 includes, for example, a lower DBR, an active layer, an upper DBR, and a constricted portion 5. The column portion 4 includes, for example, an active layer, an upper DBR, and a narrowed portion 5. Moreover, the column part 4 has a column shape, The upper surface or lower surface of the column shape is exposed to the plane of a micro tile-shaped element. The center of the upper surface or the lower surface of the column portion 4 is a light emitting portion (light exit port). The narrowed portion 5 is provided in, for example, the upper DBR in the column portion 4, and has a donut shape with the columnar center axis of the column portion 4 being coaxial. The constriction part 5 demarcates the flow area of the current flowing in the resonator, and acts to lower the threshold current and narrow the beam width. The current flow region in the constricted portion 5 is a donut-shaped hole portion (constricted hole).

  Further, in the micro tile element 1A, when the plane is viewed, the center position (light emitting portion) of the surface emitting laser 10 is conscious of the longitudinal axis 2 with respect to the tile outer shape 2 as shown in FIG. It is placed in a place that is shifted. The column portion 4 in the surface emitting laser 10 overlaps with the symmetry axis 3, but the constriction hole of the constriction portion 5 is arranged so as not to overlap with the symmetry axis 3.

  Thus, according to the present embodiment, even if there is a defect or a crack on the symmetry axis 3 in the micro tile element 1A, the defect is located outside the constriction hole of the constriction portion 5 in the surface emitting laser 10. Will be. Therefore, the probability that the defect or the like affects the basic performance of the surface emitting laser 10 can be extremely reduced. Therefore, the micro tile-like element 1A can include the surface emitting laser 10 that can exhibit a desired function even if a defect or a crack is present on the symmetry axis 3.

  Further, in the micro tile element 1A shown in FIG. 1, the narrow hole of the narrow portion 5 is removed from the symmetry axis 3, but instead, the pillar portion 4 may be removed from the symmetry axis 3. Good. In this way, it is possible to further reduce the influence of defects or the like existing on the symmetry axis 3 on the surface emitting laser 10. Therefore, it is possible to configure the micro tile element 1A including the surface emitting laser 10 with higher reliability.

  Further, the micro tile-like element 1A of the present embodiment may have an arrangement configuration in which only the light emitting portion (laser emission port) of the surface emitting laser 10 is removed from the symmetry axis 3. In this way, it is possible to avoid the overlap between the light emitting part, which is the most important in the configuration of the surface emitting laser 10, and the defect existing on the symmetry axis 3, and the influence of the defect on the surface emitting laser 10 is reduced. it can. Accordingly, it is possible to configure the micro tile element 1A including the surface emitting laser 10 having higher reliability than the conventional one.

  FIG. 2 is a schematic plan view for explaining the operation and effect of the micro tile element according to the present embodiment. That is, the micro tile element 1B shown in FIG. 2 is an example of a state in the middle of manufacturing the micro tile element 1A shown in FIG. The micro tile element 1A can be manufactured by using the epitaxial lift-off method shown in FIG. The tile outline 2 of the micro tile element 1B corresponds to the tile outline 2 of the micro tile element 1A.

  The state shown in FIG. 2 corresponds to the state shown in FIG. This state is a state where the sacrificial layer which is the lower layer of the functional layer is etched. Before the etching, the sacrificial layer has the same planar shape as the tile outer shape 2. Etching of the sacrificial layer proceeds substantially isotropically from the outer periphery of the tile outer shape 2. In other words, the etching of the sacrificial layer proceeds from the outer edge (four sides) of the tile outer shape 2 inward, that is, in the direction of the arrow 21. Such etching proceeds at the same speed from each of the four sides of the tile outer shape 2. In order to show this, the length of each arrow 21 is the same. Then, at the final stage of etching, as shown in FIG. 2, the sacrificial layer 20 remains linearly along the symmetry axis 3 in the longitudinal direction. Stress is concentrated on the slightly remaining sacrificial layer 20 as described with reference to FIG. Accordingly, defects or cracks are likely to occur in the region of the sacrificial layer 20 that remains slightly or in the vicinity thereof.

  In the micro tile-like element 1A of the present embodiment, the functional parts of the electronic functional elements such as the constriction part 5 are arranged avoiding the symmetry axis 3 where the defect or the like is likely to occur. Therefore, even if a defect or the like occurs due to the stress concentration or the like, it is possible to avoid the direct damage to such a functional unit. Therefore, according to the present embodiment, it is possible to configure the micro tile element 1A including the electronic function element (for example, the light emitting laser 10) having higher reliability than the conventional one at a low cost.

  Further, in the micro tile element 1A of the present embodiment, the functional part of the electronic functional element such as the constriction part 5 may be arranged avoiding the slightly remaining sacrificial layer 20 in the micro tile element 1B. That is, when the functional unit of the electronic functional element such as the constricted part 5 is viewed from the plane of the micro tile-shaped element 1A, the area within the predetermined distance from the outer edge of the plane to the inside (area other than the sacrificial layer 20). Further, it may be arranged. Here, the predetermined distance defining the region of the sacrificial layer 20 is when the area of the plane of the sacrificial layer 20 becomes a predetermined ratio (for example, 5%) of the area of the plane of the tile outer shape 2 that is the area before etching. The length of each arrow 21 may be the same value. Even in this case, the position where the defect or the like is generated due to the stress concentration can be shifted from the position of the functional unit.

  FIG. 3 and FIG. 4 are plan views showing an example of a micro tile element in which a defect has occurred. The micro tile elements 1E and 1F shown in FIGS. 3 and 4 are those actually manufactured by using the epitaxial lift-off method as shown in FIG. The outer edge of each of the micro tile elements 1E and 1F is the tile outer shape 2. And each micro tile-like element 1E and 1F has the defect | deletion 30 which arose by the said stress concentration. The defects 30 of the micro tile elements 1E and 1F are all located on the longitudinal symmetry axis (corresponding to the symmetry axis 3 in FIG. 1).

  For example, in the micro tile element 1E of FIG. 3, the defect 30 is relatively small. Here, when the defect 30 and the light emitting portion of the surface emitting laser overlap, the characteristics of the surface emitting laser may be greatly affected. However, as shown in FIG. 1, a surface emitting laser capable of exhibiting desired characteristics can be configured even if there is a defect 30 by disposing a functional unit such as a light emitting unit while avoiding the symmetry axis 3.

  FIG. 5 is a histogram showing the occurrence frequency according to the size of defects in a large number of actually manufactured micro tile elements. The shape of the micro tile element of this example is a rectangular tile shape of 100 μm × 50 μm. Further, the micro tile element of this example is manufactured using an epitaxial lift-off method as shown in FIG. FIG. 5 shows the defect size (width) of 173 cases in which defect defects occurred on the symmetry axis in the longitudinal direction of the tile back surface in the sacrifice layer etching step (FIG. 8B). A 400 × optical microscope was used for this measurement.

  As a result, the most frequently generated defects were cracks. The term “crack” as used herein refers to a crack that can be observed although there is no obvious chipping. The crack generation position was on the symmetry axis in the longitudinal direction in the tile plane. Other defects with obvious defects (defects) were also observed. All of the chipping occurred on the axis of symmetry in the longitudinal direction in the tile plane, and most of them were 5 μm or less in width.

  Therefore, the functional part is arranged at least on the symmetry axis in the longitudinal direction in the tile plane, more preferably avoiding a region having a width of 5 μm centered on the symmetry axis. As a result, even when a defect occurs during the etching of the sacrificial layer in the epitaxial lift-off method, damage to the element (electronic functional element) formed in the micro tile element can be avoided, and the yield can be increased. .

(Second Embodiment)
6 and 7 are schematic plan views showing an example of a micro tile element according to the second embodiment of the present invention. The difference of the present embodiment from the first embodiment is the area where the functional units can be arranged in the tile outer shape 2. In the present embodiment, a micro tile element having a planar shape different from the rectangular shape of the micro tile elements 1A and 1B of the first embodiment is also exemplified.

  A micro tile-shaped element 1H shown in FIG. 6A has a rectangular tile outer shape 2 like the micro tile-shaped element 1A. However, the minute tile-like element 1H has the functional parts arranged avoiding a part on the symmetry axis 3 instead of the whole on the symmetry axis 3 in the longitudinal direction. That is, in the micro tile-like element 1H, a portion (solid line portion) 40 that is away from the center of the tile outer shape 2 on the symmetry axis 3 is set as an area where functional portions can be arranged.

  Here, the length 23 of the part 40 is the same as the length 22 indicating the distance between the symmetry axis 3 and the long side in the tile outer shape 2. As shown in FIG. 2, the etching of the sacrificial layer proceeds uniformly from the entire outer periphery of the tile outer shape 2 to the inside. Therefore, when the etching proceeds in the lateral direction in the tile outer shape 2 by about a length 22, the etching progresses in the longitudinal direction by a length 23.

  Thereby, even if it exists on the symmetry axis 3, there will be almost no possibility that the part 40 will be defective. Therefore, according to the micro tile-like element 1H, it is possible to expand the area where the functional part can be arranged as compared with the micro tile-like element 1A while avoiding damage caused to the electronic functional element due to defects generated in the manufacturing process.

  The tile-shaped element 1I shown in FIG. 6B has a polygonal shape in which the tile outer shape 2 is formed by cutting a pair of diagonals with respect to a rectangle. Also in the small tile-shaped element 1I, as in the small tile-shaped element 1H, the portion 40 on the symmetry axis 3 is set as an area where functional units can be arranged. Further, the length 23 of the portion 40 is the same as the length 22 indicating the distance between the symmetry axis 3 and the long side in the tile outer shape 2.

  A micro tile element 1J shown in FIG. 6C has a polygonal shape in which a tile outer shape 2 is a rectangle formed by cutting two corners in contact with one long side of a rectangle. Also in the micro tile element 1J, as in the micro tile element 1H, the portion 40 on the axis of symmetry 3 is an area where the functional part can be arranged. Further, the length 23 of the portion 40 is the same as the length 22 indicating the distance between the symmetry axis 3 and the long side in the tile outer shape 2. There are not always two corners to cut.

  The tile-shaped element 1K shown in FIG. 6 (d) has an elliptical tile outer shape 2. In the minute tile-shaped element 1K, the portion 40 on the symmetry axis 3 that is the major axis of the elliptical shape is an area where the functional part can be arranged. Further, the length 23 of the portion 40 is the same as the length 22 that is half the minor axis in the elliptical shape of the tile outer shape 2.

  In the tile-shaped element 1L shown in FIG. 7A, the tile outer shape 2 has a “gourd” shape. In the small tile-shaped element 1L, the portion 40 on the symmetry axis 3, which is the long axis in the gourd shape, is an area where functional units can be arranged. The length 23 of the portion 40 is the same as the length 22 that is half the short axis of the central constricted portion in the gourd shape.

  The tile-shaped element 1M shown in FIG. 7B has a tile outer shape 2 that is square. For the small tile-shaped element 1M, only the center point in the square of the tile outer shape 2 and the vicinity thereof are occurrences of defects. Therefore, in the micro tile element 1M, the area other than the center point and the vicinity thereof is set as the area where the functional unit can be arranged.

  A tile-shaped element 1N shown in FIG. 7C has a circular tile outer shape 2. As for the micro tile element 1N, similarly to the micro tile element 1M, only the center point in the tile outer shape 2 and the vicinity thereof are occurrences of defects. Therefore, in the micro tile element 1N, the area other than the center point and the vicinity thereof is set as the area where the functional unit can be arranged.

  Further, the micro tile-like elements 1H, 1I, 1J, 1K, 1L, 1M, and 1N according to the present embodiment may include a surface emitting laser as an electronic functional element, similarly to the micro tile-like element 1A. Further, the micro tile-like elements 1H, 1I, 1J, 1K, 1L, 1M, and 1N according to the present embodiment may include any one of a light emitting element, a light receiving element, an amplifying element, and a switching element as an electronic functional element. Good. Moreover, as such an electronic functional element, for example, any of a hetero bipolar transistor, a photodiode, a light emitting diode, a high electron mobility transistor, an inductor, a capacitor, and a resistor can be used.

  When the heterobipolar transistor is an electronic functional element, the functional part is preferably the emitter part or base part of the heterobipolar transistor. Further, when the light receiving element is an electronic functional element, the functional part is preferably a light emitting part.

(Manufacturing method of micro tile element)
Next, a specific example of the manufacturing method of the micro tile elements (1A to 1N) will be described with reference to FIGS. In this manufacturing method, a case where a micro tile element made of a compound semiconductor device is formed and the micro tile element is bonded onto a silicon / LSI chip to be a final substrate will be described. The present invention can be applied regardless of the type. The “semiconductor substrate” in the present embodiment refers to an object made of a semiconductor material, but is not limited to a plate-shaped substrate, and any shape of a semiconductor material is included in the “semiconductor substrate”. .

<First step>
FIG. 9 is a schematic cross-sectional view showing a first step of a method for manufacturing a micro tile element. In FIG. 9, a substrate 110 is a semiconductor substrate, for example, a gallium arsenide compound semiconductor substrate. A sacrificial layer 111 is provided as the lowest layer in the substrate 110. The sacrificial layer 111 is made of aluminum arsenic (AlAs) and has a thickness of, for example, several hundreds of nanometers.
For example, the functional layer 112 is provided on the sacrificial layer 111. The thickness of the functional layer 112 is, for example, about 1 μm to 10 (20) μm. Then, a semiconductor device (semiconductor element) 113 is formed in the functional layer 112. This semiconductor device 113 corresponds to an electronic functional element or functional part in the micro tile elements 1A to 1N. Examples of the semiconductor device 113 include a light emitting diode (LED), a surface emitting laser (VCSEL), a photodiode (PD), a high electron mobility transistor (HEMT), and a hetero bipolar transistor (HBT). Each of these semiconductor devices 113 is formed by laminating a plurality of epitaxial layers on the substrate 110. Each semiconductor device 113 is also provided with an electrode and an operation test is performed.

<Second step>
FIG. 10 is a schematic cross-sectional view showing a second step of the method for manufacturing a micro tile element. In this step, the separation groove 121 is formed so as to divide each semiconductor device 113. The separation groove 121 is a groove having a depth that reaches at least the sacrificial layer 111. For example, both the width and depth of the separation groove are 10 μm to several hundred μm. In addition, the separation groove 121 is a groove that is connected without a dead end so that a selective etching solution described later flows through the separation groove 121. Further, the separation grooves 121 are preferably formed in a lattice shape like a grid.
Further, by setting the interval between the separation grooves 121 to several tens μm to several hundreds μm, the size of each semiconductor device 113 divided and formed by the separation grooves 121 has an area of several tens μm to several hundreds μm square. Shall. As a method for forming the separation groove 121, a method using photolithography and wet etching, or a method using dry etching is used. Further, the separation groove 121 may be formed by dicing the U-shaped groove as long as no crack is generated in the substrate.
In addition, by variably adjusting the pattern formed by the separation groove 121 on the plane of the substrate 110, various tile outer shapes 2 such as the above-described minute tile-shaped elements 1A to 1N shown in FIG. 1 and the like can be formed. Then, the functional part of the semiconductor device 113 is arranged so as not to overlap the longitudinal axis of symmetry in the tile outer shape 2 formed by the separation groove 121.

<Third step>
FIG. 11 is a schematic cross-sectional view showing a third step of the method for manufacturing a micro tile element. In this step, the intermediate transfer film 131 is attached to the surface of the substrate 110 (the semiconductor device 113 side). The intermediate transfer film 131 is a flexible band-shaped film having a surface coated with an adhesive.

<4th process>
FIG. 12 is a schematic cross-sectional view showing a fourth step in the method for manufacturing a micro tile element. In this step, a selective etching solution 141 is injected into the separation groove 121. In this step, hydrofluoric acid having high selectivity with respect to aluminum / arsenic is used as the selective etching solution 141 in order to selectively etch only the sacrificial layer 111.

<5th process>
FIG. 13 is a schematic cross-sectional view showing a fifth step of the method of manufacturing the micro tile element. In this step, all of the sacrificial layer 111 is selectively etched and removed from the substrate 110 over a predetermined time after the selective etching solution 141 is injected into the separation groove 121 in the fourth step.

<6th process>
FIG. 14 is a schematic cross-sectional view showing a sixth step of the method of manufacturing the micro tile element. When all of the sacrificial layer 111 is etched in the fifth step, the functional layer 112 is separated from the substrate 110. In this step, the functional layer 112 attached to the intermediate transfer film 131 is separated from the substrate 110 by separating the intermediate transfer film 131 from the substrate 110. As a result, the functional layer 112 on which the semiconductor device 113 is formed is divided by the formation of the separation groove 121 and the etching of the sacrificial layer 111, so that the semiconductor element (the above-described “tile outline 2” in the above-described embodiment) has a predetermined shape. In this embodiment, the “small tile-like elements 1A to 1N” are attached and held on the intermediate transfer film 131. Here, the thickness of the functional layer is preferably 1 μm to 20 μm, for example, and the size (vertical and horizontal) is preferably several tens μm to several hundred μm, for example.

<Seventh step>
FIG. 15 is a schematic cross-sectional view showing a seventh step of the method for manufacturing the micro tile element. In this step, the micro tile element 161 is moved to a desired position on the final substrate 171 (integrated circuit chip 1, 2, 3) by moving the intermediate transfer film 131 (with the micro tile element 161 attached). Align. Here, the final substrate 171 is made of, for example, a silicon semiconductor, and an LSI region 172 is formed. Further, an adhesive 173 for adhering the micro tile-shaped element 161 is applied to a desired position of the final substrate 171. The adhesive may be applied to the micro tile element 161.

<Eighth process>
FIG. 16 is a schematic cross-sectional view showing an eighth step of the method of manufacturing the micro tile element. In this step, the minute tile-shaped element 161 aligned at a desired position on the final substrate 171 is pressed by the back pressing member 181 through the intermediate transfer film 131 and joined to the final substrate 171. Here, since the adhesive 173 is applied to the desired position, the micro tile-shaped element 161 is adhered to the desired position of the final substrate 171.

<9th process>
FIG. 17 is a schematic cross-sectional view showing a ninth step of the method of manufacturing the micro tile element. In this step, the adhesive force of the intermediate transfer film 131 is lost, and the intermediate transfer film 131 is peeled off from the micro tile-shaped element 161.
The adhesive for the intermediate transfer film 131 is UV curable or thermosetting. When a UV curable adhesive is used, the backing member 181 is made of a transparent material, and the adhesive force of the intermediate transfer film 131 is lost by irradiating ultraviolet rays (UV) from the tip of the backing member 181. When a thermosetting adhesive is used, the back pressing member 181 may be heated. Alternatively, after the sixth step, the adhesive force may be completely lost by irradiating the entire surface of the intermediate transfer film 131 with ultraviolet rays. Although the adhesive force has disappeared, in reality, the adhesiveness remains slightly, and the micro tile-shaped element 161 is very thin and light and is held by the intermediate transfer film 131.

<10th process>
This step is not shown. In this step, heat treatment or the like is performed, and the fine tile-shaped element 161 is finally bonded to the final substrate 171.

<11th process>
FIG. 18 is a schematic cross-sectional view showing an eleventh step of the method of manufacturing the micro tile element. In this step, the electrode of the micro tile element 161 and the circuit on the final substrate 171 are electrically connected by the wiring 191 to complete one LSI chip or the like (an integrated circuit chip for an optical interconnection integrated circuit). As the final substrate 171, not only a silicon semiconductor but also a glass quartz substrate or a plastic film may be applied.

  Thus, according to the present manufacturing method, in the fifth and sixth steps of forming the micro tile element 161 by etching the sacrificial layer 111 and separating the functional layer 112 from the substrate 110, the micro tile element 161 is formed. In some cases, a deficiency or the like may occur in the central portion (near the symmetry axis in the longitudinal direction). However, in this manufacturing method, in the first and second steps, the functional part of the semiconductor device (electronic functional element) 113 is arranged so as to avoid the vicinity of the longitudinal symmetry axis where the defect is likely to occur. Yes. Therefore, this manufacturing method can manufacture the micro tile-shaped element which can exhibit a desired function with a high yield when manufacturing the micro tile-shaped element using the epitaxial lift-off method.

Further, the LSI chip completed in the eleventh step is an example of a semiconductor integrated circuit according to the present invention having a micro tile element. Therefore, according to this manufacturing method, various semiconductor integrated circuits capable of high-density mounting and capable of high-speed operation can be provided at low cost.
(Application examples)
Hereinafter, application examples of the micro tile element according to the present embodiment will be described.
As a first application example, the micro tile-like elements 1A to 1N of the above embodiment are used as a part (light source) of signal transmission means of an optoelectronic integrated circuit. An example of the optoelectronic integrated circuit is a computer. The signal processing in the integrated circuit forming the CPU is performed using electrical signals, but the optical interface comprising the micro tile elements 1A to 1N on the bus for transmitting data between the CPU and the storage means. Apply connection integrated circuit.

  As a result, according to this application example, it is possible to significantly increase the signal transmission speed in the bus that is a bottleneck of the processing speed of the computer. Further, according to this application example, it is possible to greatly reduce the size of a computer or the like.

  As a second application example, the optical interconnection integrated circuit is used in a liquid crystal display, a plasma display, or an organic EL (electric luminescence) display which is an electro-optical device. Accordingly, according to this application example, it is possible to provide an electro-optical device that can change a display state at high speed because a display signal can be transmitted and received at high speed.

(Electronics)
Next, a specific example of an electronic device including the micro tile elements 1A to 1N (hereinafter referred to as micro tile elements) according to the above embodiment will be described.
The device provided with the micro tile-like element of the above embodiment can be widely applied to devices using laser light. Therefore, as application circuits or electronic devices equipped with these devices, optical interconnection circuits, optical fiber communication modules, laser printers, laser beam projectors, laser beam scanners, linear encoders, rotary encoders, displacement sensors, pressure sensors, Examples include a gas sensor, a blood flow sensor, a fingerprint sensor, a high-speed electrical modulation circuit, a wireless RF circuit, a mobile phone, and a wireless LAN.

  FIG. 19A is a perspective view showing an example of a mobile phone. In FIG. 19A, reference numeral 1000 denotes a mobile phone body using the micro tile element as part of signal transmission means or display means, and reference numeral 1001 denotes a display portion. FIG. 19B is a perspective view showing an example of a wristwatch type electronic device. In FIG. 19B, reference numeral 1100 indicates a watch body using the micro tile element as a part of signal transmission means or display means, and reference numeral 1101 indicates a display portion. FIG. 19C is a perspective view showing an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 19C, reference numeral 1200 denotes an information processing apparatus, reference numeral 1202 denotes an input unit such as a keyboard, reference numeral 1204 denotes an information processing apparatus main body using the micro tile element as part of signal transmission means or display means, reference numeral Reference numeral 1206 denotes a display unit.

  Since the electronic device shown in FIG. 19 includes the micro tile-like element according to the above-described embodiment, it can be easily made compact, and high performance and low cost can be achieved.

  The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention, and the specific materials and layers mentioned in the embodiment can be added. The configuration is merely an example, and can be changed as appropriate.

1 is a schematic plan view of a micro tile element according to a first embodiment of the present invention. It is a schematic plan view which shows the effect | action and effect of a micro tile-like element same as the above. It is a top view which shows the example of the micro tile-shaped element in which the defect | deletion produced. It is a top view which shows the example of the micro tile-shaped element in which the defect | deletion produced. It is a histogram figure of the occurrence frequency according to size of the defect of many micro tile-like elements. It is a model top view of the micro tile-shaped element which concerns on 2nd Embodiment of this invention. It is a model top view of the micro tile-shaped element which concerns on 2nd Embodiment of this invention. It is a schematic cross section showing an example of an epitaxial lift-off method. It is a schematic sectional drawing which shows the 1st process of the manufacturing method of a micro tile-shaped element. It is a schematic sectional drawing which shows the 2nd process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 3rd process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 4th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 5th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 6th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 7th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 8th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 9th process of the manufacturing method same as the above. It is a schematic sectional drawing which shows the 11th process of the manufacturing method same as the above. It is a figure which shows an example of the electronic device which concerns on embodiment of this invention.

Explanation of symbols

1A, 1B, 1E, 1F, 1H, 1I, 1J, 1K, 1L, 1M, 1N ... micro tile element, 2 ... tile outline, 3 ... axis of symmetry, 4 ... pillar part, 5 ... constriction part, 10 ... surface Light emitting laser, 20 ... Sacrificial layer, 21 ... Arrow, 22, 23 ... Length, 30 ... Defect, 40 ... Site, 50 ... Substrate, 51 ... Sacrificial layer, 52 ... Functional layer, 53 ... Separation groove, 60 ... Broken surface , 70 ... micro tile element

Claims (15)

At least an electronic functional element and a tile-shaped micro tile element,
The functional unit of the electronic functional element is arranged so as not to overlap a longitudinal symmetry axis in the plane when the tile-shaped plane is viewed. At least an electronic functional element and a tile-shaped micro tile element,
The functional unit of the electronic functional element is arranged in a region within a predetermined distance from the outer edge of the plane toward the inside when the tile-shaped plane is viewed. The predetermined distance is
The tile-shaped plane is gradually and gradually deleted inward from the entire outer edge of the tile shape, and when the area of the remaining plane becomes a predetermined ratio of the area of the plane before deletion, the remaining A micro tile-like element having the same value as the distance between the outer edge of the plane and the outer edge of the plane before deletion.   4. The micro tile element according to claim 1, wherein the electronic function element is any one of a light emitting element, a light receiving element, an amplifying element, and a switching element. 5.   4. The electronic function device according to claim 1, wherein the electronic function device is any one of a surface emitting laser, a heterobipolar transistor, a photodiode, a light emitting diode, a high electron mobility transistor, an inductor, a capacitor, and a resistor. The micro tile-shaped element according to item. The electronic functional element is a surface emitting laser,
4. The micro tile element according to claim 1, wherein the functional unit is a light emitting unit of the surface emitting laser. The electronic functional element is a surface emitting laser,
The micro tile element according to any one of claims 1 to 3, wherein the functional unit is a current confinement unit of the surface-emitting laser. The electronic functional element is a surface emitting laser,
4. The micro tile element according to claim 1, wherein the functional part is a pillar part that forms a part of a resonator of the surface emitting laser. 5. The electronic functional element is a heterobipolar transistor,
4. The micro tile element according to claim 1, wherein the functional unit is an emitter unit of the heterobipolar transistor. 5. The electronic functional element is a heterobipolar transistor,
The micro tile element according to any one of claims 1 to 3, wherein the functional part is a base part of the heterobipolar transistor. The electronic functional element is a light receiving element,
4. The micro tile element according to claim 1, wherein the functional unit is a light receiving unit of the light receiving element. 5.   A semiconductor integrated circuit comprising the micro tile element according to claim 1.   An electro-optical device comprising the micro tile-like element according to claim 1 or the semiconductor integrated circuit according to claim 12.   An electronic apparatus comprising the micro tile element according to any one of claims 1 to 11, the semiconductor integrated circuit according to claim 12, or the electro-optical device according to claim 13. Forming a sacrificial layer on the substrate;
Forming a functional layer having an electronic functional element on the sacrificial layer;
Etching the sacrificial layer to separate the functional layer from the substrate to form a micro tile element,
In the step of forming the functional layer, the functional portion of the electronic functional element is arranged so as not to overlap a longitudinal axis of symmetry in the planar shape of the micro tile element formed in the step of forming the micro tile element. A method for producing a micro tile element, comprising arranging the micro tile elements.

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