JP2006127232A - Controller for nonvolatile memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the controller for a nonvolatile memory for surely prolonging the life of a nonvolatile memory. <P>SOLUTION: This controller of a nonvolatile memory for controlling the storage and erasure of data for a nonvolatile memory is configured to carry out data erasure processing (step S5) for reading detection data where a storage region in the non-volatile memory is classified from data and check sum from a non-volatile memory, and for updating only the value of the detection data, and for carrying out data storage processing (step S9) for reading the updated detection data, and for calculating a check sum by using the detection data and the data to be stored, and for writing the check sum and the data to be stored for reducing the number of times of write in each predetermined processing cycle into one time by each power supply or predetermined processing cycle. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a control device for a nonvolatile memory in which various information is written and read.

  Conventionally, as a technique for controlling writing and reading of various types of information in a nonvolatile memory such as an EEPROM, a technique described in Patent Document 1 below is known. The technique described in Patent Document 1 uses a nonvolatile memory as a memory for updating and storing the absolute operation position of the vehicle opening / closing body, and stores and holds data even when the vehicle is turned off. In addition, the technique described in Patent Document 1 prevents a problem that the data in the nonvolatile memory is not appropriate because the control device is reset due to a voltage drop at the start of the engine or the like (paragraph number). 0022, see FIG.

Japanese Patent Laid-Open No. 2002-2293

  By the way, in order to cope with the abnormality of the nonvolatile memory, as shown in FIG. 6, when the power is turned on, the controller determines data of the nonvolatile memory (step S101).

  As shown in FIG. 7, first, the data D1 to Dn and the checksum A are read from the nonvolatile memory (step S111), and the data D1 to Dn are normal with respect to the checksum A, as shown in FIG. It is determined whether or not (step S112). Thereby, it is determined whether the data written in the nonvolatile memory is normal or the data is abnormal.

  Then, as shown in FIG. 6, when it is determined that there is an abnormality by the data determination process, a countermeasure such as issuing an abnormality warning is performed (step S102).

  Next, data erasure (step S104), normal processing (step S105), and data storage (step S106) are performed, and it is determined whether or not the processing is to be resumed (step S107). When the process of step S106 is repeated and the process is not resumed, the power is turned off.

  In this data erasure process (step S104), as shown in FIG. 8, data D1 to Dn and checksum A are partly or all of data D1 to Dn are determined to be abnormal with respect to checksum A when data is read. Write such data. Writing the data determined to be abnormal means erasing the data in the nonvolatile memory. Specifically, the write data can be changed with respect to the read data so that the data in the nonvolatile memory is erased or appropriate fixed data is written, or the consistency between the checksum A and the data D1 to Dn is lost. Let

  In the data storage (step S106), as shown in FIG. 9, first, the checksum A is calculated from the data D1 to Dn to be stored, the absolute operation position of the vehicle opening / closing body in the above example (step S121). D1 to Dn and checksum A are written to the nonvolatile memory (step S122).

  However, in the processing described with reference to FIGS. 6 to 9 described above, it is necessary to write twice in the same storage area in the data erasure processing (step S104) and the data storage processing (step S106). was there. Therefore, since the lifetime of the nonvolatile memory is determined by the number of times of writing, it is desired to reduce the number of times of writing as much as possible.

  In the processing described with reference to FIGS. 6 to 9 described above, there is a possibility that data cannot be stored due to sudden power-off or circuit failure, so data is stored after normal processing. If data is not written to the non-volatile memory due to some reason between the data storage process and the data storage process, the data determination process cannot distinguish between an abnormality of the non-volatile memory itself and an abnormality due to unwriting, The actual situation is that the same data erasing process was executed. This is because, at present, the abnormality of the nonvolatile memory itself is not accurately distinguished from the unwritten state.

  Therefore, the present invention has been proposed in view of the above-described circumstances, and provides a means for distinguishing between abnormality and non-writing of the nonvolatile memory, and can reliably extend the lifetime of the nonvolatile memory. An object of the present invention is to provide a control device for a nonvolatile memory.

  The present invention is a non-volatile memory control device that controls storage and erasure of data in a non-volatile memory, and from the non-volatile memory to a storage area in the non-volatile memory at power-on or every predetermined processing cycle Reads out the detection data divided from the data and the checksum, reads out the detection data updated by the data erasing means, the data erasing means for updating only the value of the detection data, and the detection data and the storage target The above-mentioned problem is solved by providing a data storage means for calculating the checksum using data and writing the checksum and the data to be stored.

  According to the nonvolatile memory control device of the present invention, at the time of erasing data, only the detected data is updated, and at the time of saving the data, a checksum is calculated using the detected data and the data to be saved. Since the data to be saved is written, the number of times of writing in one processing cycle consisting of data erasure and data saving can be set once for each storage area, and the life of the nonvolatile memory is surely increased. Can do.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The present invention accurately discriminates whether an abnormality of a nonvolatile memory is due to an abnormality of the nonvolatile memory itself or an unwritten state in the nonvolatile memory, and reliably increases the lifetime of the nonvolatile memory Applies to control devices.

[Configuration of memory controller]
This memory control device is mounted on a vehicle, for example, and is configured by connecting a battery power source 2 and an IGN switch 3 to an ECU 1 as shown in FIG. The ECU 1 includes a power supply circuit 11 connected to the battery power supply 2, an input I / F 12 connected to the IGN switch 3, an MPU 13 that performs various arithmetic processes and memory control, and an EEPROM 14 that is a nonvolatile memory.

  For example, this memory control device is mounted on a vehicle that is driven by a diesel engine, and urea water for urea SCR catalyst that decomposes NOx in exhaust gas discharged from the diesel engine vehicle into water and nitrogen. It is connected to a detection circuit (not shown) for detecting the urea concentration, and the detected value of the urea concentration is input by the MPU 13 and stored in the EEPROM 14 to realize an exhaust gas purification system. Therefore, this memory control device can reliably update the information stored in the EEPROM 14 when the vehicle is powered on, and can reliably store various information in the EEPROM 14 even when the vehicle is powered off. Information needs to be retained.

  The battery power source 2 is a device that controls whether or not the battery of the vehicle is supplied to the ECU 1. The battery power source 2 starts supplying power to the ECU 1 in response to the ON operation of the IGN switch 3, and starts a predetermined time from the OFF operation of the IGN switch 3. Only after the power supply to the ECU 1 is maintained, the power supply to the ECU 1 is cut off. The predetermined time during which the power supply to the ECU 1 is maintained is the time required for the ECU 1 to detect the OFF operation of the IGN switch 3 and the time from the detection of the OFF operation to the end of the data recording process to the EEPROM 14. The time is sufficiently longer than the time obtained by adding the time. The battery power source 2 is connected to the ECU 1. The IGN switch 3 is turned on / off by the driver of the vehicle.

  The ECU 1 receives power supply from the battery power supply 2 by the power supply circuit 11. The power supply circuit 11 is a so-called switching power supply, converts the power supply voltage of the battery power supply 2 into the operating voltage of the MPU 13, and supplies power to the MPU 13 and the EEPROM 14. The input I / F 12 detects the on / off state of the IGN switch 3 and notifies the MPU 13 of the on / off state.

  The MPU 13 is connected to a urea concentration detection circuit (not shown) and receives a urea concentration signal. The MPU 13 operates upon receiving power supply from the power supply circuit 11 and performs writing and reading operations on the EEPROM 14 according to the IGN signal from the input I / F 12.

  The MPU 13 is provided with an input terminal of the input I / F 12, a transmission terminal and a reception terminal of the EEPROM 14, and a clock terminal. The MPU 13 stores a program (not shown) in the internal memory, and executes a memory control process described later according to the program.

[Memory control processing]
Next, in the memory control apparatus configured as described above, the processing procedure of the memory control process, which is the control of the EEPROM 14 by the MPU 13, will be described with reference to FIGS.

  This memory control process is performed by a series of processes of steps S2, S3, S4, S5, S7, S9, and S11 as shown in FIG. 2, data determination process (step S2), data storage process (step S9), and data erasure. The processing (step S5) is performed. In order to explain the contents saved and erased in the EEPROM 14, first, the data saving processing (step S9) and the data erasing processing (step S5) when no abnormality has occurred will be explained. To do. In FIG. 2, steps S2 to S4 are executed only when the ECU 1 is turned on, and steps S5, S7, S9, and S11 are repeatedly executed for each predetermined processing cycle at the time of saving and erasing data in the EEPROM 14. The

  In the data storage process (step S9), as shown in FIG. 5, first, the MPU 13 reads the detection data X previously stored in the EEPROM 14 in the data erasing process described later (step S51). Here, the EEPROM 14 is divided into a storage area for the detection data X, a storage area for the data D1 to Dn, and a storage area for the checksum A. This detection data X is data set to either X1 or X2, and is set by data erasure processing by the MPU 13. In step S51, the value read in the data determination process in FIG.

  Next, the MPU 13 calculates a checksum A from the data D1 to Dn, which are urea concentration signals to be stored, and the detection data X read in step S51 (step S52). At this time, the MPU 13 performs processing for creating CRC data using the sum of the data D1 to Dn and the detection data X or the data D1 to Dn and the detection data X.

  Next, the MPU 13 writes the data D1 to Dn and the checksum A into the EEPROM 14. Here, the MPU 13 does not write the detection data X.

  In the data erasing process (step S5), as shown in FIG. 4, the MPU 13 first takes out the old detection data X from the EEPROM 14 (step S41). In step S51, the value read in the data determination process in FIG.

  Next, the MPU 13 checks the value of the old detection data X read in step S41, and if it is X2, sets the value of the new detection data X ′ to X1 (step S43), and if it is X1, the new detection data The value of data X ′ is set to X2 (step S44).

  Next, the MPU 13 stores the new detection data X ′ set in step S43 or step S44 in the EEPROM 14.

  As described above, the MPU 13 sets the detection data X that is stored and erased independently of the data D1 to Dn and the checksum A, so that the data storage process is performed in a normal case and an abnormal case. Switches between data erasure processing.

  Next, the memory control process shown in FIG. 2 will be described.

  In the memory control process, when the power is first turned on, a read command is issued to the EEPROM 14, and if the contents of the EEPROM 14 can be normally read, the process proceeds to step S2.

  In step S <b> 2, the MPU 13 performs data determination on the EEPROM 14. This data determination includes two determinations: determination of whether the EEPROM 14 is abnormal (step S2a) and determination of whether the EEPROM 14 is unwritten (step S2b).

  As shown in FIG. 3, first, the data D1 to Dn and the checksum A are read from the EEPROM 14, and the detection data X is read from the EEPROM 14 (step S21). It is determined whether D1 to Dn and the detection data X are normal (step S22). Thus, when it is determined that the operation is normal, the process proceeds from step S2 in FIG. 2 to step S5. When it is determined that the operation is abnormal, the process proceeds to step S24 in FIG. 3 (step S23).

  Next, the MPU 13 proceeds to step S24 to step S30 corresponding to the process of step S2b in FIG.

  In step S24, the MPU 13 determines whether the value of the detection data X read in step S21 is either X1 or X2, or any of X1 and X2, and in step S25, either X1 or X2 is determined. If it is determined that it is normal, it is normal and the process proceeds to step S26.

  On the other hand, when it is determined that the value of the detection data X is neither X1 nor X2, it is determined that the abnormality is in the management of the EEPROM 14 in the MPU 13, it is determined that the abnormality is in the EEPROM 14 itself, and the EEPROM 14 In case of an abnormality, countermeasures such as issuing an abnormality warning are performed (step S3).

  Next, in step S26, when the value of the detection data X is X2, the MPU 13 sets the value to the corrected detection data X ′ corrected to X1 (step S27), and the value of the detection data X is X1. In this case, the value is set to the correction detection data X ′ corrected to X2 (step S28).

  Next, in step S29, the MPU 13 calculates a checksum A from the correction detection data X ′ and the data D1 to Dn, and whether the calculated checksum A matches the checksum A read in step S21. By determining whether or not the data D1 to Dn are appropriate data. If both checksums A match, it is determined that this determination is normal, it is determined that the data D1 to Dn are not yet written to the EEPROM 14, and the process proceeds to step S4 in FIG. If not, it is determined that the EEPROM 14 itself is abnormal, and the process proceeds to step S3.

  In this step S4, failure information indicating that the IGN switch 3 or the input I / F 12 in FIG. 1 is abnormal because the power supply voltage has dropped (failed) in the processing of FIG. Output.

  Next, MPU13 performs the process of step S41-step S45 demonstrated with reference to FIG. 4 in step S5 after having been normally determined by the data determination process of step S2. As a result, the data D1 to Dn and the checksum A are not erased, and only the detection data X is updated. If there is no abnormality during data erasure, the process proceeds to step S7. The abnormality at the time of erasing data includes that the data erasing process is not normally performed due to an instantaneous interruption of the battery power supply 2 and the information in the EEPROM 14 becomes abnormal.

  Next, the MPU 13 performs normal processing in step S7.

  In step S9, the MPU 13 performs the processes of steps S51 to S53 described with reference to FIG. As a result, new data D1 to Dn and checksum A are written in the EEPROM 14, but the detection data X is not updated. If there is no abnormality during data storage, the process proceeds to step S11. This abnormality at the time of data storage means that signal transmission between the MPU 13 and the EEPROM 14 is caused by a strong electromagnetic wave such as an illegal wireless transmitter, and the data storage processing is not normally performed, and the information in the EEPROM 14 is abnormal. It can be mentioned.

  Next, in step S11, the MPU 13 determines whether or not the process is to be resumed (step S11). If the process is to be resumed, the process from step S5 to step S11 is repeated. If the process is not resumed, the power is turned off. To do.

  As described above in detail, according to the memory control device to which the present invention is applied, the storage area in the EEPROM 14 is divided from the data D1 to Dn and the checksum A when the power is turned on or every predetermined processing cycle. The detected data X is read out, the data erasing process for updating only the value of the detected data X, and the detected data X updated by the data erasing means are read out, and the detected data X and the data D1 to Dn to be stored are read out. The checksum A is used to calculate the data and the data storage process for writing the checksum A and the data D1 to Dn to be stored is performed. Therefore, the number of times of writing in one processing cycle consisting of step S5 to step S11 is calculated. This can be done once for each storage area of the EEPROM 14.

  Therefore, according to this memory control device, the lifetime of the nonvolatile memory can be reliably extended.

  Further, according to this memory control device, the data D1 to Dn, the detection data X, and the checksum A are read from the EEPROM 14, and the data D1 to Dn and the detection data X are normal information with respect to the checksum A. When it is determined that the process is not normal (steps S21, 22, 23) and step S23, the value of the detection data X is determined not to correspond to any of the preset values. In this case, when the process determines that the EEPROM 14 itself is abnormal (steps S24 and S25) and the value of the detection data X is determined to be normal in step S25, the value of the detection data X is preset. Correct to any value and determine whether data D1 to Dn and corrected detection data X are normal information for checksum A If it is determined to be normal, it is determined that the EEPROM 14 has not been written, and if it is determined to be abnormal, processing for determining that the EEPROM 14 itself is abnormal is performed. It is possible to determine whether the abnormality of the nonvolatile memory at the time of loading is an abnormality of the nonvolatile memory itself or an abnormality due to unwriting.

  The above-described embodiment is an example of the present invention. For this reason, the present invention is not limited to the above-described embodiment, and various modifications can be made depending on the design and the like as long as the technical idea according to the present invention is not deviated from this embodiment. Of course, it is possible to change.

It is a block diagram which shows the structure of the memory control apparatus to which this invention is applied. It is a flowchart which shows the process sequence of the memory control process by the memory control apparatus to which this invention is applied. It is a flowchart which shows the process sequence of the data determination process by the memory control apparatus to which this invention is applied. It is a flowchart which shows the process sequence of the data deletion process by the memory control apparatus to which this invention is applied. It is a flowchart which shows the process sequence of the data preservation | save process by the memory control apparatus to which this invention is applied. It is a flowchart which shows the process sequence of the memory control process in the past. It is a flowchart which shows the process sequence of the data determination process in the past. It is a flowchart which shows the process sequence of the data erasing process in the past. It is a flowchart which shows the process sequence of the preservation | save process in the past.

Explanation of symbols

1 ECU
2 Battery power 3 IGN switch 11 Power circuit 12 Input I / F
13 MPU

Claims (3)

In a non-volatile memory control device that controls storage and erasure of data in a non-volatile memory,
Data erasure that reads the detection data in which the storage area in the nonvolatile memory is divided from the data and the checksum and updates only the value of the detection data from the nonvolatile memory at power-on or every predetermined processing cycle Means,
Data detection means for reading the detection data updated by the data erasure means, calculating the checksum using the detection data and data to be saved, and writing the checksum and the data to be saved A control device for a non-volatile memory, comprising: Comprising data determining means for detecting an abnormality relating to the non-volatile memory at power-on,
This data judgment means
A first determination process of reading data, the detection data, and the checksum from the nonvolatile memory, and determining whether the data and the detection data are normal information with respect to the checksum;
When it is determined by the first determination process that the detection data is not normal, the non-volatility is determined when it is determined that the value of the detection data read by the first determination process does not correspond to any preset value. A second determination process for determining that the memory itself is abnormal;
When it is determined by the second determination process that the value of the detected data is normal, the value of the detected data is corrected to any preset value, and the data and the corrected checksum are corrected. It is determined whether or not the detected data is normal information. When it is determined that the detected data is normal, it is determined that the nonvolatile memory is not yet written. When it is determined that the detected data is abnormal, the nonvolatile memory is determined. The non-volatile memory control device according to claim 1, further comprising: a third determination process that determines that the memory itself is abnormal.   When the data erasing means determines that the data determining means is abnormal, the data erasing means determines that the entire information written in the nonvolatile memory including the data, checksum, and detected data is unwritten. 3. The non-volatile memory control device according to claim 2, wherein data is written.

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