JP2006120724A - Method of ultrasonic packaging, and ultrasonic packaging apparatus used therefor - Google Patents

Method of ultrasonic packaging, and ultrasonic packaging apparatus used therefor Download PDF

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JP2006120724A
JP2006120724A JP2004304643A JP2004304643A JP2006120724A JP 2006120724 A JP2006120724 A JP 2006120724A JP 2004304643 A JP2004304643 A JP 2004304643A JP 2004304643 A JP2004304643 A JP 2004304643A JP 2006120724 A JP2006120724 A JP 2006120724A
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ultrasonic
substrate
semiconductor chip
horn
ultrasonic vibration
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JP4491321B2 (en
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Takayoshi Matsumura
貴由 松村
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Fujitsu Ltd
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Fujitsu Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of ultrasonic packaging which can improve the packaging efficiency. <P>SOLUTION: In the method of ultrasonic packaging which performs ultrasonic bonding of semiconductor chips 18 to a substrate 22, a substrate 22 is arranged in a corresponding arrangement to the convex part 16 of a horn 14 on a stage 20, by using the ultrasonic wave packaging apparatus 10, having the horn 14 in which the convex part 16 is provided in the corresponding position to the maximum amplitude point of the ultrasonic vibration generated by the ultrasonic vibration to propagate. A plurality of semiconductor chips 18 are arranged on the substrate 22. The convex part 16 of the horn 14 mutually contacts the semiconductor chip 18, and the ultrasonic vibration is applied to it, and the plurality of the semiconductor chips 18 are bonded to the substrate 22, simultaneously. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体チップを基板に接合する超音波実装方法およびこれに用いる超音波実装装置に関する。   The present invention relates to an ultrasonic mounting method for bonding a semiconductor chip to a substrate and an ultrasonic mounting apparatus used therefor.

近年、半導体パッケージ等の半導体装置を製造するにあたって半導体チップを配線基板にフリップチップ接合して搭載する際、半導体チップのバンプ等の電極端子と配線基板のパッド等の電極端子とを当接させ、半導体チップに超音波振動を印加することで、半導体チップと配線基板との電極端子同士を接合（ボンディング）する方法が用いられている。   In recent years, in manufacturing a semiconductor device such as a semiconductor package, when a semiconductor chip is mounted on a wiring board by flip chip bonding, electrode terminals such as bumps of the semiconductor chip and electrode terminals such as pads of the wiring board are brought into contact with each other. A method of bonding (bonding) electrode terminals of a semiconductor chip and a wiring board by applying ultrasonic vibration to the semiconductor chip is used.

特許文献１には、超音波振動を用いた従来のフリップチップの接続方法が記載されている。
特許文献１記載のフリップチップの接続方法においては、マウントヘッドに吸着保持させたフリップチップ（半導体チップ）のバンプ（金バンプ）を、基板の被接続端子（金もしくはアルミニウム端子）に接触させて荷重を加え、マウントヘッドに内蔵された超音波振動子を超音波振動させることで、マウントヘッドを介してフリップチップを超音波振動させる（特許文献１ 段落００１６−００１８，第１−２図）。
これにより、被接続部の酸化層などを容易に除去でき、信頼性の高い電気的接続行うことができるものとしている（特許文献１ 段落００２２）
特開平１０−１２６６９号公報（段落００１６−００１８，００２２，第１−２図） Patent Document 1 describes a conventional flip-chip connection method using ultrasonic vibration.
In the flip chip connection method described in Patent Document 1, a bump (gold bump) of a flip chip (semiconductor chip) attracted and held by a mount head is brought into contact with a connected terminal (gold or aluminum terminal) of a substrate and loaded. And the ultrasonic vibrator built in the mount head is vibrated ultrasonically, thereby causing the flip chip to vibrate ultrasonically via the mount head (Patent Document 1, paragraphs 0016-0018 and FIGS. 1-2).
Accordingly, the oxide layer and the like of the connected portion can be easily removed, and highly reliable electrical connection can be performed (Patent Document 1, paragraph 0022).
Japanese Patent Laid-Open No. 10-12669 (paragraphs 0016-0018, 0022, FIG. 1-2)

しかしながら、従来の超音波振動を用いた半導体チップの接合方法では、１つの超音波実装装置で１つづつの半導体チップの接合しか行えず、効率がよくないという課題があった。   However, the conventional semiconductor chip bonding method using ultrasonic vibration has a problem that only one semiconductor chip can be bonded by one ultrasonic mounting apparatus, which is not efficient.

そこで、本発明は、上記課題を解決すべく成され、その目的とするところは、１つの超音波実装装置で同時に複数の半導体チップの接合が行え、実装効率を向上させることのできる超音波実装方法およびこれに用いる超音波実装装置を提供するにある。   Therefore, the present invention has been made to solve the above-described problems, and the object of the present invention is to perform ultrasonic mounting that can simultaneously bond a plurality of semiconductor chips with one ultrasonic mounting apparatus and improve mounting efficiency. A method and an ultrasonic mounting apparatus used for the method are provided.

本発明に係る超音波実装方法では、半導体チップを基板に超音波接合する超音波実装方法において、伝播する超音波振動により生じる、超音波振動の最大振幅点に対応する位置に凸部を設けたホーンを有する超音波実装装置を用い、ステージ上に、前記ホーンの凸部に対応する配列で基板を配置し、該基板上に複数の半導体チップを配置し、該半導体チップに前記ホーンの凸部を互いに接触させて超音波振動を印加することによって、該基板に同時に複数の半導体チップを接合することを特徴とする。   In the ultrasonic mounting method according to the present invention, in the ultrasonic mounting method in which the semiconductor chip is ultrasonically bonded to the substrate, a convex portion is provided at a position corresponding to the maximum amplitude point of the ultrasonic vibration generated by the propagating ultrasonic vibration. An ultrasonic mounting apparatus having a horn is used, a substrate is arranged on the stage in an arrangement corresponding to the convex portion of the horn, a plurality of semiconductor chips are arranged on the substrate, and the convex portion of the horn is arranged on the semiconductor chip. A plurality of semiconductor chips are simultaneously bonded to the substrate by applying ultrasonic vibration while bringing them into contact with each other.

また本発明に係る超音波実装装置では、超音波振動が伝播するホーンを有し、該ホーンを半導体チップに接触させ、超音波を印加することによって半導体チップを基板に超音波接合する超音波実装装置において、前記ホーンに、超音波振動により生じる超音波振動の最大振幅点に対応して、半導体チップに接触して超音波振動を印加するための凸部を設けたことを特徴とする。   In the ultrasonic mounting apparatus according to the present invention, the ultrasonic mounting includes a horn through which ultrasonic vibration propagates, the ultrasonic contact is applied to the semiconductor chip by bringing the horn into contact with the semiconductor chip and applying ultrasonic waves. In the apparatus, the horn is provided with a convex portion for applying the ultrasonic vibration in contact with the semiconductor chip, corresponding to the maximum amplitude point of the ultrasonic vibration generated by the ultrasonic vibration.

また本発明に係る超音波実装方法では、半導体チップを基板に超音波接合する超音波実装方法において、伝播する超音波振動により生じる、超音波振動の最大振幅点に対応する位置に凸部を設けたステージを有する超音波実装装置を用い、該ステージの前記凸部上に基板を配置し、該基板上に複数の半導体チップを配置し、半導体チップをツールによって押圧保持しつつ、前記ステージに超音波振動を印加することによって、基板に複数の半導体チップを同時に接合することを特徴とする。 Further, in the ultrasonic mounting method according to the present invention, in the ultrasonic mounting method in which the semiconductor chip is ultrasonically bonded to the substrate, a convex portion is provided at a position corresponding to the maximum amplitude point of the ultrasonic vibration generated by the propagating ultrasonic vibration. An ultrasonic mounting apparatus having a stage is disposed, a substrate is disposed on the convex portion of the stage, a plurality of semiconductor chips are disposed on the substrate, and the semiconductor chip is pressed and held by a tool while being superposed on the stage. A plurality of semiconductor chips are simultaneously bonded to the substrate by applying sonic vibration.

また本発明にかかる超音波実装装置では、ステージ上に複数の基板を配置し、該基板上に半導体チップを配置し、半導体チップをツールにより押圧保持しつつステージに超音波振動を印加する超音波実装装置であって、前記ステージに、超音波振動により生じる超音波振動の最大振幅点に対応して、前記基板を配置するための凸部を設けたことを特徴とする。   In the ultrasonic mounting apparatus according to the present invention, a plurality of substrates are arranged on a stage, a semiconductor chip is arranged on the substrate, and ultrasonic waves are applied to the stage while pressing and holding the semiconductor chip with a tool. The mounting apparatus is characterized in that a convex portion for arranging the substrate is provided on the stage in correspondence with a maximum amplitude point of ultrasonic vibration generated by ultrasonic vibration.

また本発明に係る超音波実装方法では、上記実装装置を併用して、ステージの前記凸部上に基板を配置し、該基板上に複数の半導体チップを配置し、各半導体チップにホーンの凸部を当接させ、ステージおよびホーンに超音波振動を印加して複数の半導体チップを基板に同時に接合することを特徴とする。 Further, in the ultrasonic mounting method according to the present invention, the mounting device is used together, a substrate is disposed on the convex portion of the stage, a plurality of semiconductor chips are disposed on the substrate, and the convex portion of the horn is disposed on each semiconductor chip. And a plurality of semiconductor chips are simultaneously bonded to the substrate by applying ultrasonic vibration to the stage and the horn.

本発明に係る超音波実装方法および超音波実装装置では、１つの超音波実装装置により複数の半導体チップを基板に同時にフリップチップ接続することができ、実装効率を格段に向上させることができる。   In the ultrasonic mounting method and the ultrasonic mounting apparatus according to the present invention, a plurality of semiconductor chips can be simultaneously flip-chip connected to the substrate by one ultrasonic mounting apparatus, and the mounting efficiency can be greatly improved.

以下、本発明を実施するための最良の形態を、添付図面に基づいて詳細に説明する。   Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the accompanying drawings.

図１は半導体チップの超音波実装方法および超音波実装装置の第１の実施例を示す説明図である。
超音波実装装置１０は、振動子１２と、この振動子１２から超音波振動が印加され、超音波振動が伝播するホーン１４と、発振制御装置（図示せず）を有している。
本実施例で特徴とするところは、ホーン１４に、超音波振動により生じる超音波振動の最大振幅点（複数の腹の各位置）に対応して、半導体チップ１８に接触して超音波振動を印加するための凸部１６を設けた点にある。 FIG. 1 is an explanatory view showing a first embodiment of a semiconductor chip ultrasonic mounting method and an ultrasonic mounting apparatus.
The ultrasonic mounting apparatus 10 includes a vibrator 12, a horn 14 to which ultrasonic vibration is applied from the vibrator 12, and the ultrasonic vibration propagates, and an oscillation control device (not shown).
The feature of the present embodiment is that the horn 14 is brought into contact with the semiconductor chip 18 in accordance with the maximum amplitude point (each position of the plurality of antinodes) of the ultrasonic vibration generated by the ultrasonic vibration, and the ultrasonic vibration is applied. It is in the point which provided the convex part 16 for applying.

超音波振動は、ホーン１４中を粗密波として伝播する。この場合に、ホーン１４の両端側に超音波振動の腹（最大振幅点）が生じ、ホーン１４の中間部に複数の最大振幅点と節ができる。
この超音波振動の最大振幅点は、当然ながら１／２波長ごとに生じる。ホーン１４の材質にもよるが、５０ｋＨｚ程度の振動数の場合、ほぼ２０ｃｍ程度の波長となる。したがって、半波長は１０ｃｍ程度となる。本実施の形態では、この超音波振動によってホーン１４に生じる複数の最大振幅点の位置に凸部１６を設けるのである。この最大振幅点の間隔は、用いる超音波の振動数によって変わる。 The ultrasonic vibration propagates through the horn 14 as a dense wave. In this case, antinodes (maximum amplitude points) of ultrasonic vibration are generated at both ends of the horn 14, and a plurality of maximum amplitude points and nodes are formed in the middle portion of the horn 14.
Naturally, the maximum amplitude point of this ultrasonic vibration occurs every half wavelength. Although depending on the material of the horn 14, when the frequency is about 50 kHz, the wavelength is about 20 cm. Therefore, the half wavelength is about 10 cm. In the present embodiment, the convex portions 16 are provided at the positions of a plurality of maximum amplitude points generated in the horn 14 by this ultrasonic vibration. The interval between the maximum amplitude points varies depending on the frequency of the ultrasonic wave used.

粗密波の最大振幅点の位置は、ホーン１４から半導体チップ１８に対して水平方向に最大の振動を与えることができる位置であり、超音波エネルギーを最大限伝達しうる位置であって、この位置に凸部１６を設けることで半導体チップ１８を効率よく超音波接合できる。
なお、凸部１６は、複数設けるのであるが、振動の伝播する方向に必ずしも連続して設ける必要はなく、ｎλ／２（ｎは整数）の適宜の最大振幅点の位置に設ければよい。 The position of the maximum amplitude point of the dense wave is a position where the maximum vibration can be applied in the horizontal direction from the horn 14 to the semiconductor chip 18, and the position where the ultrasonic energy can be transmitted to the maximum. The semiconductor chip 18 can be efficiently ultrasonically bonded by providing the protrusion 16 on the surface.
Although a plurality of convex portions 16 are provided, it is not always necessary to provide them continuously in the direction of propagation of vibration, and they may be provided at the position of an appropriate maximum amplitude point of nλ / 2 (n is an integer).

実施例１の超音波実装装置１０を用いて超音波実装をするには次のようにする。
すなわち、ステージ２０上に、前記ホーン１４の凸部１６に対応する配列で複数の基板２２を配置し、該基板２２に、基板２２の電極（金パッドあるいはアルミニウムパッド）と半導体チップ１８との電極（金バンプ）とを位置合わせして半導体チップ１８を配置する。半導体チップ１８は、超音波実装装置１０のホーン１４の凸部１６下面側に真空吸着し、この状態で対応する基板２２上に配置するようにするとよい。なお基板２２はステージ２０上に適宜接着剤等によって固定するとよい。 The ultrasonic mounting is performed as follows using the ultrasonic mounting apparatus 10 of the first embodiment.
That is, a plurality of substrates 22 are arranged on the stage 20 in an arrangement corresponding to the convex portions 16 of the horn 14, and electrodes (gold pads or aluminum pads) of the substrate 22 and electrodes of the semiconductor chip 18 are arranged on the substrate 22. The semiconductor chip 18 is placed in alignment with the (gold bump). The semiconductor chip 18 may be vacuum-sucked on the lower surface side of the convex portion 16 of the horn 14 of the ultrasonic mounting apparatus 10 and placed on the corresponding substrate 22 in this state. The substrate 22 is preferably fixed on the stage 20 with an adhesive or the like as appropriate.

上記のようにセットした後、超音波をホーン１４の凸部１６を介して半導体チップ１８に超音波振動を印加することによって、複数の半導体チップ１８を基板２２上に同時にフリップチップ接続することができ、実装効率を向上させることができる。
なお、上記では１つの基板（計４個）に１つの半導体チップ（計４個）を実装したが、１つの基板２２上に複数の半導体チップ１８を実装する場合にも上記実装装置１０を用いることができる。本発明において基板に複数の半導体チップを実装するとは、この両者を含む概念である。 After setting as described above, by applying ultrasonic vibration to the semiconductor chip 18 via the convex portion 16 of the horn 14, a plurality of semiconductor chips 18 can be simultaneously flip-chip connected to the substrate 22. This can improve the mounting efficiency.
In the above description, one semiconductor chip (four in total) is mounted on one substrate (four in total). However, the mounting apparatus 10 is also used when a plurality of semiconductor chips 18 are mounted on one substrate 22. be able to. In the present invention, mounting a plurality of semiconductor chips on a substrate is a concept including both of them.

図２は第２の実施例に係る実装方法および実装装置３０を示す。
本実施例では、ステージ２０側を超音波実装装置３０に構成している。
すなわち、ステージ２０の両側に振動子１２を取り付け、この振動子１２を図示しない発振制御装置によって超音波振動させるのである。
そして、本実施例では、ステージ２０に、超音波振動により生じる超音波振動の複数の最大振幅点の位置に対応して、基板２２を配置するための凸部２４を設けた。 FIG. 2 shows a mounting method and a mounting apparatus 30 according to the second embodiment.
In this embodiment, the stage 20 side is configured in the ultrasonic mounting apparatus 30.
That is, the vibrator 12 is attached to both sides of the stage 20, and the vibrator 12 is ultrasonically vibrated by an oscillation control device (not shown).
In this embodiment, the stage 20 is provided with the convex portions 24 for arranging the substrate 22 corresponding to the positions of the plurality of maximum amplitude points of the ultrasonic vibration generated by the ultrasonic vibration.

この場合にも、ステージ２０の両端側に超音波振動の腹（最大振幅点）が生じ、ステージ２０の中間部に複数の最大振幅点と節ができる。
この超音波振動の最大振幅点は、当然ながら１／２波長ごとに生じる。ステージ２０の材質にもよるが、５０ｋＨｚ程度の振動数の場合、ほぼ２０ｃｍ程度の波長となる。したがって、半波長は１０ｃｍ程度となる。本実施の形態では、この超音波振動によってステージ２０に生じる複数の最大振幅点の位置に凸部２４を設けるのである。この最大振幅点の間隔は、用いる超音波の振動数によって変わる。
なお、凸部２４は、複数設けるのであるが、振動の伝播する方向に必ずしも連続して設ける必要はなく、ｎλ／２（ｎは整数）の適宜の最大振幅点の位置に設ければよい。 Also in this case, antinodes (maximum amplitude points) of ultrasonic vibrations are generated on both ends of the stage 20, and a plurality of maximum amplitude points and nodes are formed in the intermediate portion of the stage 20.
Naturally, the maximum amplitude point of this ultrasonic vibration occurs every half wavelength. Although it depends on the material of the stage 20, in the case of a frequency of about 50 kHz, the wavelength is about 20 cm. Therefore, the half wavelength is about 10 cm. In the present embodiment, the convex portions 24 are provided at the positions of a plurality of maximum amplitude points generated on the stage 20 by this ultrasonic vibration. The interval between the maximum amplitude points varies depending on the frequency of the ultrasonic wave used.
Although a plurality of convex portions 24 are provided, it is not always necessary to provide them continuously in the direction of vibration propagation, and they may be provided at the position of an appropriate maximum amplitude point of nλ / 2 (n is an integer).

実施例２の超音波実装装置３０を用いて半導体チップを超音波実装するには次のようにする。
すなわち、ステージ２０の凸部２４上に基板２２を配置し、該各基板２２上に半導体チップ１８を配置し、半導体チップ１８をツール２６によって基板２２側に押圧保持しつつ、ステージ２０に振動子１２から超音波振動を印加することによって、複数の基板２２に半導体チップ１８を同時にフリップチップ接続することができる。
基板２２は凸部２４上に適宜な接着剤によって固定するとよい。
また、半導体チップ１８は、ツール２６の対応位置に真空吸着して保持し、基板２２上に、基板２２の電極と半導体チップ１８との電極とを位置合わせして半導体チップ１８を配置するようにするとよい。
なお、上記では１つの基板（計４個）に１つの半導体チップ（計４個）を実装したが、１つの基板２２上に複数の半導体チップ１８を実装する場合にも上記実装装置１０を用いることができる。 To ultrasonically mount a semiconductor chip using the ultrasonic mounting apparatus 30 according to the second embodiment, the following is performed.
That is, the substrate 22 is disposed on the convex portion 24 of the stage 20, the semiconductor chip 18 is disposed on each substrate 22, and the semiconductor chip 18 is pressed and held on the substrate 22 side by the tool 26, while the vibrator is placed on the stage 20. By applying ultrasonic vibration from 12, the semiconductor chip 18 can be simultaneously flip-chip connected to the plurality of substrates 22.
The substrate 22 may be fixed on the convex portion 24 with an appropriate adhesive.
Further, the semiconductor chip 18 is vacuum-sucked and held at a corresponding position of the tool 26, and the semiconductor chip 18 is disposed on the substrate 22 by aligning the electrode of the substrate 22 and the electrode of the semiconductor chip 18. Good.
In the above description, one semiconductor chip (four in total) is mounted on one substrate (four in total). However, the mounting apparatus 10 is also used when a plurality of semiconductor chips 18 are mounted on one substrate 22. be able to.

図３は実装方法の第３の実施例を示す説明図である。
本実施例では、実施例２（図２）における実装装置において、ツール２６の代わりに図１に示す実装装置を用いたものである。図１と、図２のものと同一の部材は同一の符号で示し、説明を省略する。
この実施例３で半導体チップ１８を基板２２上に超音波実装するには次のようにする。
すなわち、ステージ２０の前記各凸部２４上に基板２２を配置し、該各基板２２上に半導体チップ１８を配置し、各半導体チップ１８にホーン１４の凸部１６を当接させ、ステージ２０およびホーン１４に超音波振動を印加して複数の半導体チップ１８を基板２２に同時にフリップチップ接続するのである。 FIG. 3 is an explanatory view showing a third embodiment of the mounting method.
In this embodiment, the mounting apparatus shown in FIG. 1 is used in place of the tool 26 in the mounting apparatus in the second embodiment (FIG. 2). The same members as those in FIG. 1 and FIG. 2 are denoted by the same reference numerals, and description thereof is omitted.
In the third embodiment, the semiconductor chip 18 is ultrasonically mounted on the substrate 22 as follows.
That is, the substrate 22 is disposed on each convex portion 24 of the stage 20, the semiconductor chip 18 is disposed on each substrate 22, the convex portion 16 of the horn 14 is brought into contact with each semiconductor chip 18, and the stage 20 and A plurality of semiconductor chips 18 are simultaneously flip-chip connected to the substrate 22 by applying ultrasonic vibration to the horn 14.

基板２２は凸部２４上に適宜な接着剤によって固定するとよい。
また、半導体チップ１８は、ホーン１４の凸部１６に真空吸着して保持し、基板２２上に、基板２２の電極と半導体チップ１８との電極とを位置合わせして半導体チップ１８を配置するようにするとよい。
なお、上記では１つの基板（計４個）に１つの半導体チップ（計４個）を実装したが、１つの基板２２上に複数の半導体チップ１８を実装する場合にも上記実装装置１０を用いることができる。 The substrate 22 may be fixed on the convex portion 24 with an appropriate adhesive.
Further, the semiconductor chip 18 is vacuum-sucked and held on the convex portion 16 of the horn 14, and the semiconductor chip 18 is arranged on the substrate 22 by aligning the electrode of the substrate 22 and the electrode of the semiconductor chip 18. It is good to.
In the above description, one semiconductor chip (four in total) is mounted on one substrate (four in total). However, the mounting apparatus 10 is also used when a plurality of semiconductor chips 18 are mounted on one substrate 22. be able to.

なお、上記第１〜第３の実施例において、凸部１６、２４を一直線上に配置した例を示したが、これに限られず、たとえばマトリクス状に配置することもできる。この場合にも、超音波振動の最大振幅点がこの凸部位置に略生じるようにするのである。   In the first to third embodiments, the example in which the convex portions 16 and 24 are arranged on a straight line is shown. However, the present invention is not limited to this, and the convex portions 16 and 24 may be arranged in a matrix, for example. Also in this case, the maximum amplitude point of the ultrasonic vibration is generated approximately at the position of the convex portion.

本発明に係る半導体チップの超音波実装方法および実装装置の第１の実施例を示した説明図である。It is explanatory drawing which showed the 1st Example of the ultrasonic mounting method and mounting apparatus of the semiconductor chip concerning this invention. 本発明に係る半導体チップの超音波実装方法および実装装置の第２の実施例を示した説明図である。It is explanatory drawing which showed the 2nd Example of the ultrasonic mounting method and mounting apparatus of the semiconductor chip concerning this invention. 本発明に係る半導体チップの超音波実装方法の第３の実施例を示した説明図である。It is explanatory drawing which showed the 3rd Example of the ultrasonic mounting method of the semiconductor chip based on this invention.

符号の説明Explanation of symbols

１０ 超音波実装装置
１２ 振動子
１４ ホーン
１６ 凸部
１８ 半導体チップ
２０ ステージ
２２ 基板
２４ 凸部
２６ ツール
３０ 超音波実装装置 DESCRIPTION OF SYMBOLS 10 Ultrasonic mounting apparatus 12 Vibrator 14 Horn 16 Convex part 18 Semiconductor chip 20 Stage 22 Substrate 24 Convex part 26 Tool 30 Ultrasonic mounting apparatus

Claims (5)

半導体チップを基板に超音波接合する超音波実装方法において、
伝播する超音波振動により生じる、超音波振動の最大振幅点に対応する位置に凸部を設けたホーンを有する超音波実装装置を用い、ステージ上に、前記ホーンの凸部に対応する配列で基板を配置し、該基板上に複数の半導体チップを配置し、該半導体チップに前記ホーンの凸部を互いに接触させて超音波振動を印加することによって、該基板に同時に複数の半導体チップを接合することを特徴とする超音波実装方法。 In an ultrasonic mounting method for ultrasonic bonding a semiconductor chip to a substrate,
Using an ultrasonic mounting apparatus having a horn provided with a convex portion at a position corresponding to the maximum amplitude point of ultrasonic vibration generated by propagating ultrasonic vibration, the substrate is arranged on the stage in an arrangement corresponding to the convex portion of the horn. A plurality of semiconductor chips are arranged on the substrate, and the plurality of semiconductor chips are simultaneously bonded to the substrate by applying ultrasonic vibrations by bringing the convex portions of the horn into contact with each other. And an ultrasonic mounting method. 超音波振動が伝播するホーンを有し、該ホーンを半導体チップに接触させ、超音波を印加することによって半導体チップを基板に超音波接合する超音波実装装置において、
前記ホーンに、超音波振動により生じる超音波振動の最大振幅点に対応して、半導体チップに接触して超音波振動を印加するための凸部を設けたことを特徴とする超音波実装装置。 In an ultrasonic mounting apparatus that has a horn through which ultrasonic vibration propagates, contacts the horn with a semiconductor chip, and ultrasonically bonds the semiconductor chip to the substrate by applying ultrasonic waves,
An ultrasonic mounting apparatus, wherein the horn is provided with a convex portion for applying ultrasonic vibration in contact with a semiconductor chip, corresponding to a maximum amplitude point of ultrasonic vibration generated by ultrasonic vibration. 半導体チップを基板に超音波接合する超音波実装方法において、
伝播する超音波振動により生じる、超音波振動の最大振幅点に対応する位置に凸部を設けたステージを有する超音波実装装置を用い、該ステージの前記凸部上に基板を配置し、該基板上に複数の半導体チップを配置し、半導体チップをツールによって押圧保持しつつ、前記ステージに超音波振動を印加することによって、基板に複数の半導体チップを同時に接合することを特徴とする超音波実装方法。 In an ultrasonic mounting method for ultrasonic bonding a semiconductor chip to a substrate,
An ultrasonic mounting apparatus having a stage provided with a convex portion at a position corresponding to the maximum amplitude point of ultrasonic vibration generated by propagating ultrasonic vibration is used, a substrate is disposed on the convex portion of the stage, and the substrate An ultrasonic mounting characterized in that a plurality of semiconductor chips are disposed on the substrate, and a plurality of semiconductor chips are simultaneously bonded to the substrate by applying ultrasonic vibration to the stage while holding the semiconductor chips pressed by a tool. Method. ステージ上に複数の基板を配置し、該基板上に半導体チップを配置し、半導体チップをツールにより押圧保持しつつステージに超音波振動を印加する超音波実装装置であって、
前記ステージに、超音波振動により生じる超音波振動の最大振幅点に対応して、前記基板を配置するための凸部を設けたことを特徴とする超音波実装装置。 A plurality of substrates are arranged on a stage, a semiconductor chip is arranged on the substrate, and an ultrasonic mounting apparatus that applies ultrasonic vibration to the stage while pressing and holding the semiconductor chip with a tool,
An ultrasonic mounting apparatus, wherein a convex portion for arranging the substrate is provided on the stage in correspondence with a maximum amplitude point of ultrasonic vibration generated by ultrasonic vibration. 請求項４におけるツールの代わりに請求項２の超音波実装装置を用い、
ステージの前記凸部上に基板を配置し、該基板上に複数の半導体チップを配置し、
各半導体チップにホーンの凸部を当接させ、
ステージおよびホーンに超音波振動を印加して複数の半導体チップを基板に同時に接合することを特徴とする超音波実装方法。 Using the ultrasonic mounting apparatus of claim 2 instead of the tool of claim 4,
A substrate is disposed on the convex portion of the stage, a plurality of semiconductor chips are disposed on the substrate,
The convex part of the horn is brought into contact with each semiconductor chip,
An ultrasonic mounting method comprising applying ultrasonic vibration to a stage and a horn to simultaneously bond a plurality of semiconductor chips to a substrate.
JP2004304643A 2004-10-19 2004-10-19 Ultrasonic mounting method and ultrasonic mounting apparatus used therefor Expired - Fee Related JP4491321B2 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011228620A (en) * 2010-03-31 2011-11-10 Sumitomo Bakelite Co Ltd Method of manufacturing electronic device and manufacturing apparatus of the same
JP2012204718A (en) * 2011-03-28 2012-10-22 Apic Yamada Corp Joining device and joining method
US9016342B2 (en) 2011-03-28 2015-04-28 Apic Yamada Corporation Bonding apparatus and bonding method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10223687A (en) * 1997-02-07 1998-08-21 Nec Kansai Ltd Method and device of manufacture of flip-chip mounting module
JP2003145282A (en) * 2001-11-09 2003-05-20 Mitsubishi Electric Corp Ultrasonic vibration joining apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10223687A (en) * 1997-02-07 1998-08-21 Nec Kansai Ltd Method and device of manufacture of flip-chip mounting module
JP2003145282A (en) * 2001-11-09 2003-05-20 Mitsubishi Electric Corp Ultrasonic vibration joining apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011228620A (en) * 2010-03-31 2011-11-10 Sumitomo Bakelite Co Ltd Method of manufacturing electronic device and manufacturing apparatus of the same
JP2012204718A (en) * 2011-03-28 2012-10-22 Apic Yamada Corp Joining device and joining method
US9016342B2 (en) 2011-03-28 2015-04-28 Apic Yamada Corporation Bonding apparatus and bonding method

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