JP2006100715A - Manufacturing method for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for semiconductor devices whereby there is so improved the adhesiveness of the interface between a silicon nitride film of a passivation film formed by a plasma CVD method, and a foundational insulating film of a silicon oxide film formed by a plasma CVD method using especially a TEOS gas as its raw material as to be able to prevent the interface from peeling in post-processes. <P>SOLUTION: The manufacturing method for semiconductor devices has a process for depositing by a CVD method a foundational insulating film on the whole of the surface of a semiconductor substrate having thereon a formed wiring, a process for irradiating the plasma of a nitrogen gas or an ammonia gas on the surface of the foundational insulating film when depositing by a plasma CVD method a silicon nitride film on the foundational insulating film, and a process for depositing thereafter by the plasma CVD method the silicon nitride film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a final protective film (hereinafter also referred to as “passivation film”).

Conventionally, in semiconductor devices, a plasma CVD (Chemical Vapor Deposition) method using a monosilane gas (hereinafter referred to as “SiH ₄ gas”), ammonia gas (hereinafter referred to as “NH ₃ gas”), or the like as a source gas is used. A deposited silicon nitride film (hereinafter, a silicon nitride film deposited by a plasma CVD method is also referred to as a “P-SiN film”) is used as a final protective film (passivation film) for protecting the surface of the semiconductor device. Is common.

The P-SiN film used as the passivation film is a silicon oxide film (hereinafter referred to as “SiO ₂ film”) deposited by CVD on the wiring formed in the uppermost layer in the multilayer wiring structure of the semiconductor device. .) Is generally deposited on top of each other.
It is known that the P-SiN film has a dense film composition, excellent adhesion to the SiO ₂ film serving as a base insulating film, and excellent characteristics as a passivation film.

  By the way, when depositing an insulating film by a CVD method, as described in Patent Documents 1 to 3 below, depending on the film type, film forming method, or surface state of the base film, it is appropriate to obtain good film forming characteristics. It may be necessary to perform some pre-processing.

In Patent Document 1, a TEOS-O ₃ (ozone) system is formed on a first insulating film formed over the entire surface of a semiconductor substrate by a TEOS (tetraethoxysilane: (C ₂ H ₅ O) ₄ Si) plasma CVD method. When forming the second insulating film by the atmospheric pressure CVD method, pretreatment is performed in order to improve the surface morphology by eliminating the base dependency of the second insulating film and to improve the embedding in a minute gap. A method of performing plasma treatment with nitrogen gas (hereinafter referred to as “N ₂ gas”) by applying RF (Radio Frequency) power of two frequencies having different frequencies is disclosed.

In Patent Document 2, an SOG (Spin On Glass) film formed on the first plasma CVD film is etched back, and then a second plasma CVD film is deposited on the exposed first plasma CVD film surface. In order to remove carbon or fluorine-based deposits formed by reactive ion etching on the surface of the first plasma CVD film, N ₂ gas, NH ₃ gas, or the like is used as a pretreatment. There is disclosed a method of performing plasma irradiation using a laser.

In Patent Document 3, a damascene method is used to form a P-SiN film as a cap film covering the copper wiring on the surface of the semiconductor substrate in which the copper wiring is embedded in the wiring groove of the SiO ₂ film that is an insulating film. In order to prevent the formation of copper silicide at the interface between the copper wiring surface and the cap film and the occurrence of TDDB (Time Dependent Dielectric Breakdown) defects between the wirings, it is exposed to the substrate surface before forming the cap film. A method of performing a reducing plasma treatment on the surfaces of the SiO ₂ film and the copper wiring in an NH ₃ atmosphere is disclosed.

Japanese Patent Laid-Open No. 08-203891 Japanese Patent Application Laid-Open No. 07-066179 JP 2001-053076 A

In any of the techniques disclosed in Patent Documents 1 to 3 described above, when the P-SiN film as the passivation film is deposited, the pretreatment is performed when the underlying structure is different or when the deposited film type is different. Proposed need. Conventionally, when a P-SiN film as a passivation film is deposited, that is, over the entire surface of a semiconductor substrate on which wiring is formed, a P-SiN film is superimposed on a SiO ₂ film deposited by a CVD method, particularly a plasma CVD method. In the case of depositing a film, the necessity of such pretreatment has not been pointed out.

However, as a result of intensive studies by the present inventors, it has been found that even when a P-SiN film is deposited as a passivation film, the adhesiveness to the base insulating film is deteriorated. In particular, SiO ₂ film (hereinafter the SiO ₂ film serving as a base insulating film is formed by a plasma CVD method using TEOS gas as a starting material, the SiO ₂ film formed by a plasma CVD method using TEOS gas as a raw material, " In the case of “P-TEOS film”, it has been found that defects such as peeling of the P-SiN film may occur in a subsequent process (cleaning process).

  The object of the present invention is to eliminate the problems based on the above-mentioned prior art, improve the adhesion of the interface between the P-SiN film and the base insulating film, and prevent the interface from peeling in the subsequent process. It is to provide a method for manufacturing an apparatus.

  In order to achieve the above object, the present invention deposits a base insulating film by a CVD method on the surface of a semiconductor substrate on which wiring is formed, and deposits a silicon nitride film on the base insulating film by a plasma CVD method. The present invention provides a method for manufacturing a semiconductor device, wherein a silicon nitride film is deposited by the plasma CVD method after irradiating the surface of the base insulating film with nitrogen gas or ammonia gas plasma.

  In the present invention, the base insulating film is preferably a silicon oxide film deposited by a plasma CVD method using TEOS and oxygen as raw materials.

  In the present invention, it is preferable that the plasma irradiation is performed by irradiating with plasma excited in an atmosphere containing ammonia gas having a pressure of 5 Torr or less.

Furthermore, in the present invention, the plasma irradiation is preferably performed by irradiating with plasma excited at a power density of 2.5 W / cm ² or more.

The semiconductor device manufacturing method of the present invention irradiates the surface of the base insulating film deposited by the CVD method on the entire surface of the semiconductor substrate on which the wiring is formed, and then irradiates plasma of N ₂ gas or NH ₃ gas. By depositing the -SiN film, the adhesion between the P-SiN film and the base insulating film, in particular, the P-TEOS film is improved, the film is prevented from peeling, and the like is formed by the method for manufacturing a semiconductor device of the present invention. It is possible to reduce the defect occurrence rate of the semiconductor device.

  Hereinafter, a method for manufacturing a semiconductor device of the present invention will be described in detail based on preferred embodiments shown in the accompanying drawings.

FIG. 1A to FIG. 1C are cross-sectional views of one embodiment showing respective steps of a semiconductor device manufacturing method of the present invention. In the method for manufacturing a semiconductor device according to an embodiment of the present invention, first, as shown in FIG. 2A, a base insulating film 16 is deposited by CVD on the entire surface of the semiconductor substrate 10 on which the wiring 14 is formed. To do. Then, as shown in FIG. 1B, the surface of the base insulating film 16 is irradiated with plasma of a mixed gas of N ₂ gas and NH ₃ gas, and then the base insulating is performed as shown in FIG. A silicon nitride film 18 is deposited on the film 16 by plasma CVD.

Here, the processing conditions in the case where the plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas is performed using a parallel plate type plasma apparatus are as follows, for example.
Reaction chamber internal pressure: 4.0 Torr to 6.0 Torr
Substrate temperature: 360-420 ° C
Distance between upper electrode and lower electrode (substrate mounting electrode): 400 mils ± 40 mils
N ₂ gas flow rate: 1500 sccm ± 100 sccm
NH ₃ gas flow rate: 50 sccm to 100 sccm

As described above, the surface of the base insulating film 16 is irradiated with plasma of a mixed gas of N ₂ gas and NH ₃ gas, and then the P-SiN film 18 is deposited. Adhesion with the insulating film 16 is improved, peeling of the film in a subsequent process can be prevented, and the defect occurrence rate can be reduced.

  In the example shown in FIG. 1A, an insulating film 12 is formed on a semiconductor substrate 10 by a CVD method, and a metal film is deposited on the insulating film 12 by a sputtering method. The wiring 14 is formed by patterning the film. However, in the method of manufacturing a semiconductor device according to the present invention, if the base insulating film 16 can be deposited on the entire surface of the semiconductor substrate 10 on which the wiring 14 is formed, any process is required before the wiring 14 is formed. May be.

The base insulating film 16 is not particularly limited, but the method for manufacturing a semiconductor device according to the present invention uses the base insulating film 16, for example, SiH ₄ gas, which tends to cause poor adhesion with the P-SiN film 18 as a raw material. The present invention is particularly useful when applied to a SiO ₂ film deposited by the plasma CVD method, or a SiO ₂ film deposited by the plasma CVD method using TEOS and oxygen as raw materials. The occurrence of poor adhesion between the base insulating film 16 and the P-SiN film 18 is particularly noticeable when the base insulating film 16 is a P-TEOS film.

Further, as can be seen from the examples described later, the plasma irradiation is performed by exciting a gas atmosphere containing NH ₃ gas having a pressure of 5.0 Torr or less in order to suppress the occurrence of defects such as peeling in a later process. It is preferable to carry out by irradiating. Moreover, it is preferable to perform plasma irradiation by irradiating the plasma excited with the power density of 2.5 W / cm < ² > or more. Further, the plasma irradiation is preferably performed at a substrate temperature of 360 ° C. or higher.

In plasma irradiation, which is a feature of the present invention, not only a mixed gas of N ₂ gas and NH ₃ gas but also N ₂ gas and NH ₃ gas may be used alone. However, in order to effectively perform the plasma irradiation process in a short time, it is preferable to use a mixed gas of N ₂ gas and NH ₃ gas.

  Further, the plasma irradiation which is a feature of the present invention can be applied not only as a pretreatment when depositing a P-SiN film as a passivation film but also in other cases. For example, in the method for manufacturing a semiconductor device, the surface of the first P-TEOS film deposited on the lower wiring is planarized by CMP (Chemical Mechanical Polishing) when forming the wiring interlayer insulating film of the semiconductor device. Also, it can be applied as a pretreatment when a second P-TEOS film is further deposited as a cap film.

Conventionally, the necessity of pretreatment has not been pointed out in the case where an SiO ₂ film is deposited on the entire surface of a semiconductor substrate over the SiO ₂ film deposited by the plasma CVD method and also deposited by the plasma CVD method.

  Note that it can be considered similar to Patent Document 2 in that a plasma CVD film is deposited on the planarized insulating film surface. However, the reason why the pretreatment is required in Patent Document 2 is that, as described above, carbon or fluorine-based deposits formed by etch back by reactive ion etching are formed on the surface. It is. In the case of performing planarization by CMP method in which such a deposit is not formed, it has been considered that pretreatment is unnecessary.

  However, according to the study by the inventors of the present invention, even in such a case, if the second PE-TEOS film is deposited on the first PE-TEOS film without performing an appropriate pretreatment, The reliability of the semiconductor device may be deteriorated due to the release of moisture from the PE-TEOS film, and peeling may occur between the first PE-TEOS film and the second PE-TEOS film. It has been found.

Accordingly, by applying the method for manufacturing a semiconductor device of the present invention, for example, as a pretreatment of the second P-TEOS film, a mixture of N ₂ gas and NH ₃ gas is formed on the surface of the first P-TEOS film. By performing gas plasma irradiation, the deterioration of the reliability of the semiconductor device due to the release of moisture from the first PE-TEOS film, and the interface between the first PE-TEOS film and the second PE-TEOS film It is possible to prevent the occurrence of peeling.

Note that the plasma irradiation at this time is not limited to using a mixture of N ₂ gas and NH ₃ gas, and N ₂ gas and NH ₃ gas may be used alone.

[Example 1]
First, a semiconductor device having the structure shown in FIG.

  That is, an insulating film 12 is deposited on the silicon substrate 10 by a CVD method so as to have a predetermined thickness, and an aluminum alloy film such as Al-Cu, Al-Si is deposited on the insulating film 12 by a sputtering method. Then, the aluminum alloy film was patterned by using a photolithography technique to form the wiring 14.

Over the entire surface of the insulating film 12 on which the above-described wiring 14 is formed, a film is formed by a plasma CVD method using RF power of two frequencies using TEOS gas and O ₂ gas, and P— is formed as a base insulating film 16. A TEOS film was deposited to a predetermined thickness to obtain a semiconductor device having the structure shown in FIG.

Next, as shown in FIG. 1B, plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas, which is a feature of the present invention, is performed on the surface of the P-TEOS film that is the base insulating film 16 described above. Carried out.

The processing conditions for plasma irradiation are as follows.
Substrate temperature: 360 ° C
Pressure: 5.5 Torr
RF power 1: 420W
N ₂ gas: 1500 sccm
NH ₃ gas: 47 sccm
Distance between upper electrode and lower electrode: 400 mils
Discharge time (irradiation time): 7 seconds However, the value shown as “substrate temperature” here is the temperature of the lower electrode on which the substrate is placed. Strictly speaking, the actual substrate temperature may be different from the above value.

Then, after the plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas, in the same reaction chamber, as shown in FIG. 1C, the P-TEOS film as the base insulating film 16 is formed by the plasma CVD method. A P-SiN film 18 was deposited thereon to a predetermined thickness.

Specific deposition conditions for the P-SiN film 18 are as follows.
Substrate temperature: 360 ° C
Pressure: 5.5 Torr
RF power 1: 420W
SiH ₄ gas: 133 sccm
N ₂ gas: 1500 sccm
NH ₃ gas: 47 sccm

[Example 2]
A semiconductor device manufacturing method of the present invention is applied to perform plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas, and a TEG (Test Element Group) having a cross-sectional structure shown in FIG. Made above.
That is, a P-TEOS film that is a base insulating film 16 is deposited on a substrate on which the wiring 14 is formed, and plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas is performed, and then the P-SiN film 18 is formed. Deposited. Then, with a resist pattern (not shown) as a mask, CDE (Chemical Dry Etching) using a mixed gas of CF ₄ gas, O ₂ gas, and N ₂ gas is used to form a P-SiN film (passivation film) 18 and P on the wiring 14. The opening 22 was formed by etching the TEOS film (base insulating film) 16.
At this time, as parameters for controlling the adhesion at the interface, TEGs are manufactured by changing the pressure, substrate temperature, and RF power during plasma irradiation, and the P-TEOS film and P-SiN as the base insulating film 16 are produced. The adhesion at the interface with the film 18 was evaluated.

The evaluation of adhesion was performed by the following two methods.
First, the cross section of the TEG in FIG. 2 was observed with a scanning electron microscope (SEM), and the presence or absence of the side slit 20 was observed. This observation was performed at a plurality of locations in the wafer, and the rate of occurrence of the side slits 20 was calculated as a defect rate.
Next, scrub cleaning was performed on the TEG shown in FIG.

First, visual observation of the P-SiN film 18 when the pressure during plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas is changed to 4.9 Torr, 5.2 Torr, 5.8 Torr, and 6.1 Torr. Table 1 shows the degree of peeling due to SEM and the defect rate (occurrence rate of side slit 20) by cross-sectional SEM observation. The film thickness of the P-SiN film is about 500 nm.

  In Table 1, when the peeling evaluation is “◯”, it means that peeling is not observed by visual observation. “Δ” and “XX” both indicate that peeling was observed, and “XX” indicates that peeling is more prominent than “Δ”.

FIG. 3 is a graph showing the relationship between the pressure during plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas and the interfacial adhesion. The horizontal axis of the graph represents the pressure during plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas, and the vertical axis represents the interfacial adhesion between the P-TEOS film as the base insulating film 16 and the P-SiN film 18. Defect rate (side slit 20 occurrence rate) is represented.
From the graphs shown in Table 1 and FIG. 3, it was found that the defect rate decreases as the pressure during plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas is set lower. In particular, in the present invention, it has been found that the plasma irradiation is preferably performed at a pressure of 5 Torr (670 Pa) or less.

Next, FIG. 4 shows a graph showing the relationship between the RF power at the time of plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas and the defective rate of interface adhesion. The horizontal axis of the graph represents RF power during plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas, and the vertical axis represents interfacial adhesion between the P-TEOS film as the base insulating film 16 and the P-SiN film 18. The defect rate (occurrence rate of side slits 20).
From the graph shown in FIG. 4, the higher the RF power at the time of plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas, the lower the defect rate, in particular, 450 W or more for a 6-inch wafer, that is, It has been found that applying RF power of 2.5 W / cm ² or more is preferable.

Finally, FIG. 5 shows a graph representing the relationship between the substrate temperature and the interfacial adhesion during plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas. The horizontal axis of the graph is the set temperature during plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas, and the vertical axis is the interfacial adhesion between the P-TEOS film as the base insulating film 16 and the P-SiN film 18. The defect rate (occurrence rate of side slits 20).
From the graph shown in FIG. 5, it was found that the defect rate decreases as the set temperature at the time of plasma irradiation of the mixed gas of N ₂ gas and NH ₃ gas is set higher. In particular, it has been found that plasma irradiation conditions with a preset temperature of 360 ° C. or higher are preferable.

The present invention is basically as described above.
As mentioned above, although the manufacturing method of the semiconductor device of this invention was demonstrated in detail, this invention is not limited to the said embodiment, In the range which does not deviate from the main point of this invention, you may make various improvement and a change. Of course.

(A)-(c) shows sectional drawing of one Embodiment showing each process of the manufacturing method of the semiconductor device of this invention. It is sectional drawing which shows a part of TEG. ₃ is a graph showing the relationship between the pressure at the time of plasma irradiation of a mixed gas of N ₂ gas and NH ₃ gas and the defective rate of interfacial adhesion between a P-TEOS film and a P-SiN film as a base insulating film. A graph showing the relationship between the N ₂ gas and NH ₃ gas as P-TEOS film and the interface adhesion failure rate of the P-SiN film mixing is the RF power and the base insulating film during plasma irradiation of the gas . A graph showing the relationship between the N ₂ gas and NH ₃ gas as the interface adhesion failure rate of the P-TEOS film and the P-SiN film and a substrate temperature of the base insulating film during plasma irradiation of the mixed gas .

Explanation of symbols

10 Semiconductor substrate (silicon substrate)
12 Insulating film 14 Wiring 16 Base insulating film 18 Silicon nitride film (P-SiN film)
20 Side slit 22 Opening

Claims (4)

In depositing a base insulating film by the CVD method on the entire surface of the semiconductor substrate on which the wiring is formed, and depositing a silicon nitride film on the base insulating film by the plasma CVD method,
A method of manufacturing a semiconductor device, comprising depositing a silicon nitride film by the plasma CVD method after irradiating the surface of the base insulating film with nitrogen gas or ammonia gas plasma.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the base insulating film is a silicon oxide film deposited by a plasma CVD method using TEOS and oxygen as raw materials.   3. The method of manufacturing a semiconductor device according to claim 1, wherein the plasma irradiation is performed by irradiating plasma excited in an atmosphere containing ammonia gas having a pressure of 5 Torr or less. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the plasma irradiation is performed by irradiating plasma excited at a power density of 2.5 W / cm < ² > or more.

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