JP2006085765A - Data processor and data processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data processor, by which a viterbi detecting performance is improved without increasing the number of states for the viterbi detection, and to provide the data processing method. <P>SOLUTION: In a maximum likelihood sequence detector 20, the maximum likelihood sequence is detected by a viterbi detector 40 as to a symbol sequence z<SB>n</SB>obtained through a noise whitening filter 30 having an N-th transfer polynomial expression (factor q<SB>i</SB>) with respect to a sequence y<SB>n</SB>equalized by a K-th transfer polynomial expression (factor f<SB>i</SB>) of a specified partial response. By an error calculator 50 and a factor updating device 60, at this time, a calculation of the factor g<SB>i</SB>to be used for a branch metric calculation of the viterbi detector 40 is closed even by the order smaller than K+N, then the factors q<SB>i</SB>and q<SB>i</SB>are adaptively calculated so as to compensate a closing error generated therefrom. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a data processing apparatus and data processing method for recording / reproducing information on an optical disk, a magneto-optical disk, a magnetic disk, a magnetic tape, and the like, and in particular, noise due to intersymbol interference of a reproduced signal equalized with partial response. The present invention relates to a data processing apparatus and a data processing method for detecting a maximum likelihood sequence.

In a data processing apparatus that records and reproduces data on a medium such as an optical disk, a magneto-optical disk, a magnetic disk, or a magnetic tape, maximum likelihood sequence detection processing is performed.
In general, as a method of maximum likelihood sequence detection processing, a partial response equalization method, that is, a PRML (partial-response equalization combined with maximum likelihood sequence detection) method is known. Furthermore, in recent years, in response to the demand for higher linear density, practical use of a noise prediction maximum likelihood sequence detection method, for example, an NPML (noise-predictive maximum likelihood sequence detection) method as disclosed in Patent Document 1 below, has progressed. It is out.

The output of the partial response channel generally includes colored noise, and the detection performance of Viterbi detection that exhibits the maximum performance against white noise decreases as the colored nature of the noise increases.
Increasing the linear density of information recording is one of the main factors that increase noise coloring. According to the NPML method, the noise component included in the partial response channel output signal is whitened, so that the Viterbi detection performance is maximized.

FIG. 7 is a block diagram showing a configuration of a maximum likelihood sequence detector 20a according to a conventional NPML detection method. The maximum likelihood sequence detector 20a shown in FIG. 7 has a configuration in which the coefficient of the noise whitening filter 30a is sequentially obtained by an adaptive equalization algorithm.
Note that the error calculator 50a and the coefficient updater 60a are not necessary when a predetermined coefficient is used as the coefficient of the noise whitening filter 30a.

  In the maximum likelihood sequence detector shown in FIG. 7, when the polynomial expression (transfer polynomial) of the transfer characteristic of the partial response channel is expressed by the following equation (1) and the transfer polynomial of the noise whitening filter 30a is expressed by the following equation (2), Viterbi detection is performed. The device 40a calculates the branch metric based on the state transition of the finite state machine whose transfer polynomial is the following equation (3). In the following description, D represents a unit delay operator.

At this time, a branch metric corresponding to the state transition s _j → s _k is obtained by the following equation (4).

In Equation (4), a _n (s _j , s _k ) is an input symbol (sign) to channel 1 + G (D) corresponding to the state transition s _j → s _k , and a _ni (s _j ) is a state Symbols input to channel 1 + G (D) stored as information by s _j are shown respectively.
If there is a d restriction for the input symbol {a _n }, the d restriction is reflected in the state transition diagram representing the channel. Here, the d limitation means a case where the minimum continuous number d (minimum run) of “0” that falls between consecutive “1” is limited and encoded. When d = 1 or more, the number of states decreases compared to the case where d = 0.
Patent Document 2 listed below discloses a modulation method that generates a codeword that can increase the linear density of information recording and has few errors by restricting the number of consecutive minimum runs.

Error calculator 50a, the output symbols of the Viterbi detector 40a a _{'n-δ (where,} [delta] represents the detection delay time) from and partial response equalization samples y _n, the partial response equalization error w _n-[delta] It calculates according to following formula (5).

Further, the noise prediction error e _n−δ is calculated according to the following equation (6).

The coefficient updater 60a calculates a coefficient vector {p _i } that minimizes the mean square of the noise prediction error e _n−δ using an LMS adaptive algorithm. The coefficient vector {p _i } is sequentially updated, and the coefficient p _i (n + 1) at time n + 1 is obtained from the coefficient p _i (n) at time n according to the following equation (7). In Equation (7), K _p is an update gain.

The NRZI inverse converter 70a performs NRZI inverse conversion 1 mod2 D on the output symbol a ′ _n−δ of the Viterbi detector 40a, and then outputs the result from the maximum likelihood sequence detector 20a. However, mod2 represents the addition operation of mod2, and D represents the unit delay operator.

Coefficient of the noise whitening filter 30a, relative to each of the N, which is to minimize the mean square of the noise prediction error e _n represented by the following formula (8) {p _i}.

Japanese Patent No. 3157838 Japanese Patent Laid-Open No. 11-346154

By the way, since the channel 1 + F (D) described above is a finite state machine having 2 ^K states, the state transition diagram (trellis diagram) representing the channel 1 + F (D) is used in the maximum likelihood sequence detector of the PRML system. ) And basically has the same number of states as channel 1 + F (D).
On the other hand, in the case of the NPML maximum likelihood sequence detector 20a having the noise whitening filter 30a, the above-described channel 1 + G (D) is a finite state machine having 2 ^{K + N} states, so the Viterbi detector 40a is There are basically the same number of states as channel 1 + G (D).
That is, the circuit scale of the NPML Viterbi detector 40a increases exponentially as the order of the noise whitening filter 30a increases as compared with the circuit scale of the PRML Viterbi detector. Needless to say, an increase in circuit scale causes a disadvantage such as an increase in cost and power consumption.

The disadvantages described above will be described below based on a specific example.
Table 1 below shows the results of measuring the number of states according to the number N, the signal-to-noise ratio SNR (Signal to Noise Ratio), and the number of bit errors by actually operating a conventional optical disc apparatus. However, as measurement conditions, the input sequence is random, the recording code is 17 PP, the partial response is 1 + D + D ² , the recording layer is phase change, the laser wavelength is 405 nm, the lens aperture is 0.85, the recording bit length is 69 nm, and the track pitch is The tilt angle is 0.32 μm and the radial angle is −0.8 °. Note that the recording code 17PP is a code disclosed in Table 2 of Patent Document 2 and has a minimum run of 1 (d = 1).

In Table 1, the number of bit errors is measured on the output sequence of the NRZI inverse converter 70a. The signal-to-noise ratio SNR is a value calculated by the following equation (9), _{where an} is in {0, 1}. In equation (9), 10,000 is a coefficient corresponding to the time for averaging the noise and can be changed.

<Table 1>
N Number of states SNR [dB] Number of bit errors
--------------------------------------------
0 4 13.5 766
1 6 13.7 848
2 10 13.7 870
3 16 13.7 1116
4 26 14.1 780
5 42 14.2 650
6 68 14.2 884
7 110 14.6 578
15 26 14.9 498
--------------------------------------------

In Table 1, N = 0 corresponds to a simple PRML maximum likelihood sequence detector result, and N ≧ 1 corresponds to an NPML maximum likelihood sequence detector result. As a typical case of Table 1, when the measurement results in the case of N = 0, 4, and 7 are compared, the number of bit errors decreases as N increases, but the number of states in Viterbi decoding is exponential. Has increased.
Therefore, it is very difficult to apply a new NPML method to a system that currently implements the PRML method because the increase in the number of states increases the device scale.
Further, the signal-to-noise ratio SNR in the case of N = 4 is improved by 0.6 dB compared to the case of N = 0, while the number of bit errors in the case of N = 4 is in the case of N = 0. On the contrary, it is increasing. That is, when N = 4, a large performance improvement cannot be obtained as compared with the PRML system (N = 0), and the apparatus scale becomes large.
Therefore, it is desired to improve the value of N as much as possible while suppressing the number of states.

By the way, a method of eliminating the intersymbol interference of the channel using the determination information corresponding to each surviving path and reducing the number of states of the Viterbi detector can be considered.
In the case of N = 15 in Table 1, using this feedback means, the order of the noise whitening filter is increased while the number of states remains 26. The signal-to-noise ratio at N = 15 is improved by 0.3 dB compared to the case at N = 7, and the number of bit errors is also improved.
However, when this method is implemented, in order to eliminate intersymbol interference, a feedback filter or the like for feeding back a compensation signal reflecting a comparison result of path metrics of the Viterbi detector to each input to the input side (feedback means) )Is required. In such a feedback means, a delay corresponding to the time required for the operation of a feedback filter or the like occurs, which hinders an increase in operating speed.

FIG. 8 shows the coefficient distribution of channel 1 + G (D) when N = 4, N = 7, and N = 15. 8, the horizontal axis represents the order N, the vertical axis represents the coefficient g _i, respectively. (A) is for N = 15, (b) is for N = 7, and (c) is for N = 4.
In FIG. 8, when N = 15 coefficient distribution having a sufficiently large order is considered to be ideal, N = 7 coefficient distribution is relatively close to ideal, whereas N = 4. The coefficient distribution deviates considerably from the ideal. From the coefficient distribution shown in FIG. 8, it can be seen that high Viterbi detection performance cannot be obtained when N = 4.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a data processing apparatus and a data processing method that improve the Viterbi detection performance without increasing the number of states for Viterbi detection. .

  In order to achieve the above object, a first aspect of the present invention provides a control unit and a first data that is partial response equalized by a first transfer polynomial including a first coefficient. A first filter unit that performs filtering for noise removal based on the second transfer polynomial based on the second coefficient obtained, and a third filter provided by the control unit with respect to the output of the first filter unit A Viterbi detection unit that performs state transition metric calculation using the coefficient of and detects the second data having the highest likelihood, and the control unit is configured to output the first data and the second data. A first compensation unit that sequentially calculates the second coefficient so as to compensate for an error; and a partial response equalization target value obtained by performing filtering on the second data based on the first transfer polynomial. In A second compensator that sequentially calculates a fourth coefficient so as to generate third data and compensate for an error between the first data and the third data; and the first coefficient; A data processing device including: a coefficient calculation unit that calculates the third coefficient sequentially by calculating the fourth coefficient calculated by the second compensation unit.

  Preferably, the first compensation unit performs filtering for noise removal on the first data based on the same transfer polynomial as the first filter unit; A third filter unit that performs filtering on the second data based on a transfer polynomial based on a third coefficient calculated by the coefficient calculation unit, and the second and third filter units The second coefficient is sequentially adaptively calculated so as to minimize the root mean square of the output difference.

  Preferably, the first coefficient is a coefficient of a Kth order (K: integer) polynomial, and the fourth coefficient is a coefficient of a Nth order (N: integer) polynomial, and the coefficient calculation is performed. The unit multiplies the K-th order polynomial and the N-th order polynomial, and calculates coefficients of terms up to the L order smaller than the sum of K and N as the third coefficient in the multiplication result.

  Preferably, the second compensation unit performs filtering on the second data based on the first transfer polynomial, the first data, and the fourth data. And a fifth filter unit that performs filtering based on a transfer polynomial based on a fourth coefficient with respect to the difference from the output of the filter unit, and minimizes the root mean square of the output of the fifth filter unit Thus, the fourth coefficient is calculated adaptively sequentially.

In order to achieve the above object, the second aspect of the present invention provides a second transmission using the second coefficient for the first data subjected to partial response equalization by the first transfer polynomial including the first coefficient. Filtering for noise removal based on a polynomial, and performing a state transition metric operation on the output of the filtering with a third coefficient to detect the second data with the highest likelihood; The second data is filtered based on the first transfer polynomial to generate third data which is a partial response equalization target value, and the first data and the third data Calculating a fourth coefficient so as to compensate for the error; calculating the third coefficient by calculating the first coefficient and the fourth coefficient and updating the third coefficient; To compensate for the error between the first data and the second data, a data processing method and a step of updating by calculating the second coefficient.

The operation of the data processing apparatus according to the first aspect of the present invention is as follows.
That is, the first filter unit performs noise removal based on the second transfer polynomial using the second coefficient with respect to the first data subjected to partial response equalization by the first transfer polynomial including the first coefficient. For filtering. The Viterbi detection unit performs metric calculation of state transition on the output by the filtering using the third coefficient, and detects the second data with the highest likelihood.
The second compensation unit of the control unit performs filtering on the second data based on the first transfer polynomial to generate third data that is a partial response equalization target value, and the first data A fourth coefficient is calculated so as to compensate for an error between the first data and the third data. A coefficient calculation unit of the control unit calculates and updates the third coefficient by calculating the first coefficient and the fourth coefficient. The first compensation unit of the control unit calculates and updates the second coefficient so as to compensate for an error between the first data and the second data.
In other words, the control unit independently calculates the second coefficient given to the first filter unit and the third coefficient given to the Viterbi detection unit.

Therefore, the second coefficient given to the first filter unit can be optimized independently of the third coefficient given to the Viterbi detection unit. Thereby, even if the noise removal performance of the first filter unit is enhanced, the number of states of the Viterbi detection unit does not increase.
That is, according to the present invention, it is possible to improve the Viterbi detection performance without increasing the number of states for Viterbi detection.

Hereinafter, an optical disk device 1 equipped with a maximum likelihood sequence detector 20 as a data processing device of the present invention will be described.
The correspondence between the present invention and the embodiment is as follows.
The noise whitening filter 30 is an embodiment of the first filter unit of the present invention.
The Viterbi detector 40 is an embodiment of the Viterbi detector of the present invention.
The error calculator 50 and the coefficient updater 60 are an embodiment of the control unit of the present invention.
The generalized PR filter 57, the prefilter 58, the difference calculator 59, and the coefficient updater 60 are an embodiment of the first compensation unit of the present invention.
The PR filter 53, the difference calculator 54, the prediction error filter 55, and the coefficient updater 60 are an embodiment of the first compensation unit of the present invention.
The coefficient converter 56 is an embodiment of the coefficient calculation unit of the present invention.
The pre-filter 58 is an embodiment of the second filter unit of the present invention.
The generalized PR filter 57 is an embodiment of the third filter unit of the present invention.
The PR filter 53 is an embodiment of the fourth filter unit of the present invention.
The prediction error filter 55 is an embodiment of the fifth filter unit of the present invention.
The coefficient f _i is an embodiment of the first coefficient of the present invention.
The coefficient q _i is an embodiment of the second coefficient of the present invention.
The coefficient g _i is an embodiment of the third coefficient of the present invention.
The coefficient p _i is an embodiment of the fourth coefficient of the present invention.

Configuration of Optical Disc Device 1 FIG. 1 is a block diagram showing a system configuration of an optical disc device 1 that records / reproduces data.
The encoder 10 modulates data with respect to the user word I _n so as to be suitable for a transmission path and a recording medium, and generates a code word C _n . Note that _n in the user language I _n is an integer given according to time.
As a modulation method in the encoder 10, a block code is generally known. This block code, for example, blocks a data string into units of m × i bits and converts them into code words of n × i bits according to an appropriate code rule. Conversion to a code word is performed based on a predetermined conversion table that defines such a code rule.

The encoder 10 further performs NRZI conversion 1 / (1 mod2 D) after converting the generated codeword sequence {C _n } into a binary symbol sequence. However, mod2 represents the addition operation of mod2, and D represents the unit delay operator.
The binary symbol sequence {a _n } subjected to the NRZI conversion is sent to the pickup 12 via the recording amplifier 11 and recorded on the optical disc medium 13 at a rate of 1 / T. T is the bit interval of the recording waveform sequence.

When reading a user word from the disk 13, the analog signal read by the pickup 12 is first amplified by the head amplifier 14 and then sent to the variable gain amplifier 15 (VGA) 15.
The variable gain amplifier 15 is an amplifier that makes the amplification gain variable so as to mainly absorb the fluctuation of the reproduced signal amplitude. The analog signal processed by the variable gain amplifier 15 is sent to a low pass filter (LPF) 16. Low pass filter 16 performs waveform shaping for extracting only a signal of a frequency component required for reading the user language I _n.

The analog signal processed by the low-pass filter 16 is converted into a digital sample x _n by an A / D converter (ADC) 17. Note that the sampling rate of A / D conversion is 1 / T.
The converted digital sample sequence {x _n } is sent to the timing & gain recovery circuit 18 (TGR) 18 and to the equalizer 19.
The timing & gain recovery circuit 18 controls the sampling rate and sampling timing of the A / D converter 17 and adjusts the gain of the variable gain amplifier 15 so that the dynamic range of the A / D converter 17 can be used stably and effectively. Control.

The equalizer 19 is configured to equalize the sample sequence {x _n } into a predetermined partial response. As an example, a partial response transfer polynomial in the present embodiment is shown in Expression (10). That is, K = 2.

The equalized sample sequence {y _n } is sent to the maximum likelihood sequence detector 20, and a binary sequence (maximum likelihood sequence) having the highest likelihood is detected by Viterbi decoding.
The configuration and operation of the maximum likelihood sequence detector 20 will be described in detail later.
In the maximum likelihood sequence detector 20, with respect to the detected binary sequence of symbols _{{a 'n-δ} (} δ detection delay), further subjected to inverse NRZI conversion 1 mod2 D, binary sequence of symbols {Inv_a ' _n-δ } is generated. The binary symbol sequence {inv_a ′ _n−δ } is sent to the SYNC detector 21 and the decoder 22.

The SYNC detector 21 detects a SYNC word embedded in the sequence {inv_a ′ _n−δ } as a synchronization signal.
Based on the SYNC word detection signal supplied from the SYNC detector 21, the decoder 22 parallelizes the symbol sequence {inv_a ′ _n-δ } to generate a code word C ′ _n-δ .
Furthermore, the decoder 22 converts the code word C ′ _n-δ into the user word I ′ _n-δ based on the inverse conversion table for the conversion table used in the encoder 10.

Configuration of Maximum Likelihood Sequence Detector 20 Next, the configuration of the maximum likelihood sequence detector 20 will be described.
FIG. 2 is a block diagram showing the configuration of the adaptive maximum likelihood sequence detector in the present invention. As shown in the figure, the maximum likelihood sequence detector 20 includes a noise whitening filter 30, a Viterbi detector 40, an error calculator 50, and a coefficient updater 60.
Compared to the conventional maximum likelihood sequence detector 20 a shown in FIG. 7, the maximum likelihood sequence detector 20 includes a coefficient q _i for processing in the noise whitening filter 30 and a coefficient for processing in the Viterbi detector 40. The feature is that g _i is given independently. Thereby, there is an advantage that the performance of the noise whitening filter 30 can be improved without affecting the processing of the Viterbi detector 40.
Hereinafter, the configuration of the maximum likelihood sequence detector 20 will be described with reference to FIG.

The noise whitening filter 30 performs filtering on the sample sequence {y _n } subjected to partial response equalization by the equalizer 19. Here, the noise whitening filter 30 is an FIR filter having the following equation (11) as a transfer polynomial. However, in this embodiment, M = 6.

The filtered sample sequence {z _n } is sent to the Viterbi detector 40 where a binary symbol sequence {a ′ _n−δ } is detected. The Viterbi detector 40 is configured to calculate a branch metric based on a trellis diagram of a channel whose transfer polynomial is the following equation (12).

  However, in the embodiment, L = 6. Details of the branch metric calculation will be described later.

The symbol sequence {a ′ _n−δ } detected by the Viterbi detector 40 is sent to the NRZI inverse converter 70 and the error calculator 50. The NRZI inverse converter 70 performs a 1 mod 2 D operation that is an NRZI inverse transform, and the symbol sequence {inv_a ′ _n-δ } subjected to the NRZI inverse transform is output from the maximum likelihood sequence detector 20.

The error calculator 50 calculates a partial response equalization error w _n-δ , a noise prediction error e _n-δ, and a prefilter equalization error e _{0, n-δ} . Details of each error calculation will be described later.
As shown in FIG. 2, the partial response equalization error w _n−δ calculated by the error calculator 50, the noise prediction error e _n−δ , the prefilter equalization error e _{0, n−δ} , and the sample y _n The δ time delay sample y _n−δ is sent to the coefficient updater 60.

The coefficient updater 60 uses the LMS adaptive algorithm to calculate the coefficient vector {p _i } that minimizes the mean square of the noise prediction error e _{n-δ and} the mean square of the prefilter equalization error e _{0, n-δ.} A coefficient vector {q _i } to be minimized is calculated.
The update calculation of the coefficient p _i is performed based on the equation (8) as in the conventional coefficient updater 60a. The update calculation of the coefficient q _i is performed according to the following equation (13). In Equation (13), K _q is an update gain.

Similarly, the coefficient updater 60 performs an update calculation of the coefficient p _i so that the noise prediction error e _n−δ is minimized by an LMS adaptive algorithm using K _P as an update gain.
At this time, as described above, coefficients up to the sixth order (i = 1 to 6) are calculated for the coefficients p _i and q _i . That is, in the above formula (11), M = 6.

Configuration of Viterbi Detector 40 Next, the configuration of the Viterbi detector 40 will be described with reference to FIG.
FIG. 3 is a block diagram showing a configuration of the Viterbi detector 40 according to the present embodiment. As shown in FIG. 3, the Viterbi detector 40 includes a branch metric calculation circuit (BMC) 41, an ACS circuit (ACS) 42, and a path memory (MEM) 43.

The branch metric calculation circuit (BMC) 41 calculates the branch metric from the sample z _n filtered by the noise whitening filter 30 and the coefficient g _i (i = 1 to 6, ie, L = 6) given from the error calculator 50. Is calculated. That is, based on the following equation (14), calculates the corresponding branch metric to the state transition s _j → s _k at time n.

However, in the above formula (14), R is the reference level at the time of quantization in the A / D converter _{17, a n (s j,} s k) an input symbol corresponding to the state transition s _j → s _k , A _ni (s _j ) respectively represent input symbols stored as information by the state s _j . Here, it is assumed that a _n (s _j , s _k ) and a _ni (s _j ) belong to {−1, +1}.

FIG. 4 shows a trellis diagram when the transfer polynomial is Equation (12) (L = 6). The Viterbi detector 40 performs processing based on the trellis diagram shown in FIG.
4, (a) shows the state before transition (time n), (b) shows the state after transition (time n + 1), and (c) shows the labels a _n / z _n of the branches.
4A and 4B, symbols in circles represent state identification numbers. The state identification number at time n is a symbol sequence {a _n−1 , a _n−2 , a _n−3 , a _n−4 , a _n−5 , a _n−6 , which is information stored in each state } In hexadecimal notation. Similarly, the state identification number at time n + 1 is a hexadecimal representation of the symbol sequence {a _n , a _n−1 , a _n−2 , a _n−3 , a _n−4 , a _n−5 }. The symbol sequence {a _n } is limited to d = 1.

As shown in FIG. 4, in the case of the Viterbi detector according to the present embodiment, there are 42 branches. The metric for each branch can be easily derived from the label corresponding to each branch. For example, the branch metric corresponding to the state transition s ₀₀ → s ₀₀ has a branch label an _n / z _n = 0 / (-1-g ₁ -g ₂ -g ₃ -g ₄ -g ₅ -g ₆ ) Therefore, it is calculated as the following formula (15).

The addition / comparison / selection (ACS) circuit 42 uses the branch metric calculated by the branch metric calculation circuit (BMC) 41 to determine a surviving path that reaches each state, and outputs the determination information. That is, a metric (path metric) of a path that passes through the state s _j0 and reaches the state s _k at time n is obtained by the following equation (16). SM is an abbreviation for state metric.

On the other hand, the path metric passing through the state s _j1 and reaching the state s _k at time n is obtained by the following equation (17).

The ACS circuit 42 compares the path metrics calculated by Expression (16) and Expression (17), and determines the smaller path as a surviving path.
That is, the state metric at time n + 1 is obtained according to the following equation (18).

  However, if the compared path metrics are the same, one of them is regarded as the surviving path.

  The determination information output from the ACS circuit 42 is calculated, for example, according to the following equation (19).

Also, for example, when there is only one branch that reaches at time n + 1 as in state s ₀₁ , the state metric at time n + 1 is calculated according to the following equation (20).

  In this case, since the determination is not performed, it is not necessary to output the determination information. However, for example, the determination information may be output as shown in the following formula (21).

In the trellis diagram shown in FIG. 4, there are 26 states. The state metric and determination information for each state can be easily derived from the trellis diagram.
For example, the state metric for the state s ₀₀ is expressed by the following equation (22).

The determination information for the state s ₀₀ is as shown in the following formula (23).

The state metric for the state s ₀₁ is as shown in the following formula (24).

The determination information for the state s ₀₁ is as shown in the following formula (25).

The path memory (MEM) 43 stores path information for a time sufficient for all surviving paths to merge. The merged result is output as a detected symbol a ′ _n−δ . The path memory 43 is subjected to data processing using, for example, a known register replacement method.

Configuration of Error Calculator 50 Next, the configuration of the error calculator 50 will be described with reference to FIG.
FIG. 5 is a block diagram showing a configuration of the error calculation circuit 50.

The R multiplier 51 generates a ′ _n−δ R by multiplying the symbol a ′ _n−δ determined by the Viterbi detector by R. However, it is assumed that the symbol a ′ _n−δ belongs to {−1, +1}.
The sample delay unit 52 generates a sample y _n−δ delayed from the partial response equalized sample y _n by the same δ time as the determination delay of the Viterbi detector 40.

The PR filter 53 is an FIR filter having a transfer polynomial of 1 + D + D ² , similar to the characteristics of the equalizer 19, and generates a partial response ideal sample y ′ _n−δ from the symbol a ′ _n−δ R. That is, the partial response ideal sample in the present embodiment is obtained based on the following equation (26).

The difference calculator 54 generates a partial response equalization error w _n−δ from the delay sample y _n−δ and the ideal sample y ′ _n−δ . That is, the partial response equalization error w _n−δ is obtained by the following equation (27).

The prediction error filter 55 is an FIR filter having the following equation (28) as a transfer polynomial, and generates a noise prediction error e _n-δ from the convolution of the equalization error w _n-δ .

However, in this embodiment, N = 6. Therefore, the noise prediction error e _n−δ that is the output of the prediction error filter 55 is calculated according to the following equation (29).

The noise prediction error e _n−δ is supplied to the coefficient updater 60. In the coefficient updater 60, a coefficient p _i that minimizes the mean square of the noise prediction error e _n−δ is calculated by the LMS adaptive algorithm, and is supplied to the prediction error filter 55. That is, adaptively controlled to noise prediction error e _n becomes minimum is made.

The coefficient converter 56 generates g _i from f _i and p _i based on the polynomial shown in the following equation (30). That is, the coefficient gi is calculated from the multiplication results of the polynomials shown in equations (10) and (11).

In the present embodiment, since the K = 2, N = 6, it is possible to calculate the _{g i} until 8th by the formula (30) (K + N = 8). Among these, the coefficient converter 56 calculates coefficients g _{i that} are less than the 8th order, for example, up to the 6th order. That is, in this embodiment, the coefficients g ₁ to g ₆ are generated.
The coefficient g _i calculated by the coefficient converter 56 is used for the calculation of the branch metric in the Viterbi detector 40 (Formula (14)), as described above.
Note that how many orders of the coefficient gi are calculated greatly depends on the number of states in Viterbi detection. Therefore, the order of the coefficient g _i may be determined within a range allowed by the apparatus scale of the Viterbi detector 40.

Since the coefficient converter 56 limits the coefficient g _i to be calculated to the 6th order (censored), the symbol a ′ _n−δ R has an error as compared with the case where the coefficient g _i is calculated to the 8th order. (Hereinafter referred to as censoring error). The generalized PR filter 57, the prefilter 58, and the difference calculator 59 are configured to compensate for the truncation error (first compensation unit of the present invention).

The generalized PR filter 57 is an FIR filter using Expression (12) (L = 6) as a transfer polynomial. From the symbol a ′ _n−δ R, the prefilter ideal sample z ′ _{0, n−δ} is generated according to the following equation (31).

The pre-filter 58 is an FIR filter represented by a transfer polynomial of Expression (11), and generates a sample z _n-δ from the delay samples y _n-δ . That is, the filter characteristic of the pre-filter 58 is equivalent to that of the noise whitening filter 30, and an output sample is obtained by the following equation (32).

Since the coefficient q _i is successively updated by the coefficient updater 60 so as to compensate for the truncation error, the pre-filter 58 is a noise whitening filter having a characteristic that compensates for the truncation error.

The difference calculator 59 generates a prefilter equalization error e _{0, n-δ} from the sample z _n-δ and the ideal sample z ′ _{0, n-δ} . That is, the prefilter equalization error e _{0, n−δ} is obtained by the following equation (33).

The subsequent coefficient updater 60 uses the LMS adaptive algorithm to calculate a coefficient vector {q _i } that minimizes the root mean square of the prefilter equalization error e _{0, n-δ} . As a result, a coefficient q _i that compensates for the truncation error is calculated, and this coefficient q _i is supplied to the noise whitening filter 30.

As described above, according to the maximum likelihood sequence detector 20 according to the present embodiment, the N-th order with respect to the sequence y _n equalized to the K-th order transfer polynomial (coefficient f _i ) of a predetermined partial response. When the Viterbi detector 40 detects the maximum likelihood sequence for the symbol sequence z _n obtained through the noise whitening filter 30 having the transfer polynomial (coefficient q _i ), the error calculator 50 and the coefficient updater 60 use Viterbi. The calculation of the coefficient g _i used for the calculation of the branch metric of the detector 40 is truncated to an order smaller than K + N, and the coefficients p _i and q _i are adaptively adjusted so as to compensate for the truncation error caused thereby. It was configured to calculate.

Therefore, the order of the coefficient g _i used for the calculation of the branch metric of the Viterbi detector 40 can be determined without depending on the order of the transfer polynomial of the noise whitening filter 30. As a result, the Viterbi detector 40 is limited in hardware, so that even when the apparatus scale cannot be expanded, the noise whitening filter 30 can be optimized to improve the sequence detection performance.
For example, if the transfer polynomial of the partial response is second order, if the order of the coefficient g _i is limited to 6 due to hardware limitations of the Viterbi detector, conventionally, the noise whitening filter 30 The order of the transfer polynomial is inevitably limited to the coefficient q _i up to the fourth order, but according to the maximum likelihood sequence detector 20 according to the present embodiment, the coefficient q _i up to the sixth order can be given. The noise whitening performance for the input sequence is improved.

Further, according to the maximum likelihood sequence detector 20 according to the present embodiment, when compensating for the truncation error, the ideal sample including the truncation error that is the output sequence of the Viterbi detector 40 and the noise whitening filter 30 are the same. The coefficient q _i is sequentially updated using the LMS adaptive algorithm so that the mean square of the error from the output of the characteristic prefilter 58 is minimized.
As a result, the truncation error can be successively and adaptively compensated. Therefore, the sequence detection performance can be improved even when the order of the coefficient g _i is limited due to hardware limitations of the Viterbi detector.

Next, an example of the sequence detection performance of the maximum likelihood sequence detector 20 according to the present embodiment will be described below.
Table 2 below shows the sequence detection measurement of the optical disc apparatus 1 according to the embodiment for the measurement result of Table 1 described above under the same conditions, and for the sake of easy comparison, the result is the last row of Table 1. It is the table added to.

<Table 2>
N Number of states SNR [dB] Number of bit errors
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0 4 13.5 766
1 6 13.7 848
2 10 13.7 870
3 16 13.7 1116
4 26 14.1 780
5 42 14.2 650
6 68 14.2 884
7 110 14.6 578
15 26 14.9 498
This embodiment 26 14.6 542
(N = 6)
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As shown in Table 2, the Viterbi detector 40 according to the present embodiment has the same 26 state numbers as the conventional Viterbi detector 40a (N = 4), and the conventional Viterbi detector 40a (N = 15). ), The same performance as that of the conventional Viterbi detector 40a (N = 7) is achieved in terms of the SNR and the number of bit errors. Further, the Viterbi detector 40 according to the present embodiment has a greatly reduced number of states compared to the number of states (110) of the conventional Viterbi detector 40a (N = 7) having equivalent performance.
That is, the sequence detection performance is greatly improved while maintaining the minimum Viterbi detector scale.

FIG. 6 shows the coefficient distribution of channel 1 + G (D) in this embodiment. 6, similarly to FIG. 8, the horizontal axis represents the order N, the vertical axis represents the coefficient g _i, respectively. 6 differs from FIG. 8 in that (d) a coefficient distribution according to the present embodiment is added.
In the present embodiment, g ₁ to g ₆ are used as coefficients, but according to FIG. 6, the coefficient distribution shown in (d) in the range of g ₁ to g ₆ is N = 4. Compared to the case, it can be seen that the distribution is close to the ideal distribution indicated by N = 15.

1 is a block diagram showing a system configuration of an optical disc apparatus according to an embodiment. It is a block diagram which shows the structure of the maximum likelihood sequence detector which concerns on embodiment. It is a block diagram which shows the structure of the Viterbi detector which concerns on embodiment. It is a trellis diagram of the Viterbi detector according to the embodiment. It is a block diagram which shows the structure of the error calculation circuit which concerns on embodiment. It is a figure which shows the coefficient distribution of the channel 1 + G (D) which concerns on embodiment. It is a block diagram which shows the structure of the conventional maximum likelihood sequence detector of a NPML system. The coefficient distribution of the channel 1 + G (D) of the conventional maximum likelihood sequence detector is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Optical disk apparatus, 10 ... Encoder, 11 ... Amplifier, 12 ... Pickup, 13 ... Optical disk media, 14 ... Amplifier, 15 ... Variable gain amplifier, 16 ... Low pass filter, 17 ... A / D converter, 18 ... Timing & Gain recovery circuit, 19 ... equalizer, 20, 20a ... maximum likelihood sequence detector, 21 ... SYNC detector, 22 ... decoder, 30, 30a ... noise whitening filter, 40, 40a ... Viterbi detector, 50 , 50a ... error calculator, 51 ... R multiplier, 52 ... sample delay, 53 ... PR filter, 54 ... difference calculator, 55 ... prediction error filter, 56 ... coefficient converter, 57 ... generalized PR filter, 58 ... Pre-filter, 59 ... Difference calculator, 60, 60a ... Coefficient updater, 70, 70a ... NRZI inverse converter.

Claims (6)

A control unit;
For the first data that is partial response equalized by the first transfer polynomial including the first coefficient, noise removal is performed based on the second transfer polynomial by the second coefficient given by the control unit. A first filter unit for filtering;
A Viterbi detection unit that performs state transition metric calculation on the output of the first filter unit using a third coefficient given by the control unit, and detects second data having the highest likelihood;
Have
The controller is
A first compensation unit that sequentially calculates the second coefficient so as to compensate for an error between the first data and the second data;
The second data is filtered based on the first transfer polynomial to generate third data which is a partial response equalization target value, and the first data and the third data A second compensator for sequentially calculating a fourth coefficient so as to compensate for the error;
A data processing apparatus comprising: a coefficient calculation unit that calculates the third coefficient sequentially by calculating the first coefficient and the fourth coefficient calculated by the second compensation unit. The first compensation unit includes:
A second filter unit that performs filtering for noise removal on the first data based on the same transfer polynomial as the first filter unit;
A third filter unit that performs filtering on the second data based on a transfer polynomial based on a third coefficient calculated by the coefficient calculation unit;
The data processing apparatus according to claim 1, wherein the second coefficient is sequentially and adaptively calculated so as to minimize a mean square of a difference between outputs of the second and third filter units. The first coefficient is a coefficient of a Kth order (K: integer) polynomial, and the fourth coefficient is a coefficient of a Nth order (N: integer) polynomial,
The coefficient calculation unit multiplies the K-th order polynomial and the N-th order polynomial, and among the multiplication results, coefficients of terms up to L order smaller than the sum of K and N are used as third coefficients. The data processing apparatus according to claim 1 to calculate. The first coefficient is a coefficient of a Kth order (K: integer) polynomial, and the fourth coefficient is a coefficient of a Nth order (N: integer) polynomial,
The coefficient calculation unit multiplies the K-th order polynomial and the N-th order polynomial, and among the multiplication results, coefficients of terms up to L order smaller than the sum of K and N are used as third coefficients. The data processing device according to claim 2 to calculate. The second compensation unit includes:
A fourth filter unit that filters the second data based on the first transfer polynomial;
A fifth filter unit that performs filtering on the difference between the first data and the output of the fourth filter unit based on a transfer polynomial using a fourth coefficient;
The data processing apparatus according to claim 1, wherein the fourth coefficient is sequentially and adaptively calculated so as to minimize the mean square of the output of the fifth filter unit. Filtering for noise removal based on the second transfer polynomial with the second coefficient on the first data that has been partial response equalized by the first transfer polynomial including the first coefficient;
Performing a state transition metric operation on the output by the filtering using a third coefficient to detect the second data having the highest likelihood;
The second data is filtered based on the first transfer polynomial to generate third data which is a partial response equalization target value, and the first data and the third data Calculating a fourth coefficient so as to compensate for the error;
Calculating and updating the third coefficient by computing the first coefficient and the fourth coefficient;
Calculating and updating the second coefficient so as to compensate for an error between the first data and the second data;
A data processing method.

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