JP2006080762A - Delay profile creating circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a delay profile creating circuit suitable for mobile communication in which quick time response is ensured without deteriorating transmission efficiency. <P>SOLUTION: A quadrature demodulation and fast Fourier transform unit 2a calculates the deflection angle difference between adjacent carriers, based on an orthogonal frequency division multiplexing signal. A deflection angle calculator 3 calculates the deflection angle difference between adjacent carriers, based on the output from the quadrature demodulation and fast Fourier transform unit 2a. A comparator 4 compares the deflection angle with a predetermined value. A rotation angle register 5 determines the phase rotation angle, based on the comparison results of the deflection angle and the predetermined value. A phase rotation circuit 6 performs phase rotation of the orthogonal frequency division multiplexing signal, based on the output from the rotation angle register 5. A window function processing circuit 7 performs window function processing of the orthogonal frequency division multiplexing signal subjected to phase rotation. An inverse Fourier transform unit 8 performs inverse Fourier transform of the orthogonal frequency division multiplexing signal subjected to window function processing to acquire a delay profile. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  In the present invention, when each carrier is modulated by a differential modulation method such as DQPSK (Differential Quadrature Phase Shift Keying) and is transmitted and received as an orthogonal frequency division multiplexed signal, a so-called delay state is observed that observes the state of a delayed wave on the receiving side. The present invention relates to a delay profile creation circuit for creating a profile.

  In radio transmission / reception, multipath interference, which is delayed by radio waves reflected on a building, is a major problem. In terrestrial digital broadcasting using orthogonal frequency division multiplexing signals, a pilot signal called SP (Scattered Pilot) is used to measure this delayed wave.

  When such a lot of pilot signals are used, the transmission efficiency is lowered. Therefore, wireless communication that uses as little pilot signals as possible is desirable. In particular, in mobile communication, communication in which each carrier is modulated by a differential modulation scheme such as DQPSK and an orthogonal frequency division multiplexed signal is used. In such communication, since there is no pilot signal, efficiency is improved.

In an orthogonal frequency division multiplexing signal using a pilot signal, generally, fast Fourier transform is performed to extract the pilot signal, and a delay profile is created from the extracted pilot signal. For orthogonal frequency division multiplex signals that do not use pilot signals, it has been proposed to create a delay profile using statistical processing (see, for example, Patent Document 1).
JP 2003-23408 A

  However, even if a delay profile is created using statistical processing, it takes a considerable amount of time for statistical processing, so it cannot be said that the temporal response is fast, and as a result, it is necessary to respond immediately. It cannot be said that it is suitable for physical communication.

  An object of the present invention is to provide a delay profile creation circuit suitable for mobile communication that has a quick temporal response without deteriorating transmission efficiency.

The delay profile creation circuit according to the present invention includes:
A delay profile creation circuit for creating a delay profile of an orthogonal frequency division multiplexed signal by a differential modulation method,
Orthogonal demodulation and fast Fourier transform means for performing orthogonal demodulation and fast Fourier transform on the orthogonal frequency division multiplexed signal;
Declination difference calculating means for calculating the declination difference between adjacent carriers based on the output of the orthogonal demodulation and fast Fourier transform means;
A comparing means for comparing the deviation difference with a predetermined value;
Phase rotation angle determination means for determining a phase rotation angle based on a comparison result between the deviation angle difference and a predetermined value;
Phase rotation means for phase rotating the orthogonal frequency division multiplex signal based on the output of the phase rotation angle determination means;
Window function processing means for processing a window function of the orthogonal frequency division multiplexed signal whose phase has been rotated;
Means for obtaining the delay profile by performing inverse Fourier transform on the orthogonal frequency division multiplexed signal subjected to window function processing.

  According to the present invention, a phase rotation angle is calculated by comparing a deviation angle difference between adjacent carriers with a predetermined value, and a delay profile is created from the result of the phase rotation. Therefore, transmission using a differential modulation method such as DQPSK is performed. Therefore, it is possible to obtain a delay profile having a quicker time response than when a delay profile is created from the extracted pilot signal or when a delay profile is created using statistical processing. As a result, it is possible to create a delay profile suitable for mobile communication with quick temporal response without deteriorating transmission efficiency.

  Preferably, the phase rotation unit rotates the orthogonal frequency division multiplex signal clockwise by 45 °, and the orthogonal frequency division multiplex signal has a time corresponding to the processing time of the first rotation unit. Delay means for delaying only by the delay, selection means for selecting one of the output of the first rotation means and the output of the delay means based on the output of the phase rotation angle determination means, and the phase rotation angle determination And second rotation means for rotating the phase of the output of the selection means based on the output of the means. Thus, by providing the delay means for delaying by the time corresponding to the processing time of the first rotating means, the data time can be made uniform, and as a result, the transmission efficiency is deteriorated in a state in which post-processing is easy. In addition, it is possible to create a delay profile suitable for mobile communication and having a quick temporal response.

  More preferably, the output of the selection means is rotated by 0 °, 90 °, 180 ° clockwise or 90 ° counterclockwise. In this way, when the circuit is configured with memory elements or the like by using four types of phase rotation, the circuit can be configured with a small memory capacity, and as a result, time is reduced while reducing the overall circuit scale. A delay profile suitable for mobile communication can be created.

An embodiment of a delay profile creation circuit according to the present invention will be described in detail with reference to the drawings.
FIG. 1 is a diagram showing an embodiment of a delay profile creation circuit according to the present invention. This delay profile creation circuit includes a received signal input terminal 1, an inter-adjacent carrier division circuit 2, a deflection angle calculator 3 that calculates only a deflection angle from a multiplication result described later, a comparator 4, and a rotation angle register. 5, a phase rotation circuit 6, a window function processing circuit 7, an inverse Fourier transformer 8, and an output terminal 9 for delay profile data.

  The adjacent carrier division circuit 2 performs division between adjacent carriers, and includes an orthogonal demodulation and fast Fourier transformer 2a, a delay circuit 2b, and a multiplier 2c. The phase rotation circuit 6 performs phase rotation according to a control signal from the rotation angle register 8, and includes a delay circuit 6a, a phase rotator 6b, a selection circuit 6c, and a phase rotator 6d.

  The delay circuit 2b takes a complex conjugate after being delayed by one carrier, and the complex conjugate is multiplied by the complex conjugate signal of the signal one carrier before in the multiplier 2c. The declination calculator 3 calculates only the declination difference from the multiplication result of the multiplier 2c. The comparator 4 compares the deviation angle difference with a predetermined angle, and outputs a rotation angle register increment as shown in FIG. 2, for example.

  The rotation angle register 5 outputs a control signal (3 bits) to the phase rotation circuit 6. The delay circuit 6a is a delay circuit corresponding to the processing time of the phase rotator 6b, and the phase rotator 6b outputs a signal rotated 45 ° clockwise with respect to the input signal. The selection circuit 6 c selects one of the output of the delay circuit 6 a and the output of the phase rotator 6 b according to the input from the rotation angle register 5. The phase rotator 6d rotates the output of the selection circuit 6c clockwise by 0 °, 90 °, 180 °, or counterclockwise by 90 ° according to the output of the rotation angle register 5.

  The window function processing circuit 7 performs preprocessing of inverse Fourier transform using an appropriate window function. The inverse Fourier transformer 8 converts the output of the window function processing circuit 7 into dB display and outputs delay profile data from the output terminal 9.

  The operation of this embodiment will be described using a π / 4 shift DQPSK differential modulation system with reference to FIG. When the orthogonal frequency division multiplexed signal before demodulation is input to the input terminal 1, the orthogonal demodulation and fast Fourier transformer 2a performs orthogonal demodulation on the orthogonal frequency division multiplexed signal, performs fast Fourier transform, and converts it to a signal before modulation. To do.

  The signal returned to the signal before modulation is delayed by one carrier in the delay circuit 2b and simultaneously converted into a complex conjugate signal. The multiplier 2c multiplies the output of the quadrature demodulation and fast Fourier transformer 2a by the complex conjugate signal of the signal one carrier before. That is, the input signal is divided from the signal one carrier before. Since the amplitude component is unnecessary, it is multiplied by the complex conjugate. The declination calculator 3 extracts only the declination difference from the calculation result of the multiplier 2c. In the comparator 4, as shown in FIG. 2, the increment of the rotation angle register 5 is determined according to the magnitude of the deviation angle difference.

  The orthogonal frequency division multiplex signal before demodulation is also input to the delay circuit 6a and the phase rotator 6b, and the phase rotator 6b performs an operation of rotating the input signal by 45 ° in the clockwise direction, and the delay circuit 6a. Then, a delay corresponding to the processing time of the phase rotator 6b is performed. The selection circuit 6c selects one of the output of the delay circuit 6a and the calculation result of the phase rotator 6b by the 1-bit signal from the rotation angle register 5.

  The phase rotator 6 d outputs the result of phase rotation by the 2-bit signal of the rotation angle register 5. In the present embodiment, the phase rotation is four rotations of 0 °, 90 °, 180 ° clockwise and 90 ° counterclockwise. Therefore, 2 bits are sufficient as the control bit.

  The increment of the rotation angle register 5 changes by 45 ° from −180 ° to + 180 ° as shown in FIG. For example, when the value of the rotation angle register 5 is −135 °, the selection circuit 6c selects the output of the phase rotator 6b, and the phase rotator 6d rotates −90 °, that is, 90 ° clockwise. 135 ° is obtained. The rotation angle of −180 ° is the same as the rotation angle of + 180 °.

  As another example, in the case of 90 °, the selection circuit 6c selects the output of the delay circuit 6a, and the phase rotator 6d realizes 90 ° phase rotation by rotating 90 ° counterclockwise. To do. A transfer function is estimated from the phase signal thus obtained.

  The window function processing circuit 7 performs window function processing from the estimated value of the transfer function, and the inverse Fourier transformer 8 performs decibel (dB) display by performing inverse Fourier transform to complete a delay profile.

Here, consider a case where the phase of the transfer function is different by 10 ° as shown in FIG. FIG. 4 is an example when a signal modulated by π / 4 shift DQPSK is received, and is a map when demodulated by the orthogonal demodulation and fast Fourier transformer 2a of FIG. 1, and (1), (2), (3), (4), and (5) are received in this order. The difference between each carrier is calculated as follows.
(I) (2)-(1) = 235 ° -45 ° = 190 ° = −170 °
(Ii) (3)-(2) = 155 ° -235 ° = −80 °
(Iii) (4)-(3) = 75 ° -155 ° = −80 °
(Iv) (5)-(4) = 355 ° -75 ° = 280 ° = −80 °

Obtaining the increment of the rotation angle register 5 from the table of FIG.
(I) -180 °
(Ii) -90 °
(Iii) -90 °
(Iv) -90 °
It becomes. When the correction value is obtained from the increment value with the first value set to 0,
(I) -180 °
(Ii) + 90 °
(Iii) 0 °
(Iv) + 90 °
It becomes. When the declination value after correction for (2), (3), (4), (5) is obtained,
(2) 235 ° − (− 180 °) = 415 ° = 55 °
(3) 155 ° − (+ 90 °) = 65 °
(4) 75 ° -0 ° = 75 °
(5) 355 ° − (− 90 °) = 455 ° = 85 °
It becomes.

  From the above, as the post-correction output, a declination having a phase difference of 10 ° is output as in the transfer function. Therefore, the continuous transfer function as described above can be acquired by rotating the phase of the received signal based on the value obtained by the rotation angle register 5. The transfer function value obtained in this way is subjected to window function processing, inverse Fourier transform is performed, and a delay profile can be obtained.

The present invention is not limited to the above-described embodiment, and many changes and modifications can be made.
For example, in the above embodiment, the case of π / 4 shift DQPSK has been described. However, a modulation scheme such as DQPSK or BPSK can also be realized with the same configuration.

It is a figure which shows embodiment of the delay profile creation circuit by this invention. It is a list which determines the increment of a rotation angle. It is a figure which shows an example of the phase of a transfer function. It is a figure which shows a received signal point coordinate.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Input terminal 2 Adjacent carrier division circuit 2a Quadrature demodulation and fast Fourier transformer 2b, 6a Delay circuit 2c Multiplier 6b, 6d Phase rotator 6c Selection circuit 3 Deflection calculator 4 Comparator 5 Rotation angle register 6 Phase rotation circuit 7 Window function processing circuit 8 Inverse Fourier transformer 9 Output terminal

Claims (3)

A delay profile creation circuit for creating a delay profile of an orthogonal frequency division multiplexed signal by a differential modulation method,
Orthogonal demodulation and fast Fourier transform means for performing orthogonal demodulation and fast Fourier transform on the orthogonal frequency division multiplexed signal;
Declination difference calculating means for calculating the declination difference between adjacent carriers based on the output of the orthogonal demodulation and fast Fourier transform means;
A comparing means for comparing the deviation difference with a predetermined value;
Phase rotation angle determination means for determining a phase rotation angle based on a comparison result between the deviation angle difference and a predetermined value;
Phase rotation means for phase rotating the orthogonal frequency division multiplex signal based on the output of the phase rotation angle determination means;
Window function processing means for processing a window function of the orthogonal frequency division multiplexed signal whose phase has been rotated;
A delay profile generation circuit comprising: means for obtaining the delay profile by performing inverse Fourier transform on the orthogonal frequency division multiplexed signal subjected to window function processing. The phase rotation means comprises:
First rotating means for rotating the orthogonal frequency division multiplexed signal by 45 ° clockwise;
Delay means for delaying the orthogonal frequency division multiplexed signal by a time corresponding to a processing time of the first rotating means;
Selection means for selecting one of the output of the first rotation means and the output of the delay means based on the output of the phase rotation angle determination means;
2. The delay profile creation circuit according to claim 1, further comprising second rotation means for phase-rotating the output of the selection means based on the output of the phase rotation angle determination means. 3. The delay profile generation circuit according to claim 2, wherein the output of the selection means is rotated in phase by 0 °, 90 °, 180 ° clockwise or 90 ° counterclockwise.

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