JP2006079207A - Memory controller, process cartridge and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect illegal copying of data in a memory. <P>SOLUTION: In steps S1 to S3, an address B of the memory is read, the address B and data BD stored in a storage area with the address B are detected. After the detection, by making read access to an address A, the address A and data AD stored in a storage area with the address A are detected. The detected address A, data AD, address B and data BD are stored. In steps S4 to S6, logical operation is performed with the data AD and the address A, the address B, the data AD or data BD to calculate data RD, which is outputted to a data output part, and the data RD as the logical operation result is outputted to a CPU through a bus by the data output part. The CPU, without reading the data AD stored in the address A after the above progress, brings in, as read data for the address A, the data RD outputted to the bus as the logical operation result. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a memory control device, a process cartridge, and an electronic device.

  Conventionally, a base address including a reference value of an in-block address of a memory and a reference value of a block address provided on the upper side of the reference value of the address in the block, and a displacement indicating displacement with respect to the reference value Adds and outputs, and also outputs a carry signal resulting from addition of addresses within the block, adds the reference value of the block address and the displacement relative to the reference value, and outputs it, storing the tag memory specified by the output Data in the tag memory is read without waiting for the addition result of the in-block address by reading out the data in the area and the storage area one block higher, and selecting and outputting one of those data by the carry signal. There was a memory control device (see, for example, Patent Document 1).

Further, a second data bus capable of transmitting data having a bit number of a positive integer multiple of 2 or more with respect to the number of bits of transmission data of the first data bus is provided, and the even address and the even address are consecutive from the main memory means. When the CPU transmits an odd address obtained by adding 1 to the even address next to the even address, the data stored in the cache is stored in the cache memory. As a means, there has been a memory control device (for example, see Patent Document 2) in which data corresponding to the odd-numbered address has already been stored by the previous cache operation and is always in a cache hit state.
Further, a memory having a storage area for sequentially accessing, storing a non-rewritable identification information in a normal state, and having a storage cell capable of being written in a predetermined condition, and selecting a desired storage device There was a control device (for example, see Patent Document 3).
JP-A-4-76648 JP-A-6-161891 Japanese Patent Laid-Open No. 2002-14870

However, the conventional memory control device has a problem that an illegal copy of data in the memory cannot be detected.
The present invention has been made in view of the above points, and an object thereof is to detect an illegal copy of data in a memory.

In order to achieve the above object, the present invention provides the following memory control devices (1) to (4).
(1) When reading the first data stored in the first address from the memory capable of reading and writing data, the second data stored in the second address is detected, and after the detection, the data is stored in the first address. Address / data detection storage means for detecting the first data and storing the detected first address, the first data, the second address, and the second data, and storing in the address / data detection storage means Logical operation means for calculating data by the logical operation of the first data and the first address, the second address, the first data or the second data, and the data calculated by the logical operation means A memory control device comprising data output means for outputting the data as the first data of the first address.

(2) When writing the first data to the first address of the memory capable of reading and writing data, the second data stored in the second address is detected, and after the detection, the first address is accessed, and the first data Address / data detection storage means for detecting first data to be written to an address and storing the first address, the detected first data, the second address, and the second data, and the address / data detection storage Logical operation means for calculating data by logical operation of the first data stored in the means and the first address, the second address or the second data, and the data calculated by the logical operation means A memory control device comprising data input means for inputting the first data to be written to a first address.

(3) In the memory control device according to (1), the logical operation means includes the first data, the first address, the second address, and the first data stored in the address / data detection storage means. Alternatively, a memory control device as means for calculating data by logical operation with a combination of the second data.
(4) In the memory control device of (2), the logical operation means may be the first data, the first address, the second address, or the second data stored in the address / data detection storage means. A memory control device as means for calculating data by a logical operation with a combination of.

The following process cartridge (5) and electronic devices (6) to (11) are also provided.
(5) A process cartridge equipped with the memory of the memory control device according to any one of (1) to (4).
(6) A data determination unit that mounts the memory control device according to any one of (1) to (4) and determines whether the data is correct based on the data calculated by the logical operation unit, and the data An electronic device comprising initialization means for setting initial values to various parameters when the judgment means judges that the data is incorrect.

(7) A data determination unit that includes the memory control device according to any one of (1) to (4) and determines whether the data is correct based on the data calculated by the logical operation unit, and the data An electronic device provided with an add-on function adding means for adding an add-on function when the determining means determines that the data is correct.
(8) The process cartridge of (5) above is mounted, and data determination means for determining whether the data is correct based on the data calculated by the logical operation means, and that the data determination means indicates that the data is not correct An electronic device comprising initialization means for setting initial values to various parameters when determined.

(9) The process cartridge of (5) above is mounted, and data determination means for determining whether the data is correct based on the data calculated by the logical operation means, and the data determination means determine that the data is correct An electronic device provided with an add-on function adding means for adding an add-on function when being added.
(10) The process cartridge including the memory of the memory control device according to (1) or (3) is mounted, and the address / data detection storage unit, the logical operation unit, and the data output unit are connected to the process cartridge. Electronic device provided outside.
(11) A process cartridge having the memory of the memory control device according to (2) or (4) is mounted, and the address / data detection storage means, the logical operation means, and the data input means are connected to the process cartridge. Electronic device provided outside.

  The memory control device, the process cartridge, and the electronic device according to the present invention can detect unauthorized copying of data to the memory.

Hereinafter, the best mode for carrying out the present invention will be specifically described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of an electronic apparatus according to an embodiment of the present invention.
This electronic device is an information processing device such as a personal computer in which the process cartridge 1 and the memory control device 3 are mounted.
The process cartridge 1 has a memory 10 mounted thereon. The memory 10 is a storage unit that can read and write data having a storage area 11 that is an address A (first address) and a storage area 12 that is an address B (second address).
The interface (I / F) 2 is an I / F with the memory 10 and performs access in parallel or serial manner. This I / F includes at least an address signal, a data signal, and a signal for determining whether the access is a read access or a write access.

The memory control device 3 includes an address / data detection storage unit 13, a logical operation unit 14, a data output unit 15, a logical operation unit 16, and a data input unit 17.
The address / data detection storage unit 13 reads the data AD (first data) stored in the storage area 11 of the memory 10 that can read and write data, and stores the address B in the storage area 12 and the storage area 12. The data BD (second data) is detected, and after the detection, the address A of the storage area 11 and the data AD stored in the storage area 11 are detected, and the detected address A, data AD and address B are detected. And data BD are stored.
When data AD is written to the storage area 11 of the memory 10 that can read and write data, the address B of the storage area 12 and the data BD stored in the storage area 12 are detected, and after the detection, A process of detecting and accessing the address A, detecting the data AD to be written in the storage area 11, and storing the address A, the detected data AD, the address B, and the data BD is also performed.

The logical operation unit 14 performs a process of calculating data RD by logical operation of the data AD stored in the address / data detection storage unit 13 and the address A, address B, data AD, or data BD.
The data output unit 15 outputs the data RD calculated by the logical operation unit 14 to the outside as the data AD read from the storage area 11 of the address A, and the data that has passed through the operation processing of the logical operation unit 14 Select the process to output to.

The logical operation unit 16 performs a process of calculating data RD by logical operation of the data AD stored in the address / data detection storage unit 13 and the address A, address B, or data BD.
The data input unit 17 inputs data RD calculated by the logical operation unit 16 to the I / F 2 as data AD to be written in the storage area 11 of the address A, and data obtained by passing through the arithmetic processing of the logical operation unit 16. A process to be input to the I / F 2 is selected and performed.
The bus 4 is a communication line through which the CPU 5 exchanges data AD with the memory control device 3.

The CPU 5 controls the entire electronic device, and exchanges data AD with the memory control device 3 and whether or not the data is correct based on the data RD calculated by the logical operation units 14 and 16. A data determination process for determining, an initialization process for setting initial values to various parameters when the data determination process determines that the data is incorrect, and an add-on function when the data determination process determines that the data is correct Performs add-on function addition processing.
As described above, the CPU 5 uses the parts 13 to 15 when reading data from the memory 10 using the bus 4, and uses the parts 13, 16, and 17 when writing data to the memory 10. To do.

FIG. 2 is a flowchart showing a read operation from the memory 10 in this electronic apparatus.
In this processing, it is assumed that ID data indicating whether or not the data is original is stored in advance in the storage area 11 of the address A of the memory 10 as data AD.
When the data AD stored in the storage area 11 of the memory 10 is read, the address / data detection storage unit reads the address B of the memory in steps (indicated by “S” in the figure) 1 to 3 and reads the address B And the data BD stored in the storage area of the address B. After the detection, the address A is read-accessed, and the address A and the data AD stored in the storage area of the address A are detected. The detected address A, data AD, address B, and data BD are stored.

In steps 4 and 5, the logical operation unit calculates the data RD by performing a logical operation on the data AD stored in the address / data detection storage unit and the address A, address B, data AD or data BD, Output to the data output section. Alternatively, a logical operation of data AD and a combination of address A, address B, data AD or data BD is executed to calculate data RD and output it to the data output unit. Then, the data output unit outputs the logical operation result data RD to the CPU via the bus.
In step 6, the CPU does not read the data AD stored in the address A through the above process, but reads (reads) the data RD of the logical operation result output to the bus as the read data of the address A. take in.

In step 7, the CPU determines whether or not the data RD is correct based on the fetched data RD. If it is determined that the data RD is correct, an add-on function is added in step 8 and the process ends.
On the other hand, if it is determined in step 7 that the data RD is not correct, in step 9, initial values are set for various parameters relating to various functions, and this process is terminated by limiting to the minimum necessary functions that do not include options. To do.
Examples of the add-on function include memory expansion, processing speed of the electronic device, and the number of various registrations.

In this way, it is possible to detect illegal data copy to the memory of the process cartridge, and to make it possible to know the copy history by a predetermined logical operation. Can be prevented.
Also, when an illegal copy of data is detected, differentiation can be performed without using individual parameters stored in the memory.
Further, when a correct data copy is detected, the individual parameters stored in the memory can be used and an add-on function can be added for differentiation.
Furthermore, the degree of freedom in system design can be increased and the price of a process cartridge equipped with a memory can be reduced.

FIG. 3 is a flowchart showing a write operation to the memory 10 in this electronic apparatus.
In this process, a case will be described in which ID data indicating whether the data is original is written as data AD in the storage area 11 of the address A of the memory 10.
When writing the data AD in the storage area 11 of the memory 10, the address / data detection storage unit reads the address B of the memory in steps (indicated by "S" in the figure) 11-13, and the address B and the address The data BD stored in the B storage area is detected, and after the detection, the write access is performed to the storage area of the address A of the memory, and the data input unit inputs the data AD from the CPU via the bus, and the address A And the data AD stored in the storage area of the address A are detected, and the detected address A, data AD, address B, and data BD are stored.

In steps 14 and 15, the logical operation unit calculates the data RD by executing the logical operation of the data AD stored in the address / data detection storage unit and the address A, address B, or data BD, and the data input unit To enter. Alternatively, the logical operation of the data AD and the combination of the address A, the address B, or the data BD is executed to calculate the data RD and input it to the data input unit.
In step 16, the data input unit writes the logical operation result data RD as data A in the storage area of address A in the memory.

In step 17, the CPU determines whether or not the data RD is correct based on the written data RD. If it is determined that the data RD is correct, an add-on function is added in step 18 and the process ends.
On the other hand, if it is determined in step 17 that the data RD is not correct, in step 19, initial values are set for various parameters related to various functions, and this process is terminated by limiting to the minimum necessary functions that do not include options. To do.

Examples of the add-on function include memory expansion, processing speed of the electronic device, and the number of various registrations.
In this way, a correct data copying method by the original producer can be provided to the memory, and the copying method can be made more complicated to prevent illegal data copying.

  The memory control device, the process cartridge, and the electronic device according to the present invention can also be applied to personal computers such as desktop personal computers and notebook personal computers.

It is a block diagram which shows the structure of the electronic device of one Example of this invention. FIG. 2 is a flowchart showing a read operation from a memory in the electronic device shown in FIG. 1. FIG. 2 is a flowchart illustrating a write operation with respect to a memory in the electronic device illustrated in FIG. 1.

Explanation of symbols

1: Process cartridge 2: Interface (I / F) 3: Memory control unit 4: Bus 5: CPU 10: Memory 11, 12: Storage area 13: Address / data detection storage unit 14, 16: Logic operation unit 15: Data Output unit 17: Data input unit

Claims (11)

  When reading the first data stored in the first address from the memory capable of reading and writing data, the second data stored in the second address is detected, and the first data stored in the first address is detected after the detection. Detecting and storing the detected first address, the first data, the second address, and the second data, and an address / data detection storage means stored in the address / data detection storage means. Logical operation means for calculating data by logical operation of one data and the first address, the second address, the first data or the second data, and the data calculated by the logical operation means A memory control device comprising data output means for outputting as first data of an address.   When writing the first data to the first address of the memory capable of reading and writing data, the second data stored in the second address is detected, the first address is accessed after the detection, and the first data is written to the first address. 1 data is detected, and the first address, the detected first data, the second address, and the second data are stored in the address / data detection storage means, and stored in the address / data detection storage means Logical operation means for calculating data by a logical operation of the first data and the first address, the second address or the second data, and the data calculated by the logical operation means as the first address. A memory control device comprising: data input means for inputting the first data to be written.   The logical operation means is a logical combination of the first data stored in the address / data detection storage means and the first address, the second address, the first data, or the second data. 2. The memory control device according to claim 1, wherein the memory control device is means for calculating data by calculation.   The logical operation means calculates data by logical operation of a combination of the first data stored in the address / data detection storage means and the first address, the second address, or the second data. 3. The memory control apparatus according to claim 2, wherein the memory control apparatus is a means for performing the above-described processing.   A process cartridge comprising the memory of the memory control device according to claim 1.   5. A data determination unit that includes the memory control device according to claim 1 and that determines whether the data is correct based on the data calculated by the logical operation unit; and the data determination unit An electronic device comprising: initialization means for setting initial values to various parameters when it is determined that the data is not correct.   5. A data determination unit that includes the memory control device according to claim 1 and that determines whether the data is correct based on the data calculated by the logical operation unit; and the data determination unit An add-on function adding means for adding an add-on function when the data is determined to be correct by the electronic device.   The process cartridge according to claim 5 is mounted, and data determination means for determining whether the data is correct based on the data calculated by the logic operation means, and the data determination means determined that the data is not correct An electronic device characterized by comprising initialization means for setting initial values to various parameters.   When the process cartridge according to claim 5 is mounted and the data determination unit determines whether the data is correct based on the data calculated by the logical operation unit, and when the data determination unit determines that the data is correct An electronic apparatus comprising: an add-on function adding means for adding an add-on function.   4. A process cartridge comprising the memory of the memory control device according to claim 1 or 3 is mounted, and the address / data detection storage means, the logical operation means, and the data output means are provided outside the process cartridge. An electronic device characterized by the above.   5. A process cartridge comprising the memory of the memory control device according to claim 2 or 4 is mounted, and the address / data detection storage means, the logical operation means, and the data input means are provided outside the process cartridge. An electronic device characterized by the above.

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