JP2006053171A - Method for manufacturing semiconductor apparatus, semiconductor apparatus and semiconductor circuit substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor apparatus, in which a bonding process can be conducted with high accuracy of (-1)-(+1)μm so as to form connection from a bonded semiconductor circuit member to a plurality of thin wires and to efficiently manufacture a highly accurate and highly functional display semiconductor with space saving by making non-single crystal and single crystal silicon semiconductors be intermingled with each other on a junction substrate, a semiconductor apparatus and a semiconductor circuit substrate. <P>SOLUTION: The method for manufacturing includes a step to position and temporarily fix one or more semiconductor circuit members 1 on a first auxiliary substrate 30 ((a), (b) in the figure), a step to transfer and fix the semiconductor circuit members 1 temporarily fixed on the first auxiliary substrate 30 to a second auxiliary substrate 50 ((c), (d) in the figure), and a step to integrally connect the semiconductor circuit members 1 transferred and fixed to the second auxiliary substrate 50 to a position set on the bonding substrate. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, a semiconductor device, and a semiconductor circuit substrate that are useful in a display device such as an active matrix display device.

  In recent years, development of a system-on-panel (hereinafter abbreviated as “SOP”) in which circuits having various functions are formed on a single panel has been developed. For example, thin film transistors (hereinafter abbreviated as “TFT”) for displaying an image on a transparent insulating substrate such as glass and driving the display unit using polycrystalline silicon having relatively high mobility. One example is the development of a driver monolithic display panel that simultaneously forms the TFT of the driver circuit portion to be formed.

  However, at present, it is extremely difficult to produce a driver circuit with the same performance as that of single crystal silicon with polycrystalline silicon, and only monolithic drivers can be made with analog drivers and low bit digital drivers. Yes. In other words, line-sequentially driven digital driver circuits that require even higher speed operations, or circuits such as oscillation circuits and CPUs cannot be monolithically formed of polycrystalline silicon, and these circuits were formed separately. An IC (Integrated Circuit) chip or LSI (Large Size Integrated Circuit) chip obtained by cutting a single crystal silicon wafer is used in chip on glass (hereinafter referred to as “COG”) technology or chip on film (Chip On Film). Hereinafter, it is abbreviated as “COF.”) A circuit is incorporated in the panel by externally connecting to the liquid crystal panel by technology.

  In the COG technology, a space for joining an IC chip and a wiring pattern for connection are provided near the edge of the panel, and the IC chip cut out from the silicon wafer is provided with an anisotropic conductive film (ACF). This is a technique in which an IC chip is directly bonded to a panel by using an adhesive called “.

Further, as a method for efficiently bonding a plurality of semiconductor chips onto a substrate of a liquid crystal display device, for example, as disclosed in Patent Document 1, a bottom surface of a semiconductor chip is processed into a convex cone shape, and a concave hole shape is formed. There is a method of holding by suction with a transfer jig and pasting together.
JP 2001-313310 A (released on November 9, 2001)

  However, the above conventional semiconductor device manufacturing method and semiconductor device manufacturing apparatus have the following problems.

That is, in the method of attaching the IC chip to the liquid crystal panel by the COG technology,
(1) The mother glass substrate is divided into liquid crystal panels of a predetermined size, bonded to the counter substrate, liquid crystal is injected and sealed, and then the IC chip is bonded to the liquid crystal panel. Then, it is necessary to perform a process of attaching the IC chip and the liquid crystal panel (ACF application, alignment, pressure bonding, etc.). For example, when one mother glass is divided into 100 liquid crystal panels, it is necessary to perform a process of attaching IC chips for 100 panels (100 times). Therefore, a long tact time is required only for this bonding step, and the production efficiency is poor.
(2) Since the bonding accuracy between the IC chip and the liquid crystal panel is about 5 to 10 [mu] m, it is necessary to form the electrodes on the liquid crystal panel side as much as possible in view of the deviation. Therefore, the area of the non-display portion (frame portion) of the liquid crystal panel becomes large. If the number of pixels is not changed, the aperture ratio is reduced, and if the pixel pitch is not changed, the resolution is reduced.
(3) Since bonding is performed using ACF, it is necessary to apply a strong pressure (about 20 kgf / cm ² ) to the IC chip in order to bond the IC chip to the liquid crystal substrate. For this reason, the IC chip is cracked or chipped called chipping occurs, resulting in a decrease in yield and reliability. In addition, the stage to be bonded needs to have a high rigidity enough to withstand a strong pressure.
There is a problem.

Further, the method disclosed in Patent Document 1 that processes the bottom surface of a semiconductor chip into a convex cone shape, sucks and holds it with a concave hole-shaped transfer jig, and bonds them together at a time has the following problems.
(4) Since photolithography and etching are required to form the weight-shaped protrusions and transfer jigs, variations in etching are added in addition to variations in photolithography. It is difficult to form the weight-shaped protrusion and the recessed hole of the transfer jig.
(5) In order to position with high accuracy using the weight-shaped protrusions formed on the bottom surface, when forming the weight-shaped protrusions on the bottom surface, the positions of the weight-shaped protrusions on the bottom surface and the positions of the TFTs on the surface Must be accurately aligned (aligned). However, when a non-transparent substrate such as a Si substrate is used as the semiconductor circuit member, it is difficult to read the pattern from the back side to the front side of the Si substrate with high accuracy because it does not transmit visible light. Therefore, it is impossible to accurately position and form the weight-shaped projections on the back surface. On the other hand, when a transparent substrate such as a glass substrate is used as the semiconductor circuit member, the TFT pattern on the front surface can be read from the back surface, but etching of the (111) crystal plane and the (100) crystal plane as in the Si substrate is possible. Since anisotropy cannot be used, it is difficult to form high-precision weight-shaped projections and recessed holes in the transfer jig, and it is also difficult to position with high precision.
(6) After the semiconductor chip and the liquid crystal substrate are bonded together, the connecting portion is cured using a photo-curable resin or the like, so that a thin film transistor manufacturing process that requires heat treatment at 300 ° C. or higher cannot be flown thereafter. . Moreover, also from the surface of the influence of the impurity which oozes out from these hardening resin, it cannot flow in the manufacturing process of a thin-film transistor after bonding hardening.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to make it possible to mix a non-single crystal silicon semiconductor and a single crystal silicon semiconductor on a bonded substrate, and to display a display panel using COG technology. It has a higher throughput than the manufacturing method, and the bonding process is performed with high accuracy within ± 1 μm, which is difficult to realize with conventional technology, and the bonded semiconductor substrate is connected to a large number of thin wirings with high accuracy. It is an object of the present invention to provide a semiconductor device manufacturing method, a semiconductor device, and a semiconductor circuit board capable of efficiently and space-saving manufacturing a high-performance display semiconductor.

  In order to solve the above-described problem, a method of manufacturing a semiconductor device according to the present invention includes a step of positioning and temporarily fixing one or more semiconductor circuit members on a first auxiliary substrate, and a temporary fixing on the first auxiliary substrate. A step of transfer-fixing the semiconductor circuit member to the second auxiliary substrate, and a step of collectively bonding the semiconductor circuit member transfer-fixed to the second auxiliary substrate to a set position of the bonding substrate. Yes.

  In order to solve the above-described problem, the semiconductor device of the present invention includes the semiconductor circuit member and a bonding substrate for bonding the semiconductor circuit member, and before the semiconductor circuit member is bonded to the bonding substrate. The semiconductor circuit member is positioned and bonded to the bonding substrate by an abutting member formed on the same side surface where the semiconductor structure of at least a part of the formed semiconductor circuit member is disposed. It is said.

  According to another aspect of the present invention, there is provided a semiconductor circuit board having a plurality of semiconductor structures in which at least a part of a semiconductor structure that operates in conjunction with a circuit on the bonding substrate is formed in advance before bonding to the bonding substrate. A contact member including a device and used for positioning when bonding to the bonding substrate is formed on a surface on the same side where at least a part of the semiconductor structure formed before bonding is arranged. It is said.

  According to the above invention, first, one or more semiconductor circuit members are positioned and temporarily fixed on the first auxiliary substrate. Next, the semiconductor circuit member temporarily fixed on the first auxiliary substrate is transfer-fixed to the second auxiliary substrate. Further, the semiconductor circuit members transfer-fixed to the second auxiliary substrate are bonded together at a set position on the bonding substrate. This method is referred to as “transfer twice”.

  Therefore, in the process of the present invention, when the semiconductor circuit member is placed on the first auxiliary substrate, positioning accuracy is not required, throughput is improved, and an expensive handling device that requires high-precision movement is also available. do not need.

  In the process of the present invention, in the alignment of the first auxiliary substrate and the second auxiliary substrate and the alignment of the second auxiliary substrate and the bonding substrate, for example, the second auxiliary substrate is formed of a transparent substrate, If markers are provided on the surfaces of the first auxiliary substrate, the second auxiliary substrate, and the bonding substrate, alignment can be performed visually. As a result, even if a non-transparent substrate such as a Si substrate is used as the first auxiliary substrate, the positional relationship between the substrates can be maintained so that the semiconductor circuit member can be accurately positioned on the bonding substrate in the end. it can.

  As another example, when the semiconductor circuit member is transferred from the first auxiliary substrate to the second auxiliary substrate, the alignment between the first auxiliary substrate and the second auxiliary substrate is not necessarily required. This is because if only the relative position of the semiconductor circuit member positioned on the first auxiliary substrate is properly transferred to the second auxiliary substrate, in the final bonding step with the bonding substrate, This is because the bonding position of other semiconductor circuit members is inevitably determined by aligning a certain alignment marker with the alignment marker of the bonding substrate. As a result, even if the bonding method is transferred twice, the time-consuming alignment is only required once, so the throughput does not decrease.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the above-described method of manufacturing a semiconductor device, wherein at least a step of temporarily fixing the semiconductor circuit member to the first auxiliary substrate is performed on the semiconductor circuit member It is characterized by forming at least a part of the semiconductor structure.

  Therefore, a circuit that requires fine processing that can only be manufactured by an exposure apparatus used in a normal IC manufacturing process can be transferred to a glass substrate after being previously formed on a Si substrate. A fine circuit that cannot be formed by the exposure apparatus used in the manufacturing process can be formed on the panel. At the same time, wiring parts that do not require microfabrication of semiconductor circuit members can be flown as a common process using the processing rules for liquid crystal panels after being transferred to a large glass substrate, thus simplifying the manufacturing process. Cost can be reduced.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the first auxiliary substrate has a positioning portion for each of the semiconductor circuit members, while the semiconductor circuit member has the first auxiliary. A contact member corresponding to the positioning portion of the substrate is formed in advance.

  The semiconductor device of the present invention includes a plurality of semiconductor circuit members and a bonding substrate for bonding the plurality of semiconductor circuit members, wherein the plurality of semiconductor circuit members and the bonding substrate are the semiconductor devices described above. Each of the semiconductor circuit members is formed on the same side where at least a part of the semiconductor circuit members formed before the bonding of the plurality of semiconductor circuit members to the bonding substrate is disposed. The plurality of semiconductor circuit members are positioned and bonded to the bonding substrate by the contact members formed on the surface.

  Therefore, high-accuracy positioning can be realized by performing positioning using the catch caused by the step between the positioning portion and the contact member having high dimensional accuracy.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, the first auxiliary substrate has a positioning portion for each of the semiconductor circuit members, and the semiconductor circuit member includes the semiconductor circuit. Before the step of temporarily fixing the member to the first auxiliary substrate, at least a part of the semiconductor structure and an abutting member corresponding to the positioning portion of the first auxiliary substrate are formed in advance, and the contact When the contact member is formed, the contact member is formed on the same side as the side on which a part of the semiconductor structure is formed.

  Therefore, since the contact member is formed on the front surface side of the semiconductor circuit member, it is not necessary to read the pattern on the front surface from the back surface as in the prior art, and it is more accurate than when the contact member is formed on the back surface side. A contact member can be formed, and highly accurate positioning can be realized.

  The semiconductor device manufacturing method of the present invention is characterized in that in the semiconductor device manufacturing method described above, a photosensitive resin is used as the contact member.

A plurality of semiconductor circuit members, and a bonding substrate for bonding the plurality of semiconductor circuit members, wherein the plurality of semiconductor circuit members and the bonding substrate are each formed with a semiconductor structure that operates in association with each other;
The semiconductor device of the present invention is characterized in that, in the semiconductor device described above, the plurality of semiconductor circuit members are formed with a positional accuracy within ± 1 μm with respect to the bonding substrate.

  Therefore, since the photosensitive resin is used, the contact member can be formed only by a photolithography process capable of forming a highly accurate pattern. Further, since the etching process is not required, the contact member can be formed with higher accuracy, and the positioning process can be performed with high accuracy within ± 1 μm.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the above-described method for manufacturing a semiconductor device, wherein the contact member is configured such that the contact member contacts the positioning portion on the first auxiliary substrate. It is characterized in that it is formed in a planar shape that restricts the movement in two directions.

  Therefore, by setting the contact member pattern corresponding to the minimum positioning part pattern (two sides or two points) necessary for positioning, the degree of freedom for placing the semiconductor circuit member at the first time is increased, and at the same time, 1 Since the degree of freedom of the method of positioning by sliding on the auxiliary substrate is widened, it is possible to efficiently perform positioning in a lump.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the above-described method of manufacturing a semiconductor device, wherein the contact member is a predetermined portion along a guide rail portion where the semiconductor circuit member is formed on a first auxiliary substrate. Forming a planar shape that moves in the direction and restricts the movement of the semiconductor circuit member in two directions when the contact member contacts the positioning portion on the first auxiliary substrate. It is a feature.

  Therefore, by providing a contact member pattern corresponding to the guide rail portion on the first auxiliary substrate, it is possible to prevent the semiconductor circuit member from rotating or catching while being slid by applying vibration and positioning. It is possible to move more reliably toward the part and to perform positioning more accurately.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein a protective layer made of resin or metal is formed between the semiconductor structure of the semiconductor circuit member and the contact member. It is characterized by that.

  Therefore, by covering the surface of the semiconductor circuit member with a protective film, when the semiconductor element substrate is divided into chips, the bonding surface is protected from damage to the semiconductor circuit, dust adhesion, etc., and the yield during bonding is improved. In addition, by removing this protective film by etching or the like, the contact member can be lifted off and removed simultaneously and easily, so the degree of freedom in selecting the material for the contact member is widened and the process flow is simplified. It can be made.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the semiconductor circuit member is made of a single crystal silicon substrate.

  Therefore, by limiting to single crystal Si, a highly functional microfabricated device such as an IC or LSI can be directly transferred onto a glass substrate, so that a highly functional panel can be produced.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the semiconductor circuit member is formed of a single crystal silicon substrate, and the semiconductor circuit member is temporarily fixed to the first auxiliary substrate. Before, hydrogen ions and / or a rare gas are implanted at a predetermined depth in the single crystal silicon substrate to form a hydrogen ion implanted layer and / or a rare gas implanted layer, and the single crystal silicon substrate is bonded to the single crystal silicon substrate. And a step of peeling a part of the single crystal silicon substrate with the hydrogen ion implanted layer and / or the rare gas implanted layer by heat treatment after bonding to the substrate.

  Therefore, by limiting to single crystal Si, a highly functional microfabricated device such as an IC or LSI can be directly transferred onto a glass substrate, so that a highly functional panel can be produced.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, each positioning portion of the first auxiliary substrate has a planar shape that restricts the movement of the semiconductor circuit member in two directions. It is characterized by being formed. The shape in which the planar shape restricts the movement of the semiconductor circuit member in two directions refers to, for example, shapes such as an L shape, a V shape, an X shape, and a T shape.

  Therefore, by setting the minimum positioning part pattern (two sides or two points) necessary for positioning, the degree of freedom of placing the semiconductor circuit member at the beginning is increased and the first auxiliary substrate is slid. Since the degree of freedom of the positioning method is widened, the positioning can be performed efficiently and collectively.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein each positioning portion of the first auxiliary substrate has a planar shape that restricts movement of the semiconductor circuit member in two directions. It is formed in a planar shape, and a gap is formed at a corner angle where two sides intersect.

  Therefore, a gap is provided at the corner where the pattern of the positioning portion (L-shaped, V-shaped, etc.) intersects. For this reason, when the semiconductor circuit member is slid and positioned, the corner of the abutting member is prevented from being caught by the positioning portion and positioning cannot be performed properly, or the corner portion of the abutting member that is structurally weak is positioned. Since it is possible to prevent the contact portion from being damaged and generating dust, it is possible to perform high-precision positioning with a high yield.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the first auxiliary substrate has a positioning portion for each semiconductor circuit member, and each semiconductor circuit member is positioned in the direction of the positioning portion. And a guide rail portion for moving the guide rail.

  Accordingly, by providing a pattern such as a guide rail on the first auxiliary board, the semiconductor circuit member is prevented from rotating or catching while being slid by applying vibration, and more toward the positioning portion. It can move reliably and can be positioned more accurately.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the positioning portion of the first auxiliary substrate is formed in an uneven shape by a photosensitive resin.

  Therefore, since the positioning portion of the first auxiliary substrate is formed of the photosensitive resin, the positioning portion can be formed with high accuracy by forming a highly accurate pattern using photolithography, and high-accuracy positioning can be realized.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein the positioning portion of the first auxiliary substrate is formed as a recess by etching the surface of the first auxiliary substrate. It is a feature.

  Accordingly, since the positioning portion of the first auxiliary substrate is formed as a recess by etching the surface of the first auxiliary substrate, an increase in the number of members can be prevented as compared with the case where the positioning portion is separately formed of resin.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the first auxiliary substrate is a single crystal silicon substrate, and the surface thereof is subjected to anisotropic wet etching with potassium hydroxide. A concave portion is formed.

  According to the above invention, when a single crystal silicon (Si) substrate is used as the first auxiliary substrate, the surface is etched between the (111) crystal plane and the (100) crystal plane with potassium hydroxide (KOH). Recesses can be formed by utilizing the anisotropy of. Therefore, a concave portion having a certain angle (54.7 °) can be easily and accurately formed as the positioning portion, so that highly accurate positioning can be realized collectively.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the above-described method of manufacturing a semiconductor device, wherein the semiconductor circuit member temporarily fixed on the first auxiliary substrate is transfer-fixed to the second auxiliary substrate. The semiconductor circuit member is bonded to the second auxiliary substrate with an adhesive.

  According to the above invention, since the semiconductor circuit member temporarily fixed on the first auxiliary substrate is bonded to the second auxiliary substrate with the adhesive, the semiconductor circuit member can be easily fixed to the second auxiliary substrate. .

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the adhesive for temporarily fixing the semiconductor circuit member is peeled off by heating.

  According to the above invention, since the adhesive for temporarily fixing the semiconductor circuit member is peeled off by heating, the semiconductor circuit member can be easily peeled off from the first auxiliary substrate or the second auxiliary substrate even if an adhesive is used. .

Moreover, the manufacturing method of the semiconductor device of this invention is the manufacturing method of the semiconductor device described above,
The adhesive for temporarily fixing the semiconductor circuit member is peeled off by ultraviolet irradiation.

  According to the above invention, since the adhesive for temporarily fixing the semiconductor circuit member is peeled off by ultraviolet irradiation, the semiconductor circuit member can be easily peeled off from the first auxiliary substrate or the second auxiliary substrate even if an adhesive is used. Can do.

Moreover, the manufacturing method of the semiconductor device of the present invention is the above-described manufacturing method of a semiconductor device,
In the step of bonding the semiconductor circuit member to the bonding substrate, the bonding surfaces of the semiconductor circuit member and the bonding substrate are activated and then bonded.

  According to the above invention, since the bonding surfaces of the semiconductor circuit member and the bonding substrate are bonded and activated, the bonding proceeds with a slight pressing, and both can be bonded easily without an adhesive.

Moreover, the manufacturing method of the semiconductor device of the present invention is the above-described manufacturing method of a semiconductor device,
The first auxiliary board has a positioning portion corresponding to each of the semiconductor circuit members, and in the step of temporarily fixing the one or more semiconductor circuit members on the first auxiliary board, the one or more semiconductor circuit members Is positioned on the positioning portion by moving the surface of the first auxiliary substrate.

  According to the invention described above, in the step of temporarily fixing the one or more semiconductor circuit members on the first auxiliary substrate, the one or more semiconductor circuit members are moved on the surface of the first auxiliary substrate and the positioning is performed. Position to the part.

  As a result, at the stage where the semiconductor circuit member is placed on the first auxiliary substrate, the semiconductor circuit member is moved after placement, so that the precision of the placement position is not required. On the other hand, after the semiconductor circuit member is moved in parallel and brought into contact with the positioning portion, the contact position with the positioning portion can be assumed to correspond to the accurate set position of the bonded substrate. The semiconductor circuit members can be collectively transferred and bonded to the bonding substrate.

  Therefore, the semiconductor circuit member can be bonded on the bonding substrate, and has higher productivity than the display panel manufacturing by the COG technology. Further, the bonding process is performed with a high accuracy within ± 1 μm, and the high accuracy and high performance are achieved. A semiconductor device manufacturing method capable of manufacturing a display semiconductor efficiently and in a space-saving manner can be provided.

Moreover, the manufacturing method of the semiconductor device of the present invention is the above-described manufacturing method of a semiconductor device,
The movement of the one or more semiconductor circuit members on the surface of the first auxiliary substrate includes a movement operation of the semiconductor circuit member on the surface of the first auxiliary substrate due to an inclination of the first auxiliary substrate. Yes.

  According to said invention, in order to move a semiconductor circuit member to a positioning part in parallel with the surface on a 1st auxiliary substrate, a 1st auxiliary substrate is inclined.

  Therefore, by tilting the first auxiliary substrate, all the semiconductor circuit members are moved to the positioning portion by gravity and come into contact with the positioning portion, and the contact positions are associated with the set position of the bonding substrate. It can be a position. For this reason, all the semiconductor circuit members mounted on the first auxiliary substrate can be easily and automatically positioned.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the movement of the one or more semiconductor circuit members on the surface of the first auxiliary substrate is mounted on the first auxiliary substrate. When the placed semiconductor circuit member is moved to the positioning portion parallel to the surface of the first auxiliary substrate, the moving operation of the semiconductor circuit member on the surface of the first auxiliary substrate by vibration is included. It is characterized by that.

  According to the above invention, the semiconductor circuit member is vibrated when the semiconductor circuit substrate placed on the first auxiliary substrate is tilted and moved to the positioning portion. Accordingly, the frictional resistance between the semiconductor circuit member and the first auxiliary substrate is reduced, and the semiconductor circuit member can be easily slid on the first auxiliary substrate.

Further, in the method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device described above, when the first auxiliary substrate is vibrated, when the vibration frequency is f and the amplitude is Z0, Z0> It is characterized by vibrating so as to satisfy g / (2πf) ² .

According to the above invention, the semiconductor circuit member on the first auxiliary substrate can be appropriately slid by setting the vibration frequency f and the amplitude Z0 so as to satisfy Z0> g / (2πf) ^2. .

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the area of the bonding substrate is an integral multiple of the second auxiliary substrate.

  According to the above invention, the semiconductor circuit member can be bonded to the bonding substrate in units of the second auxiliary substrate by setting the area of the bonding substrate to an integral multiple of the area of the second auxiliary substrate. Therefore, a wasteful portion of the bonded substrate does not occur and the production efficiency can be further improved.

  As described above, the method of manufacturing a semiconductor device according to the present invention includes the step of positioning and temporarily fixing one or more semiconductor circuit members on the first auxiliary substrate, and the semiconductor temporarily fixed on the first auxiliary substrate. The method includes a step of transfer fixing the circuit member to the second auxiliary substrate, and a step of collectively bonding the semiconductor circuit member transfer-fixed to the second auxiliary substrate to a set position of the bonding substrate.

  Further, as described above, in the method of manufacturing a semiconductor device according to the present invention, in the method of manufacturing a semiconductor device described above, in the step of positioning the one or more semiconductor circuit members on the first auxiliary substrate, the first auxiliary is performed. When the semiconductor circuit member placed on the substrate is moved to the positioning portion parallel to the surface of the first auxiliary substrate, the first auxiliary substrate is tilted and / or vibrated by the first auxiliary of the semiconductor circuit member. It includes a moving operation on the surface of the substrate.

  Further, as described above, the semiconductor device of the present invention includes the semiconductor circuit member and a bonding substrate for bonding the semiconductor circuit member, and is formed before the semiconductor circuit member is bonded to the bonding substrate. The semiconductor circuit member is positioned and bonded to the bonding substrate by an abutting member formed on the same side surface on which at least a part of the semiconductor structure of the semiconductor circuit member is disposed.

  Further, as described above, the semiconductor circuit substrate of the present invention includes a plurality of semiconductor devices in which at least a part of a semiconductor structure that operates in conjunction with the circuit on the bonding substrate is formed in advance before bonding to the bonding substrate. The contact member used for positioning when bonded to the bonding substrate is formed on the same side surface where at least a part of the semiconductor structure formed before bonding is arranged.

  Therefore, in the present invention, the plurality of semiconductor circuit members are collectively bonded to the second auxiliary substrate, and in this state, the semiconductor circuit members are collectively activated and bonded together to the bonding substrate. As a result, the semiconductor circuit members can be collectively mounted on the bonding substrate before dividing, and the tact time can be greatly shortened.

  In addition, since a plurality of semiconductor circuit boards are arranged on the first auxiliary board provided with the positioning part, and the semiconductor circuit board can be slid, it can be collectively positioned using the catch with the positioning part. Time can be greatly shortened.

  In addition, since the semiconductor circuit board is placed on the first auxiliary board having the positioning portion on the surface and then positioned, and temporarily fixed at the positioned position, the semiconductor circuit board is placed on the first auxiliary board. Sometimes positioning accuracy is not required.

  Furthermore, when a contact member, which is a positioning structure made of a photosensitive resin, is formed on the surface of a semiconductor circuit member, there is no need to read the surface pattern from the back surface as in the prior art, and contact only by photolithography. Since the member can be formed with high accuracy, an etching process is not required, and a highly accurate positioning structure with little variation can be formed. Similarly, when the positioning portion on the first auxiliary substrate is also formed of a photosensitive resin, the positioning portion can be formed with high precision only by photolithography, and the high-precision patterns formed by photolithography can be caught between each other. By positioning using the semiconductor circuit member, the semiconductor circuit member can be bonded to the bonding substrate with higher accuracy (within ± 1 μm) than in the prior art.

  In addition, when bonding the semiconductor circuit member to the bonding substrate, the self-adhesive force generated by activating the surface of the semiconductor circuit member with SC1 solution or the like is used without using an adhesive such as ACF or thermoplastic resin. Therefore, it is not necessary to apply a strong pressure at the time of bonding, so that cracks and chipping (chips) of the semiconductor circuit member can be prevented and the yield can be improved. In addition, since no adhesive is used, there is no concern about the seepage of impurities, and after bonding, the thin film transistor can be flown to a manufacturing process of a thin film transistor that requires heat treatment at 300 ° C. or higher. A semiconductor device in which a single crystal Si semiconductor is mixedly mounted can be manufactured.

  As a result, non-single-crystal silicon semiconductor and single-crystal silicon semiconductor can be mixed on the bonding substrate, which has a higher throughput than the display panel manufacturing method based on the COG technology, and the bonding process is realized by the conventional technology. Of a semiconductor device that can be manufactured with high accuracy within ± 1 μm, which is difficult to connect, and can be connected to a large number of thin wirings from a bonded semiconductor substrate to efficiently and precisely manufacture a display semiconductor with high accuracy and high functionality. The manufacturing method, the semiconductor device, and the semiconductor circuit board can be provided.

  An embodiment of the present invention will be described with reference to FIGS. 1 to 24 as follows. In the semiconductor device manufacturing method of the present embodiment, as shown in FIG. 2, a polycrystalline silicon device 70 (described later) included in a plurality of panels is formed on a mother glass 41 made of a single large glass substrate. One or more semiconductor circuit members 1 are bonded to the bonding substrate 40a, and finally, each panel 40b is divided. In the present embodiment, the bonded substrate 40a is called a bonded substrate even after the semiconductor circuit member 1 is bonded to the bonded substrate 40a.

  Therefore, in the drawings to be referred to in the following description of each process, the semiconductor circuit member 1, the first auxiliary substrate 30, the second auxiliary substrate 50, the bonding substrate 40a, etc. are described as single or partial. Although there are many products, in actuality, a plurality of products are manufactured as a unit in order to produce the single bonded substrate 40a.

  As shown in FIGS. 1A and 1B, the method of manufacturing a semiconductor device according to the present embodiment includes a step of positioning and temporarily fixing one or more semiconductor circuit members 1 on a first auxiliary substrate 30; As shown in FIGS. 1 (c) and (d), a step of transfer-fixing the semiconductor circuit member 1 temporarily fixed on the first auxiliary substrate 30 to the second auxiliary substrate 50, and FIGS. 20 (a) and 20 (b). As shown, the semiconductor circuit member 1 transfer-fixed to the second auxiliary substrate 50 is collectively bonded to the set position of the bonding substrate 40a.

  The semiconductor circuit member 1 includes a plurality of semiconductor structures made of single crystal Si. A polycrystalline silicon device 70 is formed on the bonding substrate 40a.

  In addition, as an expression representing a plurality of semiconductor circuit members 1, “1 or more” is expressed in the claims, but when the semiconductor circuit member 1 is a chip, it is “one or more”. In the case of a chip, it is “one or more”. In the present embodiment, since the semiconductor circuit member 1 is a chip, “one or more” is synonymous with “one or more”.

  Hereinafter, each step will be described in detail. In the present embodiment, first, a manufacturing process of the first auxiliary substrate 30 and a manufacturing process of the semiconductor circuit substrate 10 in which a contact member 19 described later is formed on the semiconductor circuit member 1 will be described. A positioning step of the semiconductor circuit substrate 10 on the auxiliary substrate 30, a transfer step of the semiconductor circuit substrate 10 to the second auxiliary substrate 50, a manufacturing step of the bonding substrate 40 a, bonding activation of the semiconductor circuit member 1 and the bonding substrate 40 a, The bonding, peeling process, and single crystal Si and polycrystalline Si mixed TFT process will be described in order.

[Production of first auxiliary substrate]
As shown in FIG. 3C, the first auxiliary substrate 30 for positioning the semiconductor circuit substrate 10 having the contact member 19 described later on the semiconductor circuit member 1 in a lump is provided on the surface of the substrate 31 as a stopper. The positioning part 33 which has the function as is provided. The positioning portion 33 is manufactured on the surface of the substrate 31 by a photolithography technique using a resin. Further, a vacuum suction hole 35 is formed in the first auxiliary substrate 30.

  When the first auxiliary substrate 30 is manufactured, a photosensitive resin 32 is applied or laminated on a flat substrate 31 as shown in FIG. As the substrate 31, a silicon wafer or a glass substrate is used.

  Next, as shown in FIG. 3B, the semiconductor circuit substrate 10 can be positioned at a location on the first auxiliary substrate 30 that has a 1: 1 correspondence with the location to be bonded to the bonding substrate 40a. The photosensitive resin 32 is exposed and developed by photolithography to form positioning portions 33 and alignment marks 34 and 34 as markers. The positioning unit 33 is a pattern (photolithographic accuracy and processing) that is aligned with high accuracy (photolithography accuracy: about ± 0.26 μm) and processed (processing accuracy: about ± 0.3 μm) by photolithography. (Square sum of accuracy: about ± 0.4 μm) is formed, so that highly accurate positioning can finally be realized collectively. As the photosensitive resin 32, for example, a photoresist, a dry film resist, or the like is used. As the height of the positioning portion 33, it is sufficient if there is a level difference to the extent that the semiconductor circuit board 10 is caught. Here, a step of about 1 to 50 μm is formed.

  Here, a plane pattern suitable for the positioning portion 33 on the first auxiliary substrate 30 will be described. FIG. 11 is a side view of a state in which the semiconductor circuit member 1 having the contact member 19 formed on the surface is placed on the first auxiliary substrate 30 having the positioning portion 33 with the surface facing down. 4 (a) to 4 (d) are views from above. The contact member 19 of the semiconductor circuit member 1 will be described in detail later with reference to FIGS.

  As a pattern layout of the positioning portion 33 in the first auxiliary substrate 30, as shown in FIG. 4A, for example, two sides of the longitudinal direction and the short direction of the contact member 19 provided in the semiconductor circuit member 1 are used. However, an L-shaped pattern is desirable so that it can be positioned by being caught with the positioning portion 33 of the first auxiliary substrate 30. Alternatively, as shown in FIG. 4B, the corner of the contact member 19 provided in the semiconductor circuit member 1 is prevented from being caught by the positioning portion 33 in the middle of sliding and being unable to be positioned well. In addition, a pattern in which an L-shaped corner is dropped is desirable so as to prevent a corner portion that is structurally weak from coming into contact with the positioning portion 33 and being damaged or generating dust.

  In addition to this, for example, as shown in FIG. 4C, in order to prevent the semiconductor circuit board 10 from rotating or bending when it slides due to vibration, in the direction in which it is desired to slide. A pattern 38 such as a guide rail may be arranged. The pattern layout of the contact member 19 on the semiconductor circuit board 10 side at that time is also shown. Further, as shown in FIG. 4D, it is desirable that the contact area between the positioning portion 33 and the contact member 19 is small so that the positioning accuracy of the semiconductor circuit board 10 is not deteriorated by the dust 39.

  Next, as shown in FIG. 3C, a vacuum suction hole 35 for sucking the semiconductor circuit substrate 10 is opened on the first auxiliary substrate 30 by laser processing or mechanical grinding. When a silicon wafer is used as the substrate 31, a method of opening the vacuum suction hole 35 with a YAG laser or the like is suitable. When a glass substrate is used as the substrate 31, the vacuum suction hole 35 is opened by mechanical grinding or the like. The method is suitable. It is desirable to make the holes from the surface side so that burrs are not generated on the surface.

  In the above description, when the positioning portion 33 is formed on the first auxiliary substrate 30, the positioning portion 33 is formed by applying the photosensitive resin 32 to the substrate 31. As shown in FIG. 5, it is also possible to form a recess directly on the substrate 31 and use the recess edge 33a as a positioning portion. For example, a steep recess (positioning portion) is formed by performing anisotropic dry etching in a state where a resist is applied to a single crystal silicon (Si) substrate having a TEOS film of about 1 μm deposited and patterned by photolithography. Can be formed. As another method, a resist may be applied to a single crystal silicon (Si) substrate and patterned by photolithography, and then immersed in 1% potassium hydroxide (KOH) heated to about 100 ° C. Since potassium hydroxide has different etching rates with respect to the (111) crystal plane and the (100) crystal plane of single crystal silicon, a concave portion having a certain angle (54.7 °) can be easily formed as a positioning portion. It can be formed with high accuracy. Thus, by making the positioning portion 33 of the first auxiliary substrate 30 with high accuracy, it is possible to finally achieve high-accuracy positioning collectively.

  Finally, as shown in FIG. 3D, the first auxiliary substrate 30 is combined with a surface plate 37 having a vacuum suction hole 37a.

[Production of semiconductor circuit board]
Next, a manufacturing method of the semiconductor circuit substrate 10 in which the contact member 19 is formed on the semiconductor circuit member 1 to be bonded will be described.

  First, as shown in FIG. 6, the semiconductor circuit board 10 just cut out in a chip shape and placed on the first auxiliary substrate 30 is obtained by forming the contact member 19 on the semiconductor circuit member 1 made of single crystal Si. It has become.

  In the semiconductor circuit member 1, a gate oxide film 4 is formed on a single crystal silicon (Si) substrate 2 (hereinafter referred to as “single crystal Si substrate”) 2 having a source / drain portion impurity implanted portion 3 formed on the surface thereof. A gate electrode 5 is formed thereon, and an interlayer insulating film 6 is further formed thereon to cover the gate electrode 5 and the like. Further, a hydrogen ion implanted layer 7 is formed at a predetermined depth of the source / drain impurity implanted portion 3 in the single crystal Si substrate 2. The above process is performed by, for example, a microfabrication process of about 0.5 μm. The semiconductor circuit substrate 10 has a size of about 10 mm × 10 mm, for example.

  A method for manufacturing the semiconductor circuit substrate 10 having the above configuration will be described.

  As shown in FIG. 7, from the state of the single crystal silicon wafer 2a having a diameter of about 6 inches (about 15 cm) or 8 inches (about 20 cm), if necessary, LOCOS (Local Oxidation of Silicon: selective oxidation method)) Isolation is performed by an oxidation isolation process or, in some cases, a shallow trench isolation process, and as shown in FIG. 6, thermal oxidation of the gate oxide film 4, gate electrode 5 And patterning, impurity implantation into the source / drain impurity implantation part 3, impurity activation, formation of the interlayer insulation film 6, planarization of the interlayer insulation film 6 by CMP (Chemical Mechanical Polishing), A process of hydrogen ion implantation into the hydrogen ion implanted layer 7 is performed. At the time of hydrogen ion implantation, a hydrogen element and another element (for example, a He element) may be co-implanted.

  In the above process, after the interlayer insulating film 6 is formed, contact hole opening (not shown), source / drain metal film formation, patterning thereof, passivation film formation, planarization by CMP, and the hydrogen ion implantation layer are performed. The process may be advanced, such as hydrogen ion implantation into 7.

  By proceeding with the above steps, as shown in FIG. 8, a single crystal silicon wafer 10a in which the semiconductor circuit member 1 made of single crystal Si is formed in each partitioned region is completed.

  Next, predetermined patterning is performed on the surface of the single crystal silicon wafer 10a, and the contact members 19 are collectively formed. As a method for forming the contact member 19, for example, a method using a photolithography method will be described.

  First, as shown in FIG. 6, a protective film 8 is applied to the surface of the single crystal silicon wafer 10a, and then a photosensitive resin is applied or laminated. As the protective film 8, a non-photosensitive resin is used. For example, a photoresist or a dry film resist is used as the photosensitive resin.

  The photosensitive resin is exposed and developed by photolithography with reference to the position of the semiconductor circuit device formed on the front side of the single crystal silicon wafer 10a so that the semiconductor circuit substrate 10 after the division can be positioned with high accuracy, A contact member 19 is formed. In the present embodiment, since the contact member 19 is formed on the front side of the single crystal silicon wafer 10a, the contact member 19 is formed with higher accuracy than when the contact member is formed on the back side as in the conventional example. can do. This is because the single crystal silicon wafer 10a is opaque to visible light, and the normal visible light microscope cannot recognize the pattern boundary on the front side of each single crystal Si from the back side. Further, even when observed from the back side with an infrared microscope that is transparent to the single crystal silicon wafer 10a, the roughness on the back side of the single crystal silicon wafer 10a hinders image observation. This is because it is difficult to recognize this with high accuracy.

  As the height of the contact member 19, it is sufficient that there is a level difference enough to catch the semiconductor circuit board 10, but it is set higher than the height of the positioning portion 33 formed on the first auxiliary substrate 30. Here, a step of about 1 to 50 μm is formed.

  Next, as shown in FIGS. 9A and 9B, the single-crystal silicon wafer 10a having the contact member 19 formed on the surface thereof is converted into a chip-like semiconductor circuit by a normal blade dicing apparatus or a laser dicing method. The substrate 10 is divided. In general, the accuracy of external processing of a chip by a blade dancing device is about ± 10 μm, and the accuracy is not good. In addition, laser dicing using a YAG laser or the like is likely to cause chipping, and the processing accuracy is not good. However, in the present embodiment, the photosensitive resin applied or laminated on the surface of the semiconductor circuit substrate 10 is photolithography so that the position of the semiconductor circuit device on the surface of the semiconductor circuit member 1 is high accuracy. Positioned contact member 19 (photolithographic accuracy: about ± 0.26 μm) and processed (processing accuracy: about ± 0.3 μm) (square sum of photolithography accuracy and processing accuracy: about ± 0.4 μm) Therefore, even if the outline processing accuracy of the semiconductor circuit member 1 at the time of division is poor, the positioning of the semiconductor circuit member 1 is not affected at all.

  Here, 1. 1. In the case of COG technology (conventional technology: COG) 2. When a protrusion is formed on the back surface of the semiconductor circuit member (prior art: Patent Document 1); Table 3 summarizes the total accuracy including the final bonding for the three cases where the contact member is formed of photosensitive resin on the surface of the semiconductor circuit member (this embodiment). deep.

  As in the present embodiment, the contact member 19 and the positioning portion 33 made of a photosensitive resin are formed on the surface of the semiconductor circuit member 1 and the surface of the first auxiliary substrate 30, respectively. By positioning using the pinching of accurate patterns, there is no need to worry about the accuracy of dicing with poor accuracy as in the COG technique. Furthermore, unlike the prior art described in Patent Document 1, it is not necessary to read the pattern on the front surface from the back surface in order to form protrusions on the back surface, and the contact member 19 can be formed with high accuracy only by photolithography. Therefore, the etching process is not necessary, and the contact member 19 and the positioning portion 33 with high accuracy can be formed with less processing variation. Further, since the pressure bonding using an adhesive such as ACF is not performed as in the prior art, the accuracy during the bonding is also improved. Due to the above factors, when the total accuracy including bonding is compared, the semiconductor circuit member 1 can be bonded to the bonding substrate 40a with a high accuracy within ± 1 μm, which is difficult to achieve with the prior art.

[Positioning of the semiconductor circuit board on the first auxiliary board]
Next, a method for collectively positioning the divided semiconductor circuit boards 10 on the first auxiliary board 30 will be described.

  As shown in FIG. 10, the plurality of divided semiconductor circuit boards 10 are turned over and placed in the vicinity of the positioning positions on the first auxiliary board 30. At this stage, as shown in FIG. 11 and FIG. 12A, it may be placed away from the positioning position with a coarse accuracy of about 10 to 300 μm. FIG. 11 is a cross-sectional view of the first auxiliary substrate 30 as viewed from the side, and FIG. 12A is a plan view of the first auxiliary substrate 30 as viewed from above.

  In order to position one or more semiconductor circuit boards 10 on the first auxiliary board 30, the semiconductor circuit board 10 is preferably moved in parallel on the surface of the first auxiliary board 30 held horizontally. What is necessary is just to make the contact member 19 contact | abut to the positioning part 33. FIG. When the contact member 19 is not formed on the semiconductor circuit member 1, the semiconductor circuit member 1 may be directly brought into contact with the positioning portion 33. As a result, the position of contact with the positioning portion 33 corresponds to the exact set position of the bonding substrate 40a, so that the semiconductor circuit member 1 can be transferred and bonded to the bonding substrate 40a in a batch with high accuracy. Desirably, the first auxiliary substrate 30 may be inclined so that the semiconductor circuit substrate 10 is caused to slide on the surface of the first auxiliary substrate 30 by gravity and contact the positioning portion 33. Thereby, all the semiconductor circuit boards 10 mounted on the first auxiliary board 30 can be easily and automatically positioned. Desirably, the semiconductor circuit board 10 is slid on the surface of the first auxiliary board 30 by applying vibration to the first auxiliary board 30 and floating the semiconductor circuit board 10 from the first auxiliary board 30. What is necessary is just to make it contact | abut to the part 33. FIG. Thereby, even if it is a material with a large friction coefficient, it can slide on the 1st auxiliary substrate 30, and can be positioned.

  Most preferably, as shown in FIG. 13, the first auxiliary substrate 30 is inclined at a predetermined angle of, for example, about 10 to 20 degrees, and a vibration unit attached below the first auxiliary board 30 has a frequency of about 100 Hz to 10 kHz. And a vibration having an amplitude equal to or lower than the height of the positioning portion 33 is applied in a direction perpendicular to the first auxiliary substrate 30. When the first auxiliary board 30 is kept horizontal, the vibration direction is the vertical direction. By applying such vibration, the semiconductor circuit board 10 floats in the direction of arrow A. Since the first auxiliary substrate 30 is inclined, the semiconductor circuit substrate 10 slides in the direction of arrow B due to gravity, and eventually comes into contact as shown in FIGS. 1 (a) and 12 (b). The member 19 comes into contact with the edge of the positioning portion 33 and stops. In the case of the combination of the positioning portion 33 and the pattern of the contact member 19 as shown in FIGS. 4A to 4D, the contact member 19 is positioned as in the case of FIG. 12B. Stops in contact with the edge of the portion 33. Further, when the first auxiliary substrate 30 has a concave shape as shown in FIG. 5, the contact member 19 comes into contact with the recess edge 33a and stops.

  As described above, in the present embodiment, the first auxiliary substrate 30 that has been tilted is vibrated and can be automatically moved to a predetermined position for positioning. This positioning may be performed by positioning a plurality of semiconductor circuit boards 10 at a time or one by one.

  Further, when a photosensitive resin is used for the positioning portion 33 and the contact member 19, high-precision patterns formed by photolithography (square sum of photolithography accuracy and processing accuracy: about ± 0.4 μm) ( Since the positioning can be performed by using the catch between the contact member 19 and the positioning portion 33), as shown in Table 1, the conventional technique (accuracy including bonding up to about COG: about ± 10 μm, In the case of technology: the semiconductor circuit member 1 can be bonded to the bonding substrate 40a with higher accuracy than in the case of technology (about ± 1.6 μm) (accuracy including bonding up to ± 1 μm).

  Here, the frequency and amplitude range in which the semiconductor circuit board 10 slides on the first auxiliary substrate 30 and the frequency and amplitude range in which the semiconductor circuit board 10 stops by the positioning unit 33 were examined.

  The results are shown in FIGS. In the figure, a thick solid line represents a boundary line on which the semiconductor circuit board 10 slides when the calculation is made assuming a model in which the first auxiliary board 30 performs simple vibration and the semiconductor circuit board 10 is free-falling. A thick broken line indicates a boundary line where the semiconductor circuit board 10 is separated from the first auxiliary board 30 when the calculation is performed assuming a model in which the first auxiliary board 30 performs simple vibration and the semiconductor circuit board 10 is free-falling. Show. Further, a thin solid line is a boundary line where the semiconductor circuit board 10 is deviated from the first auxiliary board 30 when calculated assuming a model in which the first auxiliary board 30 performs simple vibration and the semiconductor circuit board 10 radiates immediately above the constant speed. Is shown. On the other hand, symbols (□, ○, Δ, ×) are experimental results obtained by examining the behavior of the semiconductor circuit board 10 by conducting vibration experiments. □ does not slip, ○ indicates that it slipped and stopped at the positioning portion 33, Δ indicates that it slipped and stopped or did not stop at the positioning portion 33, and × indicates that it slipped and did not stop at the positioning portion 33.

According to the model calculation, in the region on the right side of the sliding boundary line (thick solid line), there is a time zone in which the semiconductor circuit board 10 floats away from the first auxiliary board 30, and almost between the semiconductor circuit board 10 and the first auxiliary board 30. It is thought that it can slide because there is no friction. This slipping boundary condition is when a vibration having a frequency f and an amplitude Z0 satisfying approximately Z0> g / (2πf) ² is given, and the experimental result is also a state where it does not slip before and after this boundary line (thick solid line) (□) It is in a state where it slides and stops (○), which is almost consistent with the model calculation.

  After the semiconductor circuit board 10 slides, the semiconductor circuit board 10 stops due to the catch between the contact member 19 and the positioning portion 33, but as shown in FIGS. 14 and 15, the semiconductor circuit board 10 slides on the first auxiliary board 30 from the experimental results. The area that stops at the positioning portion 33 is indicated by the shaded portion. It is desirable that the vibration applied to the first auxiliary substrate 30 has a frequency and an amplitude within this shaded area.

On the other hand, when the amplitude becomes large and the contact member 19 of the semiconductor circuit board 10 exceeds the positioning portion 33 of the first auxiliary board 30, the semiconductor circuit board 10 comes off the first auxiliary board 30. . In the experimental results, in the low-frequency region (less than 500 Hz), the boundary line (thick broken line) that comes off is relatively close to the state that does not stop (X) from the state that stops or does not stop (x). This deviating boundary condition is
Z1-Z2> when a vibration having a frequency f and an amplitude Z0 satisfying the height of the positioning portion 33 is applied. Here, Z1 is a position where the semiconductor circuit board 10 reaches by free fall,
Z1 = Z0− (1/2) × g × t ²
It is. Z2 is the position of the substrate due to simple vibration,
Z2 = Z0 × cos (2πft)
It is.

In the high-frequency region (500 Hz or higher), the boundary line (thin solid line) that comes off is relatively close to the state that does not stop (Δ) from the state that stops or does not stop (Δ). This deviating boundary condition is
Z3−Z4> when the vibration having the frequency f and the amplitude Z0 satisfying the height of the positioning portion 33 is applied. Here, Z3 is a height that is reached when the semiconductor circuit board 10 is radiated immediately above the constant velocity and constant velocity by the acceleration of the first auxiliary substrate 30;
Z3 = Z0 × (2πf) × t− (1/2) × g × t ²
It is. Z4 is the position of the substrate due to simple vibration,
Z4 = Z0sin (2πft)
It is.

  When the semiconductor circuit substrate 10 on the first auxiliary substrate 30 slides out and contacts the positioning portion 33 based on the frequency and amplitude ranges that do not deviate from the positioning portion 33, FIG. As shown in FIG. 3, the plurality of semiconductor circuit boards 10 which are evacuated and positioned through the vacuum suction holes 35 are collectively fixed to the first auxiliary substrate 30 by vacuum suction.

[Transfer of the semiconductor circuit board to the second auxiliary board]
Next, a method for moving the semiconductor circuit board 10 positioned and fixed on the first auxiliary board 30 onto the second auxiliary board 50 will be described with reference to FIGS. 1C, 1D, and 17. .

  First, as shown in FIG. 1C, groove-shaped alignment marks 51 and 51 having a depth of about 100 to 300 nm are formed on the second auxiliary substrate 50 by photolithography and etching. Yes.

  An adhesive 52 is applied or laminated on the surface of the second auxiliary substrate 50. As the adhesive 52, a heat peelable resin or a light peelable resin is used. Alternatively, as shown in FIG. 16, the semiconductor circuit substrate 10 may be adsorbed to the second auxiliary substrate 50 by vacuum adsorption without using an adhesive.

  Next, as shown in FIG. 1C, the plurality of semiconductor circuit substrates 10 positioned on the first auxiliary substrate 30 may be collectively transferred to the second auxiliary substrate 50 while maintaining the relative position. The first auxiliary substrate 30 and the first adhesive substrate 52 coated with the adhesive 52 using the alignment marks 51 and 51 of the second auxiliary substrate 50 and the alignment marks 34 and 34 of the first auxiliary substrate 30 so as to be able to do so. 2 Alignment with the auxiliary substrate 50 is performed. Further, the alignment between the first auxiliary substrate 30 and the second auxiliary substrate 50 is not always necessary and can be omitted. If only the relative position of the semiconductor circuit substrate 10 positioned on the first auxiliary substrate 30 is properly transferred to the second auxiliary substrate 50, the semiconductor circuit member 1 in the final bonding step with the bonding substrate 40a is performed. This is because the alignment position of the other semiconductor circuit member 1 is inevitably determined by aligning the alignment marker on the surface side of the substrate and the alignment markers on the bonding substrate 40a. In this case, even if the bonding method is transferred twice, the time-consuming alignment is only required once, so the throughput does not decrease. The size (area) of the second auxiliary substrate 50 is preferably 1 / N (N: integer) of the bonded substrate 40a from the viewpoint of the bonding efficiency. Thereby, since the semiconductor circuit member 1 can be bonded to the bonding substrate 40a in units of the second auxiliary substrate 50, a wasteful portion of the bonding substrate 40a does not occur and the production efficiency can be further improved. .

  Next, after the first auxiliary substrate 30 and the second auxiliary substrate 50 are brought into close contact with each other and the semiconductor circuit substrate 10 on the first auxiliary substrate 30 is adhered to the second auxiliary substrate 50 as shown in FIG. The semiconductor circuit board 10 is collectively transferred to the second auxiliary board 50 by separating the vacuum chuck of the first auxiliary board 30.

Next, as shown in FIG. 17, the second auxiliary substrate 50 is turned over and immersed in an alkaline stripping solution to remove the contact members 19 on the surfaces of the plurality of semiconductor circuit substrates 10 at a time, The protective film on the surface of the plurality of semiconductor circuit substrates 10 is removed in a lump by performing the ashing process and the peeling cleaning process for each second auxiliary substrate 50. Alternatively, when the protective film is formed of a thin metal film or the like, the protective film may be dissolved by immersing in an acid-based etching solution and the contact member may be lifted off and simultaneously removed. This method is advantageous in that the contact member 19 can be removed at the same time, so that the degree of freedom in selecting the material of the contact member 19 is widened and the process flow can be simplified.
In this way, a state is obtained in which the plurality of semiconductor circuit members 1 are transferred to the second auxiliary substrate 50 with the surface thereof protruding.

[Production of bonded substrates]
A method for manufacturing the bonding substrate 40a to which the semiconductor circuit substrate 10 is bonded will be described. As shown in FIG. 18 (d), the bonding substrate 40a is included in a mother glass 41, a silicon dioxide insulating film 42 formed on the mother glass 41, and a plurality of panels formed thereon. It comprises a polycrystalline silicon device 70 and includes a plurality of panels 40b.

  In the present embodiment, the case where the bonding substrate 40a on which a semiconductor device made of polycrystalline silicon is manufactured in advance and the semi-finished semiconductor circuit member 1 described above are bonded together will be described. However, the present invention is not necessarily limited thereto. For example, after the semiconductor circuit member 1 is bonded to a large glass substrate by a method described later, a semiconductor device made of polycrystalline silicon may be manufactured.

  When manufacturing the bonding substrate 40a, as shown in FIG. 18A, first, a TEOS film is deposited on the mother glass 41 by a plasma CVD method to a thickness of about 50 to 200 nm to form a silicon dioxide insulating film 42. To do.

Next, an amorphous silicon film 43 is formed by plasma CVD to a thickness of about 30 to 200 nm, and heat in the amorphous silicon film 43 is removed by heat at about 450 to 600 ° C. for 30 to 60 minutes (annealing). To do. By this heat treatment, the hydrogen content in the amorphous silicon film 43 can be reduced to 1 × 10 ¹⁹ cm ⁻³ or less. It may also serve as solid phase crystal growth.

  Next, as shown in FIG. 18B, the amorphous silicon film 43 is removed by patterning and etching only at the portion where the semiconductor circuit member 1 of the semiconductor circuit substrate 10 is joined. By performing this patterning removal, even if the mother glass 41 is successively irradiated with an excimer laser (λ = 308 nm) to crystallize amorphous silicon, laser light is transmitted through the bonding portion. The temperature of the surface of the glass 41 does not rise to the vicinity of the melting point of amorphous silicon, and thermal damage is not required.

  After the amorphous silicon is polycrystallized by laser irradiation, the polycrystal silicon film 44 is patterned into a transistor shape by photolithography and dry etching.

  Next, as shown in FIG. 18C, a TEOS film is deposited by about 100 nm by a plasma CVD method, and a gate insulating film 45 is formed. Further, a gate electrode material is formed and patterned by photolithography to form the gate electrode 46. As the gate electrode material, for example, a two-layer structure of W / TiTa is used.

  Next, as shown in FIG. 18 (d), after implanting impurities into the source / drain portions of the polycrystalline silicon by ion doping or the like, a TEOS film is deposited by plasma CVD to a thickness of about 100 to 400 nm to form an insulating film. 48 is formed. Furthermore, by forming alignment markers 47 and 47 for alignment with the second auxiliary substrate 50, the bonded substrate 40a is completed.

[Activation, bonding, peeling of semiconductor circuit members and bonding substrates]
As shown in FIGS. 19 (a) and 19 (b), insulation of the semiconductor circuit member 1 bonded onto the second auxiliary substrate 50 produced by the above-described process of [transfer of the semiconductor circuit member to the second auxiliary substrate]. The surface of the film 6 and the surface of the insulating film 48 of the bonded substrate 40a manufactured in the above-mentioned [Manufacturing of bonded substrate] are mixed liquid (SC1 solution) of ammonia water, hydrogen peroxide water, and pure water, respectively. ). By this treatment, OH groups adhere to the surfaces of the insulating film 6 and the insulating film 48 and become active for bonding. For example, instead of surface activation by SC1 cleaning, the surface may be activated by exposure to oxygen plasma.

  Next, as shown in FIG. 20A, the plurality of semiconductor circuit members 1 positioned on the second auxiliary substrate 50 are bonded together to the bonding substrate 40a while maintaining their relative positions. The second auxiliary substrate 50 and the bonding substrate 40a are aligned using the alignment marks 51 and 51 and the alignment marks 47 and 47.

  Next, the semiconductor circuit member 1 on the second auxiliary substrate 50 is brought into contact with the bonding substrate 40a and pressed with a slight force. Bonding proceeds by the self-bonding force generated as a result of the surface treatment, and the semiconductor circuit member 1 is bonded (bonded) to the bonding substrate 40a.

  Next, as shown in FIG. 20B, UV irradiation is performed on the adhesive 52 of the photoreleasable resin from the back surface of the second auxiliary substrate 50, thereby bonding the second auxiliary substrate 50 and the semiconductor circuit member 1. The force is weakened and the semiconductor circuit member 1 is released from the second auxiliary substrate 50. In the case where a thermoplastic resin is used for the adhesive 52, heating at about 100 to 200 ° C. is performed and similarly released from the second auxiliary substrate 50. Further, when the semiconductor circuit member is bonded by vacuum suction as shown in FIG. 16, the vacuum is turned off and released from the second auxiliary substrate 50 in the same manner.

  Next, as shown in FIG. 21, a TEOS film is deposited by a plasma CVD method on the bonding substrate 40 a to which the semiconductor circuit member 1 is bonded, and an interlayer insulating film 61 for reducing a step is formed.

  Next, as shown in FIG. 22, the single-crystal Si substrate 2 is peeled from the hydrogen ion implanted layer 7 of the semiconductor circuit member 1 by performing a heat treatment at about 600 ° C. on the bonding substrate 40 a to which the semiconductor circuit member 1 is bonded. I do. Thereby, the front side portion of the semiconductor circuit member 1 on which the device is formed is transferred to the bonding substrate 40a, while the back side portion of the peeled semiconductor circuit member 1 is excluded as the unnecessary portion 1a. In the present embodiment, even after the semiconductor circuit member 1 is transferred to the bonding substrate 40a, the bonding substrate 40a is referred to as a bonding substrate.

[Monocrystalline Si and Polycrystalline Si Mixed TFT Process]
Finally, a process after the semiconductor circuit member 1 is transferred to the bonding substrate 40a having a polycrystalline Si device will be described.

  As shown in FIG. 23A, the entire surface of the bonding substrate 40a is dry-etched to thin the transferred semiconductor circuit member 1 to about 100 to 200 nm.

  The bonding substrate 40a is subjected to heat treatment at about 600 to 650 ° C. for about 4 hours in order to activate the doped impurities and recover defects of the transferred silicon device.

  Further, as shown in FIG. 23B, the SiNx film is deposited to about 100 to 300 nm and the TEOS film 63 is deposited to about 400 to 1000 nm as the interlayer insulating film 62 by plasma CVD.

  Next, as shown in FIG. 24A, a contact hole 64 in the wiring portion of the single crystal Si device and the polycrystalline Si device is opened by photolithography. Subsequently, the metal film is sputtered and patterned to form the metal wiring 65. As a result, the transferred single crystal Si device 80 composed of the semiconductor circuit member 1 and the polycrystalline Si device 70 on the bonding substrate 40a are electrically connected to complete the hybrid device.

  Thereafter, as shown in FIG. 24B, after bonding substrate 40a and counter substrate 90 are bonded together, a liquid crystal process for injecting liquid crystal 100 is performed between them, and then bonding substrate 40a is divided into a plurality of panels 40b. Thus, for example, a single liquid crystal display panel is provided with a polycrystalline silicon device 70 for switching pixels and a single crystal Si device 80 serving as a driver IC for a scanning signal line driving circuit and a data signal line driving circuit. A semiconductor device is completed.

  In the semiconductor device manufacturing method described above, the plurality of semiconductor circuit members 1 are collectively bonded to the second auxiliary substrate 50, and in this state, the semiconductor circuit members 1 are collectively activated, and the bonded substrate 40a. Thus, the semiconductor circuit members 1 can be collectively mounted on the bonding substrate 40a before being divided, and the tact time can be greatly shortened.

  A plurality of semiconductor circuit boards 10 are arranged on the first auxiliary board 30 provided with the positioning part 33 as a positioning part, and the semiconductor circuit board 10 is slid by applying vibration to the first auxiliary board 30. Since the positioning with the positioning portion 33 can be used for batch positioning, the tact time can be greatly shortened.

  Furthermore, by forming a contact member 19 that is a positioning structure made of a photosensitive resin on the surface of the semiconductor circuit member 1, there is no need to read the surface pattern from the back surface as in the prior art, and only by photolithography. Since the contact member 19 can be formed with high accuracy, a highly accurate positioning structure can be formed with little variation. Further, by similarly forming the positioning portion 33 on the first auxiliary substrate 30 from the photosensitive resin, the positioning portion 33 can be formed with high accuracy only by photolithography. By positioning using a high-accuracy pattern formed by photolithography, the semiconductor circuit member 1 can be bonded to the bonding substrate 40a with higher accuracy (within ± 1 μm) than in the prior art. it can.

  Further, when the semiconductor circuit member 1 is bonded to the bonding substrate 40a, the self-adhesive force generated by activating the surface of the semiconductor circuit member 1 with the SC1 liquid or the like without using an adhesive such as ACF or thermoplastic resin. Therefore, it is not necessary to apply a strong pressure at the time of bonding, so that cracks and chipping (chips) of the semiconductor circuit member 1 can be prevented and the yield can be improved. In addition, since no adhesive is used, there is no concern about the seepage of impurities, and even after bonding, the thin film transistor can be subjected to a heat treatment process that requires a heat treatment of 300 ° C. or higher. A semiconductor device in which a non-single-crystal Si semiconductor is mixed can be manufactured.

  A semiconductor device manufacturing method, a semiconductor device, and a semiconductor circuit substrate according to the present invention include an amorphous semiconductor such as glass as a substrate among silicon semiconductors used when manufacturing integrated circuits and thin film transistors, and transistors manufactured from silicon semiconductors. The present invention can be applied to a display device such as an active matrix display device using a substrate and a transistor material manufactured using a single crystal silicon film and a non-single crystal silicon film as a semiconductor material for forming the transistor.

(A) (b) (c) (d) is sectional drawing which shows one Embodiment of the manufacturing method of the semiconductor device in this invention. One bonded substrate includes a plurality of panels, each panel is formed with a polycrystalline Si device, and immediately after a plurality of semiconductor circuit members made of single crystal Si are bonded to each panel. It is a perspective view which shows a state. (A) shows a manufacturing process of the first auxiliary substrate, and is a cross-sectional view showing a substrate on which a photosensitive resin is applied or laminated, (b) exposing and developing the photosensitive resin, It is sectional drawing which shows the 1st auxiliary | assistant board | substrate which formed the alignment (alignment) mark as a marker, (c) is sectional drawing which shows the 1st auxiliary | assistant board | substrate which further formed the hole for vacuum suction, (d) FIG. 5 is a cross-sectional view showing a first auxiliary substrate combined with a surface plate having holes for vacuum suction. (A) (b) (c) (d) is a top view which shows the positioning part of the various shapes in the said 1st auxiliary | assistant board | substrate. It is sectional drawing which shows the said 1st auxiliary | assistant board | substrate which formed the recessed part as a positioning part. It is sectional drawing which shows the structure of a semiconductor circuit member. It is a perspective view which shows the structure of the single crystal silicon wafer for producing the said semiconductor circuit member. It is a perspective view which shows the structure of the single crystal silicon wafer before attaching a positioning pattern. (A) is a perspective view which shows the single crystal silicon wafer which formed the contact member, (b) is a perspective view which shows the semiconductor circuit board diced to the chip | tip. It is a perspective view which shows the operation | movement which mounts a semiconductor circuit board in a 1st auxiliary | assistant board | substrate. It is sectional drawing which shows the 1st auxiliary | assistant board | substrate which mounted the semiconductor circuit board. (A) is a top view which shows the 1st auxiliary | assistant board | substrate in the state in which the said semiconductor circuit board was mounted, (b) is the state of the state which contact | abutted to the positioning part and was positioned by moving a semiconductor circuit board | substrate. It is a top view which shows a 1st auxiliary substrate. It is sectional drawing which shows the process which moves the semiconductor circuit board mounted in the said 1st auxiliary | assistant board | substrate to the positioning part which is a predetermined | prescribed arrangement | positioning position by micro vibration, and contacts. It is a graph which shows the behavior of the mounted semiconductor circuit board when inclining the said 1st auxiliary board | substrate and giving a vibration. It is a graph which expands and shows a part of FIG. It is sectional drawing which shows the process of carrying out transfer fixation of the semiconductor circuit board temporarily fixed to the said 1st auxiliary substrate to the 2nd auxiliary substrate provided with the suction function. It is sectional drawing which shows the process of removing the contact member of the semiconductor circuit board transfer-fixed to the 2nd auxiliary substrate. (A)-(d) is sectional drawing which shows the process of forming a bonded substrate. (A) is sectional drawing which shows the process of activating the surface of the semiconductor circuit member fixed to the 2nd auxiliary substrate, (b) is sectional drawing which shows the process of activating the surface of a joining board | substrate. . (A) is sectional drawing which shows the process of joining the semiconductor circuit member fixed to the 2nd auxiliary substrate to a joining substrate, (b) is a 2nd auxiliary substrate from the semiconductor circuit member joined to the joining substrate. It is sectional drawing which shows the process to peel. It is sectional drawing which shows the structure of the joining board | substrate carrying a polycrystalline silicon device after joining a semiconductor circuit member. It is sectional drawing which shows the process of peeling a single crystal silicon film by heat processing, after joining the said semiconductor circuit member to the joining board | substrate carrying a polycrystalline silicon TFT. (A) (b) is sectional drawing which shows the process of forming a wiring pattern in the joining board | substrate with which the semiconductor circuit member was mounted in the manufacturing method of the said semiconductor device. FIGS. 24A and 24B are cross-sectional views illustrating a process continued from FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor circuit member 2 Single crystal Si substrate 2a Single crystal Si wafer 8 Protective layer 9 Ion implantation layer 10 Semiconductor circuit substrate 10a Single crystal Si wafer 19 Contact member 30 1st auxiliary substrate 33 Positioning part 34 Positioning mark 35 Vacuum adsorption Hole 40a Bonding substrate 40b Panel 41 Mother glass (large glass substrate)
47 alignment mark 50 second auxiliary substrate 51 alignment mark 70 polycrystalline silicon device 80 single crystal silicon device 90 counter substrate 100 liquid crystal

Claims (29)

Positioning and temporarily fixing one or more semiconductor circuit members on the first auxiliary substrate;
Fixing the semiconductor circuit member temporarily fixed on the first auxiliary substrate to the second auxiliary substrate;
And a step of collectively bonding the semiconductor circuit member transfer-fixed to the second auxiliary substrate to a set position of the bonding substrate.   2. The semiconductor device according to claim 1, wherein at least a part of the semiconductor structure is formed on the semiconductor circuit member before the step of temporarily fixing the semiconductor circuit member to the first auxiliary substrate. Production method. While the first auxiliary substrate has a positioning portion for each semiconductor circuit member,
3. The method of manufacturing a semiconductor device according to claim 1, wherein a contact member corresponding to the positioning portion of the first auxiliary substrate is formed on the semiconductor circuit member. While the first auxiliary substrate has a positioning portion for each semiconductor circuit member,
The semiconductor circuit member includes at least a part of the semiconductor structure and a contact member corresponding to the positioning portion of the first auxiliary substrate before the step of temporarily fixing the semiconductor circuit member to the first auxiliary substrate. 3. The method of manufacturing a semiconductor device according to claim 1, wherein when the contact member is formed, the contact member is formed on the same side as a side on which a part of the semiconductor structure is formed. Method.   5. The method of manufacturing a semiconductor device according to claim 4, wherein a photosensitive resin is used as the contact member. The contact member,
6. A planar shape that restricts movement of the semiconductor circuit member in two directions when the contact member contacts a positioning portion on the first auxiliary substrate. Semiconductor device manufacturing method. The contact member,
The semiconductor circuit member has a planar shape such that the semiconductor circuit member moves in a predetermined direction along a guide rail portion formed on the first auxiliary substrate, and the corresponding contact member comes into contact with the positioning portion on the first auxiliary substrate. 6. The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor circuit member is formed in a planar shape that sometimes restricts movement of the semiconductor circuit member in two directions.   6. The method of manufacturing a semiconductor device according to claim 3, wherein a protective layer made of resin or metal is formed between a semiconductor structure portion of the semiconductor circuit member and the contact member.   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor circuit member is made of a single crystal silicon substrate. The semiconductor circuit member comprises a single crystal silicon substrate,
Before the step of temporarily fixing the semiconductor circuit member to the first auxiliary substrate, hydrogen ions and / or a rare gas are implanted into a predetermined depth of the single crystal silicon substrate to thereby form a hydrogen ion implanted layer and / or a rare gas. Forming an injection layer;
And after the single crystal silicon substrate is bonded to the bonding substrate, a part of the single crystal silicon substrate is peeled off by the hydrogen ion implantation layer and / or the rare gas implantation layer by heat treatment. The manufacturing method of the semiconductor device of any one of Claims 1-8.   Each positioning part of the said 1st auxiliary | assistant board | substrate is formed in the planar shape which controls the motion of the two directions of the said semiconductor circuit member, The any one of Claims 3-10 characterized by the above-mentioned. A method for manufacturing a semiconductor device.   Each positioning portion of the first auxiliary substrate has a planar shape that restricts the movement of the semiconductor circuit member in two directions, and a gap is formed at a corner where two sides intersect. The method for manufacturing a semiconductor device according to claim 3, wherein: In the first auxiliary substrate,
A positioning portion for each semiconductor circuit member;
13. The semiconductor device according to claim 3, wherein a guide rail portion for moving each of the semiconductor circuit members toward the positioning portion is formed. Production method.   The method for manufacturing a semiconductor device according to claim 3, wherein the positioning portion of the first auxiliary substrate is formed in an uneven shape by a photosensitive resin.   The method for manufacturing a semiconductor device according to claim 3, wherein the positioning portion of the first auxiliary substrate is formed as a recess by etching the surface of the first auxiliary substrate.   The first auxiliary substrate is made of a single crystal silicon substrate, and the positioning portion of the first auxiliary substrate is formed as a recess by anisotropic wet etching the surface of the first auxiliary substrate with potassium hydroxide. A method for manufacturing a semiconductor device according to any one of claims 3 to 13. In the step of transfer-fixing the semiconductor circuit member temporarily fixed on the first auxiliary substrate to the second auxiliary substrate,
The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor circuit member is bonded to the second auxiliary substrate with an adhesive.   18. The method of manufacturing a semiconductor device according to claim 17, wherein the adhesive for temporarily fixing the semiconductor circuit member is removed by heating.   18. The method of manufacturing a semiconductor device according to claim 17, wherein the adhesive for temporarily fixing the semiconductor circuit member is peeled off by ultraviolet irradiation. In the step of bonding the semiconductor circuit member to the bonding substrate,
20. The method of manufacturing a semiconductor device according to claim 1, wherein both of the bonding surfaces of the semiconductor circuit member and the bonding substrate are activated and then bonded. 21. The first auxiliary substrate has a positioning portion corresponding to each of the semiconductor circuit members,
In the step of temporarily fixing the one or more semiconductor circuit members on the first auxiliary substrate,
21. The method of manufacturing a semiconductor device according to claim 1, wherein the one or more semiconductor circuit members are positioned on the positioning portion by moving the surface of the first auxiliary substrate.   The movement of the one or more semiconductor circuit members on the surface of the first auxiliary substrate includes a movement operation of the semiconductor circuit member on the surface of the first auxiliary substrate due to an inclination of the first auxiliary substrate. The method of manufacturing a semiconductor device according to claim 21.   The movement of the one or more semiconductor circuit members on the surface of the first auxiliary substrate moves the semiconductor circuit member placed on the first auxiliary substrate to a positioning portion in parallel with the surface of the first auxiliary substrate. 23. The method of manufacturing a semiconductor device according to claim 21, further comprising a movement operation of the semiconductor circuit member on the surface of the first auxiliary substrate by vibration of the first auxiliary substrate. When the first auxiliary substrate is vibrated, when the vibration frequency is f and the amplitude is Z0,
Z0> g / (2πf) ²
24. The method of manufacturing a semiconductor device according to claim 23, wherein the semiconductor device is vibrated so as to satisfy.   The method for manufacturing a semiconductor device according to claim 1, wherein an area of the bonding substrate is an integral multiple of the area of the second auxiliary substrate. The semiconductor circuit member, and a bonding substrate for bonding the semiconductor circuit member,
The semiconductor circuit member is formed by an abutting member formed on the same side surface on which at least a part of the semiconductor structure of the semiconductor circuit member formed before the semiconductor circuit member is bonded to the bonding substrate. A semiconductor device characterized by being positioned and bonded to a bonding substrate. A plurality of semiconductor circuit members, and a bonding substrate for bonding the plurality of semiconductor circuit members,
The plurality of semiconductor circuit members and the bonding substrate are each formed with a semiconductor structure that operates in association with each other.
Each contact member formed on the same side surface on which at least a part of the semiconductor structure of each of the semiconductor circuit members formed before the bonding of the plurality of semiconductor circuit members to the bonding substrate is disposed, respectively, A semiconductor device comprising a plurality of semiconductor circuit members positioned and bonded to the bonding substrate. A plurality of semiconductor circuit members, and a bonding substrate for bonding the plurality of semiconductor circuit members,
The plurality of semiconductor circuit members and the bonding substrate are each formed with a semiconductor structure that operates in association with each other.
The semiconductor device, wherein the plurality of semiconductor circuit members are formed with a positional accuracy within ± 1 μm with respect to the bonding substrate. A plurality of semiconductor devices in which at least a part of a semiconductor structure operating in conjunction with a circuit on the bonding substrate is formed in advance before bonding with the bonding substrate;
A semiconductor circuit characterized in that a contact member used for positioning when bonded to the bonding substrate is formed on the same side surface on which at least a part of the semiconductor structure formed before bonding is disposed. substrate.

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