JP2006050472A - Mixer circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mixer circuit of small-sized and simple configuration wherein frequency conversion efficiency is high. <P>SOLUTION: In the mixer circuit, a distribution circuit 14 for converting an LO signal into second and third signals of a phase difference π, a semiconductor element unit 18 including a first HEMT 18a and a second HEMT 18b to which the second and third signals are inputted, and an IF signal terminal 24 connected with an RF signal terminal 20 via a low-pass filter circuit 22 are connected to a connection unit 18c that mutually connects output terminals of the first HEMT 18a and the second HEMT 18b. In a front end portion of at least one of input terminals of the first HEMT 18a and the second HEMT 18b, a first phase control circuit 16 is arranged for compensating for a deviation between a phase difference between the second and third signals, and the set phase difference π. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a mixer circuit, and more particularly, to a mixer circuit used in electronic devices and microwave and millimeter wave communication devices for wireless communication.

In recent years, communication devices used in the microwave band and the millimeter wave band are increasingly required to have smaller and higher output devices, and accordingly, mixer circuits having high frequency conversion efficiency have been required.
An example of the mixer circuit is a balanced mixer circuit. The balanced mixer circuit is a two-diode diode in which a local oscillation signal (hereinafter referred to as LO signal) is distributed to two signals having a phase difference of π (180 °) via a reverse-phase distribution circuit, for example, a Merchant balun. And the other terminal of the two diodes are connected to each other, and a high-frequency signal (hereinafter referred to as an RF signal) is input to the connection point, and the connection point between the two diodes is passed through a low-pass filter. An intermediate frequency signal (hereinafter referred to as IF signal) is taken out.

As a known mixer circuit, a merchant balun to be used is composed of two coupled transmission lines having a wavelength of approximately 1/8 of the design frequency, and a 1/4 wavelength line is connected to the balanced terminal, so that it can be viewed from the mixer diode side. An example in which the transmission line length is increased, the impedance is lowered, and the matching is improved is disclosed. In addition, an example is disclosed in which a combined transmission line of approximately 1/8 wavelength of a merchant balun is composed of two normal 1/4 wavelength short-circuit transmission lines. (For example, refer to Patent Document 1, paragraph numbers [0015], [0023] to [0025], FIGS. 5 and 6).
In addition, as a known circuit for balun compensation, an amplitude / phase compensation circuit such as a transmission line, an inductive lumped element and a capacitive lumped element is added in series with one of the balun ports on the balanced side of the balun; An example in which this is used in an amplifier circuit is disclosed (see, for example, Patent Document 2, paragraph numbers [0005] and [0014], FIGS. 1 to 3).

Further, as a known microwave balun circuit, an example in which an outer conductor line for phase deviation compensation is provided on the cable outer conductor in order to correct the phase deviation at the time of distribution phase conversion of the balun circuit in the push-pull type FET amplifier is disclosed. (For example, refer to Patent Document 3, paragraph numbers [0005] and [0015], FIG. 2).
Furthermore, as a known technique, an example of a mixer circuit using a transistor as a mixer diode is disclosed (for example, FIG. 1 of Non-Patent Document 1 and FIG. 2 of Non-Patent Document 2).

JP-A-8-265048 JP-A-7-131277 JP-A-11-330809 H. Zirath et al., An ultra wideband millimeterwave balanced resistive mixer, based on a double deltadoped 140nm AlGaAs-InGaAs-GaAs HEMT-MMIC process APMC 2002 Digest WE0F-32 A R Barnes et al., A comparison of W-band monolithic resistive mixer architectures IMS 2002 Digest TH4A-5

However, a merchant balun used in a balanced mixer circuit requires a coupled line having a length of a half wavelength (hereinafter referred to as λ / 2), where the wavelength of the LO signal is λ. Become. For this reason, the coupling line becomes long depending on the center frequency of the LO signal, and the arrangement of the merchant balun on the circuit board is restricted due to the limitation of the chip size. In some cases, it is necessary to configure the merchant balun using a complicatedly bent coupled line instead of a linear coupled line.
For example, in a GaAs substrate often used for a microwave circuit, the length of the coupling line of the merchant balun for the 38 GHz band LO signal is 1.2 mm (λ / 2), but in the 19 GHz band LO signal, The length of the coupled line of the balun is 2.4 mm, and the coupled line must be bent and disposed due to chip size limitations.

In particular, in the millimeter wave band, if the arrangement of the coupling line of the merchant balun or a complicated bent coupling line is configured, the phase difference between the two signals output from the merchant balun may not be 180 ° correctly and the phase difference may occur. There is a case where the deviation occurs and the amplitudes do not become equal. When two signals having opposite phases deviate from the condition of equal amplitude and phase difference π, there is a problem that the frequency conversion efficiency is lowered.
Further, as the chip size is reduced, the degree of freedom in designing and manufacturing a distribution circuit that generates such a reverse phase signal is reduced, and as a result, the yield of the chip is lowered.
The present invention has been made to solve the above problems, and a first object of the invention is to provide a small and simple mixer circuit having high frequency conversion efficiency.

  The mixer circuit according to the present invention includes a first signal terminal to which a first signal is input, an input end connected to the first signal terminal, and first and second output ends. A distribution circuit that converts the first signal into second and third signals having a set phase difference π and outputs the second and third signals from the first and second output ends, and the distribution circuit The first and second output end portions of the first and second output terminals are individually connected to the input terminals, and the output terminals are connected to each other. The semiconductor element portion includes first and second semiconductor elements, and the first of the semiconductor element portions. The phase difference between the second signal and the third signal is set in at least one of the front part of the input terminal of the semiconductor element and the front part of the input terminal of the second semiconductor element. The first phase adjustment circuit that compensates for the deviation from the phase difference π is connected to the output terminals of the first and second semiconductor elements. A second signal terminal connected to the connecting portion and a third signal terminal connected to the connecting portion via a predetermined band-pass filter circuit are provided.

  In the mixer circuit according to the present invention, since the first phase adjustment circuit is provided, the phase difference and the phase difference between the second signal and the third signal that may occur due to the configuration of the distribution circuit. The deviation from π can be made close to zero, and the amplitude difference between the second signal and the third signal can be made close to zero, so that the frequency conversion efficiency can be increased.

In the following description, a down converter that extracts a difference signal between an LO signal and an RF signal will be described as an example.
Embodiment 1 FIG.
FIG. 1 is a circuit diagram of a mixer circuit according to an embodiment of the present invention.
FIG. 1 shows a balanced mixer circuit 10 as a mixer circuit. This balanced mixer circuit 10 is used, for example, in a 76 GHz band on-vehicle radar receiving mixer circuit used for detecting an obstacle, a 60 GHz band wireless communication mixer circuit, or the like.

The balanced mixer circuit 10 includes an LO signal terminal 12 to which an LO signal is input, a distribution circuit 14 that converts the LO signal input from the LO signal terminal 12 into two opposite-phase signals, and an output from the distribution circuit 14. A first phase adjustment circuit 16 that compensates for the deviation Δθ deviated from the set phase difference π to approach zero, and the distribution circuit 14 via the first phase adjustment circuit 16. Is connected to the semiconductor element portion 18 via the low-pass filter circuit 22 and the RF signal terminal 20 to which the RF signal applied to the semiconductor element portion 18 is input. An IF signal terminal 24 is provided.
Further, in the first embodiment, since a transistor is used as a semiconductor element of the semiconductor element section 18, a gate bias terminal 26 for applying the gate bias voltage Vgg is provided, and this constitutes a band filter circuit 28. To the control terminal side of the transistor.

FIG. 2 is a circuit diagram showing an example of a distribution circuit of the mixer circuit according to the embodiment of the present invention.
The balun 141 as the distribution circuit 14 has a λ / 2 coupled line 14a as a first line having an electrical length of approximately λLO / 2 when the wavelength of the LO signal is λLO, and the λ / 2 coupled line 14a. A first λ / 4 coupled line 14b as a second line having an electrical length of approximately λLO / 4, an electrical length of approximately λLO / 4 in parallel with the λ / 2 coupled line 14a, and a λ / 2 coupled line 14a The first λ / 4 coupled line 14b and the second λ / 4 coupled line 14c as a third line disposed symmetrically with respect to the central portion of the first λ / 4 coupled line 14b.
One end of the λ / 2 coupling line 14 a is connected to the input end 14 d connected to the LO signal terminal 12.
The first λ / 4 coupled line 14b is grounded at one end adjacent to one end of the λ / 2 coupled line 14a, and the other end adjacent to the center of the λ / 2 coupled line 14a is connected to the first output end 14e. It is connected.
The second λ / 4 coupled line 14c is grounded at one end adjacent to the other end of the λ / 2 coupled line 14a, and the other end adjacent to the center of the λ / 2 coupled line 14a is the second output terminal. It is connected to the part 14f.

In FIG. 1, the first output end portion 14 e of the distribution circuit 14 is connected to the gate terminal of the first HEMT 18 a as the first semiconductor element of the semiconductor element portion 18 through the capacitor 30 for direct current interruption. The second output end 14 f of the distribution circuit 14 is connected to the first phase adjustment circuit 16, and the second semiconductor element of the semiconductor element unit 18 is connected to the first phase adjustment circuit 16 via a capacitor 32 for DC blocking. Are connected to the gate terminal of the second HEMT 18b.
When the phase difference between the two signals output from the distribution circuit 14 deviates by a deviation Δθ from the set phase difference π, the first phase adjustment circuit 16 is a transmission line having an electrical length of Δθ, for example. Composed.
The signal output from the first output end 14e and input to the gate terminal of the first HEMT 18a is the LO1 signal as the second signal, and the signal output from the second output end 14f and input to the gate terminal of the second HEMT 18b is the signal. When the LO2 signal as the third signal is used, if the phase of the LO2 signal is delayed by a deviation Δθ deviated from the phase difference π with respect to the LO1 signal, the second output end 14f and the second HEMT 18b as shown in FIG. A first phase adjustment circuit 16 composed of a transmission line having an electrical length of Δθ is provided between the first output end 14e and the first output end 14e when the LO2 signal advances by Δθ more than the LO1 signal. A first phase adjustment circuit 16 configured by a transmission line having an electrical length of Δθ is disposed between the gate terminal of the 1HEMT 18a.

FIG. 3 is a circuit diagram of a mixer circuit according to a modification of the embodiment of the present invention.
In FIG. 3, the first phase adjustment circuit 16a is provided between the first output end 14e and the gate terminal of the first HEMT 18a, and the first phase adjustment is provided between the second output end 14f and the gate terminal of the second HEMT 18b. An example is shown in which circuits 16b are provided to adjust the LO1 and LO2 signals, respectively.
When the LO2 signal is delayed from the LO1 signal by a deviation Δθ deviated from the phase difference π at the center frequency, the electrical length of θ2 as the first phase adjustment circuit 16b is provided between the second output end 14f and the gate terminal of the second HEMT 18b. And a line having an electrical length of θ1 as the first phase adjusting circuit 16a is connected between the first output end 14e and the gate terminal of the first HEMT 18a, so that Δθ = θ2−θ1 is satisfied. If set to, the delay of Δθ can be brought close to zero.
Further, when the LO2 signal advances by a deviation Δθ deviated from the phase difference π at the center frequency from the LO1 signal, if Δθ = θ1−θ2 is set, the advance of Δθ can be made close to zero.

In FIG. 1, the semiconductor element unit 18 has a first HEMT 18a and a second HEMT 18b connected in parallel. The LO1 signal is input to the gate terminal of the first HEMT 18a, and the LO2 signal is input to the gate terminal of the second HEMT 18b.
The source terminals of the first HEMT 18a and the second HEMT 18b are both grounded, and the drain terminals are connected to each other, for example, by a connecting portion 18c.
A bias voltage Vgg is applied to the gate terminals of the first HEMT 18a and the second HEMT 18b from a gate bias terminal 26 connected via a band-pass filter circuit 28.
The band-pass filter circuit 28 includes a short stub 28a having an electrical length of λLO / 4 where the wavelength of the LO signal is λLO in order to demultiplex the LO signal.
The RF signal terminal 20 as the second signal terminal is connected to the connection portion 18c of the semiconductor element portion 18 via the capacitor 34, and the RF signal as the fourth signal is applied to the connection portion 18c.
The IF signal terminal 24 as the third signal terminal is connected to the connection part 18c of the semiconductor element part 18 via the low-pass filter circuit 22 as a band filter circuit. The IF signal is output from the IF signal terminal 24 as a fifth signal.

FIG. 4 is a circuit configuration diagram of a low-pass filter circuit according to one embodiment of the present invention.
In FIG. 4, the low-pass filter circuit 22 includes a short stub 22a having an electrical length of λRF / 4, where λRF is the wavelength of the RF signal, in order to demultiplex the RF signal.
A short stub 22a having an electrical length of λRF / 4 formed on the transmission line 36 is connected to the upper electrode 22b1 of the capacitor 22b disposed adjacent to the tip of the short stub 22a by an air bridge 22c.
The lower electrode 22b2 of the capacitor 22b is connected to a ground metal (not shown) on the back surface of the circuit board 37 through the via hole 22d and grounded.
The upper electrode 22b1 of the capacitor 22b and the line 38 are connected by an air bridge 22e, and the line 38 is connected to a terminal pad that is the IF signal terminal 24.
The circuit configuration of the band-pass filter circuit 28 connected to the gate bias terminal 26 described above is basically the same as that of the low-pass filter circuit 22. The only difference is that the band-pass filter circuit 28 uses a short stub 28a having an electrical length of λLO / 4.

Next, the operation of the balanced mixer circuit 10 will be described.
The balanced mixer circuit 10 receives an RF signal (frequency fRF) and an LO signal (frequency fLO) and outputs an IF signal (frequency fIF).
The LO signal is input from the LO signal terminal 12 and input to the distribution circuit 14 via the input end 14d. The distribution circuit 14 generates a reverse phase signal having a phase difference π with an equal amplitude, and two signals having a phase difference π from the first output end 14e and the second output end 14f of the distribution circuit 14, LO1 signal And LO2 signal is output.
The amplitude and phase difference between the two signals are the shape, arrangement, and formation of the λ / 2 coupled line 14a, the first λ / 4 coupled line 14b, and the second λ / 4 coupled line 14c of the distribution circuit 14 as the chip becomes smaller. Depending on the accuracy, there are cases where the amplitude is exactly equal and the phase difference does not become π.

For this purpose, by arranging the first phase adjustment circuit 16 between the distribution circuit 14 and the semiconductor element unit 18, the phase difference between the two signals output from the distribution circuit 14 is as close to π as possible. In other words, the deviation Δθ deviated from the phase difference π is adjusted to zero and adjusted so as to approach the equal amplitude.
The two signals whose amplitude and phase difference have been adjusted by the first phase adjustment circuit 16 are input to the gate terminals of the first HEMT 18 a and the second HEMT 18 b of the semiconductor element unit 18.
On the other hand, the drain terminals on the output side of the first HEMT 18a and the second HEMT 18b are connected to each other, and an RF signal is applied to the connecting portion 18c.

At this time, a mixed wave of the RF signal and the LO signal is generated at both input and output ends of the semiconductor element portion 18, that is, at the gate terminal side of the first HEMT 18a and the second HEMT 18b and the connection portion 18c. If the frequency of the mixed wave is fout,
fout = mfRF ± nfLO (1)
It becomes. Here, m and n are integers.
Of the fout, when the balanced mixer circuit 10 is used as a fundamental mixer, the frequency fIF is
fIF = fRF−fLO (2)
Is extracted as an IF signal through the low-pass filter circuit 22.
For example, in the balanced mixer circuit 10, the frequency of the LO signal is fLO = 76 GHz, the frequency of the RF signal is fRF = 76.0001 GHz, and the frequency fLO of the LO signal and the frequency fRF of the RF signal are close to each other, for example, fIF = 100 kHz IF signal can be extracted with high frequency conversion efficiency.

When the balanced mixer circuit 10 is used as an even harmonic mixer, the frequency fIF is
fIF = fRF-2nfLO (3)
Is extracted as an IF signal through the low-pass filter circuit 22. Here, n is an integer.
However, since the frequency conversion gain becomes smaller as n becomes higher, normally even harmonic mixers are configured with n = 1. Again, in the case of n = 1,

For example, in the balanced mixer circuit 10, by inputting the LO signal frequency as fLO = 38 GHz and the RF signal frequency as fRF = 76.0001 GHz, for example, an IF signal with fIF = 100 kHz has a high frequency conversion efficiency. And can be taken out.
As described above, in the even harmonic mixer, the relationship of Expression (4) is established between the frequency fLO of the LO signal and the frequency fRF of the RF signal.
fLO = fRF / (2n) (4)
Since it may be difficult to generate a high-frequency LO signal, the frequency can be lowered to fRF / (2n), so that an even harmonic mixer is configured particularly as a millimeter wave band system.

As described above, the balanced mixer circuit 10 includes the first phase adjustment circuit 16 in both the fundamental wave mixer and the even harmonic mixer, and therefore the impedance of the first phase adjustment circuit 16 is adjusted. Thus, the deviation Δθ between the phase difference between the two signals LO1 and LO2 output from the distribution circuit 14 and the set phase difference π can be brought close to zero. The amplitude difference between the two signals is also close to 0 dB.
Therefore, when a mixed wave of an RF signal and an LO signal is generated and an IF signal is extracted, conversion loss can be minimized, and a balanced mixer circuit with high frequency conversion efficiency can be configured.

FIG. 5 is a circuit diagram showing another example of the semiconductor element portion used in the mixer circuit according to the embodiment of the present invention.
The semiconductor element portion 18 shown in FIG. 5 is a dual gate FET 18d instead of the first HEMT 18a and the second HEMT 18b which are individual transistors.
The first gate terminal g1 of the dual gate FET 18d is connected to the first output end 14e of the distribution circuit 14, and the LO1 signal is input.
The second gate terminal g2 is connected to the first phase adjustment circuit 16, and the LO2 signal is input to the second gate terminal g2.
The source terminal of the dual gate FET 18d is grounded, and the RF signal terminal 20 and the IF signal terminal 24 are connected to the drain terminal.
Therefore, the dual gate FET 18d can be replaced with the semiconductor element portion 18 using the first HEMT 18a and the second HEMT 18b in the balanced mixer circuit 10 of FIG. By using such a dual gate FET 18d, the area occupied by the semiconductor element portion 18 can be reduced, so that the chip can be reduced in size.

FIG. 6 is a circuit diagram showing another example of the semiconductor element portion used in the mixer circuit according to the embodiment of the present invention.
The semiconductor element portion of FIG. 6 includes a diode 18e and a diode 18f connected in reverse parallel instead of a transistor. The anode of the diode 18e is connected to the first output end 14e of the distribution circuit 14, and the LO1 signal is input to this anode. The cathode of the diode 18f is connected to the first phase adjustment circuit 16, and the LO2 signal is input to this cathode. The cathode of the diode 18e and the anode of the diode 18f are connected by a connecting portion 18c, and the RF signal terminal 20 and the IF signal terminal 24 are connected to the connecting portion 18c.
Therefore, the semiconductor element portion 18 using this diode can be replaced with the semiconductor element portion 18 using transistors in the balanced mixer circuit 10 of FIG. However, in this case, a gate bias circuit including the bias terminal 26 and the band-pass filter circuit 28 for applying the bias voltage Vgg is unnecessary.

FIG. 7 is a circuit diagram of another example of the distribution circuit used in the mixer circuit according to the embodiment of the present invention.
The balun 142 shown in FIG. 7 has a λ / 2 coupled line 14a as a first line having an electrical length of approximately λLO / 2 when the wavelength of the LO signal is λLO, and is parallel to the λ / 2 coupled line 14a. A first λ / 4 coupled line 14b as a second line having an electrical length of approximately λLO / 4, and an electrical length of approximately λLO / 4 in parallel with the λ / 2 coupled line 14a, and a λ / 2 coupled line The balun 141 is the same as the balun 141 in that the first λ / 4 coupled line 14d and the second λ / 4 coupled line 14c as a third line disposed symmetrically with respect to the central portion of the 14a.
However, in this balun 142, for example, when the frequency of the LO signal is lowered, the electrical length of λLO is increased, and if the λ / 2 coupling line 14a is linearly arranged, the chip size is increased, so the exclusive area is reduced. Therefore, a balun is formed in a shape having a plurality of bent portions 14g.

The λ / 2 coupling line 14a of the balun 142 includes a plurality of bent portions 14g, is arranged in a ring shape with a notch, and has a symmetrical shape with respect to a line segment connecting the notch and the central portion of the λ / 2 coupling line 14a. The track is arranged so as to be. Accordingly, the two ends of the λ / 2 coupling line 14a are arranged to face each other with the notch interposed therebetween, and one end of the λ / 2 coupling line 14a adjacent to the notch is connected to the input end 14d.
The first λ / 4 coupled line 14b and the second λ / 4 coupled line 14c are arranged outside the λ / 2 coupled line 14a in parallel with the λ / 2 coupled line 14a.
The first λ / 4 coupled line 14b and the second λ / 4 coupled line 14c are also arranged symmetrically with respect to the line segment connecting the notch of the λ / 2 coupled line 14a and the central portion of the λ / 2 coupled line 14a.
Both the first λ / 4 coupled line 14b and the second λ / 4 coupled line 14c are grounded at their respective ends adjacent to the two ends of the λ / 2 coupled line 14a, and are adjacent to the center of the λ / 2 coupled line 14a. The first λ / 4 coupled line 14b is connected to the first output end 14e, and the second λ / 4 coupled line 14c is connected to the second output end 14f.

When the balun 142 having the plurality of bent portions 14g is used as the distribution circuit 14, the degree of coupling between the λ / 2 coupled line 14a and the first λ / 4 coupled line 14b at the bent portion, or λ / It is difficult to accurately evaluate the degree of coupling between the two coupled lines 14a and the second λ / 4 coupled line 14c. For this reason, it is difficult to accurately set the phase difference between the LO1 signal having the opposite phase output from the distribution circuit 14 and the LO2 signal to π.
However, in the balanced mixer circuit 10, the first phase adjustment circuit 16 is inserted, and thereby the phase difference between the LO 1 signal and the LO 2 signal output from the distribution circuit 14 and the set phase difference π. The deviation Δθ can be brought close to zero, and the amplitude difference can be adjusted to 0 dB.

FIG. 8 is a circuit diagram of another example of the distribution circuit used in the mixer circuit according to the embodiment of the present invention.
The distribution circuit 14 shown in FIG. 8 includes a Lange coupler 143 and a second phase adjustment circuit 144 having an electrical length of π / 2.
In the Lange coupler 143, a plurality of first λ / 4 coupled lines 14h as first lines and a plurality of second λ / 4 coupled lines 14i as second lines are alternately arranged one by one. In the coupler 143, the first λ / 4 coupled line 14h is connected to each other by air bridges 14j at both ends of the first λ / 4 coupled line 14h.
One end of the first λ / 4 coupled line 14h connected in common is grounded, and the other end of the first λ / 4 coupled line 14h connected in common is connected to an input end 14d connected to the LO signal terminal 12. ing.

Each end of the second λ / 4 coupling line 14 i is connected to a common connection line. The one adjacent to the ground end of the first λ / 4 coupled line 14h is now the first common connection line 14k, and the one adjacent to one end connected to the input end 14d of the first λ / 4 coupled line 14h is the second common connection line. In the case of the connection line 14m, the first common connection line 14k is connected to the first output end 14e of the distribution circuit 14, and the second common connection line 14m is connected to the second output end 14f via the second phase adjustment circuit 144. It is connected to the.
The second phase adjustment circuit 144 is configured by a transmission line having an electrical length of π / 2, for example.
The Lange coupler 143 has a phase difference of π / 2 between the output signal from the second common connection line 14m and the output signal from the first common connection line 14k, but the second common connection line 14m includes a second phase adjustment circuit. By connecting 144, the phase difference between the LO1 signal from the first output end 14e and the LO2 signal from the second output end 14f is set to π.

However, since the Lange coupler 143 needs to be formed in a complicated shape, it is difficult to accurately set the phase difference between the LO1 signal and the LO2 signal output from the distribution circuit 14 to π. However, in the balanced mixer circuit 10, the first phase adjustment circuit 16 is inserted, and thereby the difference between the phase difference between the LO1 signal and the LO2 signal output from the distribution circuit 14 and the set phase difference π. Δθ can be brought close to zero, and the amplitude difference can be adjusted to 0 dB.
The line having the electrical length of π / 2 of the second phase adjustment circuit 144 and the line of the first phase adjustment circuit 16 may be configured integrally.

As described above, in the mixer circuit according to the present invention, the distribution circuit that converts the first signal into the second and third signals having the phase difference π, and the first and second signals to which the second and third signals are input, The semiconductor element portion having the second semiconductor element and the third signal terminal connected to the second signal terminal via a predetermined band-pass filter circuit are connected to each other as the output terminals of the first and second semiconductor elements. The phase difference between the second signal and the third signal is connected to the connecting portion to be connected and at least one front portion of the input terminal of the first semiconductor element and the input terminal of the second semiconductor element. And a first phase adjustment circuit that compensates for the deviation from the set phase difference π.
With this configuration, the difference between the phase difference between the second signal and the third signal and the phase difference π, which occurs in the configuration of the distribution circuit, is brought close to zero, and the amplitudes of the second signal and the third signal are reduced. It is possible to approach the same amplitude, and the frequency conversion efficiency can be increased. As a result, it is possible to provide a small mixer circuit with high frequency conversion efficiency with a simple configuration in which the first phase adjustment circuit is provided. In addition, the degree of freedom in designing and manufacturing the distribution circuit can be increased, and thus the yield of chips can be increased.

In the above description, the mixer circuit using the HEMT as the transistor has been described. However, the present invention is not limited to the HEMT and may be an FET or an HBT.
Further, the example in which the LO signal is input from the gate terminal side and the RF signal is input from the drain terminal side has been described. However, the same effect can be obtained even if the LO signal is input from the drain terminal side and the RF signal is input from the gate terminal side. .
In the above description, the down converter that extracts the difference signal between the LO signal and the RF signal has been described. However, the LO signal is input from the first signal terminal and the IF signal is input from the third signal terminal with the same circuit configuration. By inputting, the same effect can be obtained in the configuration of the upconverter that outputs the RF signal as the sum signal of the LO signal and the IF signal from the second signal terminal.

  As described above, the mixer circuit according to the present invention is suitable for use in electronic devices such as in-vehicle millimeter-wave radar, microwave communication devices for mobile communication and wireless communication, and communication devices for millimeter wave bands. .

1 is a circuit diagram of a mixer circuit according to an embodiment of the present invention. It is a circuit diagram of an example of the distribution circuit of the mixer circuit which concerns on one embodiment of this invention. It is a circuit diagram of the mixer circuit which concerns on the modification of one embodiment of this invention. It is a circuit block diagram of the low-pass filter circuit which concerns on one embodiment of this invention. It is a circuit diagram of another example of the semiconductor element part used for the mixer circuit which concerns on one embodiment of this invention. It is a circuit diagram of another example of the semiconductor element part used for the mixer circuit which concerns on one embodiment of this invention. It is a circuit diagram of another example of the distribution circuit used for the mixer circuit which concerns on one embodiment of this invention. It is a circuit diagram of another example of the distribution circuit used for the mixer circuit which concerns on one embodiment of this invention.

Explanation of symbols

  12 LO signal terminal, 14d input terminal, 14e first output terminal, 14f second output terminal, 14 distribution circuit, 18a first HEMT, 18b second HEMT, 18 semiconductor element part, 16 first phase adjustment circuit, 18c connection Part, 20 RF signal terminal, 22 low-pass filter circuit, 24 IF signal terminal, 141 balun, 14a λ / 2 coupled line, 14b first λ / 4 coupled line, 14c second λ / 4 coupled line, 14g bent part, 14h first part 1λ / 4 coupled line, 14i second λ / 4 coupled line, 143 Lange coupler.

Claims (8)

A first signal terminal to which a first signal is input;
An input end connected to the first signal terminal and first and second output ends, and the first signal is converted into second and third signals having a set phase difference π. A distribution circuit for outputting the second and third signals from the first and second output ends;
A semiconductor element portion having first and second semiconductor elements in which the input terminals are individually connected to the first and second output ends of the distribution circuit and the output terminals are connected to each other;
The second signal and the third signal are disposed in at least one of a front part of the input terminal of the first semiconductor element and a front part of the input terminal of the second semiconductor element of the semiconductor element part. A first phase adjustment circuit that compensates for a deviation between the phase difference between and a set phase difference π;
A second signal terminal connected to a connecting portion for connecting the output terminals of the first and second semiconductor elements;
A third signal terminal connected to the connecting portion via a predetermined band-pass filter circuit;
A mixer circuit with   The fourth signal is input to the second signal terminal, the band-pass filter circuit is a low-pass filter circuit, the fifth signal is output from the third signal terminal, and the fifth signal is the frequency of the first signal. 2. The mixer circuit according to claim 1, wherein the mixer circuit is a signal defined by the frequency of the second signal.   3. The mixer circuit according to claim 2, wherein the center frequency of the first signal has a frequency close to 1 / (2n) (n is a positive integer) of the frequency of the fourth signal.   The distribution circuit includes a balun circuit, and the balun circuit is arranged in parallel with the first line having one end connected to the input end and is grounded at a predetermined position, and one end is the first output. A second line connected to the end, and a third line arranged in parallel to the first line, grounded at a predetermined position and connected at one end to the second output end The mixer circuit according to any one of claims 1 to 3.   5. The mixer circuit according to claim 4, wherein a bent portion is provided in a part of the first line, the second line, and the third line of the balun circuit.   The distribution circuit is arranged in parallel with the first line having one end grounded and the other end connected to the input end, and one end close to the ground end of the first line is the first line. A Lange coupler having a second line connected to the output end of the Lange coupler and having the other end connected to the second output end, and a π / 2 disposed on the second output end side of the Lange coupler. 4. The mixer circuit according to claim 1, further comprising a second phase adjustment circuit having an electrical length.   The first and second semiconductor elements of the semiconductor element portion are transistor elements, the input terminal is the control terminal of the transistor element, the output terminal is the first terminal of the transistor element, The mixer circuit according to any one of claims 1 to 6, wherein the second terminal is grounded.   8. The mixer circuit according to claim 7, wherein the transistor element has a plurality of control terminals, and the transistor element is integrally formed.

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