JP2006049877A5 - - Google Patents

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Publication number
JP2006049877A5
JP2006049877A5 JP2005198485A JP2005198485A JP2006049877A5 JP 2006049877 A5 JP2006049877 A5 JP 2006049877A5 JP 2005198485 A JP2005198485 A JP 2005198485A JP 2005198485 A JP2005198485 A JP 2005198485A JP 2006049877 A5 JP2006049877 A5 JP 2006049877A5
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Japan
Prior art keywords
film
chip
substrate
manufacturing
integrated circuit
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JP2005198485A
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Japanese (ja)
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JP5025103B2 (en
JP2006049877A (en
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Priority to JP2005198485A priority Critical patent/JP5025103B2/en
Priority claimed from JP2005198485A external-priority patent/JP5025103B2/en
Publication of JP2006049877A publication Critical patent/JP2006049877A/en
Publication of JP2006049877A5 publication Critical patent/JP2006049877A5/ja
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Publication of JP5025103B2 publication Critical patent/JP5025103B2/en
Expired - Fee Related legal-status Critical Current
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Claims (10)

板の一方の面上に、複数の素子導電層及び絶縁膜を含む薄膜集積回路を形成し、
前記薄膜集積回路上にフィルムを設け、
前記基板の他方の面を研削し、
研削した前記基板の他方の面を研磨し、
前記基板と前記薄膜集積回路が含む前記絶縁膜を切断して、前記基板と前記薄膜集積回路が積層されたICチップを複数形成し、
前記ICチップの間に隙間が形成されるように前記フィルムを延伸させることを特徴とするICチップの作製方法。
On one surface of the base plate to form a thin film integrated circuit including a plurality of elements, the conductive layer and the insulating film,
A film is provided on the thin film integrated circuit,
Grinding the other side of the substrate,
Polishing the other side of the ground substrate,
And cutting the insulating film substrate and the thin film integrated circuit comprises, an IC chip which said substrate and said thin film integrated circuits are laminated to form a plurality,
A method for producing an IC chip, wherein the film is stretched so that a gap is formed between the IC chips.
請求項1において、
前記フィルムを延伸させた後、前記ICチップが分離されるように前記フィルムを切断し、
前記フィルムが接着された前記ICチップを第1のテープの凹部に設け、
前記第1のテープに接するように第2のテープを設けることを特徴とするICチップの作製方法。
In claim 1,
After stretching the film, cut the film so that the IC chip is separated,
Setting the IC chip in which the film is adhered to the concave portion of the first tape,
A method of manufacturing an IC chip, comprising providing a second tape so as to be in contact with the first tape.
板の一方の面上に、複数の素子導電層及び絶縁膜を含む薄膜集積回路を形成し、
前記薄膜集積回路上に第1のフィルムを設け、
前記第1のフィルム上に第2のフィルムを設け、
前記基板の他方の面を研削し、
研削した前記基板の他方の面を研磨し、
前記基板前記薄膜集積回路が含む前記絶縁膜及び前記第1のフィルムを切断して、前記基板前記薄膜集積回路及び前記第1のフィルムが積層されたICチップを複数形成し、
前記ICチップの間に隙間が形成されるように前記第2のフィルムを延伸させることを特徴とするICチップの作製方法。
On one surface of the base plate to form a thin film integrated circuit including a plurality of elements, the conductive layer and the insulating film,
Providing a first film on the thin film integrated circuit;
Providing a second film on the first film;
Grinding the other side of the substrate,
Polishing the other side of the ground substrate,
The substrate, the insulating film and then cutting the first film the thin film integrated circuit comprises the substrate, the thin film integrated circuit and the first IC chip film is laminated to form a plurality,
IC chip manufacturing method of according to claim Rukoto by stretching the second film so that a gap is formed between the IC chip.
請求項3において、
前記第2のフィルムを延伸させた後、前記第2のフィルム前記ICチップを分離し、
前記ICチップの一方の面を第3のフィルムに接着させ、
前記ICチップの他方の面を第4のフィルムに接着させることを特徴とするICチップの作製方法。
In claim 3,
After stretching the second film , the second film and the IC chip are separated,
Bonding one side of the IC chip to a third film;
A method for manufacturing an IC chip, comprising bonding the other surface of the IC chip to a fourth film.
請求項3において、
前記第2のフィルムを延伸させた後、前記ICチップの一方の面と前記第2のフィルムとの密着性が弱くなるように、前記第2のフィルムに光を照射し、
前記第2のフィルム前記ICチップを分離し、
前記ICチップの一方の面上に第3のフィルムを設け、
前記ICチップの他方の面上に第4のフィルムを設け、
加熱処理と加圧処理の少なくとも一方を行って、前記ICチップを前記第3のフィルムと前記第4のフィルムにより封止することを特徴とするICチップの作製方法。
In claim 3,
After stretching the second film, the second film is irradiated with light so that the adhesion between one surface of the IC chip and the second film is weakened,
Separating the second film and the IC chip;
A third film is provided on one surface of the IC chip,
A fourth film is provided on the other surface of the IC chip,
A method for manufacturing an IC chip, wherein at least one of a heat treatment and a pressure treatment is performed, and the IC chip is sealed with the third film and the fourth film.
請求項3において、
前記第2のフィルムを延伸させた後、前記第2のフィルムに光を照射し、前記ICチップの他方の面上に第3のフィルムを設け、
前記第3のフィルムを加熱して、前記ICチップの他方の面を前記第3のフィルムに接着させることにより、前記ICチップの一方の面と前記第2のフィルムを分離し、
前記ICチップの他方の面を第4のフィルムに接着させることを特徴とするICチップの作製方法。
In claim 3,
After stretching the second film, the second film is irradiated with light, and a third film is provided on the other surface of the IC chip,
And heating the third film, by bonding the other surface of the IC chip to the third film, to separate the one side and the second film of the IC chip,
A method for manufacturing an IC chip, comprising bonding the other surface of the IC chip to a fourth film.
請求項1乃至請求項のいずれか一項において、
前記基板の厚さが100μm以下になるまで、前記基板の他方の面を研削することを特徴とするICチップの作製方法。
In any one of Claims 1 thru | or 6 ,
A method of manufacturing an IC chip, comprising grinding the other surface of the substrate until the thickness of the substrate becomes 100 μm or less.
請求項1乃至請求項のいずれか一項において、
前記基板の厚さが20μm以下になるまで、研削した前記基板の他方の面を研磨することを特徴とするICチップの作製方法。
In any one of Claims 1 thru | or 6 ,
A method for manufacturing an IC chip, comprising polishing the other surface of the ground substrate until the thickness of the substrate becomes 20 μm or less.
請求項1乃至請求項のいずれか一項において、
前記基板はガラス基板であることを特徴とするICチップの作製方法。
In any one of Claims 1 thru | or 8 ,
An IC chip manufacturing method, wherein the substrate is a glass substrate.
請求項1乃至請求項のいずれか一項において、
前記導電層はアンテナとして機能することを特徴とするICチップの作製方法。
In any one of Claims 1 thru | or 9 ,
The method for manufacturing an IC chip, wherein the conductive layer functions as an antenna.
JP2005198485A 2004-07-09 2005-07-07 IC chip fabrication method Expired - Fee Related JP5025103B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005198485A JP5025103B2 (en) 2004-07-09 2005-07-07 IC chip fabrication method

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004203906 2004-07-09
JP2004203906 2004-07-09
JP2005198485A JP5025103B2 (en) 2004-07-09 2005-07-07 IC chip fabrication method

Publications (3)

Publication Number Publication Date
JP2006049877A JP2006049877A (en) 2006-02-16
JP2006049877A5 true JP2006049877A5 (en) 2008-06-26
JP5025103B2 JP5025103B2 (en) 2012-09-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005198485A Expired - Fee Related JP5025103B2 (en) 2004-07-09 2005-07-07 IC chip fabrication method

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JP (1) JP5025103B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008072087A (en) * 2006-08-16 2008-03-27 Kyoto Univ Semiconductor device and manufacturing method of the semiconductor device, and display device
US9299614B2 (en) * 2013-12-10 2016-03-29 Applied Materials, Inc. Method and carrier for dicing a wafer

Family Cites Families (20)

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JPH0760848B2 (en) * 1990-12-20 1995-06-28 松下電器産業株式会社 Taping packaging method for electronic chip parts
JP2950106B2 (en) * 1993-07-14 1999-09-20 松下電器産業株式会社 Method for manufacturing optical element package
JPH08124881A (en) * 1994-10-28 1996-05-17 Nec Corp Dicing tape and method for assembling semiconductor device using it
JP3893645B2 (en) * 1996-03-18 2007-03-14 ソニー株式会社 Thin film semiconductor device and IC card manufacturing method
JP3602943B2 (en) * 1997-07-25 2004-12-15 シャープ株式会社 Semiconductor wafer grinding machine
JP3993918B2 (en) * 1997-08-25 2007-10-17 富士通株式会社 Manufacturing method of semiconductor device
JPH11144019A (en) * 1997-11-13 1999-05-28 Sony Corp Ic card
JP2000007020A (en) * 1998-06-17 2000-01-11 Nitto Denko Corp Carrier material for chip electronic part and its manufacture
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JP3538070B2 (en) * 1999-07-08 2004-06-14 株式会社東芝 Method for manufacturing semiconductor device
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JP2003016414A (en) * 2001-07-05 2003-01-17 Toppan Printing Co Ltd Sheet with non-contact type ic chip and its manufacturing method
JP3612317B2 (en) * 2001-11-30 2005-01-19 株式会社東芝 Manufacturing method of semiconductor device
JP3553551B2 (en) * 2002-01-11 2004-08-11 沖電気工業株式会社 Method of manufacturing semiconductor device using semiconductor wafer
JP2003256794A (en) * 2002-02-28 2003-09-12 Konica Corp Method of manufacturing ic card, and ic card
JP2003257897A (en) * 2002-03-01 2003-09-12 Seiko Instruments Inc Method for manufacturing semiconductor chip
JP3875130B2 (en) * 2002-03-26 2007-01-31 株式会社東芝 Display device and manufacturing method thereof
JP4364553B2 (en) * 2002-08-30 2009-11-18 シャープ株式会社 Photoelectric conversion device and manufacturing method thereof

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