JP2006033984A - Power supply device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a small-sized power stabilization device that can arbitrarily change a supply voltage to a load and can easily control characteristics of voltage adjustment. <P>SOLUTION: An inverter circuit 3a and a capacitor 4 are connected to a system between an AC power supply 1 and the load 2 in series to the AC power supply 1 and the load 2, when a voltage of the AC power supply 1 deviates from a prescribed value, the inverter circuit 3 is controlled so that a voltage of the capacitor 4 is applied to the system in the forward/backward reverse direction or in the same direction, to hold the voltage applied to the load 2 kept at the prescribed value, a power conversion circuit 5a is arranged between the capacitor 4 and the system, the power conversion circuit 5a is controlled so that power flowing to and from the system is regenerated to the system or charged to the capacitor 4 by the aforementioned operation, and the voltage of the capacitor 4 is held at the prescribed value. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power supply apparatus for increasing or decreasing the voltage of power supplied from an AC power supply to a system and supplying power to a load with a predetermined voltage.

  In a conventional power supply device, for example, the main winding of the transformer is always short-circuited, and power is supplied from the system to the load through the partial winding, so that the system voltage is supplied to the load almost as it is without reducing the voltage. However, if you want to save power, use a transformer as the original single-winding transformer, step down the system voltage and then supply it to the load, so that a voltage lower than the system voltage is supplied to the load. It has been configured to obtain the power saving effect of reducing the power consumption. (For example, see Patent Document 1)

  Also, for example, a three-phase bridge circuit consisting of switches and a capacitor are connected in parallel to the AC power supply and the load, and a reactor is inserted in series between the three-phase bridge circuit and the capacitor, the AC power supply and the load. In addition, the PWM control of the three-phase bridge circuit allows the load to be continuously supplied from 0 V to a voltage higher than the input without using a transformer without instantaneous interruption. (For example, see Patent Document 2)

Japanese Patent Laid-Open No. 7-67254 (second page, FIG. 1) JP-A-10-42559 (pages 3 and 5 and FIG. 1)

In the conventional power supply device, the configuration as in Patent Document 1 uses a transformer, so that the size of the device becomes large, and the supply voltage to the load cannot be changed arbitrarily, so that it is difficult to control the voltage adjustment characteristics. There is a problem, and in the configuration of Patent Document 2, a transformer is unnecessary, and voltage adjustment can be continuously performed. In this configuration, a bridge circuit and a capacitor are connected in parallel to the AC power source and the load. Therefore, there has been a problem that it is necessary for the switches constituting the bridge circuit to cope with a high voltage corresponding to the voltage of the AC power supply.
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a compact power supply that operates at a low voltage and can arbitrarily adjust a supply voltage to a load to be adjusted to a predetermined voltage. Is to get the equipment.

  In the power supply device of the present invention, an inverter circuit and a capacitor are connected in series with the AC power supply and the load in the system between the AC power supply and the load, and when the voltage of the AC power supply is higher than a predetermined value, In the reverse direction, and when the voltage of the AC power supply is smaller than a predetermined value, a first control unit that controls the inverter circuit so that the voltage of the capacitor is applied to the system in the same direction as the AC power supply, The voltage applied to the load is held at a predetermined value. At this time, power flows into the capacitor from the system, or power flows out from the capacitor into the system. When a power conversion circuit is connected between the capacitor and the system and power flows into the capacitor, the power is A second control unit is provided to control the power conversion circuit so as to charge the power from the system when power flows out from the capacitor, so that the voltage of the capacitor is held at a predetermined value. It is.

  Alternatively, when an inverter circuit and a capacitor are connected in series with the AC power supply and the load in the system between the AC power supply and the load, and the voltage of the AC power supply is larger than a predetermined value, the capacitor is connected in the positive and negative direction with the AC power supply. A first control unit is provided to control the inverter circuit so that the voltage of the voltage is applied to the system so that the voltage applied to the load is maintained at a predetermined value. At this time, the power flowing into the capacitor from the system A power control circuit is connected between the capacitor and the system, and a second control unit is provided for controlling the power conversion circuit so as to regenerate the power in the system so that the voltage of the capacitor is maintained at a predetermined value. It is a thing.

  Alternatively, when an inverter circuit and a capacitor are connected in series with the AC power source and the load in the system between the AC power source and the load, and the voltage of the AC power source is smaller than a predetermined value, the capacitor is connected in the same direction as the AC power source. A first control unit is provided to control the inverter circuit so that the voltage is applied to the system so that the voltage applied to the load is maintained at a predetermined value. At this time, the power flowing out from the capacitor to the system A power converter circuit is connected between the capacitor and the system, and a second control unit is provided for controlling the power converter circuit so as to charge the power from the system so as to hold the voltage of the capacitor at a predetermined value. It is a thing.

The transformer, which was necessary in the past, is no longer needed, and the device can be downsized, and the supply voltage to the load can be changed arbitrarily. The operation at a low frequency may be performed only once, and the voltage applied to the inverter circuit is also a low voltage corresponding to the difference for adjusting the voltage of the AC power supply to a predetermined load voltage. In addition, since the voltage during conduction can be reduced, power can be efficiently exchanged with the system.
Furthermore, it is possible to obtain a power supply device having a simpler structure that is effective when the voltage of the AC power supply is higher than a predetermined value or lower than a predetermined value, and can be further reduced in size and cost. It becomes possible.

Embodiment 1 FIG.
1 is a circuit diagram showing a schematic circuit configuration of a power supply device according to Embodiment 1 of the present invention. A full bridge type inverter circuit 3 a is connected in series between the AC power source 1 and the load 2 as an example of an inverter circuit that adjusts the voltage applied to the load by applying a voltage to the system. The inverter circuit 3a includes switches 311 to 341 using, for example, MOSFETs, and antiparallel diodes 312 to 342 of these switches.

In parallel with the inverter circuit 3a, a capacitor 4, which is a first capacitor serving as a voltage source of a voltage applied to the system, is connected. The capacitor 4 includes a power conversion circuit 5a that controls the exchange of power with the system. Connected to the grid.
In the power conversion circuit 5a, a switch 511 and an inductor 52, which are first switches, are connected in parallel to the capacitor 4, and the inductor 52 is used when power stored in the capacitor 4 is regenerated into the system or taken in from the system. The switch 511 controls the current between the inductor 52 and the capacitor 4.

  An intermediate point between the switch 511 and the inductor 52 is connected to the system via a switch 531 which is a second switch and a switch 541 which is a third switch. The switches 531 and 541 are connected to the power conversion circuit 5a. It controls the exchange of power with the.

Note that anti-parallel diodes 512, 532, and 542 are connected to the switches 511, 531, and 541, respectively.
A capacitor 6 that smoothes the current between the power conversion circuit 5 a and the system is connected to the system in parallel with the AC power supply 1.

Here, assuming that the system voltage is V ₀ , the load voltage is V _L , and the voltage of the inverter circuit is V _x , the relationship between them is V ₀ = V _x + V _L. Based on this relationship, by adjusting the magnitude of V ₀ by adjusting the V _x, although to obtain a V _L having a predetermined size, variation from the rated value of generally V ₀ is the order of ± 10% Therefore, the rate of change from V ₀ to V _L is at most about 20%, and the setting of V _x , that is, the voltage of the inverter circuit, is at the maximum. Therefore, a predetermined voltage adjustment can be performed by controlling a voltage smaller than the voltage of the AC power supply 1.
The capacitor 4 is charged with a predetermined voltage V _C1 lower than V ₀ in advance.

Next, an operation in a mode for performing a voltage reduction (hereinafter referred to as a voltage reduction mode) will be described. FIG. 2 is an operation chart showing the operation in the reduced voltage mode of the first embodiment. (A) to (e) show changes in the system voltage V ₀ , the load voltage V _L , the output voltage V _X of the inverter circuit 3a, the current i _{L1 of the} inductor 52, and the current i _X from the power conversion circuit 5a to the system, respectively. .

In the section (X) in which the switches 311 and 331 are turned on and the switches 321 and 341 are turned off, V _X is zero. From this state, however, the section in the region where the voltage instantaneous value during the positive time of V ₀ is high ( Y) When the switch 331 is turned off and the switch 341 is turned on, that is, when the switches 311 and 341 are turned on, V _X = V _{C1 and} V _L = V ₀ -V _C1 .
Similarly, in the section (Z) where the voltage instantaneous value is low when V ₀ is negative, the switch 311 is turned off and the switch 321 is turned on, that is, the switches 321 and 331 are turned on, so that V _L = V ₀ + V _C1 .

With the above operation, the V _L waveform has a waveform in which the sections (Y) and (Z) including the peak value are reduced from V ₀ by an amount corresponding to V _C1 , so that the peak value of the sine wave decreases. As a result, the effective value of V _L also decreases. As a result, power consumption at the load is also reduced, so that a power saving effect can be obtained in the reduced voltage mode.

In these sections (Y) and (Z), the current flows into the capacitor 4 from the system via the inverter circuit 3a. Therefore, in order to keep V _C1 at a constant value and maintain V _L at a predetermined value. The electric power stored in the capacitor 4 needs to be returned to the system side. The electric power stored in the capacitor 4 returns to the system via the power conversion circuit 5a by the following operation.

First, in the reduced voltage mode, the switch 541 is turned on in the entire region, and the switch 531 is turned off. At this time, i _L1 is zero in the section (A) where the switch 511 is turned off, but i _L1 increases when the switch 511 is turned on in the section (B). Next, when the switch 511 is turned off in the section (C), i _L1 returns to the system via the antiparallel diode 532 and the switch 541, and further passes through the capacitor 6, the switch 341 and the capacitor 4 to one end of the inductor 52. Return.

By configuring this loop, the current of the inductor 52 is stored in the capacitor 6, and power is regenerated in the system of the capacitor 6. Next, when the switch 511 is turned on before all the current of the inductor 52 flows out in the section (C), i _L1 starts to increase from the state where it does not become 0 as shown in the section (D) of the figure. Thereafter, by repeating this cycle in the same manner, the power flowing into the capacitor 4 can be returned to the system, so that regeneration of the power of the capacitor 4 charged in the reduced voltage mode to the system can be realized.

In this operation, i _X becomes a strip-like current, but the capacitor 6 has a function of smoothing the current and returning it to the system.
Since power can be boosted from the capacitor 4 and sent to the system via the power conversion circuit 5a, power can be regenerated even in a region where V ₀ is higher than V _C1 .

Next, an operation in a mode for performing voltage increase (hereinafter referred to as voltage increase mode) will be described. FIG. 3 is an operation chart showing the operation in the voltage increase mode of the first embodiment. As in FIG. 2, (a) to (e) show the system voltage V ₀ , the load voltage V _L , the output voltage V _X of the inverter circuit 3a, the current i _{L1 of the} inductor 52, and the current i _C1 flowing into the capacitor 4, respectively.

In the section (X) in which the switches 311 and 331 are turned on and the switches 321 and 341 are turned off, V _X is zero, but in the area section (Y) where V ₀ is positive and the voltage instantaneous value is high, the switch 311 If the switch 321 is turned off and the switch 321 is turned on, that is, the switches 321 and 331 are turned on, V _X = −V _{C1 and} V _L = V ₀ + V _C1 .
Similarly, in the section (Z) where the voltage instantaneous value when V ₀ is negative is low, the switch 331 is turned off and the switch 341 is turned on, that is, the switches 311 and 341 are turned on, so that V _L = V ₀ −V _C1 .

As a result of the above operation, the waveform of V _{L is} a waveform in which the sections (Y) and (Z) including the peak value are increased from V ₀ by an amount corresponding to V _C1 , so that the peak value of the sine wave increases. As a result, the effective value of V _L also increases. This operation is effective when V ₀ falls below the rated value.

In these sections (Y) and (Z), a current flows from the capacitor 4 through the inverter circuit 3a to the system. Therefore, in order to maintain V _C1 at a constant value and V _L at a predetermined value, the capacitor 4 It is necessary to charge the power from the grid side. The capacitor 4 is charged with power from the system by the following operation.

First, in the voltage increase mode, the switches 541 and 511 are turned off in the entire area. At this time, i _L1 is zero in the section (A) where the switch 531 is turned off, but if the switch 531 is turned on in the section (B), a current flows from the high voltage system to the power conversion circuit 5a and i _L1 is negative. Increase in the direction of. Next, when the switch 531 is turned off in the section (C), i _L1 passes through a circuit constituted by the capacitor 4 and the antiparallel diode 512, and the current i _C1 flows into the capacitor 4 to charge the capacitor 4. By repeating this cycle in the same way after the section (D), the power corresponding to the power flowing out from the capacitor 4 can be charged from the system, so that the voltage increasing mode can be continued.
In this operation, i _X becomes a strip-like current, but the capacitor 6 has an effect of smoothing the system current.

Next, the control method of the first embodiment will be described. FIG. 4 is a block diagram showing a schematic configuration of the control circuit of the first embodiment.
In FIG. 4, the measured values of V ₀ and V _L are input to the control unit 8 which is the first control unit. The control unit 8 outputs the target value of V _C1 and the measured values of V ₀ and V _{L to} the control unit 9a that is the second control unit. In addition, the measurement value of V _C1 is input to the control unit 9a.
Further, the control unit 8 outputs a gate signal to each of the switches 311 to 341, and the control unit 9a outputs a gate signal to each of the switches 511, 531, and 541.

First, a control method in the reduced voltage mode will be described. FIG. 5 is a diagram showing an outline of changes in V ₀ and control. (A) explains the operation by the waveform of V _{0 in} the reduced voltage mode. (B) shows an outline of the control in the reduced voltage mode, and the comparison calculation unit 10a of the control unit 8 inputs the measured value of V _L and the load target voltage value, and outputs the target value of V _C1 for control. comparison operation unit 11a of the section 9a may output the content of control switches 511 and 531 and 541 the measured value of the target value and the V _C1 of V _C1 as an input, PWM conversion section 12a as an input the output of the comparison operation unit 11a Convert and output the gate signal.

As shown in FIG. 5A, when the peak value of V ₀ exceeds a predetermined correction threshold value, the voltage reduction mode is entered, and the flag of the voltage reduction correction signal becomes H.
Before entering the reduced voltage mode, that is, in a steady state, the switches 311 and 331 are turned on and the switches 321 and 341 are turned off. In this state, V _X = 0 and V _L = V ₀ . Then, during the period when the flag of the reduced voltage correction signal is H, the control unit 8 realizes a reduced voltage of V _L by switching on and off of the switches 311 to 341 in a predetermined cycle.

The switching is performed for a predetermined period including the peak value when V ₀ is positive, that is, when the switches 311 and 341 are turned on in the section (Y) of FIG. In the third section (Z), the switches 321 and 331 are turned on.
Note that the predetermined period and period can be determined from the measured fluctuation period of V ₀ or the like, in addition to being determined in advance.

In the reduced voltage mode, V _L is lowered, but if it is lowered too much, the operation of the load is affected. Therefore, a load voltage target value is determined, and V _C1 is controlled so that V _L becomes that value.
When the reduced voltage mode is entered, as shown in FIG. 5B, the comparison operation unit 10a compares V _L with the load voltage target value, and changes the target value of V _C1 according to the result. That is, if V _L is less than the load voltage target value as the target value of V _C1 is reduced, if V _L is higher than the load voltage target value set as a target value of V _C1 is increased.

The adjustment of V _C1 is performed by adjusting the regenerative operation of the power stored in the capacitor 4 to the system in the reduced voltage mode. The regenerative operation of the electric power stored in the capacitor 4 to the system is performed by the control unit 9a controlling the switches 511, 531 and 541. Among them, the comparison operation unit 11a and the conversion unit 12a adjust the duty ratio of the gate of the switch 511 so that V _C1 matches the target value. That is, when V _C1 is smaller than the target value, the PWM output time ratio becomes small, and when V _C1 is larger than the target value, the PWM output time ratio becomes large. As a result, V _L can be controlled according to the load voltage target value.

Next, a control method in the voltage increase mode will be described. FIG. 5C illustrates the operation based on the waveform of V _{0 in} the voltage increase mode. FIG. 5D shows an outline of the control in the voltage increase mode, and the comparison calculation unit 10b of the control unit 8 outputs the target value of V _C1 with the measured value of V _L and the load target voltage value as inputs. , comparing unit 11b of the control unit 9a outputs a control content of the switches 511 and 531 and 541 from the measured value of the target value and the V _C1 of V _C1, PWM converter as an input the output of the conversion unit 12b is comparing unit 11b And outputs a gate signal.

As shown in FIG. 5C, when the peak value of V ₀ falls below a predetermined correction threshold value, the voltage increase mode is entered and the flag of the voltage increase correction signal becomes H.
Similar to the reduced voltage mode, the switches 311 and 331 are turned on before the increased voltage mode is entered, that is, in a steady state. Then, during the period when the flag of the voltage increase correction signal is H, the control unit 8 realizes the voltage increase of V _L by switching on and off of the switches 311 to 341 in a predetermined cycle.

In the reduced voltage mode, the switches 311 and 341 are turned on when V ₀ is positive, and the switches 321 and 331 are turned on when negative, but in this increased voltage mode, when V ₀ is positive, that is, In the section (Y) of FIG. 4, the switches 321 and 331 are turned on, and when negative, that is, the switches 311 and 341 are turned on in the section (Z) of FIG.

Also in the voltage increase mode, if V _L increases too much, the operation of the load is affected. Therefore, V _C1 is controlled so that V _L becomes the load voltage target value as in the voltage reduction mode.
The adjustment of V _C1 is performed by adjusting the operation of taking power from the system into the capacitor 4 in this voltage increase mode. The operation of taking power from the system into the capacitor 4 is performed by the control unit 9a controlling the switches 511, 531 and 541. Among them, the comparison operation unit 11b and the conversion unit 12b adjust the time ratio of the gate of the switch 531, that is, the PWM output time ratio. In other words, V _C1 is smaller than the target value such that the ratio when the PWM output is increased, that V _C1 is so larger than the target value is the ratio when the PWM output is reduced, the V _L load voltage target value Can be controlled as expected.

In both the voltage increase mode and the voltage decrease mode, if the period for exchanging power with the system is increased by switching the switch 511 or the switch 531, i _L1 can be reduced, so that the inductor 52 can be reduced in size. Loss in the switch 511, 531 or 541 can be reduced.

Next, the waveform of _{VL in} the reduced voltage mode and the increased voltage mode will be described. FIG. 6 is a waveform diagram showing an example of the waveform of V _L in each mode. (A) to (d) show half-cycles in the reduced voltage mode, and (e) to (h) show half cycles in the increased voltage mode, respectively.

In each example, the dotted line indicates the voltage waveform of the load voltage target value. As for the solid line, (a) shows the waveform when V ₀ increases from the rated voltage, and (b) to (d) show the V when operating in the reduced voltage mode under the conditions of (a). The waveform of _L is shown. Further, (e) shows a waveform when V ₀ drops below the rated voltage, and (f) to (h) show V _L when operating in the voltage increasing mode under the condition (e). The waveform is shown.

In (b) and (f), the waveform of V _L is deformed by increasing or decreasing from V ₀ by an amount corresponding to V _C1 over the entire half cycle. On the other hand, in (c), (d), (g) and (h), the waveform of _VL is changed by increasing / decreasing from V ₀ by an amount corresponding to V _C1 in a part of a half cycle. I am letting.

Among these, (b), (c), (f) and (g) are obtained by correcting the voltage so that the voltage of the load voltage target value and the peak value of _VL coincide with each other. This is a correction method suitable for a load whose load power tends to change depending on. Among these, compared with (b) and (f) in which correction is performed in the entire region, in the waveforms of (c) and (g) in which correction is performed only in a part of the period, the waveform connection near the zero point is very smooth. Therefore, it is suitable for a load that causes instability at a zero point, such as a discharge lighting device. On the other hand, the waveforms of (b) and (f) are smooth except in the vicinity of the zero point, and are suitable for loads for obtaining the continuity of the waveform.

  Also, (d) and (h) are corrected so that the effective value of the waveform matches that of the load voltage target value, but are suitable for loads whose power etc. vary depending on the effective voltage. Yes.

Embodiment 2. FIG.
Next, an embodiment in which the current i _X related to the exchange of power with the grid is smoother than that in the first embodiment will be described. FIG. 7 is a circuit diagram showing a schematic circuit configuration of the second embodiment. As in the first embodiment, the inverter circuit 3a is connected in series between the system and the load, and the capacitor 4 connected in parallel to the inverter circuit 3a is connected to the system via the power conversion circuit 5b. The configuration of the power conversion circuit 5b is different.

  In the power conversion circuit 5b, a switch 511 and an inductor 52 are connected in parallel to the capacitor 4, and this inductor 52 is through which current flows when the power stored in the capacitor 4 is regenerated to the system or taken in from the system. The switch 511 controls the current between the inductor 52 and the capacitor 4.

  A switch 551 and a capacitor 56, which is a second capacitor, are connected in parallel to the inductor 52. The capacitor 56 temporarily stores power flowing into or out of the capacitor 4 via the inductor 52. The switch 551 The current between the inductor 52 and the capacitor 56 is controlled.

An intermediate point between the switch 551 and the capacitor 56 is connected to the system via switches 531 and 541 that control power exchange between the power conversion circuit 5b and the system.
Note that anti-parallel diodes 512, 532, 542, and 552 are connected to the switches 511, 531, 541, and 551, respectively.

  Further, a resistor 7 for adjusting the magnitude of the current between the power conversion circuit 5b and the system is connected in series between the switch 551 and the intermediate point of the capacitor 56 and the switch 531.

The operation the second embodiment, the operation of the inverter circuit 3a, to obtain a V _L by increasing or decreasing only from magnitude V ₀ corresponding to the V _C1 is the same as in the first embodiment, the V _C1 In order to keep constant, the operation | movement which exchanges electric power between systems via the power converter circuit 5b differs.

First, the operation in the reduced voltage mode will be described. FIG. 8 is an operation chart showing the operation of decreasing voltage in the second embodiment. (A) to (e) show the system voltage V ₀ , the load voltage V _L , the output voltage V _X of the inverter circuit 3a, the current i _X from the power conversion circuit 5b to the system, and the current i _{L1 of the} inductor 52, respectively.

When the voltage is reduced, the power of the capacitor 4 returns to the system by the following operation.
When the switches 531 and 551 are turned off in the entire area and the switch 511 is turned on and off, the current i _L1 flows through the inductor 52 as shown in (e), and the electric power stored in the capacitor 4 flows into the capacitor 56. Transition. Then, if the switch 541 is turned on during a part of the period (y) in which V ₀ is positive, the current i _X flows into the system via the resistor 7 and the antiparallel diode 532 as shown in (d). . The period of contains the switch 541, i.e. becomes enters switches 311 and 341 are on during a period (y), since the period, that is, the voltage applied to the segment (Y) in the resistor 7 increases, i _X is the It increases during the period.
As described above, when i _X flows into the system, the power stored in the capacitor 4 can be regenerated into the system via the inductor 52 and the capacitor 56.

Next, the operation of increasing voltage will be described. FIG. 9 is an operation chart showing the operation of increasing voltage in the first embodiment. As in FIG. 8, from (a) to (e), the system voltage V ₀ , the load voltage V _L , the output voltage V _X of the inverter circuit 3a, the current i _X from the power conversion circuit 5b to the system, and the current i of the inductor 52, respectively. _L1 is shown.

When increasing the voltage, the capacitor 4 is charged with electric power from the system by the following operation.
When the switches 511 and 541 are turned off in the entire region and the switch 551 is turned on and off, the current i _L1 flows through the inductor 52, and the electric power stored in the capacitor 56 is transferred to the capacitor 4. Then, if the switch 531 is turned on during a part (y) of the positive period of V ₀ , current flows from the system to the capacitor 56 via the resistor 7 and the antiparallel diode 542. Electric power necessary for the capacitor 4 can be charged from the system in the voltage mode.

As described above, the second embodiment has an advantage that the exchange is performed by the smoothed current through the capacitor 56 in the exchange of power with the system in the reduced voltage mode and the increased voltage mode.
In addition, since the current passes through the resistor 7, an excessive current is prevented from flowing when the switch 531 or 541 is turned on, and the loss in each switch increases or a switch with a large rating is There is an advantage that there is no restriction such as necessity.

When i _X flows through the resistor 7, a loss occurs in the resistor 7. If this loss is large, it becomes impossible to exchange power efficiently between the capacitor 4 and the system. Considering this point, how to determine the value of the voltage V _C2 of the capacitor 56 will be described.
When the period during which a current flows through the resistor 7 is constant, the loss in the resistor 7, that is, the power consumption due to heat generation, is determined by the magnitude of the voltage applied to the resistor 7. That is, if the voltage at both ends of the resistor 7 is V _r , the loss at the resistor 7 becomes ∫V _r ² / R · dt. Therefore, V _r may be reduced.

FIG. 10 is a comparison diagram showing the relationship between i _X and the corresponding V _{r in} the voltage increase mode in the second embodiment, and is a comparison by changing the value of V _C2 . (A) shows three examples of values of V _C2 from (X) to (Z) with respect to V ₀ , and (b) shows i at each V _C2 of (X) to (Z). _X and V _r are shown.
(X) is the case where V _C2 is the lowest. In this case, since V _r is the largest, the loss at the resistor 7 is the largest. Conversely, (Z) is a value where V _C2 is close to the peak value of V ₀ , and V _r is the smallest, so that the loss at the resistor 7 is small.

From the above, to reduce the loss in the resistor 7, when the increasing voltage mode to set the value of V _C2 to a value slightly lower than the peak value of V _0, and enters the switch 531 in the vicinity of the peak value of V ₀ It should be set as follows. Similarly, when the reduced voltage mode, set the value of V _C2 to a value slightly higher than the peak value of V _0, near the peak value of V ₀ may be set so as to enter the switch 541.

However, the settable range of V _C2 is determined by, for example, the withstand voltage of components such as switch elements and capacitors to be used, but the value of V _C2 cannot be made sufficiently high depending on the reasons such as component selection. V _C2 may not be sufficiently close to the peak value of V ₀ . Further, it is conceivable that V _C2 does not immediately follow the change in V ₀ during the transition period when V ₀ fluctuates. Even when V _C2 cannot be sufficiently close to the peak value of V ₀ in this way, the switch 531 or the switch 541 is turned on only when the value of V _C2 and the instantaneous value of V ₀ are close to each other by the same idea as described above. By doing so, the loss at the resistor 7 can be reduced.

Next, the control method of this Embodiment 2 is demonstrated. FIG. 11 is a block diagram showing a schematic configuration of the control circuit of the second embodiment. The configuration of the control unit 8 is the same as that of the first embodiment. In addition to the target value of V _C1 and the measured values of V ₀ and V _L from the control unit 8, the measured values of V _C1 and V _C2 are input to the control unit 9 b. In addition, a gate signal is output from the control unit 9b to the switches 511, 531, 541, and 551.

The relationship between the change in V ₀ and the operation of the control circuit is the same as that in the first embodiment shown in FIG. The control of V _{C1 in} the second embodiment will be described below.
The reduced voltage mode, as V _C1 adjusts the duty ratio of the gate of the switch 511 to match the target value, i.e., if V _C1 is smaller than the target value such that the ratio when the PWM output becomes small, large For example, V _L can be controlled according to the target value by controlling by the control unit 9b so that the duty ratio of the PWM output is increased.

The increasing voltage mode, as V _C1 adjusts the duty ratio of the gate of the switch 551 to match the target value, i.e., if V _C1 is smaller than the target value such that the ratio when the PWM output becomes large, larger For example, by controlling the control unit 9b so that the duty ratio of the PWM output becomes small, _VL can be controlled according to the target value.

As described above, by adjusting the time ratio of the switch 511 or the switch 551, V _C1 is controlled in the reduced voltage mode and the increased voltage mode. Since V _C2 changes at this time, the switch 531 or the switch 541 is controlled so as to keep V _C2 at a predetermined value in the control in consideration of the minimization of the loss in the resistor 7 as described above.
Note that, in both the reduced voltage mode and the increased voltage mode, the waveform of V _L is the same as that in the first embodiment and is as shown in the example of FIG.

Embodiment 3 FIG.
FIGS. 12 to 15 are configuration diagrams showing the configuration of the third embodiment in which an inexpensive diode is used instead of an expensive switch such as a MOSFET.
FIG. 12 shows the configuration of the first embodiment shown in FIG. 1, FIG. 13 shows the configuration of the second embodiment shown in FIG. 2, and the pair of the switch 321 and its antiparallel diode 322 and the switch 341 and the antiparallel thereof. The pair of diodes 342 and the switch 531 and its pair of anti-parallel diodes 532 are replaced with individual diodes 13 to 15, respectively. Further, in FIG. 13, the pair of the switch 551 and its antiparallel diode 552 is replaced with a single diode 16.
12 and 13 with this replacement, V _L obtained by adding V _C1 to V ₀ , that is, the operation of increasing voltage cannot be performed, but V _L obtained by subtracting V _C1 from V ₀ is obtained. It can be obtained and can be used as a circuit dedicated to voltage reduction.

On the other hand, FIG. 14 shows the configuration of the first embodiment shown in FIG. 1, and FIG. 15 shows the configuration of the second embodiment shown in FIG. The pair of anti-parallel diodes 542 is replaced by a single diode 17 and 18 respectively.
In the case of the configuration of FIGS. 14 and 15 in which this replacement has been performed, since the power cannot be discharged from the capacitor 4 or the capacitor 6 to the system, which has been performed through the switch 541, the voltage reduction operation cannot be performed. Can be used, and can be used as a circuit dedicated to voltage increase.
In any of these configurations shown in FIGS. 12 to 15, a circuit can be realized at low cost by replacing the pair of the switch and its antiparallel diode with a single diode.

BRIEF DESCRIPTION OF THE DRAWINGS It is a circuit diagram of Embodiment 1 of the power supply device which concerns on this invention. It is an operation | movement chart figure of Embodiment 1 of the power supply device which concerns on this invention. It is an operation | movement chart figure of Embodiment 1 of the power supply device which concerns on this invention. It is a block diagram of the control circuit of Embodiment 1 of the power supply device which concerns on this invention. It is a figure which shows the outline | summary of control of the power supply device which concerns on this invention. It is a wave form diagram which shows the example of the waveform of the power supply device which concerns on this invention. It is a circuit diagram of Embodiment 2 of the power supply device according to the present invention. It is an operation | movement chart figure of Embodiment 2 of the power supply device which concerns on this invention. It is an operation | movement chart figure of Embodiment 2 of the power supply device which concerns on this invention. It is a comparison figure of the power consumption of Embodiment 2 of the power supply device which concerns on this invention. It is a block diagram of the control circuit of Embodiment 2 of the power supply device which concerns on this invention. It is a circuit diagram of Embodiment 3 of the power supply device according to the present invention. It is a circuit diagram of Embodiment 3 of the power supply device according to the present invention. It is a circuit diagram of Embodiment 3 of the power supply device according to the present invention. It is a circuit diagram of Embodiment 3 of the power supply device according to the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Load 3a, 3b Inverter circuit 4 1st capacitor | condenser 5a, 5b, 5c, 5d, 5e, 5f Power conversion circuit 511 1st switch 52 Inductor 531 2nd switch 541 3rd switch 551 4th switch Switch 56 Second capacitor 8 First controller 9a, 9b Second controller

Claims (5)

  An inverter circuit connected in series to the AC power source and the load in a system between the AC power source and the load, a first capacitor connected in parallel to the inverter circuit, the first capacitor and the system Power converter circuit to be connected, when the voltage of the AC power source is greater than a predetermined value, in the positive and negative direction, and when the voltage of the AC power source is smaller than a predetermined value, in the same direction as the AC power source. A first control unit that controls the inverter circuit so that the voltage of the first capacitor is applied to the system; and power that flows from the system to the first capacitor is regenerated to the system, and A power supply apparatus comprising: a second control unit that controls the power conversion circuit so that power flowing out from the first capacitor to the system is charged from the system.   The power conversion circuit is connected to a first switch connected to the first capacitor, an inductor connecting the first switch and the first capacitor, and an intermediate point between the first switch and the inductor. The power supply apparatus according to claim 1, comprising a second switch and a third switch connecting the second switch and the system.   The power conversion circuit is connected to a first switch connected to a first capacitor, an inductor connecting the first switch and the first capacitor, and an intermediate point between the inductor and the first switch. A fourth switch, a second capacitor connecting the fourth switch and the inductor, a second switch connected to an intermediate point between the second capacitor and the fourth switch, and the second switch The power supply device according to claim 1, further comprising a third switch that connects the power source and the system.   An inverter circuit connected in series to the AC power source and the load in a system between the AC power source and the load, a first capacitor connected in parallel to the inverter circuit, the first capacitor and the system The inverter circuit is controlled so that the voltage of the first capacitor is applied to the system in the positive and negative direction with respect to the AC power supply when the voltage of the AC power supply circuit to be connected is greater than a predetermined value. And a second control unit for controlling the power conversion circuit so as to regenerate the power flowing into the first capacitor from the system into the system. apparatus.   An inverter circuit connected in series to the AC power source and the load in a system between the AC power source and the load, a first capacitor connected in parallel to the inverter circuit, the first capacitor and the system The inverter circuit is controlled so that the voltage of the first capacitor is applied to the system in the same direction as the AC power supply when the voltage of the AC power supply circuit to be connected is smaller than a predetermined value. And a second control unit that controls the power conversion circuit so as to charge the power flowing out from the first capacitor to the system from the system. apparatus.

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