JP2006033092A - Piezoelectric oscillator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric oscillator adopting a voltage-controlled varactor element of a MOS capacitor type wherein changes in the amount of an oscillated frequency, with respect to the change in an external control voltage is increased and its linearity, is enlarged. <P>SOLUTION: The voltage-controlled piezoelectric oscillator 20 is configured to include a piezoelectric vibrator 51 including a piezoelectric element excited at a prescribed frequency; an oscillation amplifier section 50 for supplying a current to the piezoelectric element to excite it; voltage-controlled varactor elements D1, D2; a feedback resistor Rf for interconnecting the input terminal and the output terminal of the oscillation amplifier section 50 to feed back the signal; a gain control section 58 for applying gain control to an external control voltage (VC) 54; high-resistance elements RA, RB used to apply an output voltage VAFC 59 of the gain control section 58 to the varactor elements D1, D2; capacitors CB1, CB2, CB3 acting as capacitive elements of the oscillation circuit; resistive elements RC, RD for voltage-dividing the output voltage VAFC 59; and an output buffer section 55 for externally outputting the oscillation signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a piezoelectric oscillator using a piezoelectric vibrator such as a crystal vibrator, and more particularly to a voltage controlled oscillator capable of linearly controlling the amount of change in oscillation frequency with a simple circuit configuration.

In recent years, for piezoelectric oscillators that add an oscillation circuit, a temperature compensation circuit, etc. to a piezoelectric vibrator such as a crystal vibrator, there is a strict demand for not only frequency stability but also miniaturization and price reduction, Furthermore, with the progress of digitalization of communication systems, it is desired to improve noise ratio characteristics (C / N characteristics) that have not been a problem in the past.
FIG. 5 is a diagram showing a circuit configuration of a conventional voltage-controlled piezoelectric oscillator. This voltage-controlled piezoelectric oscillator 100 includes a piezoelectric vibrator (quartz crystal vibrator) 51 including a piezoelectric element excited at a predetermined frequency, an oscillation amplifying unit 50 that causes current to flow through the piezoelectric element, and a voltage. Control-type variable capacitance elements D1 and D2, a feedback resistor Rf that feeds back a signal by connecting the output terminal and the input terminal of the oscillation amplification unit 50, and an external control voltage 54 that is applied to the variable capacitance elements D1 and D2. Resistor elements 52 and 53, capacitors CB1 and CB2 that function as capacitive elements of the oscillation circuit, and an output buffer unit 55 that outputs an oscillation signal to the outside are configured.
In this voltage controlled piezoelectric oscillator 100, MOS type variable capacitance elements D1 and D2 are arranged, and by applying a control voltage 54 to the variable capacitance elements D1 and D2 from the outside, the capacitance on the circuit side is changed to generate an oscillation frequency. Is changing. Further, a method of obtaining a necessary frequency change amount by controlling the gain of the voltage applied to the variable capacitance elements D1 and D2 is also common.

For example, Japanese Patent Laid-Open No. 2002-43846 discloses a voltage-controlled temperature compensated oscillator that can perform inspection for adjustment with high accuracy and high speed. According to this, it is composed of a control voltage generator that generates a control voltage represented by a cubic function of temperature, an RC filter that can switch the time constant, and a crystal oscillator. When a high level voltage is applied to the first control input terminal, Since the P-channel MOS, the N-channel MOS, and the other N-channel MOS are turned on, the time constant of the RC filter is reduced, and the crystal oscillator including the self-oscillation of the output buffer is stopped. When the first control input terminal is set to a low level and a high level voltage is applied to the second control input terminal, the P-channel MOS and N-channel MOS are turned on, and the other N-channel MOSs are turned off. At this time, it is disclosed that the time constant of the RC filter becomes small and an oscillation output can be obtained from the output terminal.
In addition, as a conventional example in which the noise ratio characteristic (C / N characteristic) is improved, Japanese Patent Laid-Open No. 11-251836 discloses that the noise component transmitted from the control voltage generation circuit to the crystal oscillation circuit is removed, and the phase noise is small. A temperature compensated oscillator is disclosed. According to this, a temperature detection circuit, a control voltage generation circuit, a frequency adjustment circuit, and an oscillation circuit are provided. In a temperature compensated oscillator, a noise component transmitted from the control voltage generation circuit to the oscillation circuit via the frequency adjustment circuit Increases the phase noise of the oscillation output of the oscillation circuit. Insert a low-pass filter between the control voltage generation circuit and the frequency adjustment circuit to transmit the noise component from the control voltage generation circuit to the oscillation circuit via the frequency adjustment circuit. Is going to be removed.
JP 2002-43846 A Japanese Patent Application Laid-Open No. 11-251836

However, the CV characteristic 57 of the actual MOS variable capacitance element has a very narrow gate voltage region 56 where the capacitance changes linearly as shown in FIG. 6, and the control voltage for changing the frequency linearly. There is a problem that is limited to a narrow range. In addition, if the range of the control voltage is narrowed, the frequency voltage sensitivity to the control voltage is increased, so that it is difficult to suppress the FM modulation noise component generated by the noise signal component depending on the voltage for controlling the oscillation frequency. As a result, there is a problem that the phase noise characteristic of the oscillator is deteriorated.
Further, in Patent Document 1, when the voltage from the control voltage generator is supplied via the RC filter, the time constant of the RC filter can be switched, and the time constant is switched by the inspection mode, thereby adjusting the inspection time for adjustment. This is a shortened invention, which is fundamentally different from the invention for linearly controlling the gain of the control voltage in the present invention.
Further, in Patent Document 2, in a method of applying temperature compensation control voltage to a varactor of an oscillation circuit and performing temperature compensation, noise generated from the control voltage is removed by a low pass filter to reduce absolute noise, thereby improving phase noise. However, there is a limit to the ability of the low-pass filter to reduce noise.
In view of such a problem, the present invention provides a voltage controlled oscillator using a MOS capacitive variable capacitance element, in which the amount of change in oscillation frequency with respect to a change in external control voltage is increased and the linearity is improved. An object is to provide an oscillator.

In order to solve the above problems, the present invention provides a piezoelectric vibrator including a piezoelectric element excited at a predetermined frequency, an oscillation amplifier for exciting the piezoelectric element by flowing current, And a second voltage-controlled variable capacitance element, wherein the voltage between the gate and the back gate of the first and second variable capacitance elements when the capacitance changes linearly is VGB. When the external control voltage for changing the frequency is changed, the voltage applied to the first and second variable capacitance elements is set within the range of the VGB.
A CV characteristic indicating a change in the capacitance C with respect to the gate voltage V of the variable capacitance element generally shows an S-curve. In other words, the capacitance C is constant at a low value with respect to the gate voltage V, changes rapidly and linearly, and becomes constant at a high value again. Moreover, the linearly changing region is very narrow, and a linear characteristic cannot be obtained unless a gate voltage is applied in this narrow linear region. Therefore, in the present invention, the voltage applied to the first and second variable capacitance elements is configured to be within a range in which the capacitance C changes linearly.
In this specification, the term “piezoelectric element” refers to an element in which excitation electrodes and lead terminals are formed on the main surface of the piezoelectric substrate, and the term “piezoelectric vibrator” refers to the piezoelectric element itself or the piezoelectric element hermetically sealed. An electronic component is designated.
According to a second aspect of the present invention, the gate terminal of the first variable capacitance element is connected to the input side of the oscillation amplifier, the gate terminal of the second variable capacitance element is connected to the output side of the oscillation amplifier, An oscillation circuit is configured by grounding back gate terminals of the first variable capacitance element and the second variable capacitance element via a common capacitance element, and the first variable capacitance element and the second variable capacitance element A voltage having a negative polarity with respect to the external control voltage is applied to the gate side of the first control capacitor element and the second variable voltage element by dividing the voltage having the negative polarity by resistance. It is applied to the back gate terminal of the variable capacitance element.
The circuit configuration of the present invention includes two variable capacitance elements, the gate terminal side of the first variable capacitance element is connected to the input side of the oscillation amplifier, and the gate terminal side of the second variable capacitance element is the oscillation amplifier. Connect to the output side of. The back gate terminals of the two variable capacitance elements are connected to one end of a capacitor, and the other end of the capacitor is grounded to constitute an oscillation circuit. Furthermore, a voltage having a negative polarity with respect to the external control voltage is applied via a high resistance, and the voltage is divided by resistance to be connected to the back gates of the two variable capacitance elements. Therefore, since the external control voltage is applied to the gates of the two variable capacitance elements and the divided voltage is applied to the back gate, a difference voltage between the external control voltage and the divided voltage is applied to both ends of each variable capacitance element. Will be applied.

According to a third aspect of the present invention, the resistance element that divides the resistance is configured by connecting in series a resistance element RC that is connected to the negative voltage side and a resistance element RD that is connected to the ground side. If the voltage VGB between the gate and the back gate when the capacitances of the first variable capacitance element and the second variable capacitance element change linearly is in the range of VGB1 to VGB2, the first variable capacitance element is VC. With respect to the voltage VAFC having a negative polarity applied to the gate side of the capacitive element and the second variable capacitive element, when the voltage VGB is in the range of VGB1 to VGB2 and the VC is the minimum value, VGB2 is obtained. The constants of the resistance elements RC and RD are set so that VGB1 is obtained when VC is the maximum value.
In the present invention, the external control voltage is applied to the gates of the two variable capacitance elements, and the divided voltage is applied to the back gate. Therefore, the difference voltage between the external control voltage and the divided voltage is applied to both ends of each variable capacitance element. Will be applied. That is, when the external control voltage is the minimum value, the largest potential difference is generated at both ends of each variable capacitance element, and when the external control voltage is the maximum value, the smallest potential difference is generated at both ends of each variable capacitance element. To do. If the constants of the resistance elements RC and RD are determined so that these potential differences are VGB2 and VGB1, respectively, the gradient of the divided voltage is determined, and VGB is applied linearly with respect to the change in the external control voltage. Can do.
According to a fourth aspect of the present invention, a varactor, a variable capacitance diode, or a semiconductor device whose capacitance is variable by an applied voltage is used as the variable capacitance element.
If the capacitance is changed by an external applied voltage, a variable capacitance diode, a junction FET gate-source or gate-drain capacitance, a MOS FET gate-source or gate-drain capacitance, a bipolar transistor base- The oscillator of the present invention can also be configured using an emitter capacitor or a base-collector capacitor.

According to the first aspect of the present invention, when the voltage between the gate and the back gate of the two variable capacitance elements when the capacitance of the variable capacitance element changes linearly is VGB, the external control voltage for changing the frequency is By changing the voltage applied to the two variable capacitance elements within the range of VGB, which is a linear region, the frequency of the external control voltage can be linearly increased over a wide range with a simple circuit configuration. Can be changed.
In the second aspect of the present invention, the circuit is configured so that the differential voltage between the external control voltage and the divided voltage is applied to both ends of each variable capacitance element. The divided voltage can be changed linearly with respect to the control voltage.
Further, in claim 3, the constants of the resistance elements RC and RD are determined so that the potential difference between the external control voltage and the divided voltage becomes VGB2 and VGB1, respectively, so that the gradient of the divided voltage is determined and the change of the external control voltage In contrast, VGB can be applied linearly.
According to the fourth aspect of the present invention, a variable capacitance diode or a semiconductor device whose capacitance can be changed by an applied voltage can be used as the variable capacitance element. Therefore, the circuit configuration is widened, and accordingly, variations in circuit characteristics are widened.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
FIG. 1 is a diagram showing a circuit configuration of a voltage controlled piezoelectric oscillator according to the present invention. The same components as those in FIG. 5 are described with the same reference numerals.
The voltage-controlled piezoelectric oscillator 20 includes a piezoelectric vibrator (quartz crystal vibrator) 51 including a piezoelectric element excited at a predetermined frequency, an oscillation amplification unit 50 that causes current to flow through the piezoelectric element, and a voltage. Control-type variable capacitance elements D 1 and D 2, a feedback resistor Rf that feeds back a signal by connecting the output terminal and the input terminal of the oscillation amplification section 50, and a gain control section 58 that controls the gain of the external control voltage (VC) 54. And high resistance elements RA and RB that apply the output voltage VAFC59 of the gain control unit 58 to the variable capacitance elements D1 and D2, capacitors CB1, CB2, and CB3 that function as the capacitance elements of the oscillation circuit, and a resistance that divides the output voltage VAFC59. Elements RC and RD and an output buffer unit 55 that outputs an oscillation signal to the outside are configured.
The voltage controlled piezoelectric oscillator 20 includes MOS type variable capacitance elements D1 and D2, and the gate terminal side D1g of the variable capacitance element D1 is connected to the input side 50a of the oscillation amplification unit 50 via the capacitor CB1. The gate terminal side D2g of the variable capacitance element D2 is connected to the output side 50b of the oscillation amplification unit 50 through the capacitor CB2. Further, the back gate terminal side D1bg of the variable capacitance element D1 and the back gate terminal side D2bg of the variable capacitance element D2 are connected and grounded via the capacitor CB3. The output voltage VAFC 59 of the gain control unit 58 is connected to the gate terminal side D1g of the variable capacitance element D1 through the high resistance element RA, and is also connected to the gate terminal side D2g of the variable capacitance element D2 through the high resistance element RB. Connected to. Further, a circuit in which the voltage dividing resistor elements RC and RD are connected in series is grounded, and one end thereof is connected to the output voltage VAFC 59 of the gain control unit 58, and the midpoint A, the back gate terminal side D1bg of the variable capacitance element D1, and the variable capacitance The connection point of the back gate terminal side D2bg of the element D2 is connected.
Thus, when the voltage between the gate and back gate of the two variable capacitance elements when the capacitance of the variable capacitance elements D1 and D2 changes linearly is VGB, the external control voltage 54 for changing the frequency is changed. In this case, the voltage applied to the two variable capacitance elements is configured to be within the range of the VGB 56 which is a linear region, so that the frequency of the external control voltage is linearly changed over a wide range with a simple circuit configuration. be able to.

  FIG. 2 is a diagram illustrating a relationship between a voltage value applied between terminals and a variable capacitance in a MOS variable capacitance element which is a variable capacitance element. The vertical axis represents the variable capacitance value (C), and the horizontal axis represents the applied voltage value (V). This figure shows the basic characteristics of a MOS type variable capacitance element. When the applied voltage value (V) is changed linearly, the variable capacitance value (C) changes nonlinearly as shown in the figure (characteristics). 57). In other words, when the applied voltage value (V) to the MOS type variable capacitance element becomes a negative potential, the variable capacitance value (C) decreases and becomes a substantially constant capacitance from a predetermined potential. Almost disappear. Further, when the applied voltage value (V) becomes a positive potential, the variable capacitance value (C) increases to become a substantially constant capacitance from a predetermined potential, and there is almost no capacitance change with respect to the voltage change. Here, when the voltage VGB between the gates and back gates of the variable capacitance elements D1 and D2 when the capacitance changes linearly is the region 56 of VGB1 to VGB2 in FIG. 2, the external control voltage (VC) 54 changes. When the voltage applied to the variable capacitance elements D1 and D2 is within the range of the region 56, the variable capacitance value (C) greatly changes linearly, so that the frequency change can be increased linearly. .

FIG. 3 is a diagram showing the relationship between the external control voltage (VC) and the voltage applied to the variable capacitance elements D1 and D2. The vertical axis represents the voltage applied to the variable capacitance elements D1 and D2, and the horizontal axis represents the external control voltage (VC). As shown in FIG. 1, the gate terminals D1g and D2g of the variable capacitance elements D1 and D2 have a negative polarity with respect to the external control voltage (VC) by gain control of the external control voltage (VC) by the gain control unit 58. The voltage VAFC is applied via the high resistances RA and RB, and the voltage obtained by dividing the voltage VAFC by the resistance elements RC and RD is applied to the back gate terminals D1bg and D2bg of the variable capacitance elements D1 and D2. At this time, the voltage VGB between the gate and the gate back falls within the range of VGB1 to VGB2 with respect to the voltage VAFC applied to the gate terminals D1g and D2g of the variable capacitance elements D1 and D2, and the voltage VGB2 is VGB2 when VC is Min. Thus, the constants of the resistance elements RC and RD are set so as to be VGB1 when VC is Max, and the resistance voltage dividing ratio is optimized.
That is, when the voltage VAFC is the straight line 71 and the resistance-divided voltage (the voltage at the point A) is the straight line 70, the external control voltage (VC) Min and the intersections R and P of the respective straight lines are the same. ) If intersections S and Q between Max and the respective straight lines are set, point P is set so that the voltage difference between intersections P and R becomes VGB2 at the external control voltage (VC) Min. VC) If the Q point is set so that the voltage difference between the intersections S and Q becomes VGB1 at Max, the gradient of the straight line 70 connecting the point P and the point Q is determined, and the voltage dividing resistors RC and RD are It is determined uniquely.

Since the circuit is configured such that the difference voltage between the external control voltage 54 and the divided voltage (point A voltage) is applied to both ends of each variable capacitance element, it is unambiguous if the constant of the voltage dividing resistor is determined. In addition, the divided voltage 70 can be changed linearly with respect to the control voltage 71. Further, the noise superimposed on the voltage VAFC 59 is divided by a voltage dividing resistor and applied to both terminals of the variable capacitance elements D1 and D2, but the noise applied to both ends of the variable capacitance element has the same phase. Therefore, the voltage between the terminals of the variable capacitance element does not fluctuate greatly due to the influence of noise, and as a result, the noise characteristics of the oscillator are excellent.
FIG. 4 is a diagram of frequency control characteristics when the voltage dividing resistors RC and RD are set so as to have the relationship of FIG. As is clear from FIG. 4, it is possible to increase the frequency variable amount while maintaining good linearity. That is, the ideal characteristic (dotted line 73) is substantially equal to the ideal characteristic in the range of VGB1 and VGB2 (solid line 72). In general, the resistance values of the resistors RC and RD for dividing the voltage VAFC have a relationship of RC <RD, and in this embodiment, the resistance ratio is about RC: RD = 1: 2.8. Set.

The figure which shows the circuit structure of the voltage control type piezoelectric oscillator of this invention. The figure showing the relationship between the applied voltage value between terminals and variable capacitance in the MOS type variable capacitance element which is a variable capacitance element. The figure showing the relationship between an external control voltage (VC) and the voltage applied to the variable capacitance elements D1 and D2. The figure of the frequency control characteristic at the time of setting voltage dividing resistance RC and RD so that it may become the relationship of FIG. The figure which shows the circuit structure of the conventional voltage control type piezoelectric oscillator. The figure which shows the CV characteristic of an actual MOS type variable capacitance element.

Explanation of symbols

20 Voltage Control Type Piezoelectric Oscillator, 50 Oscillation Amplifier, 51 Piezoelectric Vibrator (Quartz Crystal Vibrator), 54 External Control Voltage (VC), 55 Output Buffer Unit, 58 Gain Control Unit, 59 Output Voltage VAFC, D1, D2 Voltage Control type variable capacitance element, Rf feedback resistance, RA, RB high resistance element, CB1, CB2, CB3 capacitor, RC, RD resistance element

Claims (4)

A piezoelectric vibrator having a piezoelectric element excited at a predetermined frequency, an oscillation amplifier for exciting the piezoelectric element by flowing a current, and first and second voltage-controlled variable capacitance elements were provided. A piezoelectric oscillator,
The voltage between the gate and back gate of the first and second variable capacitance elements when the capacitance changes linearly is VGB, and when the external control voltage for changing the frequency is changed, the first and second variable capacitance elements are changed. 2. A piezoelectric oscillator characterized in that the voltage applied to the two variable capacitance elements is in the range of VGB. The gate terminal of the first variable capacitance element is connected to the input side of the oscillation amplifier, the gate terminal of the second variable capacitance element is connected to the output side of the oscillation amplifier, and the first variable capacitance element is further connected. An oscillation circuit is configured by grounding the back gate terminals of the capacitive element and the second variable capacitive element through a common capacitive element,
A voltage having a negative polarity with respect to the external control voltage is applied to the gate sides of the first variable capacitance element and the second variable capacitance element via a resistance element, and the negative voltage is applied as a resistance. 2. The piezoelectric oscillator according to claim 1, wherein the piezoelectric oscillator is divided and applied to back gate terminals of the first variable capacitor and the second variable capacitor. The resistance element that divides the resistance is configured by connecting in series a resistance element RC connected to the negative voltage side and a resistance element RD connected to the ground side, and the external control voltage is VC, When the voltage VGB between the gate and the back gate when the capacitances of the first variable capacitor and the second variable capacitor linearly change is in the range of VGB1 to VGB2,
The voltage VGB is within the range of VGB1 to VGB2 and the VC is the minimum value with respect to the voltage VAFC having a negative polarity applied to the gate sides of the first variable capacitor and the second variable capacitor. 3. The piezoelectric oscillator according to claim 1, wherein constants of the resistance elements RC and RD are set so that VGB <b> 2 when Vc <b> 2 and VGB <b> 1 when VC is a maximum value. 4. The piezoelectric oscillator according to claim 1, wherein a varactor, a variable capacitance diode, or a semiconductor device whose capacitance is changed by an applied voltage is used as the variable capacitance element. 5.

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