JP2005352858A

JP2005352858A - Communication type recording medium

Info

Publication number: JP2005352858A
Application number: JP2004174139A
Authority: JP
Inventors: Koichi Kamisaka; 晃一上坂
Original assignee: Hitachi Maxell Ltd
Current assignee: Maxell Holdings Ltd
Priority date: 2004-06-11
Filing date: 2004-06-11
Publication date: 2005-12-22

Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication type recording medium such as a noncontact IC card or an RFID system that increases a communication range. <P>SOLUTION: A first wiring 110 formed on one side of a base forms: (1) a first coil pattern 111 formed at the end of the first wiring while facing a chip coil 13 across an insulator layer; (2) a third coil pattern 112 extending from the outermost periphery of the first coil pattern 111 and wound in the direction opposite to the winding direction of the first coil pattern 111; and (3) a first capacity-forming electrode pattern 113 formed at the end of the third coil pattern 112. A second wiring 120 formed on the other side of the base forms a second coil pattern 121 formed at the end of the second wiring 120 while facing the first coil pattern 111 via the base, and a second capacity-forming electrode pattern 123 formed at the end of the second wiring 120 while facing the capacity-forming electrode pattern 113 via the base. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、非接触ＩＣカード、ＲＦＩＤシステム等の、通信式記録担体の構造に関する。 The present invention relates to the structure of a communication-type record carrier such as a non-contact IC card and an RFID system.

スルーホール加工を必要としないＩＣカードとして、特許文献１記載のＩＣカードが知られている。このＩＣカードの誘電体シートの両面には、容量結合するアンテナコイルが形成されている。各アンテナコイルと半導体チップのコイルとの磁気結合効率が高くなるように、各アンテナコイルを構成する配線の一部は、それぞれ、半導体チップのチップコイルに沿った迂回路、具体的には、四角形の領域をその四辺に沿って迂回する迂回路を経由している。 As an IC card that does not require through-hole processing, an IC card described in Patent Document 1 is known. Antenna coils for capacitive coupling are formed on both surfaces of the dielectric sheet of the IC card. In order to increase the magnetic coupling efficiency between each antenna coil and the coil of the semiconductor chip, a part of the wiring constituting each antenna coil is a detour along the chip coil of the semiconductor chip, specifically, a rectangular shape. This route is routed along a detour that bypasses the area along the four sides.

特開２００２−１０９４９２号公報JP 2002-109492 A

ところが、上記従来のＩＣカードの構造においては、迂回路の内側に、配線が形成されていない四角形領域が残される。このため、チップコイルの対向領域の配線密度がその分小さくなり、ＩＣチップに供給される電力が小さくなる。その結果、通信距離が制限される。 However, in the above-described conventional IC card structure, a square area where no wiring is formed is left inside the detour. For this reason, the wiring density in the opposing region of the chip coil is reduced accordingly, and the power supplied to the IC chip is reduced. As a result, the communication distance is limited.

そこで、この領域を小さくすると、今度は、迂回路の一辺において、迂回路の起点−終点間の幅が占める割り合いが大きくなり、迂回路の形状が、四角形の領域をその三辺だけに沿って迂回する形状に近くなる。このため、アンテナコイルと半導体チップのコイルとの磁気結合効率が低下し、ＩＣチップに供給される電力が小さくなる。その結果、通信距離が制限される。 Therefore, if this area is reduced, this time, the percentage occupied by the width between the start and end points of the detour is increased on one side of the detour, and the detour is formed along the three sides of the square area. It becomes close to the shape to detour. For this reason, the magnetic coupling efficiency between the antenna coil and the coil of the semiconductor chip is lowered, and the power supplied to the IC chip is reduced. As a result, the communication distance is limited.

そこで、本発明は、より通信距離の長い通信式記録担体を提供することを目的とする。 Therefore, an object of the present invention is to provide a communication record carrier having a longer communication distance.

本発明は、
配線基板と半導体装置との間隔以上の距離離れたリーダライタと通信可能な通信式記録担体であって、
前記半導体装置は、
前記配線基板側の面にチップコイルを有し、
前記配線基板は、
前記半導体装置側の面に形成された第１配線と、
前記第１配線と前記チップコイルとの間に設けられた絶縁体層と、
を有し、
前記第１配線の端部は、前記絶縁層を挟んで前記チップコイルに対向する第１コイルパターンを形成することを特徴とする通信式記録担体を提供する。 The present invention
A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulator layer provided between the first wiring and the chip coil;
Have
An end portion of the first wiring forms a first coil pattern facing the chip coil with the insulating layer interposed therebetween, providing a communication type record carrier.

本発明は、通信式記録担体の通信距離をより長くすることができる。 The present invention can further increase the communication distance of the communication type record carrier.

以下に、添付図を参照しながら、本発明の実施の形態について説明する。 Embodiments of the present invention will be described below with reference to the accompanying drawings.

まず、本実施の形態に係る通信式記録担体の構造について説明する。ここでは、ＩＣカードを具体例として挙げる。 First, the structure of the communication type record carrier according to the present embodiment will be described. Here, an IC card is given as a specific example.

図５に示すように、ＩＣカードは、絶縁体(誘電体)で形成されたシート状の基材１００、基材１００の両面に形成された配線層１１０,１２０、一方の配線層(以下、第１配線層)１１０上に積層された絶縁体(誘電体)層１４０、絶縁層１４０を介して第１配線層１１０の一部(後述の第１コイルパターン)に対向するチップコイル１３１が形成された半導体チップ１３０、各配線層１１０,１２０及び半導体チップ１３０を覆うように基材１００の両面に重ねられた絶縁体(誘電体)シート(不図示)、を有している。 As shown in FIG. 5, the IC card includes a sheet-like base material 100 formed of an insulator (dielectric material), wiring layers 110 and 120 formed on both surfaces of the base material 100, one wiring layer (hereinafter referred to as “the wiring layer”). An insulating (dielectric) layer 140 laminated on the (first wiring layer) 110, and a chip coil 131 facing a part of the first wiring layer 110 (first coil pattern described later) through the insulating layer 140 is formed. The semiconductor chip 130, the wiring layers 110 and 120, and the insulating (dielectric) sheets (not shown) stacked on both surfaces of the base material 100 so as to cover the semiconductor chip 130 are provided.

なお、配線層１１０,１２０の形成材料は、例えば、基材１００が比誘電率３〜５のＰＥＴまたは比誘電率２〜５のテフロン(登録商標)である場合にはアルミニウム、基材１００が比誘電率３〜１０のＦＰＣである場合には銅であることが望ましい。また、チップコイル１３１と第１配線層１１０との間に介在する絶縁体層１４０は、例えばシリコーン接着剤で形成される。 For example, when the base material 100 is PET having a relative dielectric constant of 3 to 5 or Teflon (registered trademark) having a relative dielectric constant of 2 to 5, the forming material of the wiring layers 110 and 120 is aluminum. In the case of an FPC having a relative dielectric constant of 3 to 10, copper is desirable. The insulator layer 140 interposed between the chip coil 131 and the first wiring layer 110 is formed of, for example, a silicone adhesive.

第１配線層１１０に含まれる配線は、図１に示すように、(１)絶縁体層１４０を挟んでチップコイル１３に対向する第１コイルパターン１１１、(２)第１コイルパターン１１１の最外周から続き、第１コイルパターン１１１の巻き方向とは逆方向に巻いた第３コイルパターン１１２、(２)第３コイルパターン１１２の端部につながる第１容量形成用電極パターン１１３、を形成している。なお、第３コイルパターン１１２の形成領域の面積は、第１コイルパターン１１１の形成領域の面積よりも大きい。 As shown in FIG. 1, the wiring included in the first wiring layer 110 includes (1) a first coil pattern 111 facing the chip coil 13 with the insulator layer 140 interposed therebetween, and (2) an outermost portion of the first coil pattern 111. A third coil pattern 112 that continues from the outer periphery and is wound in a direction opposite to the winding direction of the first coil pattern 111, and (2) a first capacitance forming electrode pattern 113 that is connected to the end of the third coil pattern 112 is formed. ing. The area of the formation region of the third coil pattern 112 is larger than the area of the formation region of the first coil pattern 111.

一方、第２配線層１２０に含まれている配線は、基材１００を介して第１コイルパターン１１１に対向する第２コイルパターン１２１、基材１００を介して容量形成用電極パターン１１３に対向する第２容量形成用電極パターン１２３、を形成している。第２コイルパターン１２１が第１コイルパターン１２１に容量結合し、第２容量形成用電極パターン１２３が第１容量形成用電極１１３に磁気結合するため、第１及び第２配線層１１０,１２０を接続するスルーホール等は設けられていない。 On the other hand, the wiring included in the second wiring layer 120 faces the second coil pattern 121 facing the first coil pattern 111 via the base material 100 and the capacitance forming electrode pattern 113 via the base material 100. A second capacitance forming electrode pattern 123 is formed. Since the second coil pattern 121 is capacitively coupled to the first coil pattern 121 and the second capacitance forming electrode pattern 123 is magnetically coupled to the first capacitance forming electrode 113, the first and second wiring layers 110 and 120 are connected. There are no through-holes or the like.

このようなＩＣカードがリーダライタの無線通信範囲を通過すると、リーダライタのコイル(以下、Ｒ／Ｗコイル)２００が発生する磁界によって第３コイルパターン１１２に誘導起電力が発生し、第３コイルパターン１１２に電流が流れる。そして、ＩＣカード内の全インダクタンス(第３コイルパターン１１２の自己インダクタンス、第１及び第３コイルパターンの自己及び相互インダクタンス、チップコイル１２１及び第１コイルパターン１１１の自己及び相互インダクタンス)及び全容量(配線上の浮遊容量、第１及び第２容量形成用電極１１３,１２３間の容量)によって共振が起こるため、第１コイルパターン１１１に流れる電流値が増大する。これにより、第１コイルパターン１１１が再放射する磁界強度が大きくなる。このため、ＩＣチップと基材との間隔以上の距離離れた、リーダライタのアンテナコイルとの間でデータ送受信が可能なＩＣカード(例えば、通信距離１０ｃｍ以上の近傍型ＩＣカード、通信距離２ｍｍ以上の近接型ＩＣカード)として機能可能な程度に、チップコイル１３１への電力伝送・通信信号のレベルを増大させることができる。 When such an IC card passes through the wireless communication range of the reader / writer, an induced electromotive force is generated in the third coil pattern 112 by the magnetic field generated by the reader / writer coil (hereinafter referred to as R / W coil) 200, and the third coil. A current flows through the pattern 112. The total inductance (the self-inductance of the third coil pattern 112, the self and mutual inductance of the first and third coil patterns, the self and mutual inductance of the chip coil 121 and the first coil pattern 111) and the total capacity ( Since resonance occurs due to the stray capacitance on the wiring and the capacitance between the first and second capacitance forming electrodes 113 and 123, the value of the current flowing through the first coil pattern 111 increases. Thereby, the magnetic field intensity which the 1st coil pattern 111 re-radiates becomes large. For this reason, an IC card (for example, a proximity IC card having a communication distance of 10 cm or more, a communication distance of 2 mm or more, capable of transmitting / receiving data to / from the antenna coil of the reader / writer that is separated by a distance greater than the distance between the IC chip and the substrate The level of the power transmission / communication signal to the chip coil 131 can be increased to the extent that it can function as a proximity IC card).

ここで、第１コイルパターン１１１は、配線が、その端部１１１Ａの周りに複数回巻かれ、第３コイルパターン１１２へとつながる形状をなしている。このような形状は、配線が形成されていない四角形等の領域をコイルパターン軸心部に残さなくても、または、そのような四角形等の領域を小さくしても、コイル軸心周り３６０度にわたってぐるりと配線が存在する。このため、チップコイルに対向する迂回路部分をアンテナコイルに設ける場合と比較して、チップコイル１３１への電力伝送・通信信号のレベルを増大させることができ、通信距離をより長くすることができる。 Here, the first coil pattern 111 has a shape in which the wiring is wound around the end portion 111 </ b> A a plurality of times and connected to the third coil pattern 112. Even if such a shape does not leave a region such as a quadrangle in which no wiring is formed in the coil pattern axial center part or a region such as such a quadrangle is small, it extends over 360 degrees around the coil axis. There are loops and wiring. For this reason, compared with the case where the detour part which opposes a chip coil is provided in an antenna coil, the level of the electric power transmission and communication signal to the chip coil 131 can be increased, and communication distance can be made longer. .

ところで、図１の構成においては、第１及び第２配線層１１０,１２０に容量形成用電極１１３,１２３を設けているが、図２に示すように、容量形成用電極１１３,１２３の代わりに、第３コイルパターン１１２よりも小さな第４及び第５コイルパターン(層間接続用コイルパターン)１１４,１２４を基材１００の第１及び第２配線層１１０,１３０に設けてもよい。なお、これらの層間接続用コイルパターン１１４,１２４は、第1コイルパターンと同様、配線が、その端部の周りに複数回巻かれた形状を有している。 In the configuration of FIG. 1, the first and second wiring layers 110 and 120 are provided with capacitance forming electrodes 113 and 123. However, as shown in FIG. The fourth and fifth coil patterns (interlayer connection coil patterns) 114 and 124 smaller than the third coil pattern 112 may be provided on the first and second wiring layers 110 and 130 of the substrate 100. These interlayer connection coil patterns 114 and 124 have a shape in which the wiring is wound around its end portion a plurality of times, like the first coil pattern.

これらの層間接続用コイル１１４,１２４が磁気結合するため、図２の構成を有するＩＣカードも、図１の構成を有するＩＣカードと同様に機能する。また、図４に示すように、図２の構成に含まれる第２コイルパターン１２１の代わりに基板表裏接続用パッド１２５を設けても、図１の構成を有するＩＣカードと同様に機能する。 Since these interlayer connection coils 114 and 124 are magnetically coupled, the IC card having the configuration of FIG. 2 functions in the same manner as the IC card having the configuration of FIG. Further, as shown in FIG. 4, even if a board front / back connection pad 125 is provided instead of the second coil pattern 121 included in the configuration of FIG. 2, it functions in the same manner as the IC card having the configuration of FIG.

また、図１の構成においては、基材１００を挟んで第１コイルチップ１１１に第２コイルパターン１２１を対向させているが、図３に示すように、第２コイルパターン１２１の代わりに基板表裏接続用パッド１２５を第２配線層１２０に設けてもよい。ＩＣカードのコイルの巻数には、インダクタンス及び浮遊容量により定まる自己共振周波数を搬送周波数以上とする必要から、上限が存在する。ところが、図３の構成によれば、共振用容量パッド１１３,１２３によって発生する容量と、第１コイルパターン１１１及び基板表裏接続用パッド１２５によって発生する容量とが直列に接続されるため、全体の容量が大幅に小さくなる。したがって、第３コイルパターン１１２または／および第１コイルパターン１１１の巻数を多くすることができる。 In the configuration of FIG. 1, the second coil pattern 121 is opposed to the first coil chip 111 with the base material 100 sandwiched therebetween, but as shown in FIG. The connection pad 125 may be provided on the second wiring layer 120. There is an upper limit to the number of turns of the coil of the IC card because the self-resonant frequency determined by the inductance and stray capacitance must be equal to or higher than the carrier frequency. However, according to the configuration of FIG. 3, the capacitance generated by the resonance capacitance pads 113 and 123 and the capacitance generated by the first coil pattern 111 and the board front / back connection pad 125 are connected in series. The capacity is greatly reduced. Therefore, the number of turns of the third coil pattern 112 and / or the first coil pattern 111 can be increased.

なお、以上においては、ＩＣカードを例に挙げたが、本実施の形態に係る構造は、ＲＦＩＤシステム等、他の通信式記録担体にも適用可能である。そして、本実施の形態に係る通信式記録担体には、例えば、搭載されたＩＣチップに情報を記憶させる記憶媒体として使用可能である。 In the above description, an IC card is used as an example. However, the structure according to the present embodiment can also be applied to other communication type record carriers such as an RFID system. The communication type record carrier according to the present embodiment can be used as a storage medium for storing information in an IC chip mounted thereon, for example.

本発明の実施の一形態に係る通信式情報担体における、各コイルパターンの位置関係を示した図である。It is the figure which showed the positional relationship of each coil pattern in the communication type information carrier which concerns on one Embodiment of this invention. 本発明の実施の一形態に係る通信式情報担体における、各コイルパターンの位置関係を示した図である。It is the figure which showed the positional relationship of each coil pattern in the communication type information carrier which concerns on one Embodiment of this invention. 本発明の実施の一形態に係る通信式情報担体における、各コイルパターンの位置関係を示した図である。It is the figure which showed the positional relationship of each coil pattern in the communication type information carrier which concerns on one Embodiment of this invention. 本発明の実施の一形態に係る通信式情報担体における、各コイルパターンの位置関係を示した図である。It is the figure which showed the positional relationship of each coil pattern in the communication type information carrier which concerns on one Embodiment of this invention. 本発明の実施の一形態に係る通信式情報担体の構造を説明するための図である。It is a figure for demonstrating the structure of the communication-type information carrier which concerns on one Embodiment of this invention.

Explanation of symbols

１１１…第１コイルパターン、１１２…第２コイルパターン、１１３…第１容量形成用電極、１１４…層間接続用コイル、１２１…第３コイルパターン、１２２…第４コイルパターン、１２３…第２容量形成用電極、１２４…層間接続用コイル、１２５…基板表裏接続用容量パッド、２００…Ｒ／Ｗコイル
DESCRIPTION OF SYMBOLS 111 ... 1st coil pattern, 112 ... 2nd coil pattern, 113 ... 1st capacity | capacitance formation electrode, 114 ... Interlayer connection coil, 121 ... 3rd coil pattern, 122 ... 4th coil pattern, 123 ... 2nd capacity formation Electrode, 124 ... Coil for interlayer connection, 125 ... Capacitance pad for board front / back connection, 200 ... R / W coil

Claims

A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulator layer provided between the first wiring and the chip coil;
Have
The communication record carrier according to claim 1, wherein an end of the first wiring forms a first coil pattern facing the chip coil with the insulating layer interposed therebetween.

A communication record carrier according to claim 1,
The wiring board has a second wiring formed on a surface opposite to the semiconductor device, and an end portion of the second wiring faces the first coil pattern with the wiring board interposed therebetween. A communication type record carrier, wherein a second coil pattern is formed.

A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulating layer interposed between the first wiring and the chip coil;
A second wiring formed on a surface opposite to the semiconductor device;
Have
The first wiring is
A first coil pattern formed at one end of the first wiring and facing the chip coil across the insulating layer;
A fourth coil pattern formed at the other end of the first wiring;
A third coil pattern larger than the first and fourth coil patterns connected to the first coil pattern and the fourth coil pattern;
Have
The second wiring is
A second coil pattern formed at one end of the second wiring;
A fifth coil pattern formed at the other end of the second wiring and facing the fourth coil pattern across the wiring board;
A communication-type record carrier.

A communication record carrier according to claim 3,
The communication type record carrier, wherein the second coil pattern and the first coil pattern are opposed to each other with the wiring board interposed therebetween.

A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulating layer interposed between the first wiring and the chip coil;
A second wiring formed on a surface opposite to the semiconductor device;
Have
The first wiring is
A first coil pattern formed at one end of the first wiring and facing the chip coil across the insulating layer;
A fourth coil pattern formed at the other end of the first wiring;
A third coil pattern larger than the first and fourth coil patterns connected to the first coil pattern and the fourth coil pattern;
Have
The second wiring is
An electrode pattern formed at one end of the second wiring and facing the first coil pattern across the wiring board;
A fifth coil pattern formed at the other end of the second wiring and facing the fourth coil pattern across the wiring board;
A communication-type record carrier.

A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulating layer interposed between the first wiring and the chip coil;
A second wiring formed on a surface opposite to the semiconductor device;
Have
The first wiring is
A first coil pattern formed at one end of the first wiring and facing the chip coil across the insulating layer;
A first electrode pattern formed at the other end of the first wiring;
A third coil pattern larger than the first coil pattern connected to the first coil pattern and the first electrode pattern;
Have
The second wiring is
A second coil pattern formed at one end of the second wiring and facing the first coil pattern across the wiring board;
A second electrode pattern formed at the other end of the second wiring and facing the first electrode pattern across the wiring board;
A communication-type record carrier.

A communication type record carrier capable of communicating with a reader / writer separated by a distance greater than or equal to the distance between the wiring board and the semiconductor device,
The semiconductor device includes:
A chip coil on the surface of the wiring board side;
The wiring board is
A first wiring formed on a surface on the semiconductor device side;
An insulating layer interposed between the first wiring and the chip coil;
A second wiring formed on a surface opposite to the semiconductor device;
Have
The first wiring is
A first coil pattern formed at one end of the first wiring and facing the chip coil across the insulating layer;
A first electrode pattern formed at the other end of the first wiring;
A third coil pattern larger than the first coil pattern connected to the first coil pattern and the first electrode pattern;
Have
The second wiring is
A second electrode pattern formed at one end of the second wiring and facing the first coil pattern across the wiring board;
A third electrode pattern formed at the other end of the second wiring and facing the first electrode pattern across the wiring board;
A communication-type record carrier.