JP2005340456A - Apparatus and method for forming circuit connection wiring, circuit connection wiring program, semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method in which a wiring defect can be suppressed even if a void is generated in wiring by arranging the wiring while considering the size of the void generated in the circuit connection wiring and the width of the wiring. <P>SOLUTION: There are provided first wiring 1a for circuit connection formed on a semiconductor substrate and second wiring 1b connected with the first wiring 1a and formed smaller than the width of the first wiring 1a. When the size of width of the first wiring 1a is defined as W1, the size of width of the second wiring 1b is defined as W2, the size of a void generated in the first wiring 1a with respect to the width of the first wiring 1a is defined as V1 and the size of a void generated in the second wiring 1b with respect to the width of the second wiring is defined as V2, the first wiring 1a and the second wiring 1b are formed to satisfy a relation of W2/W1≥V2/V1. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more specifically, a circuit connection wiring forming apparatus for suppressing an increase in wiring resistance due to a void generated in a circuit forming wiring or a defect such as disconnection, and a circuit connecting circuit. The present invention relates to a wiring formation method, a circuit connection wiring program, a semiconductor device, and a manufacturing method thereof.

  In a semiconductor device in which a semiconductor integrated circuit or the like is formed, in many cases, aluminum or an aluminum alloy is mainly used for wiring for electrical connection between the circuits. Recently, copper-based wiring having higher conductivity has been used.

  In recent years, semiconductor integrated circuits have been increasingly integrated, and accordingly, the wiring density tends to increase due to the high integration and thinning of the wiring.

  As the wiring density increases, deterioration due to stress applied to the wiring has become a major issue. For example, when an insulating film is formed after the wiring is formed, stress is generated after the insulating film is formed due to a difference in thermal expansion coefficient between the wiring and the insulating film because the insulating film is formed at a high temperature. Due to this stress, atoms constituting the wiring move to form voids in the wiring. Here, the void is a hole formed in the wiring. By forming voids in the wiring, the stress of the wiring itself is relieved. Voids formed in the wiring exert harmful effects such as an increase in wiring resistance and disconnection in the wiring. In particular, when wirings having different wiring widths are connected, when a void generated in a wiring having a large wiring width moves to a wiring having a small wiring width, the probability of receiving the above-described harmful effect increases.

  FIG. 12 is a schematic plan view in which conventional wirings having different widths are connected. There is a possibility that the void 4a generated in the thick wiring 1a of the circuit connection wiring moves to the thin wiring 1b due to thermal stress applied to the wiring. If the void 4b moved to the thin wiring is the same as or larger than the width of the thin wiring, the thin wiring is disconnected.

  In order to suppress the generation of voids generated in such wiring, for example, in Patent Document 1, a dummy electrode is formed between the wirings, and a structure in which unnecessary stress is not applied to the wirings is employed. That is, by reducing the stress, voids generated in the circuit connection wiring are suppressed.

JP-A-8-264647

  However, as a fundamental solution to voids generated in wiring, reducing or eliminating stress is certainly an effective method, but if the wiring density continues to increase in the future, stronger stress will be applied to the wiring itself. Therefore, there is a high possibility that the existing stress relaxation solution cannot be used. That is, it becomes more difficult to completely eliminate the generation of voids.

  An object of the present invention is to suppress wiring defects even if voids are generated in the wiring by arranging the wiring in consideration of the size of the void generated in the circuit connecting wiring and the width of the wiring. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof.

In order to solve the above problem, a first wiring for circuit connection formed on a semiconductor substrate and a second wiring formed to have a width smaller than the width of the first wiring connected to the first wiring. And the width of the second wiring is formed such that a void size generated in the first wiring is smaller than a void size allowed in the second wiring.
According to this configuration, when a wiring is formed with a wiring pattern in which a second wiring smaller than the width of the first wiring for circuit formation is connected thereto, the void size generated in the first wiring is the wiring width. And the process conditions for forming the wiring are predicted. Therefore, even if a void is generated by selecting the condition that the void size generated in the first wiring is smaller than the void size allowed in the second wiring, the wiring defect caused by the void is generated. Can be suppressed.

The present invention also includes a first wiring for circuit connection formed on a semiconductor substrate, and a second wiring smaller than the width of the first wiring connected to the first wiring. The width size is W1, the width size of the second wiring is W2, the void size with respect to the width of the first wiring generated in the first wiring is V1, and the second wiring generated in the second wiring is The gist is that the first wiring and the second wiring are formed so as to satisfy the relationship of W2 / W1 ≧ V1 / V2, where the void size allowed for the width of the two wirings is V2. And
According to this configuration, wirings having different widths are formed under the condition that the ratio of the width of the second wiring and the first wiring is larger than the ratio of the void size generated in the first wiring and the void size allowed for the second wiring. By doing so, even if a void occurs in the first wiring and it moves to the second wiring, wiring defects due to the void can be suppressed.

In the present invention, the width of the design wiring narrower than the width of the first wiring to be connected to the first wiring is Ws, and the void size allowed for the width of the design wiring generated in the design wiring is as follows. If Vs is not satisfied when Ws / W1 ≧ V1 / Vs is satisfied, a second wiring smaller than the width of the first wiring is connected before connecting the first wiring and the design wiring, and Ws If / Wn ≧ V2 / Vs is not satisfied, connection is further made to the nth wiring (n is a natural number of 3 or more), and wiring is formed in stages until Ws / Wn ≧ Vn / Vs is satisfied. Is the gist.
According to this configuration, when the nth wiring desired to be connected to the first wiring is smaller than the width of the first wiring, voids are formed in the first wiring by gradually reducing the width of the wiring. Even if it occurs, it is possible to suppress a wiring defect due to the void with respect to the nth wiring.

According to the present invention, the length of the nth wiring (n is a natural number of 2 or more) formed in stages is defined by the number of voids generated in the unit length of the wiring length generated in the first wiring. The gist is that it is formed at a value equal to or greater than the inverse of the void density.
According to this configuration, in the above invention, the lengths of the second to n-th wirings are the reciprocal of the void density generated in the first wiring, that is, the length of one void or more is formed. Stress relaxation in the wiring requires only one void in the wiring, so no more voids are generated. Therefore, after the second wiring, wiring defects due to voids generated in the previous wiring are suppressed. be able to.

Further, the present invention provides a contact for forming a contact hole in a predetermined region of the active element or the circuit connection wiring of the semiconductor substrate on which an active element or circuit connection wiring is formed and an insulating film is formed. A hole forming step, a contact plug forming step of forming a contact plug by embedding a conductive material in the contact hole, a wiring material film forming step of forming a circuit connecting wiring material film on the semiconductor substrate, 5. A circuit connection wiring formation step for forming a circuit connection wiring having a pattern satisfying the condition according to claim 1 on the wiring material film, and an insulating film is formed on the semiconductor substrate. And having an insulating film process.
According to this method, by forming the wiring to be formed on the semiconductor substrate with the design as in the above invention, it is possible to form the wiring that can suppress the wiring failure due to the void.

The present invention also provides a first wiring width input means for inputting a width of a first wiring for circuit connection, and a second wiring width for inputting a width of a second wiring having a width smaller than the width of the first wiring. Input means; second wiring allowable void size input means for inputting an allowable size of a void generated in the second wiring; process condition input means for selecting a process condition for forming the circuit connection wiring; Based on the width of the first wiring, the width of the second wiring, the second void allowable void size, and the process conditions, the wiring formation conditions using the width of the first wiring and the width of the second wiring are appropriate. The gist of the present invention is to have wiring formation condition determining means for determining whether or not there is.
According to this configuration, the width data of the first wiring for circuit connection and the width data of the second wiring smaller than that, the void size data allowed for the second wiring, and the wiring for forming the wiring The process condition data is input to the circuit connection wiring forming apparatus. By determining the wiring formation conditions of the first wiring and the second wiring from these data, it is possible to determine whether or not the wiring formation conditions are appropriate. In addition, before actually forming the circuit connection wiring, it is possible to select a condition that suppresses defects due to the generation of voids.

Also, in the present invention, the wiring formation condition determining means sets the width of the first wiring to W1, sets the width of the second wiring to W2, and generates the first wiring generated in the first wiring. The relationship of W2 / W1 ≧ V1 / V2 is satisfied, where V1 is a void size with respect to the width of the second wiring and V2 is a void size allowed with respect to the width of the second wiring generated in the second wiring. The gist is to determine whether or not.
According to this configuration, the first wiring is determined on the condition that the ratio of the width of the second wiring to the first wiring is larger than the ratio of the void size allowed for the second wiring and the void generated in the first wiring. Even if a void is generated in the wiring and the void moves to the second wiring, defects such as disconnection of the wiring due to the void can be suppressed. That is, it is possible to select a wiring formation condition such that the void size generated in the first wiring does not become a size with a high possibility of disconnecting the second wiring.

Further, according to the present invention, when it is determined that the wiring cannot be formed as a result of the determination by the wiring forming condition determining means, the method of operating the wiring width data is selected from the first wiring and the second wiring. And a wiring formation condition determining means for determining a wiring formation condition again based on the selected wiring width. To do.
According to this configuration, when it is determined in the wiring formation condition determination that there is a high possibility of a disconnection failure of the wiring due to the occurrence of a void, the width data of either the width of the first wiring or the width of the second wiring again. By changing the above and determining the wiring formation conditions again, it is possible to suppress wiring formation defects due to the generation of voids.

The present invention also provides a first wiring width input means for inputting a width of a first wiring for circuit connection, and a design wiring width input means for inputting a width of a design wiring having a width smaller than the width of the first wiring. A design wiring allowable void size input means for inputting an allowable size of a void generated in the design wiring, a process condition input means for selecting a process condition for forming the circuit forming wiring, and the first wiring Wiring for determining whether wiring forming conditions using the width of the first wiring and the width of the design wiring are appropriate based on the width, the width of the design wiring, the allowable void size of the design wiring, and the process conditions When it is determined that the wiring cannot be formed as a result of the determination by the forming condition determining unit and the wiring forming condition determining unit, the nth wiring (not less than the wiring width of the design wiring based on the determination result) N-th wiring width calculating means for stepwise calculating the width of the n-th wiring), and the wiring width of the n-th wiring is compared with the wiring width of the design wiring. The gist of the present invention is to have an nth wiring width determining means for determining whether or not the wiring width is larger than the wiring width and an nth wiring length determining means for determining the wiring length of the nth wiring.
According to this configuration, the width data of the first wiring for circuit connection, the width data of the desired design wiring that is smaller than the first wiring, the allowable void size data allowed for the design wiring, By inputting process condition data for forming the wiring to the circuit connection wiring forming apparatus, the wiring formation determining means determines the wiring forming conditions of the first wiring and the design wiring. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

Further, in the present invention, the wiring formation condition determining means generates the width of the nth wiring (n is a natural number) as Wn, the width of the designed wiring as Ws, and is generated in the nth wiring. When the void size with respect to the width of the n-th wiring is Vn and the allowable void size with respect to the width of the design wiring generated in the design wiring is Vs, the relationship of Ws / Wn ≧ Vn / Vs is established. The gist is to judge by satisfaction or not.
According to this configuration, by determining that the ratio of the width of the design wiring and the nth wiring (n is a natural number) is larger than the ratio of the void size allowed for the design wiring and the void generated in the nth wiring. Even if a void occurs in the n-th wiring and the void moves to the design wiring, it is possible to suppress defects such as disconnection of the wiring due to the void. That is, it is possible to select a wiring formation condition such that the void size generated in the n-th wiring does not have a high possibility of breaking the design wiring. Therefore, the first wiring and the design wiring can be connected so that the wiring defect due to the generation of voids can be finally suppressed.

According to the present invention, the wiring length of the nth wiring (n is a natural number of 2 or more) is the inverse of the void density defined by the number of voids generated in the unit length of the wiring length generated in the nth wiring. The gist of the present invention is to have an n-th wiring length determining means that is set to a numerical value or higher.
According to this configuration, the density of voids generated from the process condition data and the wiring width data of the circuit connection wiring can be predicted. The wiring length at which one void is generated can be obtained from the void density. The stress applied to the wiring can be alleviated by forming one void. Therefore, by forming the wiring longer than the wiring length in which one void is generated, it is not necessary to influence the void on the wiring having a small wiring width connected to the wiring. Therefore, wiring defects can be suppressed.

Further, the gist of the present invention is that the wiring forming condition determining means includes wiring generating means for generating wiring when it is determined that the wiring can be formed.
According to this configuration, if the wiring is formed under the condition determined by the wiring formation determination means, wiring defects due to voids can be suppressed. Therefore, a wiring layout in which wiring defects due to voids are suppressed can be generated by the wiring generation means based on the conditions.

In the present invention, the width of the first wiring for circuit connection received by the input unit is acquired by the first wiring width input means, and the width of the first wiring received by the input unit is smaller. A procedure for acquiring width data by a second wiring width input means, a procedure for acquiring an allowable size of a void generated in the second wiring received by the input unit by a second wiring allowable void size input means, and the input A process condition input unit that obtains a process condition for forming the wiring accepted by the unit, a width of the first wiring, a width of the second wiring, an allowable void size of the second wiring, and the process condition. The present invention includes a procedure for determining whether or not a wiring formation condition using the width of the first wiring and the width of the second wiring is appropriate by a wiring formation condition determination unit.
According to this method, the width data of the first wiring for circuit connection and the width data of the second wiring smaller than that, the void size data allowed for the second wiring, and the wiring for forming the wiring The process condition data is input to the circuit connection wiring forming apparatus. By determining the wiring formation conditions of the first wiring and the second wiring from these data, it is possible to determine whether or not the wiring formation conditions are appropriate. In addition, before actually forming the circuit connection wiring, it is possible to select a condition that suppresses defects due to the generation of voids.

According to the present invention, the procedure for determining the wiring formation condition by the wiring formation condition determining means is such that the width size of the first wiring is W1, the width size of the second wiring is W2, and the first wiring W2 / W1 ≧ where V1 is a void size with respect to the width of the first wiring generated inside, and V2 is a void size allowed with respect to the width of the second wiring generated in the second wiring. The gist is to have a procedure for determining whether or not the relationship of V1 / V2 is satisfied.
According to this method, the first wiring is determined on the condition that the ratio of the width of the second wiring to the first wiring is larger than the ratio of the void size allowed for the second wiring and the void generated in the first wiring. Even if a void is generated in the wiring and the void moves to the second wiring, defects such as disconnection of the wiring due to the void can be suppressed. That is, it is possible to select a wiring formation condition such that the void size generated in the first wiring does not become a size with a high possibility of disconnecting the second wiring.

Further, according to the present invention, when it is determined that the wiring cannot be formed as a result of the determination by the wiring forming condition determining means, the wiring selection means operates the wiring width data of the first wiring or the second wiring. A procedure of selecting, a procedure of acquiring data of the selected wiring width received by the input unit by a wiring width changing unit, a procedure of acquiring the process condition received by the input unit by a process condition input unit, The present invention includes a procedure for determining the wiring formation condition again by the wiring formation condition determination means based on the data of the selected wiring width.
According to this method, when it is determined in the wiring formation condition determination that there is a high possibility of a wiring disconnection failure due to the occurrence of a void, the width data of either the width of the first wiring or the width of the second wiring again. By changing the above and determining the wiring formation conditions again, it is possible to suppress wiring formation defects due to the generation of voids.

In the present invention, the width of the first wiring for circuit connection received by the input unit is acquired by the first wiring width input means, and the width of the first wiring received by the input unit is smaller. A procedure for acquiring width data of a design wiring having a width by a design wiring width input means; and a procedure for acquiring an allowable size of a void generated in the design wiring received by the input unit by a design wiring allowable void size input means; A process condition input means for acquiring a process condition for forming the wiring accepted by the input unit, a width of the first wiring, a width of the designed wiring, an allowable void size of the designed wiring, and the process condition. A procedure for determining by a wiring formation condition determining means for determining whether or not a wiring formation condition using the width of the first wiring and the width of the designed wiring is appropriate based on; If it is determined that the wiring cannot be formed as a result of the determination in the wiring forming condition means, the nth wiring width calculating means determines the nth wiring (n is 2 or more) greater than the designed wiring width based on the determination result. The width of the nth wiring is compared with the design wiring by comparing the wiring width of the nth wiring and the wiring width of the design wiring by the nth wiring width determination means. The gist of the present invention is to have a procedure for determining whether or not the wiring width is larger than the wiring width of the first wiring and a procedure for determining the wiring length of the n-th wiring by the n-th wiring length determination means.
According to this method, the width data of the first wiring for circuit connection, the data of the width of the desired design wiring that is smaller than the first wiring, the data of the allowable void size allowed for the design wiring, By inputting process condition data for forming the wiring to the circuit connection wiring forming apparatus, the wiring formation determining means determines the wiring forming conditions of the first wiring and the design wiring. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

Further, according to the present invention, the procedure for determining the wiring formation condition by the wiring formation condition determining means is that the size of the nth wiring is Wn, the width of the design wiring is Ws, and is generated in the nth wiring. The relationship of Ws / Wn ≧ Vn / Vs, where Vn is the void size with respect to the width of the n-th wiring and Vs is the allowable void size with respect to the width of the design wiring generated in the design wiring. The gist is to have a procedure for judging whether or not the above is satisfied.
According to this method, by determining that the ratio of the width of the design wiring and the nth wiring (n is a natural number) is larger than the ratio of the void size allowed for the design wiring and the void generated in the nth wiring. Even if a void occurs in the n-th wiring and the void moves to the design wiring, it is possible to suppress defects such as disconnection of the wiring due to the void. That is, it is possible to select a wiring formation condition such that the void size generated in the n-th wiring does not have a high possibility of breaking the design wiring. Therefore, the first wiring and the design wiring can be connected so that the wiring defect due to the generation of voids can be finally suppressed.

In the present invention, the number of voids generated in the unit length of the wiring length generated in the n-th wiring by the n-th wiring length determining means (n is a natural number of 2 or more). The main point is to have a procedure for setting the value to be equal to or higher than the reciprocal value of the density defined in.
According to this method, the density of voids generated from the process condition data and the wiring width data of the circuit connection wiring can be predicted. The wiring length at which one void is generated can be obtained from the void density. The stress applied to the wiring can be alleviated by forming one void. Therefore, by forming the wiring longer than the wiring length in which one void is generated, it is not necessary to influence the void on the wiring having a small wiring width connected to the wiring. Therefore, wiring defects can be suppressed.

Further, the gist of the present invention is that the wiring forming condition determining means includes a procedure for generating a wiring by the wiring generating means when it is determined that the wiring can be formed.
According to this method, it is determined whether or not the wiring formation is appropriate under the conditions determined by the wiring formation determination means, and a wiring layout is generated by the wiring generation means based on the conditions, thereby suppressing wiring defects due to voids. it can.

According to another aspect of the present invention, there is provided the step of acquiring the width data of the first wiring for circuit connection received by the input unit by the first wiring width input means of the computer, and the width of the first wiring received by the input unit. Acquiring data having a smaller width by the second wiring width input means of the computer, and acquiring the allowable size of voids generated in the second wiring received by the input unit by the second wiring allowable void size input means of the computer Obtaining a process condition for forming the wiring accepted by the input unit by a process condition input means of a computer, the width of the first wiring, the width of the second wiring, and the tolerance of the second wiring Based on the void size and the process conditions, the computer determines whether or not the wiring formation conditions using the width of the first wiring and the width of the second wiring are appropriate. And summarized in that a circuit connection wiring forming program for executing the steps of determining the wiring forming condition determining means.
According to this program, the width data of the first wiring for circuit connection, the width data of the second wiring smaller than that, the void size data allowed for the second wiring, and the wiring for forming the wiring The process condition data is input to the circuit connection wiring forming apparatus. By determining the wiring formation conditions of the first wiring and the second wiring from these data, it is possible to determine whether or not the wiring formation conditions are appropriate. In addition, before actually forming the circuit connection wiring, it is possible to select a condition that suppresses defects due to the generation of voids.

According to the present invention, in the step of determining the wiring formation condition by the wiring formation condition determination unit of the computer, the width size of the first wiring is W1, the width size of the second wiring is W2, and the first When the void size with respect to the width of the first wiring generated in one wiring is V1, and the allowable void size with respect to the width of the second wiring generated in the second wiring is V2, W2 / The gist of the present invention is a circuit connection wiring formation program for executing a step of determining whether or not the relationship of W1 ≧ V1 / V2 is satisfied.
According to this program, the determination is made on the condition that the ratio of the width of the second wiring to the first wiring is larger than the ratio of the void size allowed for the second wiring and the void generated in the first wiring. Even if a void is generated in the wiring and the void moves to the second wiring, defects such as disconnection of the wiring due to the void can be suppressed. That is, it is possible to select a wiring formation condition such that the void size generated in the first wiring does not become a size with a high possibility of disconnecting the second wiring.

Further, according to the present invention, when it is determined that the wiring cannot be formed as a result of the determination in the computer wiring formation condition determining means, the wiring selection means of the computer uses the wiring width data of the first wiring or the second wiring. A step of selecting one to be operated; a step of acquiring data of the selected wiring width received by the input unit by a wiring width changing unit of a computer; and the process condition received by the input unit being a process condition of the computer A circuit connection wiring formation program that executes a procedure acquired by an input unit and a step of determining a wiring formation condition again by a wiring formation condition determination unit of a computer based on the data of the selected wiring width Is the gist.
According to this program, if it is determined in the wiring formation condition determination that there is a high possibility of a disconnection failure of the wiring due to the occurrence of a void, the width data of either the width of the first wiring or the width of the second wiring again. By changing the above and determining the wiring formation conditions again, it is possible to suppress wiring formation defects due to the generation of voids.

According to another aspect of the present invention, there is provided the step of acquiring the width data of the first wiring for circuit connection received by the input unit by the first wiring width input means of the computer, and the width of the first wiring received by the input unit. Obtaining a design wiring width data having a smaller width by a design wiring width input means of a computer, and inputting an allowable size of voids generated in the design wiring received by the input unit into a design wiring allowable void size of the computer Obtaining by the means, obtaining a process condition for forming the wiring received by the input unit by a process condition input means of a computer, width of the first wiring, width of the designed wiring, Wiring formation conditions using the width of the first wiring and the width of the designed wiring based on the allowable void size and the process conditions If the wiring formation condition determining means of the computer determines whether or not the wiring is not formed as a result of the determination by the wiring formation condition means of the computer, the nth wiring of the computer is determined based on the determination result. A step of calculating stepwise the width of the nth wiring (n is a natural number of 2 or more) larger than the wiring width of the design wiring by the width calculating means; and the wiring width of the nth wiring by the nth wiring width determining means of the computer Comparing the wiring width of the design wiring to determine whether the wiring width of the n-th wiring is larger than the wiring width of the design wiring; and determining the wiring length of the n-th wiring of the computer by the n-th wiring length determining means The present invention is summarized in that the program is a circuit connection wiring formation program having a step determined by the above.
According to this program, the width data of the first wiring for circuit connection, the data of the width of the desired design wiring that is smaller than the first wiring, the data of the allowable void size allowed for the design wiring, By inputting process condition data for forming the wiring to the circuit connection wiring forming apparatus, the wiring formation determining means determines the wiring forming conditions of the first wiring and the design wiring. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

According to the present invention, in the step of determining the wiring formation condition by the wiring formation condition determining means of the computer, the size of the nth wiring is Wn, the width of the design wiring is Ws, and the inside of the nth wiring Ws / Wn ≧ Vn / Vs, where Vn is the size of the void with respect to the width of the nth wiring generated in the above and Vs is the allowable void size with respect to the width of the design wiring generated in the design wiring. The gist of the present invention is that it is a circuit connection wiring formation program for executing a step of determining whether or not the above relationship is satisfied.
According to this program, by determining that the ratio of the width of the design wiring and the nth wiring (n is a natural number) is larger than the ratio of the void size allowed for the design wiring and the void generated in the nth wiring. Even if a void occurs in the n-th wiring and the void moves to the design wiring, it is possible to suppress defects such as disconnection of the wiring due to the void. That is, it is possible to select a wiring formation condition such that the void size generated in the n-th wiring does not have a high possibility of breaking the design wiring. Therefore, the first wiring and the design wiring can be connected so that the wiring defect due to the generation of voids can be finally suppressed.

Further, the present invention provides a void generated in the unit length of the wiring length generated in the n-th wiring by the n-th wiring length determining means (n is a natural number of 2 or more) of the computer. The present invention is summarized as a circuit connection wiring formation program for executing a step of setting the reciprocal value of the density defined by the number of or more.
According to this program, the density of voids generated from the process condition data and the wiring width data of the circuit connection wiring can be predicted. The wiring length at which one void is generated can be obtained from the void density. The stress applied to the wiring can be alleviated by forming one void. Therefore, by forming the wiring longer than the wiring length in which one void is generated, it is not necessary to influence the void on the wiring having a small wiring width connected to the wiring. Therefore, wiring defects can be suppressed.

  According to another aspect of the present invention, there is provided a circuit connection wiring forming method in which the wiring forming condition determining unit of the computer executes a step of generating a wiring by the wiring generating unit of the computer when it is determined that the wiring can be formed. The main point is that it is a program.

  According to this program, it is determined whether or not wiring formation is appropriate under the conditions determined by the wiring formation determination means, and wiring layout is generated by the wiring generation means based on the conditions, thereby suppressing wiring defects due to voids. it can.

(First embodiment)
A first embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a plan view of wiring for circuit connection in the present embodiment.
In FIG. 1, in the circuit connection wiring 1, a second wiring 1 b having a width smaller than that of the first wiring 1 a is connected to the approximate center of the right side surface of the first wiring 1 a. Here, the width of the wiring refers to the length in the short side direction when the wiring is regarded as a rectangle. Alternatively, the length in a direction substantially perpendicular to the direction in which the circuit connection wiring 1 is connected to another circuit may be indicated.

  FIG. 2 is a block diagram showing an electrical configuration of the circuit connection wiring forming apparatus. The circuit connection wiring forming apparatus 100 includes a computer 101, an input unit 108, and a display unit 109. The computer 101 includes a CPU 102, a ROM 103, a RAM 104, an input interface unit 106, an output interface unit 107, and a bus 105 that electrically connects them. The input interface unit 106 is electrically connected to an input unit 108 outside the computer 101. On the other hand, the output interface unit 107 is also electrically connected to the external display unit 109.

  FIG. 3 is a block diagram showing a functional configuration of the circuit connection wiring forming apparatus. The computer 101 mainly has the functions of the circuit connection wiring forming apparatus 100. The wiring width data input means 111, the process condition input means 112, the void size input means 113, the wiring formation condition determination means 114, and the wiring selection means. 115, wiring width changing means 116, wiring generating means 117, process condition storage unit 118, and the like.

  In the wiring width data input unit 111, the input unit 108 receives wiring width data such as the first wiring 1a and the second wiring 1b, and temporarily stores various wiring width data in the RAM 104 via the input interface unit 106 and the bus 105. Memorized.

  In the process condition input unit 112, process condition data is temporarily stored in the RAM 104 by the same route as the wiring width data input unit 111 as a process condition for wiring formation. When the user operates the input unit to select a process condition, various data associated therewith is read from the process condition storage unit 118 and temporarily stored in the RAM 104. Note that data in the process condition storage unit 118 is stored in the ROM 103 or the RAM 104.

  FIG. 4 shows an example of a wiring data table of process conditions stored in the process condition storage unit 118. In the figure, when the process condition A is selected by the process condition input means 112, the data of the void size and void density generated with respect to the wiring width and the wiring width shown in Table 1 are read out and temporarily stored in the RAM 104. In the process condition B, the wiring width data, void size, and void density data are similarly read and stored in the RAM 104. As described above, by selecting the process condition, various void data with respect to the wiring width can be acquired. Note that the correlation between the wiring width and each void data under these process conditions may be obtained by holding experimental data as matrix data as shown in the figure, or by using an experimental or theoretical program programmed. A calculation method may be used.

  In the void size input means 113, the void size allowed for the second wiring 1b, that is, the data of the allowable void size is received by the input unit 108, and data of various wiring widths is input to the RAM 104 via the input interface unit 106 and the bus 105. Temporarily stored. Here, the allowable void size is a void size that is set in accordance with the wiring width of the circuit connection wiring 1 and causes almost no wiring failure even if a void occurs in the wiring. It is a standard value.

  The wiring formation condition determining means 114 temporarily stores data such as the ROM 103 or the hard disk or memory using the data acquired by the wiring width data input means 111, the process condition input means 112, and the void size input means 113. A determination program is read from the RAM 104 or the like, and the CPU 102 performs arithmetic processing. Further, the CPU 102 performs determination processing from the calculation result, temporarily stores the result in the RAM 104 via the bus 105, transmits data to the output interface unit 107, and displays the determination result on the display unit 109. .

  The wiring selection unit 115 is used when it is determined in the determination result of the wiring formation condition determination unit 114 that there is a high possibility that a wiring defect due to a void occurs when the wiring is formed, that is, when it is determined that the wiring cannot be formed. . That is, the input of selecting a wiring for changing the wiring width of either the first wiring 1a or the second wiring 1b of the circuit connecting wiring 1 is performed. And input the wiring width to be changed. The input unit 108 receives input data of the wiring to be changed, and the data is temporarily stored in the RAM 104 via the input interface unit 106 and the bus 105.

Here, the wiring formation condition determination method will be described.
The wiring width of the first wiring 1a acquired by the wiring width data input unit 111 is described as W1, and the wiring width of the second wiring 1b is described as W2. Further, the void size of the first wiring 1a generated in the wiring width of the first wiring 1a derived from the wiring data table (see FIG. 4) of the process condition input means 112 is described as V1. Further, the allowable void size of the second wiring 1b acquired from the void size input means 113 is described as V2. Using these data, the wiring formation condition is determined by the following wiring determination conditional expression.

W2 / W1 ≧ V1 / V2 (1)
If this condition is satisfied, the first wiring 1a and the second wiring 1b can be formed as designed. If not, wiring selection is performed and re-determination is performed.

  Next, a mechanism that can suppress wiring failure due to the generation of voids when Expression (1) is satisfied will be described. When the void size V1 generated with respect to the width W1 of the first wiring 1a of the circuit connection wiring is expressed as a ratio (%) to the wiring width W1, the product of W1 and V1 is the void occupying the wiring width of the first wiring 1a. It becomes the length of the width. On the other hand, when the allowable void size V2 allowed for the wiring width W2 of the second wiring 1b is similarly expressed as a ratio (%) to the wiring width W2, the product of W2 and V2 is the wiring width of the second wiring 1b. It becomes the length of the width of the void to occupy. Therefore, in order to prevent the void generated in the first wiring 1a from adversely affecting the wiring defect of the second wiring 1b, the width of the void generated in the first wiring 1a is allowed in the second wiring 1b. It may be less than or equal to the width of the void. Therefore, this is expressed as follows.

W1 ・ V1 ≦ W2 ・ V2 (2)
By transforming this, the formula (1) is obtained. Therefore, when the expression (1) is satisfied, the circuit connection wiring 1 can reduce adverse effects on the wiring even if voids are generated. That is, wiring defects in the second wiring 1b can be suppressed. Therefore, highly reliable wiring can be formed.

  The wiring width changing unit 116 changes the wiring width of the wiring selected by the wiring selecting unit 115. That is, input of change data of the wiring width of the first wiring 1a or the second wiring 1b is performed. First, the wiring data temporarily stored in the RAM 104 by the wiring selection unit 115 is processed by the CPU 102 and the data of the wiring width to be changed is input, and the display unit 109 is connected via the bus 105 and the output interface unit 107. To display. Then, the input unit 108 receives the data of the wiring width of the wiring to be changed, and the data is rewritten to the changed data in the RAM 104 via the input interface unit 106 and the bus 105 and temporarily stored. .

  The wiring formation condition determining unit 114 to the wiring width changing unit 116 are repeated until the wiring forming condition determining unit 114 determines that the wiring can be formed.

  When the wiring forming condition determining unit 114 determines that the wiring can be formed, the wiring generating unit 117 generates an optimal wiring layout as shown in FIG. 1 using the wiring width data, process conditions, void data, and the like. To do. The wiring layout generation program is read from the RAM 104 or the like temporarily storing these data stored in the RAM 104 or the like, the ROM 103, data such as a hard disk or memory, and the CPU 102 performs arithmetic processing. An optimum wiring layout is generated from the data of the calculation result in the CPU 102 and is temporarily stored in the RAM 104 via the bus 105 from the CPU 102. Further, the wiring layout is displayed on the display unit 109 via the output interface unit 107.

  FIG. 5 is a flowchart showing a method of forming circuit connection wiring using the circuit connection wiring forming apparatus according to the first embodiment. Circuit connection wiring formation processing is performed by the computer 101 of the circuit connection wiring forming apparatus 100, in particular, the CPU 102 executing the program shown in this flowchart.

  In step S100, first, the wiring width of the first wiring 1a of the circuit connection wiring is input from the input unit. In the next step S110, the input unit 108 inputs the wiring width of the second wiring 1b having a wiring width smaller than that of the first wiring 1a. In the next step S120, the allowable void size data in the second wiring 1b is input via the input unit. In the next step S130, process conditions used for wiring formation are selected and input. In the next step S140, wiring formation condition determination is performed. That is, whether or not the wiring formation condition is satisfied is determined using the above-described wiring formation condition determination formula (1), and if the condition satisfies the formula (1), the process proceeds to the next step S170. If the expression (1) is not satisfied, the process proceeds to step S150.

  In step S170, wiring generation is performed. An optimum wiring layout is formed based on the data of each wiring. Note that the generated wiring layout can be displayed on the display unit 109.

  In step S150, wiring selection is performed. That is, it is selected whether to change the wiring width of the first wiring 1a or to change the wiring width of the second wiring 1b. In the next step S160, the wiring width of the selected wiring is input. Thereafter, the process returns to the process condition input in step S130. If the process conditions are not changed, the process returns to the wiring formation condition determination in step S140. By repeating these steps, more appropriate wiring formation conditions can be obtained. Furthermore, by applying the wiring formation conditions obtained here to the wiring layout design, it is possible to obtain a wiring that does not cause a wiring defect in the second wiring 1b even if a void occurs in the first wiring 1a. .

  The wiring width data input unit 111 is configured by the computer 101 that executes steps S100 and S110. Further, the void size input means 113 is configured by the computer 101 that executes step S120. In addition, the process condition input unit 112 and the process condition storage unit 118 are configured by the computer 101 that executes Step S130. Further, the computer 101 executing step S140 constitutes the wiring formation condition determining unit 114. Further, the computer 101 executing step S150 constitutes the wiring selection unit 115. Further, the computer 101 that executes step S160 constitutes the wiring width changing unit 116. Further, the computer 101 executing step S170 constitutes a wiring generation unit 117.

Next, the process for forming the circuit connection wiring according to the first embodiment will be described.
6 and 7 show process cross-sectional views of the circuit connection wiring in the present embodiment.
FIG. 6A shows a cross-sectional view of a semiconductor substrate on which circuit connection wiring is formed. The semiconductor substrate 10 shown in the figure is formed with a semiconductor device (not shown) such as a transistor. An interlayer insulating film is formed thereon, and a wiring 10a as a circuit connection wiring 1 is further formed thereon. Further, an interlayer insulating film 10b is further formed so as to cover the wiring 10a. Note that a semiconductor device such as a transistor (not shown) and the wiring 10a are electrically connected by a contact plug (not shown).

  FIG. 6B shows a contact hole forming step. A photoresist (not shown) as a mask is formed on the interlayer insulating film 10b of the semiconductor substrate 10 by photolithography. Next, the interlayer insulating film 10b is removed by dry etching until the wiring 10a is reached. Thereby, the contact hole 11 is formed.

  FIG. 6C shows a contact plug forming process. A tungsten film is formed on the semiconductor substrate 10 so as to be embedded in the contact hole 11 using a PECVD (Plasma Enhanced Chemical Vapor Deposition) method. Next, the excess tungsten film is removed and planarized using an etch back method using a dry etching method or a CMP (Chemical Mechanical Polishing) method. Thereby, the contact plug 12 made of a tungsten film is formed.

  FIG. 7A shows a wiring material film forming step. As the wiring material film 13, aluminum or an aluminum alloy is used. The wiring material film 13 is formed by a sputtering method. The wiring material film 13 may be formed as a layered structure such as titanium and titanium nitride, and aluminum.

  FIG. 7B shows a circuit connection wiring forming process. First, a pattern of a photoresist (not shown) as a mask is formed by photolithography. As the photoresist pattern, a layout pattern created by the circuit connection wiring forming apparatus 100 based on the obtained wiring conditions is used. Next, the wiring material film 13 is removed by dry etching using the photoresist as a mask. Further, by removing the photoresist as a mask, a desired circuit connection wiring 14 can be obtained.

  FIG. 7C shows an insulating film forming step. A silicon oxide film 15 as an insulating film is formed on the wiring 14 using PECVD. It should be noted that the process conditions of the silicon oxide film 15 directly affect the conditions for generating voids in the circuit connection wiring 14. That is, due to thermal stress applied when the silicon oxide film 15 is formed and stress caused by the difference in thermal expansion coefficient between the silicon oxide film 15 and the circuit connection wiring 14, void generation and voids in the circuit connection wiring 14 are caused. Trigger the movement.

  In the circuit connection wiring forming apparatus 100, the wiring width and the generated void size and void density are predicted in advance by experiment or simulation or the like, particularly under the conditions of the process of forming the insulating film 15. Therefore, by using the wiring forming conditions obtained by the circuit connecting wiring forming apparatus 100 in the manufacturing process, it is possible to form the circuit connecting wiring 1 that can suppress wiring defects due to the generation of voids.

  Note that by predicting the void size generated in the first wiring 1a of the circuit connection wiring from the process conditions to be used, a condition smaller than the void size allowed in the second wiring 1b can be set in advance. . That is, it can be dealt with by changing process conditions, changing the wiring width of the first wiring 1a or the wiring width of the second wiring 1b, and the like.

  In this way, the circuit connection wiring 1 as shown in FIG. 1 can be formed. That is, even if the void 4a generated in the first wiring 1a moves to the second wiring 1b due to stress applied to the wiring 1 and becomes a void 4b, the wiring 4b is generated even if the size of the void 4b is generated in the second wiring 1b. If the void size is less than the allowable void size that does not cause defects, wiring defects will hardly occur. Further, the width of the first wiring 1a, the width of the second wiring 1b, the size of the void generated in the first wiring 1a, the allowable void size that does not cause a wiring defect in the second wiring 1b, and the wiring formation process By inputting the conditions to the circuit connection wiring forming apparatus 100 and forming the wiring under the predetermined conditions, wiring defects due to the occurrence of voids can be reduced.

FIG. 8 shows a plan view of the circuit connection wiring.
FIG. 8A shows a conventional wiring layout to which the wiring formation conditions of this embodiment are not applied. In the figure, a contact plug 2 is formed below the first wiring 1 a constituting the circuit connection wiring 1. Note that the contact plug 2 is indicated by a square broken line in FIG. In order to obtain more electrical connection regions in order to make the electrical connection between the contact plug 2 and the circuit connection wiring 1 more reliable and to further reduce the contact resistance, as shown in FIG. A second wiring 1b having a wiring width smaller than the wiring width of the first wiring 1a is formed from near the center of the right side surface of 1a. In a normal layout design, the second wiring 1b is designed with a minimum wiring area that can be electrically connected to the contact plug 2. At this time, even if the void size when the wirings 1a and 1b are not connected satisfies an allowable void size, for example, 50% or less, for example, 25%, the wirings 1a and 1b are connected. In this state, when the width of the wiring 1a is W1 in both the wirings 1a and 1b, the maximum width of the void is W1 · 0.25.
There is a possibility that voids of the size represented by Therefore, when the width of the wiring 1b is W2, the maximum of W1 · 0.25 / W2 in the wiring 1b.
If the wiring width W2 of the wiring 1b is smaller than ½ of the wiring width W1 of the wiring 1a, a void having a size exceeding 50%, which is an allowable size for the wiring 1b, is generated. there's a possibility that. For this reason, in an actual wiring manufacturing process, there is a possibility that a wiring defect such as disconnection or an increase in wiring resistance may occur due to the generation of voids larger than the void size allowed for the second wiring 1b.

  FIG. 8B shows a wiring layout to which the wiring formation conditions of this embodiment are applied. By inputting the wiring width of the first wiring 1a, the wiring width of the second wiring 1b, the process conditions for forming the wiring, and the allowable void size allowed for the second wiring 1b to the circuit connection wiring forming apparatus 100, the appropriate In the case of the wiring formation condition, this example, W2 / W1 ≧ 1/2 is obtained. Based on this condition, the wiring layout is redesigned, and wiring is formed using the redesigned wiring, thereby obtaining a wiring that can suppress a wiring defect in the second wiring 1b even if a void occurs in the first wiring 1a. be able to. Therefore, when it is desired to lower the electrical resistance between the lower layer wiring and the upper layer wiring as in the present embodiment, there is an advantageous effect that wiring defects are reduced by forming the wiring as in the present invention.

The effects of the first embodiment will be described below.
(1) By forming the second wiring 1b by selecting a condition such that the void size generated in the first wiring 1a of the circuit connecting wiring 1 is smaller than the void size allowed by the second wiring 1b. Even if a void is generated in the first wiring 1a and the void moves to the second wiring 1b, a wiring defect caused by the void can be suppressed.
(2) Wirings having different widths under the condition that the ratio of the width of the second wiring 1b and the first wiring 1a is larger than the ratio of the void size generated in the first wiring 1a and the void size allowed for the second wiring 1b. By forming the voids in the first wiring 1a and moving to the second wiring 1b, wiring defects due to the voids can be suppressed.
(3) Formation of wiring width data of the first wiring 1a for circuit connection, wiring width data of the second wiring 1b having a smaller wiring width, void size data and wiring allowed for the second wiring 1b It is possible to determine whether or not the wiring formation conditions of the first wiring 1a and the second wiring 1b are appropriate by inputting the data of the process conditions for performing the above into the circuit connection wiring forming apparatus 100. In addition, before actually forming the circuit connection wiring, it is possible to select a condition that suppresses defects due to the generation of voids.
(4) If it is determined in the wiring formation condition determination that there is a high possibility of a disconnection failure of the wiring due to the occurrence of a void, either the wiring width of the first wiring 1a or the wiring width of the second wiring 1b By changing the width data and determining the wiring formation conditions again, it is possible to suppress wiring formation defects due to the occurrence of voids.

(Second Embodiment)
A second embodiment of the present invention will be described with reference to FIGS.
FIG. 9 is a schematic plan view of the circuit connection wiring in the second embodiment.
The wiring having the largest wiring width in the circuit connecting wiring 1 is defined as the first wiring 1a, and the wiring having a smaller wiring width than the first wiring 1a is defined as the second wiring 1b. In the figure, the second wiring 1b is formed so as to be connected to the right side surface of the first wiring 1a. Hereinafter, a third wiring 1c having a smaller wiring width than the second wiring 1b and a fourth wiring 1d having a smaller wiring width than the third wiring 1c are formed in the same manner. In addition, the wiring shown by the broken line shown in the figure is the design wiring 1e that has been designed for layout. In the figure, the wiring width of the design wiring 1e is finally almost the same as the wiring width of the fourth wiring 1d.

  A circuit connection wiring forming apparatus for performing wiring formation as shown in FIG. 9 will be described. The electrical configuration of the circuit connection wiring forming apparatus 100 is the same as that of FIG. 2 shown in the first embodiment.

  FIG. 10 is a block diagram showing a functional configuration of the circuit connection wiring forming apparatus according to the second embodiment. The circuit connection wiring forming apparatus 100 according to the first embodiment shown in FIG. 3 has a part common to the functional configuration of the computer 101. That is, the wiring width data input unit 111, the process condition input unit 112, the void size input unit 113, the wiring formation condition determination unit 114, the wiring generation unit 117, and the process condition storage unit 118 are the circuit connection wiring forming apparatus according to the first embodiment. 100 functional configurations are common. The present embodiment is different in that a wiring width calculating unit 119, a wiring width determining unit 120, a wiring length calculating unit 121 are added, and a wiring selecting unit 115 is not provided. There is also a slight difference in the wiring formation condition determining means 114. Here, differences from the first embodiment will be described.

  The wiring formation condition determination unit 114 is substantially the same as that of the first embodiment, but the contents of the wiring formation condition determination program read from the RAM 104 or the like that temporarily stores data such as the ROM 103 or the hard disk or memory are slightly different. First, the wiring width of the first wiring 1a acquired by the wiring width data input unit 111 is W1, and the wiring width of the design wiring 1e is Ws. Further, the void size generated in the wiring width of the first wiring 1a derived from the wiring data table (see FIG. 4) of the process condition input means 112 is set to V1. Also, let Vs be the allowable void size of the design wiring 1e acquired from the void size input means 113. Using these data, the wiring formation conditions are determined by the following condition determination formula.

Ws / W1 ≧ V1 / Vs (3)
If this condition is satisfied, the first wiring 1a and the design wiring 1e can be formed as designed. When the condition is not satisfied, the wiring width W2 of the second wiring 1b is calculated by the wiring width calculation means 119 described later. Further, the data of the void size V2 generated in the second wiring 1b is obtained from the wiring data table in the process condition input means 112. Using these data, the wiring formation condition is determined by the following condition determination formula.

Ws / W2 ≧ V2 / Vs (4)
If this condition is not satisfied, data on the wiring width W3 of the third wiring 1c and the void size V3 generated in the third wiring 1c is acquired in the same manner as described above, and the wiring determination condition is determined by the condition determination formula. Until the wiring formation condition determining unit 114 determines that the wiring can be formed, or until the calculated value of the wiring width of the nth wiring is equal to or less than the wiring width of the design wiring 1e in the wiring width determining unit 120 described later. The method is repeated. When this condition judgment formula is generalized, it becomes as follows.

Ws / Wn ≧ Vn / Vs (5)
Therefore, the wiring formation condition determination unit 114 first determines the wiring formation conditions of the first wiring 1a and the design wiring 1e using Expression (3). If Expression (3) is not satisfied, Expression (5) ) To determine the wiring formation conditions. Data on the success or failure of the determination is temporarily stored in the RAM 104.

  The wiring width calculation means 119 reads out a wiring width calculation program from the RAM 104 that temporarily stores data such as the ROM 103 or the hard disk or memory based on the wiring width data and void size data stored in the RAM 104, and sends it to the CPU 102. To perform arithmetic processing. The calculated wiring width data of the nth wiring is temporarily stored in the RAM 104.

  Next, a specific calculation method will be described. First, when the condition determination formula (3) in the wiring formation condition determination unit 114 is not satisfied, the wiring width of the second wiring 1b is first calculated by the following formula.

W2 = Ws · V2 / V1 (6)
If the wiring width of the second wiring 1b calculated from Expression (6) does not satisfy the wiring formation conditions, the wiring width of the third wiring 1c and the wiring width of the fourth wiring 1d are further calculated. When this is generalized, the following equation is obtained.

Wn = Ws · Vn / Vs (7)
Therefore, the wiring width Wn of the n-th wiring is calculated by Expression (7), the value is substituted into Expression (5), and wiring formation condition determination is performed.

  In the wiring width determination unit 120, the CPU 102 determines the size of the wiring width Ws of the design wiring 1 e and the wiring width Wn of the nth wiring temporarily stored in the RAM 104.

  In the wiring length calculation unit 121, the void density generated in the wiring width of the nth wiring temporarily stored in the RAM 104 is acquired from the process condition storage unit 118. That is, it is obtained from the stored wiring data table (see FIG. 4), and using that, it is calculated how much the wiring length of the second wiring 1b can reduce the influence of the void, and based on the result. To determine the wiring length. The calculated wiring length data of the nth wiring is temporarily stored in the RAM 104.

  A specific wiring length calculation method in the wiring length calculation unit 121 will be described. The void density data Dn is extracted from the wiring data table using the calculated wiring width data of the nth wiring. Here, the void density is defined as the number of voids generated per unit length. The wiring length L of the nth wiring is calculated from the following equation.

L = 1 / Dn (8)
Therefore, the wiring length L is calculated in Expression (8), and the wiring length of the nth wiring is determined.

  FIG. 11 is a flowchart illustrating a method of forming circuit connection wiring using the circuit connection wiring forming apparatus 100 according to the second embodiment. Circuit connection wiring formation processing is performed by the computer 101 of the circuit connection wiring forming apparatus 100, in particular, the CPU 102 executing the program shown in this flowchart.

  In step S200, the wiring width of the first wiring 1a of the circuit connection wiring is input from the input unit. In step S210, for example, the wiring width of the design wiring 1e to be connected to the first wiring 1a in the layout design is input from the input unit 108. In the next step S220, the allowable void size data in the design wiring 1e is input from the input unit 108. In the next step S230, the user selects a process condition used for wiring formation, and inputs a desired process condition from the input unit.

  In the next step S240, it is determined whether or not the circuit connection wiring 1 can be formed. The determination is performed using the condition determination formulas (3) to (5) in the wiring formation condition determination unit 114. First, since the wiring formation conditions are determined for the first wiring 1a and the design wiring 1e, the determination is made using the condition determination formula (3). When the condition determination formula (3) is satisfied, the process proceeds to the next step S290. If the condition determination formula (3) is not satisfied, the process proceeds to the next step S250.

  In step S250, the wiring width calculation unit 119 calculates the wiring width of the nth wiring. As the calculation method, the wiring width calculation formulas (6) and (7) shown above are used. Here, first, the wiring width of the second wiring 1b is calculated using Expression (6).

  In the next step S260, the wiring widths are compared. That is, the wiring width Wn of the nth wiring calculated by the wiring width calculation means 119 is compared with the wiring width Ws of the design wiring 1e. That is, if it is determined that the wiring width of the n-th wiring is smaller than that of the design wiring 1e, the wiring cannot be formed after all. The wiring width of the first wiring 1a and the wiring of the design wiring 1e The width or process condition cannot be set. That is, a display indicating that the wiring cannot be formed is displayed on the display unit 109, and this flowchart ends. On the other hand, when it is determined that the wiring width of the nth wiring is larger than that of the design wiring 1e, the wiring length of the nth wiring is determined by the next nth wiring length calculation means. Here, the wiring width of the second wiring 1b and the wiring width of the design wiring 1e are compared.

  In the next step S270, the wiring length of the nth wiring is determined. The determination of the wiring length is calculated by the wiring length calculation means 121. The wiring length calculation method uses the above equation (8). Thus, the wiring length of the second wiring 1b is first determined. In the next step S280, the nth wiring width is input.

  When the wiring width and wiring length of the second wiring 1b are determined, the process returns to step S240 again to determine the wiring formation condition. The wiring formation condition determination is performed using the equation (4) shown above. When the expression (4) is satisfied, the process proceeds to the next step S290, and when the expression (4) is not satisfied, the process proceeds to step S250 again. In this way, the loop from step S240 to step S280 is repeated until the n-th wiring at which this flowchart ends. Note that the formula (5) is used as the wiring formation condition determination formula for the nth wiring, and the formula (7) is used as the wiring width calculation formula.

  In step S290, wiring generation is performed. An optimum wiring layout is formed based on the data of each wiring. Note that the generated wiring layout can be displayed on the display unit 109.

  Thus, as shown in FIG. 9, the circuit connection wiring 1 can finally connect the first wiring 1a and the desired design wiring 1e while being formed in a staircase shape.

  Note that the wiring width data input unit 111 is configured by the computer 101 that executes steps S200, S210, and S280. Further, the void size input means 113 is configured by the computer 101 that executes step S220. Further, the process condition input means 112 and the process condition storage unit 118 are configured by the computer 101 that executes step S230. Further, the computer 101 that executes Step S240 constitutes the wiring formation condition determination unit 114. Further, the computer 101 executing step S250 constitutes a wiring width calculating unit 119. Further, the computer 101 that executes Step S260 constitutes the wiring width determination unit 120. In addition, the computer 101 executing step S270 constitutes a wiring length calculation unit 121. Further, the computer 101 executing step S290 constitutes the wiring generation unit 117.

  The method for forming the circuit connection wiring in this embodiment is the same as that in the first embodiment.

FIG. 9 shows a plan view of the circuit connection wiring.
A broken line portion in FIG. 9 shows a conventional wiring layout to which the wiring forming conditions of the present embodiment are not applied. In the figure, the first wiring 1a whose wiring width is represented by W1 and the fourth wiring 1d whose wiring width is smaller than W1, for example, the wiring width is represented by W4 = W1 · 0.2, are the fourth wiring and The fifth wirings 1e having the same wiring width are connected. At this time, when the void size does not depend on the wiring width and is 25% and satisfies an allowable void size, for example, 50% or less, and the void density does not depend on the wiring width and Dn = 0.2 μm ⁻¹ , W5 / Since W1 = 0.2, there is a possibility that a void having a size exceeding 50%, which is an allowable size for the wiring 1e, may occur. For this reason, in an actual wiring manufacturing process, there is a possibility that wiring defects such as disconnection or increased wiring resistance may occur.

A solid line portion in FIG. 9 indicates a wiring layout to which the wiring formation conditions of the present embodiment are applied. In the figure, the first wiring 1a whose wiring width is represented by W1 and the fourth wiring 1d whose wiring width is smaller than W1, for example, the wiring width W4 = W1 · 0.2, are wired from the first wiring. The second wiring 1b having a wiring length L2 having a small width W2 is connected to the third wiring 1c having a wiring length L3 having a wiring width W3 smaller than that of the second wiring. Since the wiring formation conditions of this embodiment are applied, the wiring width of the wiring 1b is 50% or less to which the void generated in the wiring 1b is allowed.
W2 = 0.5 ・ W1
Is set. As for the wiring length, the void of the wiring 1a does not affect the wiring 1c.
L2 = 1 / Dn = 5um
Is set. Similarly, W3 = 0.5 · W2
L3 = 5um
Is set. At this time, W3 = 0.25 · W1
Because
W4 / W3 = 0.8 ≧ 0.5
Thus, even if the wirings 1c and 1d are connected, the void size is allowed to be 50% or less. Based on this condition, the wiring layout is redesigned and wiring is formed using the redesigned wiring to connect the first wiring 1a and the fourth wiring 1d having a small wiring width as in this embodiment. There is an advantageous effect that a wiring capable of suppressing a wiring defect can be obtained.

In the second embodiment, the same effects (1) to (4) as in the first embodiment can be obtained. Furthermore, the following effects can be obtained.
(5) When the desired nth wiring to be connected to the first wiring 1a is smaller than the width of the first wiring 1a, voids are generated in the first wiring 1a by gradually reducing the width of the wiring. Even so, it is possible to suppress a wiring defect due to the void with respect to the n-th wiring.
(6) The length of the second to nth wirings is the reciprocal of the density of voids generated in the first wiring 1a, that is, the length of one void or more is formed. Only one void is required in the wiring. Therefore, the number of voids exceeding that does not occur, and wiring defects due to voids generated in the previous wiring after the second wiring 1b can be suppressed.
(7) data on the width of the first wiring 1a for circuit connection, data on the width of a desired design wiring 1e having a smaller width than the first wiring 1a, and data on an allowable void size allowed for the design wiring 1e By inputting data of process conditions for forming wirings to the circuit connection wiring forming apparatus 100, first, the wiring forming conditions of the first wiring 1a and the design wiring 1e are determined. If the determination result is NO, the width and the wiring length of the second wiring 1b are selected so that the void generated in the first wiring 1a is less likely to cause a wiring failure. Next, in the second wiring 1b and the design wiring 1e, the wiring formation conditions are determined. If the determination result is negative, the width to the third wiring 1c, the fourth wiring 1d, and finally the design wiring 1e and its The wiring length is selected, and the wiring formation conditions are determined in the same manner as the second wiring 1b. Thereby, the 1st wiring 1a and the design wiring 1e can be connected so that the wiring defect by void generation can be suppressed.
(8) By determining that the ratio of the width of the design wiring 1e to the nth wiring (n is a natural number) is greater than the ratio of the void size allowed in the design wiring 1e and the void generated in the nth wiring, Even if a void occurs in the wiring and the void moves to the design wiring 1e, defects such as disconnection of the wiring due to the void can be suppressed. That is, it is possible to select a wiring formation condition such that the void size generated in the nth wiring does not become a size with a high possibility of breaking the design wiring 1e. Therefore, it is possible to connect the first wiring 1a and the design wiring 1e so that the wiring failure due to the generation of voids can be finally suppressed.
(9) The wiring length at which one void is generated can be obtained from the void density data obtained from the process condition data and the wiring width data of the circuit connection wiring. The stress applied to the wiring can be alleviated by forming one void. Therefore, by forming the wiring longer than the wiring length in which one void is generated, it is not necessary to influence the void on the wiring having a small wiring width connected to the wiring. Therefore, wiring defects can be suppressed.
(10) The wiring formation condition determining unit 114, the wiring width calculating unit 119, the nth wiring length calculating unit, and the nth wiring until it is determined whether the wiring width of the nth wiring and the wiring width of the design wiring 1e can be formed. By repeating means that repeats the width calculation means, it is possible to reliably determine whether or not the first wiring of the circuit connection wiring and the design wiring can be finally connected.

The embodiment of the present invention is not limited to the above, and may be modified as follows.
(Modification 1) In the first embodiment, when it is determined that the wiring cannot be formed in the wiring formation condition determination, the wiring is selected and the process width is input after the data of the selected wiring width is input. Return to. However, if the process conditions are fixed, the process may be immediately returned to the wiring formation condition determination without inputting the process conditions.

  The technical idea derived from the above embodiment will be described below.

(1) In the circuit connection wiring forming apparatus according to claim 6 or 7, when it is determined that the wiring cannot be formed as a result of the determination by the wiring forming condition determining means, the first wiring and the first wiring Wiring selection means for selecting one of the two wirings to operate the wiring width data; selection wiring width input means for inputting again the width of the selected wiring; and process condition input means for inputting the process conditions; A circuit connection wiring forming apparatus comprising: a wiring forming condition determining means for determining a wiring forming condition again based on the selected wiring width.
According to this configuration, by selecting the wiring width and process conditions again and inputting them again to the circuit connection wiring forming apparatus, it is possible to more reliably suppress the wiring failure due to the void of the second wiring.

(2) first wiring width input means for inputting a width of a first wiring for circuit connection; design wiring width input means for inputting a width of a design wiring having a width smaller than the width of the first wiring; Design wiring allowable void size input means for inputting an allowable size of a void generated in the design wiring, process condition input means for selecting a process condition for forming the circuit forming wiring, the width of the first wiring, Wiring formation condition determination for determining whether or not the wiring formation condition using the width of the first wiring and the width of the design wiring is appropriate based on the width of the design wiring, the allowable void size of the design wiring, and the process condition And the nth wiring (n is 2 or more) that is equal to or larger than the wiring width of the design wiring based on the result of the determination. N-th wiring width calculating means for calculating the width of the natural number in stages, n-th wiring length determining means for determining the wiring length of the n-th wiring, and n-th wiring input means for inputting the width of the n-th wiring. A circuit connection wiring forming apparatus.
According to this configuration, the width data of the first wiring for circuit connection, the width data of the desired design wiring that is smaller than the first wiring, the allowable void size data allowed for the design wiring, By inputting data of process conditions for forming the wiring to the circuit connection wiring forming apparatus, the wiring forming conditions of the first wiring and the design wiring are first determined. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

(3) A procedure in which the input unit receives data on the width of the first wiring for circuit connection by the first wiring width input means, and a design having a width smaller than the width of the first wiring by the design wiring width input means. A procedure for receiving wiring width data by the input unit, a procedure for receiving an allowable size of a void generated in the design wiring by the design wiring allowable void size input unit, and a process condition input unit for the circuit formation Based on the procedure in which the input unit accepts process condition data for forming the wiring and the wiring formation condition determining means, the width of the first wiring, the width of the designed wiring, the allowable void size of the designed wiring, and the process conditions The procedure for determining whether or not the wiring formation conditions using the width of the first wiring and the width of the design wiring are appropriate, and the nth wiring width calculation means, If it is determined that the wiring cannot be formed as a result of the determination in the line forming condition means, the wiring width of the nth wiring (n is a natural number of 2 or more) greater than the designed wiring width is stepwise based on the determination result. A circuit having a procedure for calculating, a procedure for determining the wiring length of the n-th wiring by the n-th wiring length determining means, and a procedure for inputting the wiring width of the n-th wiring by the n-th wiring input means. Method for forming connection wiring.
According to this method, the width data of the first wiring for circuit connection, the data of the width of the desired design wiring that is smaller than the first wiring, the data of the allowable void size allowed for the design wiring, By inputting data of process conditions for forming the wiring to the circuit connection wiring forming apparatus, the wiring forming conditions of the first wiring and the design wiring are first determined. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

(4) first wiring width input means for inputting a width of a first wiring for circuit connection; design wiring width input means for inputting a width of a design wiring having a width smaller than the width of the first wiring; Design wiring allowable void size input means for inputting an allowable size of a void generated in the design wiring, process condition input means for selecting a process condition for forming the circuit forming wiring, the width of the first wiring, Wiring formation condition determination for determining whether or not the wiring formation condition using the width of the first wiring and the width of the design wiring is appropriate based on the width of the design wiring, the allowable void size of the design wiring, and the process condition And the nth wiring (n is 2 or more) that is equal to or larger than the wiring width of the design wiring based on the result of the determination. An nth wiring width calculating means for calculating the width of the natural number in stages, an nth wiring width determining means for comparing the wiring width of the nth wiring and the wiring width of the design wiring, and the nth wiring. Nth wiring length determining means for determining the wiring length of the nth wiring, nth wiring input means for inputting the wiring width of the nth wiring, and whether the wiring width of the nth wiring and the wiring width of the design wiring can be formed. A circuit connection wiring forming apparatus comprising repeating means for repeating the wiring forming condition determining means, the nth wiring width calculating means, the nth wiring width determining means, and the nth wiring length calculating means until it is determined.
According to this configuration, the width data of the first wiring for circuit connection, the width data of the desired design wiring that is smaller than the first wiring, the allowable void size data allowed for the design wiring, By inputting data of process conditions for forming the wiring to the circuit connection wiring forming apparatus, the wiring forming conditions of the first wiring and the design wiring are first determined. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids. Furthermore, it is possible to reliably determine whether or not the first wiring of the circuit connection wiring and the design wiring can be finally connected by the repeating means.

(5) A procedure in which the input unit receives data on the width of the first wiring for circuit connection by the first wiring width input means, and a design having a width smaller than the width of the first wiring by the design wiring width input means. A procedure for receiving wiring width data by the input unit, a procedure for receiving an allowable size of a void generated in the design wiring by the design wiring allowable void size input unit, and a process condition input unit for the circuit formation Based on the procedure in which the input unit accepts process condition data for forming the wiring and the wiring formation condition determining means, the width of the first wiring, the width of the designed wiring, the allowable void size of the designed wiring, and the process conditions The procedure for determining whether or not the wiring formation conditions using the width of the first wiring and the width of the design wiring are appropriate, and the nth wiring width calculation means, If it is determined that the wiring cannot be formed as a result of the determination in the line forming condition means, the wiring width of the nth wiring (n is a natural number of 2 or more) greater than the designed wiring width is stepwise based on the determination result. A procedure for calculating, a procedure for determining the wiring length of the n-th wiring by the n-th wiring length determining means, a procedure for inputting the wiring width of the n-th wiring by the n-th wiring input means, and repetition. Means for repeating the wiring formation condition determining means, the nth wiring width calculating means, the nth wiring width determining means, and the nth wiring length calculating means until the wiring width of the nth wiring reaches the nth wiring. A method for forming wiring for circuit connection.
According to this method, the width data of the first wiring for circuit connection, the data of the width of the desired design wiring that is smaller than the first wiring, the data of the allowable void size allowed for the design wiring, By inputting data of process conditions for forming the wiring to the circuit connection wiring forming apparatus, the wiring forming conditions of the first wiring and the design wiring are first determined. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids. Furthermore, it is possible to reliably determine whether or not the first wiring of the circuit connection wiring and the design wiring can be finally connected by the repeating means.

(6) a step of acquiring the width data of the first wiring for circuit connection received by the input unit by the first wiring width input means of the computer, and a width smaller than the width of the first wiring received by the input unit The second wiring width input means of the computer to acquire the allowable size of voids generated in the second wiring received by the input unit by the second wiring allowable void size input means of the computer, Obtaining a process condition for forming the wiring accepted by the input unit by a process condition input means of a computer, a width of the first wiring, a width of the second wiring, an allowable void size of the second wiring, and Based on the process condition, whether or not the wiring formation condition using the width of the first wiring and the width of the second wiring is appropriate Readable recording medium and a computer that records the circuit connection wiring forming program for executing the steps of determining the matter determination unit.
According to this recording medium, the width data of the first wiring for circuit connection, the width data of the second wiring smaller than that, the void size data allowed for the second wiring, and the wiring are formed. The process condition data is input to the circuit connection wiring forming apparatus. By determining the wiring formation conditions of the first wiring and the second wiring from these data, it is possible to determine whether or not the wiring formation conditions are appropriate. In addition, before actually forming the circuit connection wiring, it is possible to select a condition that suppresses defects due to the generation of voids.

(7) In the recording medium according to (6), in the step of determining the wiring formation condition by the wiring formation condition determination unit of the computer, the width size of the first wiring is W1, and the second wiring The size of the width is W2, the size of the void with respect to the width of the first wiring generated in the first wiring is V1, and the allowable voids for the width of the second wiring generated in the second wiring A computer-readable recording medium storing a circuit connection wiring forming program for executing a step of determining whether or not a relationship of W2 / W1 ≧ V1 / V2 is satisfied when the size is V2.
According to this recording medium, the determination is made on the condition that the ratio of the width of the second wiring to the first wiring is larger than the ratio of the void size allowed for the second wiring and the void generated in the first wiring. Even if a void occurs in one wiring and the void moves to the second wiring, defects such as disconnection of the wiring due to the void can be suppressed. That is, it is possible to select a wiring formation condition such that the void size generated in the first wiring does not become a size with a high possibility of disconnecting the second wiring.

(8) In the recording medium according to (6) or (7), if it is determined that the wiring cannot be formed as a result of the determination by the wiring formation condition determining unit of the computer, the wiring selection unit of the computer Selecting a method of operating the wiring width data of the first wiring or the second wiring, acquiring the selected wiring width data received by the input unit by a wiring width changing unit of a computer, A step of acquiring the process condition received by the input unit by a process condition input unit of a computer; and a step of determining a wiring formation condition again by the wiring formation condition determining unit of the computer based on the data of the selected wiring width; The computer-readable recording medium which recorded the circuit formation wiring formation program which performs this.
According to this recording medium, when it is determined in the wiring formation condition determination that there is a high possibility of a disconnection failure of the wiring due to the occurrence of a void, the width of either the first wiring or the second wiring again. By changing the data and determining the wiring formation conditions again, it is possible to suppress wiring formation defects due to the occurrence of voids.

(9) A step of acquiring the width data of the first wiring for circuit connection received by the input unit by a first wiring width input unit of a computer, and a width smaller than the width of the first wiring received by the input unit Obtaining the width data of the design wiring by the design wiring width input means of the computer, and obtaining the allowable size of the void generated in the design wiring received by the input unit by the design wiring allowable void size input means of the computer Obtaining a process condition for forming the wiring accepted by the input unit by a process condition input means of a computer, a width of the first wiring, a width of the design wiring, and an allowable void size of the design wiring In addition, based on the process conditions, the suitability of the wiring formation conditions using the width of the first wiring and the width of the designed wiring is determined. If it is determined that wiring formation is not possible as a result of the determination by the computer wiring formation condition determination means and the determination result by the computer wiring formation condition means, the computer calculates the nth wiring width based on the determination result. Calculating stepwise the width of the nth wiring (n is a natural number of 2 or more) equal to or greater than the wiring width of the design wiring by means, and the wiring width of the nth wiring and the design by the nth wiring width determination means of the computer Comparing the wiring width of the wiring to determine whether the wiring width of the nth wiring is larger than the wiring width of the design wiring; and determining the wiring length of the nth wiring of the computer by the nth wiring length determining means A computer-readable recording medium having recorded thereon a circuit connection wiring formation program.
According to this recording medium, the data of the width of the first wiring for circuit connection, the data of the width of the desired design wiring that is smaller than the first wiring, the data of the allowable void size allowed for the design wiring, Then, by inputting the data of the process conditions for forming the wiring to the circuit connection wiring forming apparatus, the wiring formation determining means determines the wiring forming conditions of the first wiring and the design wiring. If the determination result is negative, the width of the second wiring and the wiring length are selected so that the void generated in the first wiring is less likely to cause a wiring failure. Next, determine the wiring formation conditions for the second wiring and the design wiring, and if the determination result is negative, select the third wiring, the fourth wiring, the width to the final design wiring, and the wiring length. The wiring formation conditions are determined in the same manner as the second wiring. As a result, the first wiring and the design wiring can be connected so as to be able to suppress wiring defects due to the generation of voids.

(10) The circuit connection wiring formation program according to (9), wherein the step of determining the wiring formation condition by the computer wiring formation condition determination means sets the size of the nth wiring to Wn, and the design The size of the width of the wiring is Ws, the size of the void with respect to the width of the n-th wiring generated in the n-th wiring is Vn, and the voids allowed for the width of the design wiring generated in the design wiring When the size is Vs, a computer-readable recording medium having recorded thereon a circuit connection wiring formation program for executing a step of determining whether or not a relationship of Ws / Wn ≧ Vn / Vs is satisfied.
According to this recording medium, the determination is made on the condition that the ratio of the width of the design wiring and the nth wiring (n is a natural number) is larger than the ratio of the void size allowed for the design wiring and the void generated in the nth wiring. Thus, even if a void is generated in the nth wiring and the void moves to the design wiring, it is possible to suppress defects such as disconnection of the wiring due to the void. That is, it is possible to select a wiring formation condition such that the void size generated in the n-th wiring does not have a high possibility of breaking the design wiring. Therefore, the first wiring and the design wiring can be connected so that the wiring defect due to the generation of voids can be finally suppressed.

(11) The circuit connection wiring formation program according to (9) or (10), wherein a wiring length of the nth wiring is determined by an nth wiring length determination means (n is a natural number of 2 or more) of the computer. Can be read by a computer that records a circuit connection wiring formation program for executing a step of setting a value equal to or higher than the reciprocal value of the density defined by the number of voids generated in the unit length of the wiring length generated in the nth wiring Recording medium.
According to this recording medium, the density of voids generated from the process condition data and the wiring width data of the circuit connection wiring can be predicted. The wiring length at which one void is generated can be obtained from the void density. The stress applied to the wiring can be alleviated by forming one void. Therefore, by forming the wiring longer than the wiring length in which one void is generated, it is not necessary to influence the void on the wiring having a small wiring width connected to the wiring. Therefore, wiring defects can be suppressed.

(12) The circuit connection wiring formation program according to any one of (6) to (11), wherein the wiring formation condition determination unit of the computer determines that the wiring can be formed. Generating a wiring by the wiring generation means of the computer;
The computer-readable recording medium which recorded the circuit formation wiring formation program which performs this.

  According to this recording medium, by determining the suitability of the wiring formation under the conditions determined by the wiring formation determining means, and generating the wiring layout by the wiring generating means based on the conditions, wiring defects due to voids are eliminated. Can be suppressed.

  (6) The semiconductor device according to any one of claims 1 to 4, wherein the wiring for circuit connection is formed of aluminum or an aluminum alloy.

  According to this configuration, particularly when the wiring is formed of aluminum or an aluminum alloy, a large void due to thermal stress is likely to occur. However, with the configuration as in the above invention, wiring defects due to voids can be reduced.

FIG. 2 is a schematic plan view of a circuit connection wiring for explaining the first embodiment of the present invention. The block diagram which shows the electrical constitution of the wiring formation apparatus for circuit connections of 1st Embodiment. The block diagram which shows the functional structure of the wiring formation apparatus for circuit connections of 1st Embodiment. The process data table which shows an example of the content of the process condition data of this invention. The flowchart explaining the flow which forms the wiring for circuit connection of 1st Embodiment. (A)-(c) is process sectional drawing which shows the process of the wiring for circuit connection in 1st Embodiment. (A)-(c) is process sectional drawing which shows the process of the wiring for circuit connection in 1st Embodiment. FIG. 3 is a schematic plan view of circuit connection wiring illustrating the first embodiment. The plane schematic diagram of the wiring for circuit connection explaining 2nd Embodiment. The block diagram which shows the functional structure of the wiring formation apparatus for circuit connections of 2nd Embodiment. The flowchart explaining the flow which forms the wiring for circuit connection of 2nd Embodiment. The plane schematic diagram of the conventional circuit connection wiring.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1a, 1b, 1c, 1d, 1e ... Circuit connection wiring 4, 4a, 4b ... Void, 10 ... Semiconductor substrate, 10a ... Circuit connection wiring, 10b, 14 ... Interlayer insulation film, 11 ... Contact hole, DESCRIPTION OF SYMBOLS 2, 12 ... Contact plug, 100 ... Circuit formation wiring formation apparatus, 101 ... Computer, 102 ... CPU, 103 ... ROM, 104 ... RAM, 105 ... Bus, 106 ... Input interface part, 107 ... Output interface part, DESCRIPTION OF SYMBOLS 108 ... Input part, 109 ... Display part, 111 ... Wiring width data input means, 112 ... Process condition input means, 113 ... Void size input means, 114 ... Wiring formation condition determination means, 115 ... Wiring selection means, 116 ... Wiring width Changing means, 117... Wiring generation means, 118... Process condition storage unit, 119... Nth wiring width calculation means, 120. , 121 ... wiring length calculation means.

Claims (26)

A first wiring for circuit connection formed on the semiconductor substrate;
A second wiring formed to have a width smaller than a width of the first wiring connected to the first wiring;
With
The width of the second wiring is a semiconductor device formed such that the size of the void generated in the first wiring is smaller than the void size allowed in the second wiring. A first wiring for circuit connection formed on the semiconductor substrate;
A second wiring smaller than the width of the first wiring connected to the first wiring;
With
The width size of the first wiring is W1,
The width of the second wiring is W2,
V1 is a void size with respect to the width of the first wiring generated in the first wiring,
When the void size allowed for the width of the second wiring generated in the second wiring is V2,
W2 / W1 ≧ V1 / V2
A semiconductor device in which the first wiring and the second wiring are formed so as to satisfy the relationship. The semiconductor device according to claim 1,
Ws is the width of the design wiring that is thinner than the width of the first wiring to be connected to the first wiring,
When the void size allowed for the width of the design wiring generated in the design wiring is Vs,
Ws / W1 ≧ V1 / Vs
If the second wiring is smaller than the width of the first wiring before connecting the first wiring and the design wiring,
Ws / Wn ≧ V2 / Vs
Is not satisfied, the connection is further made to the nth wiring (n is a natural number of 3 or more),
Ws / Wn ≧ Vn / Vs
A semiconductor device in which wiring is formed step by step until it is satisfied. The semiconductor device according to claim 3,
The length of the nth wiring formed in stages (n is a natural number of 2 or more) is the reciprocal of the void density defined by the number of voids generated in the unit length of the wiring length generated in the first wiring. A semiconductor device formed with a value greater than or equal to. A contact hole forming step of forming a contact hole in a predetermined region of the active element or the circuit connection wiring of the semiconductor substrate on which an active element or circuit connection wiring is formed and an insulating film is formed;
Forming a contact plug by embedding a conductive material in the contact hole; and
A wiring material film forming step for forming a wiring material film for circuit connection on the semiconductor substrate;
A circuit connection wiring forming step of forming a circuit connection wiring having a pattern satisfying the condition according to any one of claims 1 to 4 on the wiring material film;
An insulating film step of forming an insulating film on the semiconductor substrate;
A method for manufacturing a semiconductor device comprising: First wiring width input means for inputting the width of the first wiring for circuit connection;
Second wiring width input means for inputting a width of a second wiring having a width smaller than the width of the first wiring;
Second wiring allowable void size input means for inputting an allowable size of voids generated in the second wiring;
Process condition input means for selecting a process condition for forming the circuit connection wiring;
Based on the width of the first wiring, the width of the second wiring, the second wiring allowable void size, and the process conditions, the wiring forming conditions using the width of the first wiring and the width of the second wiring are appropriate. Wiring formation condition determining means for determining whether or not
A circuit-connecting wiring forming apparatus. It is the wiring formation apparatus for circuit connection of Claim 6, Comprising:
The wiring formation condition determining means includes
The width size of the first wiring is W1,
The width of the second wiring is W2,
V1 is a void size with respect to the width of the first wiring generated in the first wiring,
When the void size allowed for the width of the second wiring generated in the second wiring is V2,
W2 / W1 ≧ V1 / V2
Circuit connection wiring forming apparatus for determining whether or not the above relationship is satisfied. The circuit connection wiring forming device according to claim 6 or 7,
If it is determined that the wiring cannot be formed as a result of the determination in the wiring forming condition determining unit, a wiring selecting unit that selects one of the first wiring and the second wiring to operate the wiring width data;
Wiring width changing means for changing the width of the selected wiring;
Wiring formation condition determining means for determining a wiring formation condition again based on the selected wiring width;
A circuit-connecting wiring forming apparatus. First wiring width input means for inputting the width of the first wiring for circuit connection;
Design wiring width input means for inputting a width of a design wiring having a width smaller than the width of the first wiring;
Design wiring allowable void size input means for inputting the allowable size of voids generated in the design wiring;
Process condition input means for selecting a process condition for forming the circuit forming wiring;
Is the wiring formation condition using the width of the first wiring and the width of the design wiring based on the width of the first wiring, the width of the design wiring, the allowable void size of the design wiring, and the process conditions appropriate? Wiring formation condition determining means for determining whether or not
If it is determined that the wiring cannot be formed as a result of the determination by the wiring formation condition determining means, the width of the nth wiring (n is a natural number of 2 or more) greater than the wiring width of the design wiring is determined based on the determination result. N-th wiring width calculating means for calculating in stages;
An nth wiring width determination means for comparing the wiring width of the nth wiring and the wiring width of the design wiring to determine whether the wiring width of the nth wiring is larger than the wiring width of the design wiring;
N-th wiring length determining means for determining a wiring length of the n-th wiring;
A circuit-connecting wiring forming apparatus. The circuit connection wiring forming device according to claim 9,
The wiring formation condition determining means includes
The width size of the nth wiring (n is a natural number) is Wn,
The width of the design wiring is Ws,
Vn is a void size with respect to the width of the nth wiring generated in the nth wiring,
When the void size allowed for the width of the design wiring generated in the design wiring is Vs,
Ws / Wn ≧ Vn / Vs
Circuit connection wiring forming apparatus for determining whether or not the above relationship is satisfied. The circuit connection wiring forming device according to claim 9 or 10,
The wiring length of the nth wiring (n is a natural number of 2 or more) is set to be equal to or larger than the reciprocal value of the void density defined by the number of voids generated in the unit length of the wiring length generated in the nth wiring. A circuit connection wiring forming apparatus having n-th wiring length determining means. The circuit connection wiring forming device according to any one of claims 6 to 11,
In the wiring formation condition determining means, when it is determined that the wiring can be formed, a wiring generating means for generating a wiring;
A circuit-connecting wiring forming apparatus. A procedure of acquiring data of the width of the first wiring for circuit connection received by the input unit by the first wiring width input means;
A procedure of acquiring data having a width smaller than the width of the first wiring received by the input unit by a second wiring width input means;
A procedure for acquiring an allowable size of a void generated in the second wiring accepted by the input unit by a second wiring allowable void size input means;
A procedure for acquiring a process condition for forming the wiring received by the input unit by a process condition input unit;
Based on the width of the first wiring, the width of the second wiring, the allowable void size of the second wiring, and the process conditions, the wiring formation conditions using the width of the first wiring and the width of the second wiring A procedure for judging suitability by the wiring formation condition judging means;
A method for forming wiring for circuit connection. It is a formation method of the circuit connection wiring according to claim 13,
The procedure for determining the wiring formation condition by the wiring formation condition determining means is as follows:
The width size of the first wiring is W1,
The width of the second wiring is W2,
V1 is a void size with respect to the width of the first wiring generated in the first wiring,
When the void size allowed for the width of the second wiring generated in the second wiring is V2,
W2 / W1 ≧ V1 / V2
Forming a circuit connection wiring having a procedure for determining whether or not the above relationship is satisfied. A method for forming a circuit connection wiring according to claim 13 or 14,
If it is determined that the wiring cannot be formed as a result of the determination in the wiring forming condition determining means, a procedure for selecting the operation of the wiring width data of the first wiring or the second wiring by the wiring selecting means;
A procedure of acquiring data of the selected wiring width received by the input unit by a wiring width changing unit;
A procedure for acquiring the process condition received by the input unit by a process condition input unit;
A procedure for determining the wiring formation condition again by the wiring formation condition determination means based on the data of the selected wiring width,
A method for forming wiring for circuit connection. A procedure of acquiring data of the width of the first wiring for circuit connection received by the input unit by the first wiring width input means;
A procedure for acquiring design wiring width data having a width smaller than the width of the first wiring received by the input unit by a design wiring width input means;
A procedure for obtaining an allowable size of a void generated in the design wiring accepted by the input unit by a design wiring allowable void size input means;
A procedure for acquiring a process condition for forming the wiring received by the input unit by a process condition input unit;
Based on the width of the first wiring, the width of the designed wiring, the allowable void size of the designed wiring, and the process conditions, the wiring forming conditions using the width of the first wiring and the width of the designed wiring are appropriate. A procedure for judging by the wiring formation condition judging means for judging whether or not
If it is determined that the wiring cannot be formed as a result of the determination in the wiring forming condition means, the nth wiring width calculating means determines the nth wiring (n is 2 or more) greater than the wiring width of the designed wiring based on the determination result. Of natural number) in steps,
A step of comparing the wiring width of the n-th wiring with the wiring width of the design wiring by the n-th wiring width determining means to determine whether the wiring width of the n-th wiring is larger than the wiring width of the design wiring;
Determining the wiring length of the n-th wiring by the n-th wiring length determining means;
A method for forming wiring for circuit connection. A method for forming a circuit connection wiring according to claim 16,
The procedure for determining the wiring formation conditions by the wiring formation condition determining means is as follows:
The size of the nth wiring is Wn,
The width of the design wiring is Ws,
Vn is a void size with respect to the width of the nth wiring generated in the nth wiring,
When the void size allowed for the width of the design wiring generated in the design wiring is Vs,
Ws / Wn ≧ Vn / Vs
Forming a circuit connection wiring having a procedure for determining whether or not the above relationship is satisfied. A method for forming a circuit connection wiring according to claim 16 or 17,
The n-th wiring length determining means (n is a natural number of 2 or more) has a density defined by the number of voids generated in the unit length of the wiring length generated in the n-th wiring. A method of forming a circuit connection wiring having a procedure for setting the reciprocal value or more. A method for forming a circuit connection wiring according to any one of claims 13 to 18,
In the wiring formation condition determining means, when it is determined that the wiring can be formed, a procedure for generating a wiring by the wiring generating means,
A method for forming wiring for circuit connection. Acquiring the width data of the first wiring for circuit connection received by the input unit by the first wiring width input means of the computer;
Acquiring data having a width smaller than the width of the first wiring received by the input unit by a second wiring width input means of a computer;
Obtaining an allowable size of a void generated in the second wiring received by the input unit by a second wiring allowable void size input means of a computer;
Obtaining a process condition for forming the wiring accepted by the input unit by a process condition input means of a computer;
Based on the width of the first wiring, the width of the second wiring, the allowable void size of the second wiring, and the process conditions, the wiring formation conditions using the width of the first wiring and the width of the second wiring A step of judging suitability by a wiring formation condition judging means of a computer;
A circuit connection wiring formation program for executing A program for forming a circuit connection wiring according to claim 20,
The step of determining the wiring formation condition by the wiring formation condition determination means of the computer is as follows:
The width size of the first wiring is W1,
The width of the second wiring is W2,
V1 is a void size with respect to the width of the first wiring generated in the first wiring,
When the void size allowed for the width of the second wiring generated in the second wiring is V2,
W2 / W1 ≧ V1 / V2
A circuit connection wiring formation program for executing a step of determining whether or not the above relationship is satisfied. A program for wiring formation for circuit connection according to claim 20 or 21,
If it is determined that the wiring cannot be formed as a result of the determination by the wiring formation condition determining means of the computer, the method of selecting the data of the wiring width of the first wiring or the second wiring is selected by the wiring selection means of the computer. Steps,
Obtaining data of the selected wiring width received by the input unit by a wiring width changing means of a computer;
A procedure for acquiring the process condition received by the input unit by a process condition input unit of a computer;
Determining the wiring formation condition again by the wiring formation condition determining means of the computer based on the data of the selected wiring width;
A circuit connection wiring formation program for executing Acquiring the width data of the first wiring for circuit connection received by the input unit by the first wiring width input means of the computer;
Obtaining a design wiring width data having a width smaller than the width of the first wiring received by the input unit by a design wiring width input means of a computer;
Obtaining an allowable size of a void generated in the design wiring accepted by the input unit by a design wiring allowable void size input means of a computer;
Obtaining a process condition for forming the wiring accepted by the input unit by a process condition input means of a computer;
Based on the width of the first wiring, the width of the designed wiring, the allowable void size of the designed wiring, and the process condition, whether or not the wiring forming conditions using the width of the first wiring and the width of the designed wiring are appropriate Determining by the wiring formation condition determining means of
If it is determined that the wiring cannot be formed as a result of the determination by the wiring forming condition means of the computer, the nth wiring (not less than the designed wiring width) is calculated by the nth wiring width calculating means of the computer based on the determination result. n is a step of calculating the width of 2) in a stepwise manner;
Comparing the wiring width of the n-th wiring with the wiring width of the design wiring by means of the n-th wiring width determination means of the computer and determining whether the wiring width of the n-th wiring is larger than the wiring width of the design wiring; ,
Determining the wiring length of the nth wiring of the computer by the nth wiring length determining means;
A circuit connection wiring formation program comprising: A circuit connection wiring formation program according to claim 23, wherein
The step of determining the wiring formation condition by the wiring formation condition determining means of the computer,
The size of the nth wiring is Wn,
The width of the design wiring is Ws,
Vn is a void size with respect to the width of the nth wiring generated in the nth wiring,
When the void size allowed for the width of the design wiring generated in the design wiring is Vs,
Ws / Wn ≧ Vn / Vs
A circuit connection wiring formation program for executing a step of determining whether or not the above relationship is satisfied. A program for forming a circuit connection wiring according to claim 23 or 24,
The nth wiring length determining means (n is a natural number of 2 or more) of the computer defines the wiring length of the nth wiring as the number of voids generated in the unit length of the wiring length generated in the nth wiring. A circuit connection wiring formation program for executing a step of setting the reciprocal value of density or higher. A circuit connection wiring formation program according to any one of claims 20 to 25,
In the wiring formation condition determining means of the computer, when it is determined that the wiring can be formed, a step of generating wiring by the wiring generating means of the computer;
A circuit connection wiring formation program for executing

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