JP2005334874A - Micro channel and manufacturing method therefor and micro system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method capable of improving manufacturing accuracy for the depth of a micro channel when forming single or a plurality of micro channels as a flow passage for liquid on a substrate. <P>SOLUTION: An SOI (silicon on insulator) substrate 1 having the surface layer silicon 4 with an equivalent thickness to the depth of a micro channel 21 which is the flow passage for liquid is used, and a gas or a liquid chemical is used to make the silicon 4 to penetrate the SOI substrate 1 from the surface to an embedded oxide film 3 to remove the surface layer silicon 4 selectively. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a microchannel that forms a liquid flow path in a microreactor system, an electrophoresis microsystem, and a centrifugal force separation microsystem, a manufacturing method thereof, and a microsystem.

  Microreactor systems, electrophoresis microsystems, and centrifugal force separation microsystems have come to be widely used in recent years with the progress of miniaturization and high-speed assay in chemistry, biology, and medicine. In such a system, the microchannel is used as a liquid flow path for reagents and chemicals, and is an important element that forms the basis of the microsystem.

  Advantages of micro-systems are generally many, such as high-speed analysis with a small amount of reagents, miniaturization and weight reduction of the system, integration and parallel processing, and prevention of contamination by impurities. There are benefits. In order to miniaturize the system, it is essential to reduce the size of the liquid flow path, and many microchannel systems have been proposed.

  Conventionally, a microchannel has generally been processed on a silicon substrate or a quartz substrate using a semiconductor microfabrication technique. In particular, in a highly accurate micro system, variations in the shape, size, cross-sectional area, and flatness of the micro channel greatly affect the characteristics and accuracy. In the micro reactor system, the reaction speed and reaction amount are affected, and DNA, RNA, In microsystems in which proteins are electrophoresed or centrifuged, the accuracy of mass spectrometry is affected.

  In the conventional micro system, a micro channel having a width of about 100 μm, a depth of about 100 μm, and a length of about several mm is used as a liquid channel, and the reaction speed is increased due to the miniaturization of the liquid channel. The amount of reagent can be reduced. In addition, by arranging a plurality of microchannels in parallel, simultaneous processing is possible as compared with the case of a single microchannel, and it has become possible to significantly increase the processing speed.

  Conventionally, as shown in FIG. 6, such a microchannel uses a silicon substrate 102 having a thickness of about several hundred μm to form a resist pattern 105 on its surface by using a known photolithographic technique using a photoresist and a photomask ( 6A), and using this, the silicon substrate 102 is selectively etched away by a predetermined depth by using a wet etching method or a dry etching method, or isotropically anisotropic (FIG. 6B). )), A lid 106 is formed on the surface portion of the silicon substrate 102 (FIG. 6C), and the patterned silicon substrate 102 has been used as the microchannel 121. An example is shown in Patent Document 1.

In the case of forming an inexpensive microsystem, nickel is electroformed using the patterned silicon substrate as a mold, and plastic material is injection molded using the patterned silicon substrate as a mold. This example is shown in Non-Patent Document 1.
Japanese Patent Laid-Open No. 10-337173 (Publication date: December 22, 1998) Hitachi Chemical Technical Report No. 40 (2003-1)

  In the above-described conventional manufacturing method, the line width variation after lithography is about plus / minus 0.1 μm and the etching width variation is about plus / minus 0.5 μm with respect to the microchannel width design value of about 100 μm. The microchannel width variation after the etching process is a variation of about plus or minus 0.6 μm, and is a total plus or minus 0.6% compared with the designed value of the microchannel width of 100 μm, which is negligible.

  On the other hand, with respect to the etching accuracy in the depth direction, in the case of a design value of 100 μm, the etching error with respect to the depth is plus or minus 10 μm or more, and the error rate varies within plus or minus 10%.

  This is because the conventional method cannot detect the end point of etching in either wet etching or dry etching. Therefore, in the conventional etching, dummy etching called monitoring is performed in advance, and the etching time and etching at this time are determined. This is because the only means for calculating the etching rate from the measurement of the amount and then determining the actual etching time.

  In addition, variations in etching temperature during etching and variations due to the loading effect of etching gas also occurred, and in a microchannel having a length of several millimeters, a large variation in etching depth of several percent was generated even within the same chip. Further, when there are a plurality of microchannels, a larger variation occurs.

  This variation in depth becomes a variation in the cross-sectional area of the microchannel, resulting in a variation in the amount of movement of the fluid flowing therethrough, and an accurate assay was impossible. This is the reason why the microchannel structure is inferior in assay accuracy compared to the conventional capillary method. In addition, the electrophoresis method and the centrifugal separation method of DNA, RNA, and protein caused variations in mobility, resulting in variations in detected mass, and high-precision analysis was impossible.

  The present invention has been made in view of the above-described problems, and the object of the present invention is to reduce the variation in the depth of the microchannel in the past in order to solve the above-described problem of controlling the etching amount in the depth direction in the formation of the microchannel. It is to realize a microchannel, a manufacturing method thereof, and a microsystem that can be reduced as compared with a method.

  In order to solve the above-described problems, the microchannel according to the present invention is a microchannel that forms a fluid flow path, and is a stopper for surface layer silicon and etching for forming the microchannel in the surface layer silicon. And the flow path is formed to a depth that penetrates the surface layer silicon and reaches the surface of the etching stopper layer.

  Here, “acting as a stopper” means that the etching rate in the etching stopper layer is smaller than the etching rate in the surface layer silicon. Therefore, when the etching penetrates the surface layer silicon and reaches the surface of the etching stopper layer, the etching rate is increased. It means to decrease.

  According to this configuration, the surface layer silicon and the etching stopper layer that acts as a stopper for the etching for forming the microchannel in the surface layer silicon are provided. When the surface layer silicon is etched to form the surface and reaches the surface of the etching stopper layer, the etching stopper layer acts as a stopper against the etching, and the etching rate rapidly decreases. For this reason, it is possible to reduce the variation in the depth of the microchannel forming the fluid flow path.

  In the microchannel according to the present invention, in addition to the above configuration, the etching stopper layer is formed of a buried oxide film. Then, in a microchannel forming a fluid flow path, an SOI in which surface layer silicon, a buried oxide film, and a silicon base material are laminated in this order is used as a substrate, and the flow path uses the surface layer silicon of the SOI. It is characterized by being formed to a depth that penetrates and reaches the buried oxide film.

  With the above configuration, the flow path is formed at a depth that reaches the buried oxide film through the surface layer silicon of SOI (silicon on insulator). The SOI substrate has a three-layer structure of surface layer silicon (S) / buried oxide film (I) / silicon substrate. Therefore, the buried oxide film can serve as an etching stopper when etching the surface layer silicon to form the flow path. Therefore, variation in the depth direction can be reduced and a microchannel can be formed with high accuracy, and a more stable microchemical reaction system, electrophoresis microsystem, and centrifuge system can be provided with higher accuracy than conventional methods.

  In the microchannel according to the present invention, in addition to the above configuration, the etching stopper layer is formed of a quartz substrate. In a microchannel forming a fluid flow path, an SOQ in which surface layer silicon and a quartz base material are stacked is used as a substrate, and the flow path passes through the surface layer silicon of the SOQ and the quartz base material. It is characterized by being formed to a depth that reaches the surface of the film.

  With the above configuration, the flow path is formed at a depth that reaches the surface of the quartz substrate through the surface layer silicon of SOQ (silicon on quartz). That is, SOQ is used as a substrate, and the surface layer silicon of the SOQ is removed to a depth that reaches the surface of the quartz base material, and a flow path is formed as a groove. The SOQ substrate has a two-layer structure of surface layer silicon (S) / quartz substrate (Q). Therefore, when etching the surface layer silicon to form the flow path, the quartz substrate can be used as an etching stopper. Therefore, variation in the depth direction can be reduced and a microchannel can be formed with high accuracy, and a more stable microchemical reaction system, electrophoresis microsystem, and centrifuge system can be provided with higher accuracy than conventional methods.

  Further, in the microchannel according to the present invention, in addition to the above-described configuration, the surface layer silicon has a (110) plane perpendicular to the SOI or SOQ stacking direction, and the side wall in the longitudinal direction of the microchannel is ( 111) plane.

  With the above configuration, the surface layer silicon of the surface silicon is perpendicular to the SOI or SOQ stacking direction (110), and the side wall in the longitudinal direction of the microchannel is (111). In general, the (111) plane has a slower etching rate than the (110) plane. Therefore, the side wall of the microchannel is formed perpendicular to the surface after the etching of the surface layer silicon. Therefore, in addition to the effect of the above configuration, the flatness of the side wall can be further improved, the mobility of the liquid fluid flowing through the microchannel can be improved, and the speed variation can be reduced.

The microchannel according to the present invention has a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less laminated on the surface layer silicon in addition to the above-described configuration. It is characterized by being comprised by the high concentration boron silicon base material containing this.

With this configuration, the high-concentration boron silicon substrate containing boron impurities functions as an etching stopper in the depth direction. When the boron concentration is 2 × 10 ¹⁹ cm ⁻³ or more, an etching stopper effect in which the etching rate rapidly decreases can be obtained. If the boron concentration exceeds 1 × 10 ²⁰ cm ⁻³ , the crystallinity of the high-concentration boron silicon base material breaks down, making it difficult to epitaxially grow surface layer silicon thereon. The low-concentration silicon constituting the surface layer silicon may be either P-type or N-type, but the impurity concentration is desirably 10 ¹⁸ cm ⁻³ or less.

  Due to the etching stopper effect of this high-concentration boron silicon substrate, it is possible to form microchannels with high precision by reducing variations in the depth direction, and with more accurate and stable microchemical reaction systems and electrophoresis than conventional methods. A micro system and a centrifuge system can be provided.

The microchannel according to the present invention has a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less laminated on the surface layer silicon in addition to the above-described configuration. The substrate is further provided with a silicon base material laminated on the opposite side of the surface layer silicon of the high-concentration boron silicon film.

With this configuration, the high-concentration boron silicon film containing boron impurities acts as an etching stopper in the depth direction. When the boron concentration is 2 × 10 ¹⁹ cm ⁻³ or more, an etching stopper effect can be obtained. When the boron concentration exceeds 1 × 10 ²⁰ cm ⁻³ , the crystallinity of the high-concentration boron silicon film is broken, and the epitaxial growth of the surface layer silicon on it becomes difficult.

In addition, this configuration further includes a silicon substrate laminated on the opposite side of the surface layer silicon of the high-concentration boron silicon film, so that the boron surface can be entirely formed on the silicon substrate surface by a known thermal diffusion method or ion implantation method. It is possible to use a structure in which a high-concentration boron silicon film is formed by introducing impurities, and a relatively low-concentration surface layer silicon epitaxially grown thereon is formed. According to the above structure, there is an advantage that the boron concentration on the silicon surface can be freely controlled to a higher concentration by the optimum setting of the boron impurity deposition amount by the thermal diffusion method and the optimum dose amount setting by the ion implantation method. is there. Deposition in this deposition amount is the deposition when boron is diffused over the entire surface of the silicon substrate in the thermal diffusion method, or boron is selected through a pattern (such as an oxide film) on the surface of the silicon substrate. In this case, it means the deposition when the impurity is diffused, and means impurity diffusion (deposition) from an impurity source containing boron such as B ₂ O ₃ , BBr ₃ , BCl ₃ . After this impurity diffusion (deposition), heat treatment (drive-in) is generally performed in an inert gas such as N _{2 at} a higher temperature. By adjusting the deposition time, the amount and concentration of impurities introduced into the silicon substrate are controlled.

The microchannel according to the present invention has a high-concentration boron silicon film containing boron impurities at a concentration of 2 × 10 ¹⁹ cm ^{−3 to} 1 × 10 ²⁰ cm ⁻³ in addition to the above structure. The substrate is further provided with a silicon base material including the high-concentration boron silicon film, and the high-concentration boron silicon film is formed in a region corresponding to the flow path.

With this configuration, a high-concentration boron silicon film formed in a region corresponding to the flow path and containing a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less is used as an etching stopper. Works. When the boron concentration is 2 × 10 ¹⁹ cm ⁻³ or more, an etching stopper effect can be obtained. When the boron concentration exceeds 1 × 10 ²⁰ cm ⁻³ , the crystallinity of the high-concentration boron silicon film is broken, and the epitaxial growth of the surface layer silicon on it becomes difficult.

  In addition, this structure further includes a silicon substrate laminated on the surface layer silicon on the high-concentration boron silicon film side, so that boron impurities can be formed by a thermal diffusion method or ion implantation method using a well-known photolithography technique. Can be selectively introduced into the surface of the silicon substrate to form a high-concentration boron silicon film, and a structure in which a relatively low-concentration surface layer silicon epitaxially grown thereon is formed can be used. The above configuration has an advantage that the boron concentration on the surface of the silicon substrate can be freely controlled to a higher concentration by optimal setting of the boron impurity deposition amount for thermal diffusion and the dose amount for ion implantation. In addition, the total amount of boron impurities in the high-concentration boron silicon film exposed on the surface of the silicon substrate at the initial stage of epitaxial growth can be reduced. For this reason, redistribution and autodoping of boron impurities from the high-concentration boron silicon film during epitaxial growth can be suppressed, and a more abrupt boron impurity profile can be obtained. As a result, there is an effect that depth control with higher accuracy is possible for etching with an alkaline aqueous solution such as KOH.

In addition to the above structure, the microchannel according to the present invention is characterized in that the boron impurity concentration is 6 × 10 ¹⁹ cm ⁻³ or more.

  With this configuration, a higher etching stopper effect can be obtained.

  The microchannel according to the present invention is characterized in that, in addition to the above configuration, the surface layer silicon has a (110) surface, and the longitudinal direction of the flow path is arranged in the <112> direction. Yes.

  With this configuration, when the surface of the surface layer silicon composed of the (110) plane is etched to form a flow path whose longitudinal direction is arranged in the <112> direction, the longitudinal etching side wall of the flow path is formed on the etching side wall. (111) plane appears. The (111) plane generally has a slower etching rate than the (110) plane. Therefore, after the etching of the surface layer silicon, the side wall in the longitudinal direction of the microchannel is formed smoothly and perpendicularly to the surface of the surface layer silicon. For this reason, it is possible to improve the mobility of the fluid flowing through the microchannel and reduce the speed variation.

  A microsystem according to the present invention is characterized in that the microchannel is used in a microsystem that operates as at least one of a microreactor, an electrophoresis apparatus, and a centrifugal separator using a microchannel.

  According to this configuration, the substrate includes the surface layer silicon etched to form a microchannel that forms a fluid flow path, and the etching stopper layer that acts as a stopper for etching the surface layer silicon. Therefore, when the surface layer silicon is etched to form the flow path constituting the microchannel and reaches the surface of the etching stopper layer, the etching stopper layer acts as a stopper against the etching, and the etching rate is rapidly increased. descend. For this reason, it is possible to reduce the variation in the depth of the microchannel forming the fluid flow path, and it is possible to provide a microreactor, an electrophoresis apparatus, and a centrifugal separation apparatus that are more accurate and stable than the conventional method.

  The microchannel manufacturing method according to the present invention is a microchannel manufacturing method for forming a fluid flow path, and acts as a stopper for surface layer silicon and etching for forming the microchannel in the surface layer silicon. The flow path is formed by etching the surface layer silicon until reaching the surface of the etching stopper layer using a substrate including at least an etching stopper layer.

  According to this configuration, the surface layer silicon and the etching stopper layer that acts as a stopper for the etching for forming the microchannel in the surface layer silicon are provided. When the surface layer silicon is etched to form the surface and reaches the surface of the etching stopper layer, the etching stopper layer acts as a stopper against the etching, and the etching rate rapidly decreases. For this reason, it is possible to reduce the variation in the depth of the microchannel forming the fluid flow path.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention includes an SOI in which the etching stopper layer is formed of a buried oxide film, and a surface layer silicon, a buried oxide film, and a silicon base material are laminated in this order. The flow channel is formed by etching the surface layer silicon until reaching the buried oxide film of the SOI.

  With the above configuration, the flow path is formed by etching the surface layer silicon until reaching the buried oxide film of SOI. The SOI substrate has a three-layer structure of surface layer silicon (S) / buried oxide film (I) / silicon substrate. Therefore, the buried oxide film can serve as an etching stopper during anisotropic etching of the surface layer silicon. Therefore, variation in the depth direction can be reduced and a microchannel can be formed with high accuracy, and a more stable microchemical reaction system, electrophoresis microsystem, and centrifuge system can be provided with higher accuracy than conventional methods.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention removes the buried oxide film under the flow path after etching away the surface layer silicon until reaching the buried oxide film of the SOI. It is characterized by that.

  With the above configuration, the surface layer silicon is removed by etching until the SOI buried oxide film is reached, and then the buried oxide film under the flow path is removed. Therefore, the bottom surface of the channel is formed of a highly hydrophobic silicon substrate. Therefore, in addition to the effect of the above configuration, there is an effect that it is convenient for a liquid flow path that requires more hydrophobicity.

  In addition to the above-described configuration, the microchannel manufacturing method according to the present invention uses an SOQ in which the etching stopper layer is formed of a quartz base material and a surface layer silicon and a quartz base material are laminated. The flow path is formed by etching the surface layer silicon until reaching the surface of the substrate.

  With the above configuration, the flow path is formed by etching the surface layer silicon until reaching the surface of the SOQ quartz substrate. That is, SOQ is used as a substrate, and the surface layer silicon of the SOQ is removed to a depth that reaches the surface of the quartz base material, and a flow path is formed as a groove. The SOQ substrate is formed by a two-layer structure of surface layer silicon (S) / quartz substrate (Q). Therefore, when etching the surface layer silicon to form the flow path, the quartz substrate can be used as an etching stopper. Therefore, it is possible to accurately form microchannels by reducing variation in the depth direction, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system that are more accurate than conventional methods. Play.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention is characterized in that the sidewall silicon of the flow path is exposed to an oxidizing atmosphere to make it hydrophilic.

  With the above configuration, the sidewall silicon of the flow path is exposed to an oxidizing atmosphere to make it hydrophilic. Therefore, the side wall of the microchannel can be made more hydrophilic. Therefore, in addition to the effects of the above-described configuration, there is an effect that the liquid channel (passage channel) is advantageous for applications requiring hydrophilicity.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention is characterized by using an anisotropic dry etching method for etching the surface layer silicon.

  With the above configuration, an anisotropic dry etching method is used for etching the surface layer silicon. Therefore, the selectivity of the etching rate of the surface layer silicon with respect to the buried oxide film is sufficiently large. Therefore, in addition to the effect of the above configuration, there is an effect that the surface layer silicon can be selectively etched without substantially etching the underlying buried oxide film.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention is characterized by using an anisotropic wet etching method for etching the surface layer silicon.

  With the above configuration, an anisotropic wet etching method is used for etching the surface layer silicon. Therefore, the selectivity of the etching rate of the surface layer silicon with respect to the buried oxide film is sufficiently large. Therefore, in addition to the effect of the above configuration, there is an effect that the surface layer silicon can be selectively etched without substantially etching the underlying buried oxide film.

  In addition to the above-described configuration, the microchannel manufacturing method according to the present invention is such that the surface layer silicon is formed of a (110) plane and the side wall in the longitudinal direction of the flow path is formed of a (111) plane. It is a feature.

  With the above configuration, the surface layer silicon is formed of the (110) plane, and the side wall in the longitudinal direction of the flow path is formed of the (111) plane. In general, the (111) plane has a slower etching rate than the (110) plane. Therefore, the side wall of the microchannel is formed perpendicular to the surface after the etching of the surface layer silicon. Therefore, in addition to the effect of the above configuration, the flatness of the side wall can be further improved, and the mobility of the liquid fluid flowing through the microchannel can be improved and the speed variation can be reduced.

The microchannel manufacturing method according to the present invention has a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less in which the surface stopper silicon is stacked in addition to the above-described configuration. The high-concentration boron silicon base material containing boron impurities of the above, and through the surface layer silicon to reach the surface of the high-concentration boron silicon base material anisotropically with an aqueous alkaline solution to the depth It is characterized by etching.

  With this configuration, the flow path is formed at a depth that reaches the surface of the high-concentration boron silicon substrate containing boron impurities through the relatively low-concentration surface layer silicon. Therefore, when the surface layer silicon is anisotropically etched with an alkaline aqueous solution such as KOH in order to form the flow path, the high-concentration boron silicon substrate can be used as an etching stopper. Therefore, variation in the depth direction can be reduced and the microchannel can be formed with high accuracy, and a more stable and stable microchemical reaction system, electrophoresis microsystem, and centrifuge system can be provided as compared with the conventional method.

The microchannel manufacturing method according to the present invention has a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less in which the surface stopper silicon is stacked in addition to the above-described configuration. The substrate is further provided with a silicon base material on which the high-concentration boron silicon film is laminated, and penetrates the surface layer silicon to form a surface of the high-concentration boron silicon film. The flow path is anisotropically etched with an alkaline aqueous solution to a depth reaching the thickness of the film.

  With this configuration, a high-concentration boron silicon film serving as an etching stopper is formed on the silicon substrate. Therefore, boron impurities are introduced into the entire surface of the silicon substrate by a known thermal diffusion method or ion implantation method to form a high concentration boron silicon film, and a relatively low concentration surface layer silicon epitaxially grown thereon. The structure formed can be used. The above structure has the advantage that the boron concentration on the surface of the silicon substrate can be freely controlled to a higher concentration by the optimum setting of the boron impurity deposition amount by the thermal diffusion method and the optimum dose amount setting by the ion implantation method. .

In addition to the above-described structure, the method for manufacturing a microchannel according to the present invention includes a high-concentration boron containing the boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. The silicon substrate is further provided with a silicon base material including the high-concentration boron silicon film, and the high-concentration boron silicon film is formed in a region corresponding to the flow path, and the surface layer silicon is formed. The flow path is anisotropically etched with an alkaline aqueous solution to a depth that penetrates and reaches the surface of the high-concentration boron silicon film.

  With this configuration, a silicon base material including the high-concentration boron silicon film is further provided, so that boron impurities are part of the surface of the silicon base material by a thermal diffusion method or ion implantation method using a well-known photolithography technique. A structure in which a high concentration boron silicon film is selectively introduced to form a relatively low concentration surface layer silicon epitaxially grown thereon can be used. The above structure has an advantage that the boron concentration on the surface of the silicon substrate can be freely controlled to a higher concentration by optimal setting of the boron impurity deposition amount in the thermal diffusion method and the dose amount in the ion implantation method. In addition, in the initial stage of epitaxial growth, the total amount of boron impurities in the high-concentration boron silicon film exposed on the surface of the silicon substrate can be reduced. Therefore, redistribution and autodoping of boron impurities from the high-concentration boron silicon film during epitaxial growth can be suppressed, and a more abrupt impurity profile can be obtained. As a result, higher depth control is possible with respect to etching with an alkaline aqueous solution such as KOH.

  In addition to the above-described structure, the microchannel manufacturing method according to the present invention exposes the silicon exposed to the flow path to an oxidizing atmosphere or deposits it by a CVD method so that the side walls and the bottom surface of the flow path are formed. It is characterized by covering with an oxide film.

  With this configuration, the silicon on the side walls and bottom surface of the flow path is insulated by the oxide film. Therefore, the microchannel is covered with an oxide film and insulated. Therefore, in addition to the effects of the above-described configuration, a liquid channel (flow channel) can be used when a subject is migrated or separated using driving force in electrophoresis or electroosmotic flow.

  In addition to the above configuration, the microchannel manufacturing method according to the present invention is characterized in that silicon exposed to the flow path is exposed to oxygen plasma or immersed in an oxidizing chemical solution.

  With this configuration, the side wall and bottom surface of the microchannel can be made hydrophilic. Therefore, in addition to the effect by the above-described configuration, there is an effect that it is convenient for applications where hydrophilicity is required as a flow path.

In addition to the above configuration, the microchannel manufacturing method according to the present invention is characterized in that the boron impurity concentration is 6 × 10 ¹⁹ cm ⁻³ or more.

  With this configuration, a higher etching stopper effect can be obtained.

  Another method of manufacturing a microchannel according to the present invention includes a surface layer silicon that is etched to form a microchannel that forms a fluid flow path, and an etching that acts as a stopper for etching the surface layer silicon. A first mold having a substrate including at least a stopper layer, wherein the flow path penetrates the surface layer silicon and reaches a surface of the etching stopper layer, and forms a first mold. A second mold is formed based on the mold, and the flow path is formed by injection molding a plastic material using the second mold.

  According to said structure, the surface layer silicon etched in order to form the microchannel which makes a fluid flow path, and the etching stopper layer which acts as a stopper with respect to the etching to the said surface layer silicon are provided. Therefore, the etching stopper layer acts as a stopper against etching, and a first mold in which grooves having reduced depth variations are formed is obtained. A second mold is formed on the basis of the first mold, and a plastic material is injection molded using the second mold to obtain a plastic material microchannel. Since the variation in the depth direction of the groove of the first mold can be formed with high accuracy, it is possible to obtain a plastic material microchannel with reduced variation in the depth direction.

  In addition to the above-described structure, another manufacturing method of the microchannel according to the present invention is configured such that the etching stopper layer is formed of a buried oxide film, and a surface layer silicon, a buried oxide film, and a silicon base material are arranged in this order as a substrate. Using the stacked SOI, a second mold is formed using the first mold in which the surface layer silicon is etched until reaching the buried oxide film of the SOI, and injection molding is performed with a plastic material using the second mold. Thus, the above-described flow path is formed.

  With this configuration, the SOI in which the surface layer silicon, the buried oxide film acting as an etching stopper, and the silicon base material are stacked in this order is used, and the first surface layer silicon is etched until the SOI buried oxide film is reached. A mold is obtained. A second mold is formed based on the first mold, and a plastic material is injection molded using the second mold to obtain a microchannel. Since the variation in the depth direction of the groove of the first mold can be formed with high accuracy, it is possible to obtain a plastic material microchannel with reduced variation in the depth direction.

  In addition to the above-described structure, another method for manufacturing a microchannel according to the present invention uses the SOQ in which the etching stopper layer is formed of a quartz base material and the surface layer silicon and the quartz base material are stacked as the substrate. The second mold is formed by using the first mold in which the surface layer silicon is etched until reaching the surface of the SOQ quartz base material, and the second mold is used for injection molding with a plastic material. It is characterized by forming a road.

  With this configuration, the first mold in which the surface layer silicon is etched until the surface of the SOQ quartz substrate is reached is obtained by using the SOQ in which the surface layer silicon and the quartz substrate serving as an etching stopper are stacked. . A second mold is formed based on the first mold, and a plastic material is injection molded using the second mold to obtain a microchannel.

  Therefore, the surface of the quartz substrate can be used as an etching stopper during anisotropic etching of the surface layer silicon.

  Therefore, since the variation in the depth direction can be reduced and the groove of the first mold can be formed with high accuracy, the microchannel formed using the groove can be formed with high accuracy by reducing the variation in the depth direction. Compared to the above, a more accurate and stable microchemical reaction system, electrophoresis microsystem, and centrifuge system can be provided.

In addition to the above-described configuration, another method for manufacturing a microchannel according to the present invention includes the etching stopper layer laminated on the surface layer silicon and having a thickness of 2 × 10 ¹⁹ cm ^{−3 to} 1 × 10 ²⁰ cm ^−3. A second template is formed using a first template that is composed of a high-concentration boron silicon film containing a boron impurity at a concentration, and in which the surface layer silicon is etched until it reaches the surface of the high-concentration boron silicon film, The flow path is formed by injection molding with a plastic material using two molds.

With this configuration, the etching stopper layer is formed of a high-concentration boron silicon film that is laminated on the surface layer silicon and contains a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, A first mold obtained by etching the surface layer silicon until reaching the surface of the high-concentration boron silicon film is obtained. A second mold is formed based on the first mold, and a plastic material is injection molded using the second mold to obtain a microchannel. Since the groove of the first mold can be accurately formed by reducing variations in the depth direction, a plastic material microchannel with reduced variations in the depth direction can be obtained.

  According to the microchannel, the microsystem, and the microchannel manufacturing method according to the present invention, the surface layer silicon etched to form the microchannel forming the fluid flow path, and the etching on the surface layer silicon The etching stopper layer that acts as a stopper is provided, so that when the surface layer silicon is etched to form the flow path constituting the microchannel and reaches the surface of the etching stopper layer, the etching stopper layer is etched. On the other hand, it acts as a stopper, and the etching rate rapidly decreases. For this reason, it is possible to reduce the variation in the depth of the microchannel forming the fluid flow path.

  In addition, the microchannel according to the present invention uses, as a substrate, SOI in which surface layer silicon, a buried oxide film, and a silicon base material are laminated in this order, and the flow path penetrates the surface layer silicon of the SOI. In this configuration, the depth reaches the buried oxide film.

  Thereby, when the surface layer silicon is etched to form the flow path, the buried oxide film can serve as an etching stopper. Therefore, it is possible to accurately form microchannels by reducing variation in the depth direction, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system that are more accurate than conventional methods. Play.

  In addition, the microchannel according to the present invention uses, as a substrate, SOQ in which surface layer silicon and a quartz base material are laminated, and the flow path penetrates the surface layer silicon of the SOQ to the surface of the quartz base material. It is the structure formed in the depth which reaches | attains.

  Thereby, when etching the surface layer silicon to form the flow path, the quartz substrate can be used as an etching stopper. Therefore, it is possible to accurately form microchannels by reducing variation in the depth direction, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system that are more accurate than conventional methods. Play.

  The method for manufacturing a microchannel according to the present invention uses SOI in which surface layer silicon, a buried oxide film, and a silicon base material are stacked in this order, and etches the surface layer silicon until reaching the buried oxide film of the SOI. Thus, the above-described flow path is formed.

  Thereby, the buried oxide film can be used as an etching stopper at the time of anisotropic etching of the surface layer silicon. Therefore, it is possible to accurately form microchannels by reducing variation in the depth direction, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system that are more accurate than conventional methods. Play.

  Also, the microchannel manufacturing method according to the present invention uses SOQ in which surface layer silicon and a quartz substrate are laminated, and etches the surface layer silicon until reaching the surface of the quartz substrate of the SOQ. It is the structure which forms a flow path.

  Thereby, when etching the surface layer silicon to form the flow path, the quartz substrate can be used as an etching stopper. Therefore, it is possible to accurately form microchannels by reducing variation in the depth direction, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system that are more accurate than conventional methods. Play.

  In addition, the method for manufacturing a microchannel according to the present invention forms a second mold using a first mold in which surface layer silicon is etched until reaching a buried oxide film of SOI, and uses the second mold to form a plastic. The above-mentioned flow path is formed by injection molding with a material.

  Thereby, the buried oxide film can be used as an etching stopper at the time of anisotropic etching of the surface layer silicon. Therefore, the variation in the depth direction can be reduced and the groove of the first mold can be accurately formed. Therefore, when the plastic material is injection molded using the second mold formed based on the first mold, the depth direction It is possible to form a microchannel with high accuracy by reducing variation, and to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system with higher accuracy than conventional methods.

  Also, the method for manufacturing a microchannel according to the present invention forms a second template using the first template etched with surface layer silicon until reaching the surface of the SOQ quartz substrate, and uses the second template. Thus, the flow passage is formed by injection molding with a plastic material.

  As a result, the surface of the quartz substrate can serve as an etching stopper during anisotropic etching of the surface layer silicon. Therefore, the variation in the depth direction can be reduced and the first mold can be formed with high accuracy. Therefore, when the plastic material is injection-molded using the second mold formed based on the first mold, the variation in the depth direction is reduced. Thus, the microchannel can be formed with high accuracy, and it is possible to provide a stable microchemical reaction system, electrophoresis microsystem, and centrifuge system with higher accuracy than the conventional method.

  Hereinafter, microchannels according to embodiments of the present invention will be described with reference to the drawings.

  In the present embodiment, for example, the microchannel 21 is denoted by a reference numeral in the drawing and expressed as a microchannel, which means a microchannel itself that forms a fluid flow path. On the other hand, when noting the reference numerals of the drawings and simply describing the microchannel, it means a structure in which a microchannel forming a fluid flow path is formed. This structure may be referred to as a microfluidic chip.

  First, the structure and characteristics of the microchannel according to this embodiment will be described. In the SOI technique using the wafer bonding technique, when the thickness of the surface layer silicon is several tens of μm, the thickness variation of the surface layer silicon can be easily controlled to plus or minus 2% and is already commercially available. In this embodiment, utilizing this, an SOI substrate is used as a material for forming the microchannel instead of the silicon substrate. The SOI substrate has a three-layer structure of surface layer silicon (S) / buried oxide film (I) / silicon substrate.

More specifically, for example, a buried silicon oxide film (SiO ₂ or SiO _2-x ) can be used as the buried oxide film. Generally, a thermal oxide film (SiO ₂ ) can be considered, but an oxide film (SiO _2−x ) by CVD can also be considered. From the viewpoint of selectivity, SiO ₂ is desirable. Moreover, as an example of films other than the silicon oxide film, for example, Al ₂ O ₃ can be cited.

  1A to 1D are views showing a basic method for manufacturing a microchannel according to this embodiment. This microchannel is realized, for example, on a SOI (silicon on insulator) substrate 1 including a silicon base 2 which is a silicon semiconductor substrate by using a well-known photolithography technique. 1A to 1D, the depth direction on the paper surface is the direction in which the sample in the microchannel flows. 2 (a) to (c), FIG. 3 (a) to (c), FIG. 5 (a) to (d), FIG. 6 (a) to (c), and FIG. ), FIGS. 9A to 9D, FIGS. 10A to 10D, and FIGS. 11A to 11D are the same. As shown in FIGS. 1A to 1D, an SOI substrate 1 having a surface layer silicon 4 having a thickness corresponding to the depth of a microchannel 21 serving as a liquid flow path is used, and a gas or a chemical solution is used. The surface layer silicon 4 is selectively removed by passing the surface layer silicon 4 from the surface of the SOI substrate 1 to the buried oxide film 3. In this way, the present invention makes the buried oxide film 3 act as an etching stopper at the time of anisotropic etching of the surface layer silicon 4. In this case, the SOI having the thick surface layer silicon 4 is generally manufactured by a wafer bonding method, and the thickness of the surface layer silicon 4 in that case can be manufactured from 0.5 μm to 100 μm.

  As a result, the depth variation of about 100 μm microchannels 21 formed by anisotropic etching on the surface of the SOI substrate 1 can be controlled to about plus or minus 2 μm or less across all microchannels on the system. This corresponds to about plus or minus 2% of the depth, and is reduced to about 1/5 of the prior art. Therefore, when forming one or a plurality of microchannels that serve as liquid flow paths on the substrate, the manufacturing accuracy of the depth of the microchannels can be improved.

  When SOI is used, the etching of the surface layer silicon 4 is performed by either a wet etching method having a sufficiently high etching rate selection ratio with respect to the buried oxide film 3 such as KOH or ethylenediamine aqueous solution, or anisotropic dry etching. Is possible. The etching selectivity of the surface layer silicon 4 with respect to the buried oxide film 3 can be 100 or more by using an appropriate etching gas in dry etching, and almost infinite selection in the wet etching method using KOH or ethylenediamine aqueous solution. A ratio is obtained.

  That is, as the buried oxide film 3, as described above, a film having a large etching selection ratio of the surface layer silicon 4 with respect to the buried oxide film 3 may be selected as appropriate.

  Since the selection ratio is large as described above, the etching amount of the underlying buried oxide film 3 is 0.05 μm or less even if overetching of about 5% is performed during silicon etching at a depth of about 100 μm. Become.

  By etching the buried oxide film 3 using the SOI substrate 1 as an etching stopper by this method, the surface layer silicon 4 can be selectively etched without almost etching the underlying buried oxide film 3.

  In addition, when dry etching is used, the surface layer silicon 4 can be just etched by detecting an etching reaction gas, and an etching attack to the underlying buried oxide film 3 can also be prevented.

  Further, when wet etching of KOH or ethylenediamine aqueous solution is used, just etching can be detected by detecting bubbles by a reaction gas, and in this case, an excessive etching attack can be prevented with respect to the underlying buried oxide film 3.

  By using the SOI buried oxide film for forming the microchannel by the above-described method, the variation in the microchannel depth can be controlled with high accuracy to approximately the thickness variation of the surface layer silicon 4 of the SOI.

  As described above, according to this configuration, in the formation of the microchannel, the variation in the depth direction of the microchannel can be formed with high accuracy. As a result, if manufactured using this microchannel, stable microreactors (microchemical reaction systems), electrophoresis devices (electrophoresis microsystems), and centrifugal force separation devices (centrifugation systems) with higher accuracy than before. Etc. can be provided.

  Next, the manufacturing process of the microchannel will be described. First, as shown in FIG. 1A, the SOI substrate 1 has a thickness of about 300 to 800 μm, for example, as a silicon base material 2, and has an embedded oxide film 3 having a thickness of 1 to 10 μm on the top. doing. On the buried oxide film 3, a surface layer silicon 4 is formed with a thickness of 5-150 μm. This SOI substrate 1 is provided by a wafer manufacturer by a normal wafer bonding method and is called a bonding SOI method, and the UNIBOND method (SOITEC, France), PASE (Shin-Etsu Chemical), and ELTRAN (Canon) are representative. is there. The film thickness of the surface layer silicon 4 is generally 1-30 μm for normal IC applications, but can be easily made 50-150 μm thick by epitaxially growing silicon on the SOI as required. .

  In the bonded SOI, the film thickness variation of the surface layer silicon 4 is generally controlled within 2%. That is, when the thickness is 100 μm, the error is at most plus or minus 2 μm.

  Next, a photoresist is applied to the SOI substrate 1 in accordance with normal photolithography, and after baking, the SOI substrate 1 is irradiated with light using an exposure machine using a photomask. In this case, the photoresist may be a positive type or a negative type. Alternatively, a metal mask may be used instead of the photoresist.

  Next, after performing well-known development and baking processes to form a resist pattern 5, as shown in FIG. 1B, the resist layer 5 is used as a mask to anisotropically etch the surface layer silicon with a high-density plasma etching apparatus. 4 is selectively etched. An example of the high-density plasma etching apparatus is MULTIPLEX-ICP manufactured by Sumitomo Precision Co., Ltd. In this case, the etching rate is 20 μm / min. For example, when a silicon layer having a thickness of 100 μm is etched, the etching is completed in about 5 minutes.

  When dry etching is used, a silicon etching gas having a sufficiently high selectivity with respect to the buried oxide film 3 is used as the etching gas for the surface layer silicon 4. For example, in ZFL-58 manufactured by ZEON Corporation, a selective ratio of 150 or more is possible in the etching of the buried oxide film 3 and the surface layer silicon 4, and even if 5% overetching is performed at the time of 100 μm silicon etching, The etching amount of the oxide film 3 is at most about 0.04 μm.

  In the above method, the reaction exhaust gas during silicon etching can be detected to accurately detect the etching end point, and the etching can be stopped accurately. After the etching, as shown in FIG. 1C, the resist pattern 5 or the metal used as the mask is removed using a known method. Thereby, the microchannel 21 is formed.

  1A to 1C, the etching is started from the surface layer silicon 4 side, and the surface of the buried oxide film 3, that is, the surface layer silicon 4 of the buried oxide film 3 and Etching is finished when it just reaches the contact surface.

  As shown in FIG. 1D, the microchannel formed by the above method is covered with a cover 6 using a transparent plastic flat plate, glass flat plate or quartz flat plate. The lid 6 can be formed using an appropriate adhesive, light, heat or the like.

  In the microchannel 21 formed by the above method, the side wall is formed from the silicon of the surface layer silicon 4 and the bottom surface is formed from the buried oxide film 3, but the silicon and the buried oxide film 3 are hydrophobic. Since the degree of hydrophilicity and the degree of hydrophilicity are different (the buried oxide film 3 is more hydrophilic than silicon), the microchannel has improved fluid mixing properties and often provides desirable results.

  Further, by exposing the microchannel 21 formed by the above method to an oxidizing chemical solution of silicon or an oxidizing gas at a low temperature, silicon having a thickness of several to several tens of angstroms on the side wall of the microchannel 21 after etching. The oxide film can be formed. Thereby, the side wall of the microchannel can be made more hydrophilic, which is convenient for applications that require hydrophilicity as a liquid flow path (flow path).

  2A to 2C, after the formation of the silicon microchannel 21 processed by the above method (see FIG. 2B), the buried oxide film 3 is selectively formed using anisotropic dry etching. This is an example in which the microchannel 22 is formed by removing (see FIG. 2C). FIGS. 2A and 2B are the same as FIGS. 1A and 1B, respectively. 2C, the lid 6 is formed in the same manner as in the example of FIG. 1, and the description and illustration are omitted. By using an etching gas having a sufficiently high selectivity of the buried oxide film 3 with respect to the silicon substrate 2, only the buried oxide film 3 can be removed by etching without damaging the underlying silicon substrate 2. In this case, the bottom surface of the channel is formed of silicon having high hydrophobicity, which is convenient in the case of a liquid flow path (flow path) that requires more hydrophobicity.

  3A to 3C are microchannels formed by the above-described method (in this example, the microchannels shown in FIGS. 1A to 1D and before the lid 6 is formed). Is a casting mold (first casting mold) (FIG. 3 (a)), and a nickel substrate 7 is casted by a known technique (FIG. 3 (b)). Thereafter, the nickel substrate 7 is used as a casting mold (second casting mold). This is an example in which the microchannel 23 is formed by injection molding of the plastic material 8 (FIG. 3C). By using plastic materials, mass production is possible at low cost. Since the thickness of the mold is controlled by the method of the present invention, the depth accuracy of the plastic molded product can be supplied with higher accuracy than the conventional product.

  When the microchannel is formed on the SOI substrate 1, as shown in FIG. 4, the plane orientation is the (110) plane 9, that is, the plane parallel to the bottom surface of the microchannel 24 is the (110) plane 9. It is preferable to use the SOI substrate 1 made of the surface layer silicon 4 and lay out the microchannel pattern so that the (111) plane 10 having a low etching rate appears on the side wall in the length direction of the microchannel 24. That is, the (111) plane 10 has a slower etching rate than the (110) plane 9. Thus, after wet etching, for example, wet etching of the surface layer silicon 4 with KOH or ethylenediamine aqueous solution, the side wall of the microchannel 24 is formed perpendicular to the surface of the surface layer silicon 4, and the flatness of the side surface is further increased. Can be improved. This is advantageous from the viewpoint of improving the mobility of liquid fluid flowing through the microchannel and reducing the speed variation. This method also has an advantage that an expensive high-density plasma etching apparatus is not required.

  In the above method, an example in which the SOI substrate 1 having the buried oxide film 3 as the insulator film on the silicon base material 2 is used as the substrate is shown. However, the insulating substrate is not limited to the silicon base material, and other insulating materials such as quartz, glass, plastic, etc. It can also be applied to objects.

  Further, as shown in FIGS. 5A to 5D, the present invention can be easily applied to an SOQ (silicon on quartz) substrate 11 having the surface layer silicon 4 directly on the quartz base 12.

  5A to 5D, the resist pattern 5 is applied to the SOQ substrate 11 in which the surface layer silicon 4 having a thickness of about 30 to 150 μm is formed on the quartz base material 12 having a thickness of 300 to 800 μm. Using the mask (FIG. 5A), the surface layer silicon 4 is selectively removed by dry etching or wet etching (FIG. 5B). The resist pattern 5 is removed (FIG. 5C), and a lid 6 is formed as in FIG. 1D (FIG. 5D). Thereby, the microchannel 25 is formed. In this case, the underlying quartz substrate 12 functions as an etching stopper, and the same effect as the SOI described above can be obtained.

  Even when SOQ is used, the resist pattern 5 is laid out so that the surface orientation of the surface layer silicon 4 is the (110) plane and the side wall of the microchannel 25 is the (111) plane. By wet etching, a microchannel having a smooth surface and perpendicular to the surface of the surface layer silicon 4 can be formed, and the flow of flowing liquid fluid is large and a stable flow can be realized. This method also has an advantage that an expensive high-density plasma apparatus is not required.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  Further, the microchannel manufacturing method according to the present invention uses a SOI (silicon on insulator) as a substrate in the microchannel manufacturing method for forming a fluid flow path, and reaches the buried oxide film of the SOI. You may comprise so that the silicon of a surface layer may be etched.

  Further, the microchannel manufacturing method according to the present invention may be configured to use an anisotropic dry etching method for etching the silicon in the above configuration.

  Moreover, the method for manufacturing a microchannel according to the present invention may be configured such that, in the above configuration, a silicon substrate is used for the SOI of the substrate.

  Moreover, the method for manufacturing a microchannel according to the present invention may be configured such that, in the above configuration, the side wall silicon of the channel is exposed to an oxidizing atmosphere to make it hydrophilic.

  Further, the microchannel manufacturing method according to the present invention may be configured such that an anisotropic wet etching method is used for etching silicon in the above configuration.

  Also, the microchannel manufacturing method according to the present invention is a microchannel manufacturing method for forming a fluid flow path, wherein SOQ (silicon on quartz) is used as the substrate, and the surface layer silicon of SOQ is quartz surface. Alternatively, the etching may be selectively performed until reaching the above.

  The microchannel manufacturing method according to the present invention is a microchannel manufacturing method for forming a fluid flow path, using SOI as the substrate, etching away silicon until reaching the buried oxide film of the SOI, The buried oxide film below the flow path may be removed.

  The microchannel manufacturing method according to the present invention may be configured such that, in the above configuration, the surface silicon layer is formed of the (110) plane, and the side wall in the long side direction of the channel is formed of the (111) plane.

  The microchannel manufacturing method according to the present invention may be configured such that, in the above configuration, the surface silicon layer is formed of the (110) plane, and the side wall in the long side direction of the channel is formed of the (111) plane.

  Also, in the microchannel manufacturing method according to the present invention, SOI is used as a substrate, and injection molding is performed with a plastic material using a microchannel in which silicon is etched until reaching the buried oxide film of SOI as a mold. You may comprise.

  Also, in the microchannel manufacturing method according to the present invention, SOQ is used as a substrate, and injection molding is performed with a plastic material using a microchannel in which silicon is etched until reaching the quartz surface of SOQ as a mold. It may be configured.

  The microchannel according to the present invention is a microchannel that forms a fluid flow path, and uses an SOI (Silicon On Insulator) as a substrate, and the flow path reaches a depth at which the SOI reaches a buried oxide film. You may comprise so that it may be formed.

  The microchannel according to the present invention uses the SOQ (silicon-on-quartz) substrate as the substrate in the above configuration, and further selectively removes the SOQ surface layer silicon to a depth that reaches the quartz surface to form a groove. It may be configured as described.

  Further, the microchannel according to the present invention may be configured such that, in the above configuration, the surface silicon layer is formed of the (110) plane, and the side wall in the long side direction of the channel is formed of the (111) plane.

  Further, the present invention may be configured to be a microreactor system, an electrophoresis microsystem, or a centrifugal force separation microsystem using the microchannel having the above configuration.

  Next, another structure and features of the microchannel according to this embodiment will be described. As described above, in the silicon epitaxial technique, when the thickness of the surface layer silicon is several tens of μm, the thickness variation of the surface layer silicon can be controlled to plus or minus 2%. In this embodiment, by utilizing this fact, instead of the SOI substrate or the SOQ substrate, the material for forming the microchannel is replaced with a high-concentration boron silicon base material containing a high-concentration boron impurity, and the high-concentration boron silicon. A substrate containing low concentration surface layer silicon epitaxially grown on a substrate is used. This substrate is formed by a two-layer structure of surface layer silicon / high-concentration boron silicon base material. The surface layer silicon may be either N-type or P-type.

More specifically, as the high-concentration boron silicon substrate containing high-concentration boron, for example, a silicon crystal to which a large amount of boron impurities are added during crystal growth by a silicon pulling method is used. The boron impurity concentration is preferably 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, and preferably about 6 × 10 ¹⁹ cm ⁻³ or more in order to obtain higher etching stopper properties. Boron is more preferable as a high-concentration impurity than impurities such as P and Ge because a higher selectivity can be obtained in a later etching step.

  FIG. 7A to FIG. 7D are diagrams showing a basic manufacturing method of a microchannel (microfluidic chip) according to this embodiment. The same reference numerals are given to the same components as those described above. Therefore, the detailed description is abbreviate | omitted. The same applies to the following drawings. The microchannel is a substrate obtained by epitaxially growing a surface layer silicon 33 made of (110) plane containing a relatively low concentration impurity on a high concentration boron silicon substrate 32 made of (110) face containing high concentration boron. 31 is formed using a known photolithography technique (FIG. 7A).

  In the above, the mask pattern forming the microchannel 26 is formed so that the longitudinal direction of the microchannel 26 along the direction in which the liquid flows is arranged along the <112> direction 54 as shown in FIG. Pattern is used. When a pattern having a long side along the <112> direction 54 is formed on the surface layer silicon 33 having the (110) plane 51, the etching rate is reduced during etching with an alkaline aqueous solution as in the microchannel 26 shown in FIG. The slow (111) surface 53 is advantageous for the microchannel 26 because it appears perpendicular to the (110) surface 51 along the length of the microchannel 26. In addition, a (111) surface 52 having a slow etching rate appears in another <112> direction at the end of the microchannel 26. The mask pattern is perpendicular to the longitudinal direction of the microchannel 26. However, when the etching is performed, a (111) surface 52 having a low etching speed appears along the other <112> direction at the end portion. The (111) plane 52 is not orthogonal to the (111) plane 53 along the longitudinal direction of the microchannel 26 and intersects at 110 degrees (or 70 degrees). In FIG. 4 described above, the (111) plane appearing at the end portion is omitted.

  As shown in FIG. 7, a substrate 31 having a surface layer silicon 33 having a thickness corresponding to the depth of the microchannel 26 serving as a liquid passage is used, and KOH, EDP (ethylenediamine pyrocatechol) or TMAH (tetramethylammonium). The surface layer silicon 33 is selectively removed by penetrating the surface layer silicon 33 from the surface to the surface of the high-concentration boron silicon base material 32 using an aqueous solution of hydroxide) (FIG. 7B). . In this way, the present invention makes the boron high-concentration boron silicon substrate 32 act as an etching stopper during anisotropic etching with an alkaline aqueous solution of KOH, EDP or TMAH. The surface layer silicon 33 is manufactured by an epitaxial method, and in this case, the thickness of the surface layer silicon 33 can be manufactured in the range of 1 μm to 150 μm.

  In this manner, the variation in depth of the microchannel 26 having a depth of about 100 μm formed on the surface of the substrate 31 by anisotropic etching with an alkaline aqueous solution of KOH, EDP, or TMAH can be reduced. A plurality of microchannels 26 can be formed, and in this case, variation in depth can be reduced over all the microchannels 26 on the substrate 31.

When the boron concentration of the high-concentration boron silicon base material 32 is increased to 2 × 10 ¹⁹ cm ⁻³ or more, compared with the case where the boron concentration is 10 ¹⁸ cm ⁻³ or less, It is said that the etching rate starts to decrease and decreases in inverse proportion to about the fourth power of the boron concentration. When the boron concentration of the high-concentration boron silicon substrate 32 is further increased to 6 × 10 ¹⁹ cm ⁻³ or more, the etching rate is 1/10 or less compared with the case where the boron concentration is 10 ¹⁸ cm ⁻³ or less ( For example, it decreases to about 1/100).

Thus, when the etching rate is reduced to 1/10 or less because the boron concentration is increased from 10 ¹⁸ cm ⁻³ to 6 × 10 ¹⁹ cm ⁻³ or more, the over-etching amount is increased in anticipation of the film thickness variation of the surface layer silicon 33. When 5 percent is used, the etching depth variation when etching is performed to a depth of 100 μm is as follows:
100 μm × 0.05 × 1/10 = 0.5 μm,
Thus, the etching depth variation can be controlled to about 0.5 μm or less. This corresponds to about 0.5% for a depth of 100 μm. When the thickness variation of the surface layer silicon 33 epitaxially grown to a thickness of 100 μm is ± 2 μm (2%), the thickness variation of the surface layer silicon 33 (± 2 μm (2%)) and the etching depth variation (± 0.5 μm (0%)) 0.5%)) and the total variation is ± 2.5 μm. Therefore, the etching depth variation is reduced to about 1/4 compared with ± 10 μm of the variation of the prior art.

  In forming one or a plurality of microchannels 26 to be liquid flow paths on the substrate 31 by the above method, the manufacturing accuracy of the depth of the microchannels 26 can be improved by about four times. As shown in FIG. 7D, the microchannel is finally completed by forming a lid 6.

  As described above, the difference in etching rate between the low-concentration surface layer silicon 33 and the high-concentration boron silicon substrate 32 containing boron at a high concentration in an alkaline aqueous solution such as KOH is large. The material 32 serves as an etching stopper, and the processing accuracy for forming the depth of the microchannel 26 is improved.

  Further, after the etching of the surface layer silicon 33 is completed in the etching with the alkaline aqueous solution, the amount of bubbles generated by the reaction gas decreases, so that the just etching can be detected by observing this. For this reason, it is possible to shorten the over-etching time, and it is possible to prevent an excessive etching attack with respect to the underlying high-concentration boron silicon substrate 32. Etching with an alkaline aqueous solution proceeds by the following reaction, and hydrogen gas is generated as a reaction gas.

Si + 2H ₂ O + 2OH ⁻ → 2H ₂ + SiO ₂ (OH) ₂ ²⁻ ,
By using the high-concentration boron silicon substrate 32 containing boron at a high concentration for forming the microchannel 26 by the above-described method, the variation in the depth of the microchannel 26 is determined by the thickness of the epitaxially grown surface layer silicon 33. It can be controlled with high accuracy to about variation (± 2%).

  As described above, according to this configuration, the microchannel 26 can be formed with high accuracy by reducing the variation in the depth direction in forming the microchannel. As a result, by using this microchannel, stable microreactors (microchemical reaction systems), electrophoresis devices (electrophoresis microsystems), centrifugal separation devices (centrifugation systems), etc. with higher accuracy than before can be used. Can be provided.

As another embodiment, as shown in FIG. 9A, a boron impurity thermal diffusion method or a boron ion implantation method, which is a well-known method, is applied to the entire surface of a (110) low-concentration silicon substrate 36 as a semiconductor substrate. Boron impurities are diffused using a subsequent heat treatment step to form a high-concentration boron silicon film 32B having a surface concentration of 2 × 10 ¹⁹ cm ⁻³ or more and a depth of several microns. Then, a low-concentration surface layer silicon 33 having a thickness corresponding to the depth of the microchannel 26 serving as a liquid flow path is formed by an epitaxial growth method. The surface layer silicon 33, the high-concentration boron silicon film 32B, and the silicon base material 36 constitute a substrate 31A.

According to the above structure, there is an advantage that the boron concentration on the silicon surface can be freely controlled to a higher concentration by the optimum setting of the boron impurity deposition amount by the thermal diffusion method and the optimum dose amount setting by the ion implantation method. is there. The deposition in this deposition amount is a deposition when boron is diffused over the entire surface of the silicon substrate in the thermal diffusion method, and is an impurity source containing boron such as B ₂ O ₃ , BBr ₃ , BCl _3. Impurity diffusion from (deposition). After this impurity diffusion (deposition), heat treatment (drive-in) is generally performed in an inert gas such as N _{2 at} a higher temperature. By adjusting the deposition time, the amount and concentration of impurities introduced into the silicon substrate are controlled.

  Next, a resist pattern 34 is formed on the surface layer silicon 33 using a mask having a pattern in which long sides corresponding to the side walls of the microchannel along the direction in which the liquid flows are formed in the <112> direction. In place of the resist pattern 34, an oxide film pattern or a metal mask pattern may be formed as a masking member.

  As shown in FIG. 9B, the surface layer silicon 33 is etched through from the surface to the surface of the high-concentration boron silicon film 32B using an alkaline aqueous solution such as KOH, EDP, TMAH, etc. The surface layer silicon 33 having a concentration is removed.

  In this way, the present invention allows the high-concentration boron silicon film 32B containing boron at a high concentration to function as an etching stopper during anisotropic etching with an alkaline aqueous solution such as KOH, EDP, or TMAH. In this case, the low concentration surface layer silicon 33 is manufactured by an epitaxial method, and the thickness of the surface layer silicon 33 in this case can be manufactured from 1 μm to 150 μm.

  As a result, with respect to the microchannel 26 having a depth of about 100 μm formed by anisotropic etching with an aqueous solution of KOH, EDP, TMAH or the like on the surface of the substrate 31A, the variation in depth is ± 2 across all the microchannels on the system. It can be controlled to about 5 μm or less. This corresponds to about ± 2.5% of the depth, and is reduced to about ¼ compared to the variation of ± 10 μm of the prior art.

  The microchannel is finally completed by removing the resist pattern 34 as shown in FIGS. 9C and 9D and attaching the lid 6.

  When forming one or a plurality of microchannels to be liquid flow paths on the substrate by the above method, the manufacturing accuracy of the depth of the microchannels can be improved. Furthermore, in the present invention, since the high concentration boron silicon film 32B containing boron at a high concentration is formed by a thermal diffusion method or an ion implantation method, the surface concentration of the high concentration boron silicon film 32B can be freely set and can be set to a higher concentration. effective.

As another embodiment, as shown in FIG. 10 (a), a thermal diffusion method or ion implantation by a well-known photolithography and semiconductor process technology is performed on a part of the surface of the silicon substrate 36A having a (110) surface. Based on the method, boron is selectively diffused under conditions such that the surface concentration is 2 × 10 ¹⁹ cm ⁻³ or more to form a high-concentration boron silicon film 32A. Then, a low-concentration surface layer silicon 33 having a thickness corresponding to the depth of the microchannel serving as a liquid flow path is formed on the silicon substrate 36A by an epitaxial method so as to cover the high-concentration boron silicon film 32A. The silicon base material 36A, the high-concentration boron silicon film 32A, and the surface layer silicon 33 constitute a substrate 31B.

According to the above structure, there is an advantage that the boron concentration on the silicon surface can be freely controlled to a higher concentration by the optimum setting of the boron impurity deposition amount by the thermal diffusion method and the optimum dose amount setting by the ion implantation method. is there. The deposition in this deposition amount is a deposition when boron is selectively diffused through a pattern (such as an oxide film) on the surface of the silicon base material in the thermal diffusion method. B ₂ O ₃ , BBr ₃ , Impurity diffusion (deposition) from an impurity source containing boron such as BCl ₃ . After this impurity diffusion (deposition), heat treatment (drive-in) is generally performed in an inert gas such as N _{2 at} a higher temperature. By adjusting the deposition time, the amount and concentration of impurities introduced into the silicon substrate are controlled.

  Next, a resist pattern 34 is formed on the surface layer silicon 33 using a mask having a pattern in which long sides corresponding to the side walls of the microchannel along the direction in which the liquid flows are formed in the <112> direction. In place of the resist pattern 34, an oxide film pattern or a metal mask pattern may be formed as a masking member.

  As shown in FIG. 10B, the surface layer silicon 33 is etched from the surface to the surface of the high-concentration boron silicon film 32A using an alkaline aqueous solution such as KOH, EDP, TMAH, etc. The layer silicon 33 is selectively removed along the resist pattern 34 to form the microchannel 26. In this way, the present invention allows the high-concentration boron silicon film 32A to function as an etching stopper during anisotropic etching with an alkaline aqueous solution such as KOH, EDP, or TMAH. In this case, the surface layer silicon 33 is manufactured by an epitaxial method, and the thickness of the surface layer silicon 33 in this case can be manufactured from 1 μm to 150 μm. Next, the resist pattern 34 is removed from the surface layer silicon 33 as shown in FIG. 10C, and the lid 6 is attached on the surface layer silicon 33 so as to cover the microchannel 26 as shown in FIG.

  As a result, the depth variation of the microchannel 26 having a depth of about 100 μm formed on the surface of the substrate 31B by anisotropic etching with an alkaline aqueous solution such as KOH, EDP, or TMAH can be controlled to about ± 2.5 μm or less. This corresponds to about ± 2.5% of the depth, and is reduced to about ¼ compared to the variation of ± 10 μm of the prior art. When a plurality of microchannels 26 are formed, the depth variation across all the microchannels can be controlled to about ± 2.5 μm or less.

  According to the above method, when forming one or a plurality of microchannels 26 serving as liquid flow paths on the substrate 31B, the manufacturing accuracy of the depth of the microchannels 26 can be improved.

  Further, in the present invention, since the high concentration boron silicon film 32A, which is a high concentration region of boron, is formed by a thermal diffusion method or an ion implantation method, the surface concentration can be freely set, and an effect that a higher concentration can be set is obtained. Further, in the high temperature epitaxial process for forming the surface layer silicon 33, since the exposed area of the high-concentration boron silicon film 32A is small, undesirable redistribution of boron impurities and autodoping can be reduced. For this reason, since the impurity profile can be made steeper, the etching controllability is improved.

  Next, a manufacturing process of the microchannel (microfluidic chip) shown in FIGS. 7A to 7D will be described. First, as shown in FIG. 7A, the high-concentration boron silicon base material 32 having a (110) surface and containing boron has a thickness of about 200 to 1000 μm, for example. On the high-concentration boron silicon substrate 32, a low-concentration surface layer silicon 33 is formed to a thickness of 1 to 150 μm, for example, by an epitaxial method. The film thickness of the surface layer silicon 33 is generally 1 to 30 μm in a normal IC application, but can be easily set to a thickness of 50 to 150 μm for this application.

  In the epitaxial method, the thickness variation of the grown silicon layer is generally controlled within ± 2%. That is, when the surface layer silicon 33 is 100 μm thick, the variation is at most ± 2 μm.

  Next, a photoresist according to ordinary photolithography is applied to a substrate 31 having a two-layer structure of a high-concentration boron silicon base material 32 and a surface layer silicon 33. After baking, the surface layer silicon 33 is coated on the surface layer silicon 33 using a photomask. Light exposure is performed using an exposure machine. In this case, the photoresist may be a positive type or a negative type. The mask pattern used is designed so that the long side corresponding to the side wall in the longitudinal direction of the flow path is arranged in the <112> direction of silicon. Next, a known development and baking process is performed to form a resist pattern 34 (FIG. 7A).

  Thereafter, as shown in FIG. 7B, the surface layer silicon 33 is selectively etched using an alkaline aqueous solution such as KOH, EDP, TMAH, etc., using the resist pattern 34 as a mask. In this case, instead of the resist pattern 34, an oxide film mask pattern or a metal mask pattern may be used as a mask member. When a pattern having a long side in the <112> direction 54 is used for the surface layer silicon 33 whose surface is the (110) plane 51, as shown in FIG. Since 53 appears perpendicular to the (110) plane 51, it is convenient for the microchannel.

  The etching time of the surface layer silicon 33 is set in consideration of the film thickness variation of the surface layer silicon 33, the etching rate, and the overetching time. The etching rate is determined in advance by monitoring the etching time and the etching amount. In etching with an alkaline aqueous solution, the end of etching of the low concentration surface layer silicon 33 having a high etching rate can be determined by observing the decrease in generation of bubbles during silicon etching, which is effective in shortening the overetching time.

  After the etching, as shown in FIG. 7C, the resist pattern 34 or the oxide film pattern or the metal film pattern used as the mask member is removed using a known method. Thereby, the microchannel 26 is formed.

  In the formed microchannel 26, an insulating film such as an oxide film is formed on the side wall and the bottom surface in accordance with the application. As this insulating film, an oxide film by a thermal oxidation method and an oxide film system or a nitride film system by a CVD method with excellent coverage are used. This insulating film is preferably formed when the microchannel 26 is used in an electrophoresis apparatus and the electroosmotic flow is used as a driving force for fluid movement.

  The insulating film is not necessarily required when centrifugal force or pressure is used as a driving force for fluid movement. Further, it is not necessary when plastic molding is performed using the microchannel 26 as a mold.

  In addition, when the microchannel 26 requires hydrophilicity, the surface state of the side wall and the bottom surface of the microchannel 26 is changed to be hydrophilic by exposure to oxygen plasma or infiltration into an oxidizing chemical solution. Can do.

  7A to 7D, etching is started from the surface of the surface layer silicon 33 opposite to the high-concentration boron silicon base material 32, and the high-concentration boron silicon base material 32 is used. Etching is terminated when the surface layer of the silicon layer 33 has just been reached.

  As shown in FIG. 7 (d), the microchannel 26 formed by the above-described method includes a cover 5 using a transparent plastic flat plate, a glass flat plate, or a quartz flat plate, and a surface layer silicon 33 so as to cover the microchannel 26. Form on top and complete. The lid 5 can be formed using an appropriate adhesive, light, heat or the like.

Next, another embodiment of the manufacturing process of the microchannel (microfluidic chip) shown in FIGS. 9A to 9D will be described. First, as shown to Fig.9 (a), the silicon base material 36 has thickness of about 200-1000 micrometers, for example, The impurity concentration is 10 < ¹⁸ > cm < ^-3 > or less. In this case, it does not matter whether the impurity type is N-type or P-type.

Next, boron is diffused over the entire surface of the silicon substrate 36 by an impurity diffusion method or an ion implantation method and a heat treatment, and a high-concentration boron silicon film 32B having an impurity concentration near the surface of 2 × 10 ¹⁹ cm ⁻³ or more. Form. Thereafter, a low concentration surface layer silicon 33 is deposited in a thickness of 1 to 150 μm by a known epitaxial method. The film thickness of the surface layer silicon 33 is generally 1 to 30 μm in a normal IC application, but can be easily set to a thickness of 50 to 150 μm for this application.

  In the epitaxial method, the thickness variation of the grown silicon layer is generally controlled within ± 2%. That is, when the surface layer silicon 33 is 100 μm thick, the variation is at most ± 2 μm.

  Next, a photoresist is applied to the surface layer silicon 33 in accordance with normal photolithography, and after baking, the surface layer silicon 33 is irradiated with light using an exposure machine using a photomask. In this case, the photoresist may be a positive type or a negative type. The photomask used has a pattern in which long sides corresponding to the side walls of the microchannel along the direction in which the liquid flows are formed in the <112> direction.

  Next, the resist pattern 34 is formed by performing well-known development and baking, and then, as shown in FIG. 9B, the surface layer silicon is formed using an alkaline aqueous solution of KOH, EDP and TMAH using the resist pattern 34 as a mask. 33 is selectively etched. In this case, an oxide film mask pattern or a metal mask pattern may be used instead of the resist pattern 34.

  The etching time of the surface layer silicon 33 is set in consideration of the film thickness variation of the surface layer silicon 33, the etching rate, and the overetching time. The etching rate is determined in advance by monitoring the etching time and the etching amount. Further, in the etching with an alkaline aqueous solution, the end of etching of the low-concentration surface layer silicon 33 having a high etching rate can be determined by observing the decrease in generation of bubbles when the high-concentration boron silicon film 32B is etched. Effective in shortening.

  After the etching, as shown in FIG. 9C, the resist pattern 34 or the oxide film pattern or metal film pattern used as the mask member is removed using a known method. Thereby, the microchannel 26 is formed.

  In the formed microchannel 26, an insulating film such as an oxide film is formed on the side wall and the bottom surface according to the application. As the insulating film, an oxide film formed by a thermal oxidation method and an oxide film type or nitride film type insulating film formed by a CVD method having excellent coverage are used. This insulating film is preferably formed when the microchannel 26 is used in an electrophoresis apparatus and the electroosmotic flow is used as a driving force for fluid movement. On the other hand, it is not always necessary when the centrifugal force and pressure are used as the driving force for fluid movement. Further, it is not necessary when plastic molding is performed using the microchannel 26 as a mold.

  If the microchannel 26 is required to have hydrophilicity, it can be made hydrophilic by changing the surface state of the side surface by exposure to oxygen plasma or oxidization of an oxidizing chemical solution.

  9A to 9D, etching is started from the surface of the surface layer silicon 33 opposite to the high-concentration boron silicon film 32B, and the surface of the high-concentration boron silicon film 32B. The etching is finished when it just reaches the surface of the layer silicon 33 side.

  In the microchannel 26 formed by the above method, as shown in FIG. 9D, a lid 6 made of a transparent plastic flat plate, glass flat plate or quartz flat plate is formed on the surface layer silicon 33. The lid 6 can be formed using an appropriate adhesive, light, heat or the like.

Next, another embodiment of the manufacturing process of the microchannel (microfluidic chip) shown in FIGS. 10 (a) to 10 (d) will be described. First, as shown to Fig.10 (a), 36 A of silicon base materials have the surface which consists of (110) surface, thickness is about 200-1000 micrometers, and the impurity concentration is 10 < ¹⁸ > cm < ^-3 > or less. It does not matter whether the impurity type is N-type or P-type.

Next, a resist film, oxide film, or metal film patterned using well-known photolithography is used as a masking material to selectively form a part of the surface of the silicon substrate 36A by an impurity diffusion method or an ion implantation method and heat treatment. Boron is diffused to form a high-concentration boron silicon film 32A having an impurity concentration near the surface of 2 × 10 ¹⁹ cm ⁻³ or more. The mask pattern used at this time is arranged so that the long side pattern along the direction in which the microchannel fluid flows is in the <112> direction.

  Thereafter, the low-concentration surface layer silicon 33 is formed with a thickness of 1 to 150 μm by a known epitaxial method. The thickness of the surface layer silicon 33 is generally 1 to 30 μm in a normal IC application, but can be easily made 50 to 150 μm in thickness for this application.

  In the epitaxial method, the thickness variation of the grown silicon layer is generally controlled within ± 2%. That is, when the surface layer silicon 33 is 100 μm thick, the variation is at most ± 2 μm.

  Next, after applying a photoresist according to ordinary photolithography and baking, the surface layer silicon 33 is irradiated with light using an exposure machine using a photomask. In this case, the photoresist may be a positive type or a negative type. At this time, the mask pattern to be used is arranged so as to fall within the mask pattern for forming the underlying high-concentration boron silicon film 32A, and is aligned with the high-concentration boron silicon film 32A.

  Next, after a well-known development and baking process is performed to form a resist pattern 34, as shown in FIG. 10B, a surface layer is formed using an alkaline aqueous solution of KOH, EDP, and TMAH using the resist pattern 34 as a mask. The silicon 33 is selectively etched. In this case, an oxide film mask pattern or a metal mask pattern may be used instead of the resist pattern 34.

  The etching time of the surface layer silicon 33 is set in consideration of the film thickness variation of the surface layer silicon 33, the etching rate, and the overetching time. The etching rate is determined by monitoring in advance and the etching time and etching amount. In etching with an alkaline aqueous solution, the end of etching of the low-concentration surface layer silicon 33 having a high etching rate can be determined by observing the decrease in the generation of bubbles during silicon etching, which is effective in shortening the overetching time.

  After the etching, as shown in FIG. 10C, the resist pattern 34 or the oxide film pattern or the metal film pattern used as the mask member is removed using a known method. Thereby, the microchannel 26 is formed.

  In the formed microchannel 26, an insulating film such as an oxide film is formed on the side wall and the bottom surface according to the application. As the insulating film, a thermal oxide film or an insulating film such as SiOx or SiNx formed by a CVD method having excellent coverage is formed.

  When the microchannel 26 is used in the electrophoresis apparatus and the electroosmotic flow is used as the driving force for fluid movement, it is preferable to form this insulating film. On the other hand, it is not always necessary when the centrifugal force and pressure are used as the driving force for fluid movement. Further, it is not necessary when plastic molding is performed using the microchannel 26 as a mold.

  Further, when the microchannel 26 needs to be hydrophilic, the surface state of the side surface is changed by exposure to oxygen plasma or oxidization of an oxidizing chemical solution to make it hydrophilic.

  As described above, in the configuration of FIGS. 10A to 10D, etching is started from the opposite side of the high-concentration boron silicon film 32A of the surface layer silicon 33, and the high-concentration boron silicon film 32A has a surface layer silicon. The etching is finished when it just reaches the surface on the 33 side.

  As shown in FIG. 10 (d), the microchannel 26 formed by the above method has a cover 6 using a transparent plastic flat plate, glass flat plate, or quartz flat plate formed on the surface layer silicon 33. The The lid 6 can be formed using an appropriate adhesive, light, heat or the like.

  11A to 11C show the microchannel 26 formed by the above-described method (in this example, the microchannel of FIGS. 7A to 7D and the lid 6 is formed). 11), the nickel substrate 41 is molded by a known method (FIG. 11 (b)), and then the nickel substrate 41 is cast as a mold (first mold). This is an example of forming a microchannel (microfluidic chip) having a microchannel 27 by performing injection molding of a plastic material 42 as (2 mold) (FIG. 11C).

  In the above method, mass production is possible at low cost by using a plastic material. Since the thickness of the mold is controlled by the method of the present invention, the depth accuracy of the plastic molded product can be supplied with higher accuracy than the conventional product.

  In the above description, an example in which the surface layer silicon 33 epitaxially grown on high-concentration boron silicon containing high-concentration boron is shown. However, the present invention is not limited to the epitaxial method, and at least a part of the region is high. The present invention can also be applied to the case where (110) plane low concentration surface layer silicon is bonded onto the (110) plane silicon layer having the concentration boron silicon by using, for example, a well-known bonding technique.

  FIG. 12A is a plan view schematically showing a configuration of a microreactor 60 using a microfluidic chip in which microchannels 26 and 26A according to the present invention are formed, and FIG. 12B is a plan view of FIG. It is sectional drawing along the cross section AA shown. The same components as those described above are denoted by the same reference numerals, and detailed description thereof will be omitted.

  The microreactor 60 includes a substrate 31. The substrate 31 includes a microchannel 26 formed substantially along the <112> direction 54 of the substrate 31, two injection ports 61 and 62 for injecting a sample such as a reagent into the microchannel 26, and a microchannel. 26 and a discharge port 63 for discharging the sample. The microchannel 26 includes an injection flow path 64 formed along the <112> direction 54 from the injection port 61 toward the discharge port 63 and another <112> direction obliquely intersecting the injection flow path 64 from the injection port 62. And a merging channel that is formed along the <112> direction 54 and communicates with the discharge port 63 on the downstream side. 66. The injection channel 65 intersects the merging channel 66 at an angle B = 110 degrees.

  Thus, since the injection flow path 64 and the merge flow path 66 are formed along the <112> direction 54, the (111) surface having a low etching rate appears as a side wall, and this side wall is the ( 110) plane. In addition, since the injection channel 65 is formed along another <112> direction, the (111) plane appears as a side wall, like the injection channel 64 and the merge channel 66, and ( 110) plane.

  The substrate 31 is further formed with a microchannel 26A, two injection ports 61A and 62A for injecting a sample into the microchannel 26A, and an exhaust port 63A for discharging the sample from the microchannel 26A. The microchannel 26A includes an injection flow path 64A formed in parallel to the injection flow path 65 along another <112> direction from the injection port 61A, and yet another <112 that intersects the injection flow path 64A from the injection port 62A. > An injection channel 65A formed along the direction, a merging channel 66A communicating with the injection channels 64A and 65A on the upstream side and formed along the <112> direction 54, and a merging channel on the upstream side It includes a discharge channel 67 that communicates with the downstream side of 66A, is formed in parallel with the injection channel 64A, and communicates with the discharge port 63A on the downstream side. The injection channels 64A and 65A and the discharge channel 67 intersect with the merge channel 66A at an angle B = 110 degrees.

  As described above, since the confluence channel 66A is formed along the <112 direction> 54, the (111) plane having a low etching rate appears as a side wall, and this side wall is in contrast to the (110) plane on the surface of the substrate 31. It is formed vertically. In addition, the injection flow path 64A and the discharge flow path 67 are formed along another <112 direction>, and the injection flow path 65A is formed along another <112> direction. Similarly, the (111) plane appears as a side wall and is formed perpendicular to the (110) plane on the surface of the substrate 31. The injection ports 61, 62, 61A and 62A, and the discharge ports 63 and 63A are formed with through holes 68 penetrating the back surface of the substrate 31, respectively. A transparent lid 6 is provided on the surface of the substrate 31 to cover the microchannels 26 and 26A, the injection ports 61, 62, 61A and 62A, and the discharge ports 63 and 63A.

  In the microreactor 60 configured as described above, when the reagents are supplied to the two injection ports 61 and 62 of the microchannel 26 through the through holes 63, the respective reagents flow through the injection channels 64 and 65, respectively. In 66, they are mixed and chemically reacted, and discharged from the discharge port 63. When a reagent is supplied to each of the two injection ports 61A and 62A of the microchannel 26A, each reagent flows through the injection flow paths 64A and 65A, mixes in the merge flow path 66A, undergoes a chemical reaction, and passes through the discharge flow path 67. And discharged from the discharge port 63A.

  The chemical reaction in the microchannels 26 and 26A can be optically observed through the transparent lid 6. In order to analyze a chemical reaction, measurement circuits such as various sensors, a temperature controller, and an oscillator may be provided on the substrate 31.

  Since the microchannels 26 and 26A according to the present embodiment have a reduced variation in depth, it is possible to provide a microreactor that is more accurate and stable than the prior art.

  FIG. 13 is a perspective view schematically showing a configuration of an electrophoresis apparatus 70 using a microfluidic chip in which the microchannel 26 according to the present invention is formed. The electrophoresis apparatus 70 includes a substrate 31 on which two microchannels 26 are formed. A reagent introduction hole 74 is formed at one end of each microchannel 26 and a reagent discharge hole 75 is formed at the other end. A negative electrode 71 is disposed in the vicinity of each reagent introduction hole 74, and a positive electrode 72 is disposed in the vicinity of each reagent discharge hole 75. A detection unit 73 is provided above each microchannel 26.

  In the electrophoresis apparatus 70 configured as described above, the reagent introduced into the reagent introduction hole 74 flows through the microchannel 26 and is discharged from the reagent discharge hole 75. When a voltage is applied to the positive electrode 72 and the negative electrode 71, an electric field is generated between both electrodes. The reagent flowing through the microchannel 26 is separated by the action of an electric field generated between both electrodes. The detection unit 73 detects the separated reagent.

  Since the microchannel 26 according to the present embodiment has reduced variations in depth, it is possible to provide an electrophoretic apparatus that is more accurate and stable than the conventional one.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  Further, the present invention may be configured to be a microreactor system, an electrophoresis microsystem, or a centrifugal force separation microsystem using the microchannel having the above configuration.

  It can also be applied to uses such as microreactor systems, electrophoresis microsystems, and centrifugal force separation microsystems.

(A)-(d) is sectional drawing which shows the manufacturing method of the microchannel using SOI which concerns on this invention. (A)-(c) is sectional drawing which shows the manufacturing method of the microchannel using SOI. (A)-(c) is sectional drawing which shows the plastic injection molding method which used the microchannel as the casting_mold | template. It is a perspective view which shows the structure of the microchannel using the (110) surface of surface layer silicon | silicone. (A)-(d) is sectional drawing which shows the manufacturing method of the microchannel using SOQ. (A)-(c) is sectional drawing which shows the manufacturing method of the conventional microchannel. (A)-(d) is sectional drawing which shows the manufacturing method of the microchannel using the boron high concentration boron silicon film layer based on this invention. It is a perspective view which shows the structure of the microchannel using the (110) surface of surface layer silicon | silicone. (A)-(d) is sectional drawing which shows the manufacturing method of the microchannel of another embodiment using the boron high concentration boron silicon film based on this invention. (A)-(d) is sectional drawing which shows the manufacturing method of the microchannel of another embodiment using the boron high concentration boron silicon film based on this invention. (A)-(c) is sectional drawing which shows the 2nd plastic injection molding method which used the microchannel as the casting_mold | template. (A) is a top view which shows typically the structure of the microreactor using the microfluidic chip which formed the microchannel based on this invention, (b) is sectional drawing along the cross section AA shown to (a). . It is a perspective view which shows typically the structure of the electrophoresis apparatus using the microfluidic chip which formed the microchannel based on this invention.

Explanation of symbols

1 SOI substrate 2 Silicon substrate 3 Embedded oxide film (etching stopper layer)
4 surface layer silicon 5 resist pattern 6 lid 7 nickel substrate 8 plastic material 9 (110) surface 10 (111) surface 11 SOQ substrate 12 quartz substrate (etching stopper layer)
21, 22, 23, 24, 25, 26, 26A, 27 Microchannel 31, 31A, 31B Substrate 32 High-concentration boron silicon substrate (etching stopper layer)
32A, 32B High-concentration boron silicon film (etching stopper layer)
33 Surface layer silicon 34 Resist pattern 36, 36A Silicon substrate 41 Mold 42 Plastic material 51 (110) surface 52 (111) surface 53 (111) surface 54 <112 direction>
60 Microreactor 70 Electrophoresis device

Claims (28)

In the microchannel that forms the fluid flow path,
Using a substrate including at least a surface layer silicon and an etching stopper layer that acts as a stopper for etching for forming the microchannel in the surface layer silicon,
The microchannel, wherein the flow path is formed to a depth that penetrates the surface layer silicon and reaches the surface of the etching stopper layer. The etching stopper layer is composed of a buried oxide film,
As a substrate, an SOI in which a surface layer silicon, a buried oxide film, and a silicon base material are laminated in this order is used, and the flow path is formed at a depth that reaches the buried oxide film through the surface layer silicon of the SOI. The microchannel according to claim 1, wherein the microchannel is provided. The etching stopper layer is composed of a quartz substrate,
As the substrate, an SOQ in which surface layer silicon and a quartz base material are laminated is used, and the flow path is formed to a depth that penetrates the surface layer silicon of the SOQ and reaches the surface of the quartz base material. The microchannel according to claim 1.   4. A surface of the surface layer silicon perpendicular to the SOI or SOQ stacking direction is a (110) plane, and a side wall in the longitudinal direction of the microchannel is a (111) plane. Microchannel. The etching stopper layer is composed of a high-concentration boron silicon substrate containing boron impurities at a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less on which the surface layer silicon is laminated. The microchannel according to claim 1, wherein The etching stopper layer is composed of a high-concentration boron silicon film containing a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, on which the surface layer silicon is laminated,
The microchannel according to claim 1, wherein the substrate further includes a silicon base material on which the high-concentration boron silicon film is stacked. The etching stopper layer is composed of a high-concentration boron silicon film containing boron impurities having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less,
The substrate further comprises a silicon substrate including the high-concentration boron silicon film,
The microchannel according to claim 1, wherein the high-concentration boron silicon film is formed in a region corresponding to the flow path. The microchannel according to claim 5, wherein the boron impurity concentration is 6 × 10 ¹⁹ cm ⁻³ or more.   2. The microchannel according to claim 1, wherein a surface of the surface layer silicon is a (110) plane, and a longitudinal direction of the flow path is arranged in a <112> direction. In a microsystem that uses a microchannel to operate as at least one of a microreactor, an electrophoresis device, and a centrifugal separation device,
A micro system using the micro channel according to claim 1. In a method of manufacturing a microchannel that forms a fluid flow path,
Using a substrate including at least a surface layer silicon and an etching stopper layer that acts as a stopper for etching for forming the microchannel in the surface layer silicon,
A method of manufacturing a microchannel, wherein the flow path is formed by etching the surface layer silicon until reaching the surface of the etching stopper layer. The etching stopper layer is composed of a buried oxide film,
Using the SOI in which the surface layer silicon, the buried oxide film, and the silicon base material are laminated in this order, and etching the surface layer silicon until reaching the buried oxide film of the SOI, the above-mentioned flow path is formed. The method for producing a microchannel according to claim 11.   13. The method of manufacturing a microchannel according to claim 12, wherein after the surface layer silicon is removed by etching until the SOI buried oxide film is reached, the buried oxide film under the flow path is removed. The etching stopper layer is composed of a quartz substrate,
12. The flow path is formed by using SOQ in which surface layer silicon and a quartz base material are laminated, and etching the surface layer silicon until reaching the surface of the quartz base material of the SOQ. A method for producing a microchannel according to claim 1.   15. The method of manufacturing a microchannel according to claim 12, wherein the side wall silicon of the flow path is exposed to an oxidizing atmosphere to make it hydrophilic.   15. The method for manufacturing a microchannel according to claim 12, wherein an anisotropic dry etching method is used for etching the surface layer silicon.   15. The method of manufacturing a microchannel according to claim 12, wherein an anisotropic wet etching method is used for etching the surface layer silicon.   15. The method of manufacturing a microchannel according to claim 12, wherein the surface layer silicon comprises a (110) plane, and a side wall in the longitudinal direction of the flow path comprises a (111) plane. The etching stopper layer is composed of a high-concentration boron silicon base material containing boron impurities having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, on which the surface layer silicon is laminated,
12. The microchannel according to claim 11, wherein the flow path is anisotropically etched with an alkaline aqueous solution to a depth reaching the surface of the high-concentration boron silicon substrate through the surface layer silicon. Channel manufacturing method. The etching stopper layer is composed of a high-concentration boron silicon film containing a boron impurity having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, on which the surface layer silicon is laminated,
The substrate further comprises a silicon base material on which the high-concentration boron silicon film is laminated,
The microchannel according to claim 11, wherein the flow channel is anisotropically etched with an alkaline aqueous solution to a depth reaching the surface of the high-concentration boron silicon film through the surface layer silicon. Manufacturing method. The etching stopper layer is composed of a high-concentration boron silicon film containing boron impurities having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less,
The substrate further comprises a silicon substrate including the high-concentration boron silicon film,
The high-concentration boron silicon film is formed in a region corresponding to the flow path,
The microchannel according to claim 11, wherein the flow channel is anisotropically etched with an alkaline aqueous solution to a depth reaching the surface of the high-concentration boron silicon film through the surface layer silicon. Manufacturing method.   The silicon exposed to the flow path is exposed to an oxidizing atmosphere or deposited by a CVD method to cover the side walls and the bottom surface of the flow path with an oxide film. A method for producing a microchannel according to claim 1.   The method of manufacturing a microchannel according to any one of claims 19 to 21, wherein the silicon exposed to the flow path is exposed to oxygen plasma or immersed in an oxidizing chemical solution. The method for manufacturing a microchannel according to claim 19, wherein the boron impurity concentration is 6 × 10 ¹⁹ cm ⁻³ or more. A substrate including at least a surface layer silicon to be etched to form a microchannel forming a fluid flow path, and an etching stopper layer acting as a stopper against etching on the surface layer silicon; Forming a first mold in which a path is formed to a depth reaching the surface of the etching stopper layer through the surface layer silicon;
Forming a second mold based on the first mold;
A method of manufacturing a microchannel, wherein the flow path is formed by injection molding a plastic material using the second mold. The etching stopper layer is composed of a buried oxide film,
As a substrate, using SOI in which surface layer silicon, buried oxide film, and silicon base material are laminated in this order,
A second mold is formed using the first mold in which the surface layer silicon is etched until reaching the buried oxide film of SOI, and the above flow path is formed by injection molding with a plastic material using the second mold. 26. The method of manufacturing a microchannel according to claim 25. The etching stopper layer is composed of a quartz substrate,
As a substrate, using SOQ with surface layer silicon and quartz substrate laminated,
The second flow path is formed by forming a second mold using the first mold in which the surface layer silicon is etched until reaching the surface of the quartz substrate of SOQ, and then performing injection molding with a plastic material using the second mold. The method of manufacturing a microchannel according to claim 25, wherein: The etching stopper layer is formed of a high-concentration boron silicon film that is stacked on the surface layer silicon and contains boron impurities having a concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less,
A second mold is formed by using the first mold in which the surface layer silicon is etched until reaching the surface of the high-concentration boron silicon film, and the second flow mold is used for injection molding with a plastic material. 26. The method of manufacturing a microchannel according to claim 25, wherein a path is formed.

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