JP2005332009A - Information processing apparatus and method, recording medium, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To distribute the load of data processing. <P>SOLUTION: If an OS 111 can acquire resources of a sub processor 32, an audio recording program 123 loads an audio encoding module 151 into a local storage 42 of the sub processor 32 to execute the audio encoding module 151 with a kick command and a program counter. If the OS 111 can not acquire resources of the sub processor 32, on the other hand, the audio recording program 123 loads an audio encoding library function 152 into a main memory 12 for a main processor 31 to execute the audio encoding library function 152. The method is applicable to an information processing apparatus comprising an AV device for inputting audio or video to record corresponding audio or video data. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an information processing apparatus and method, a recording medium, and a program, and more particularly, to an information processing apparatus and method, a recording medium, and a program that can reduce a load on a sub processor.

  In a conventional computer, the load on the main processor often increases. Therefore, as a load distribution method, a part of processing necessary for the sub processors is performed in parallel to reduce the load on the main processor.

  Recently, a distributed processing system that uses a plurality of processors or computers to execute processing in a distributed manner has attracted attention (see Patent Documents 1 to 5). As a method for executing distributed processing, a method for causing a plurality of computers connected via a network to execute processing, a method for causing a plurality of processors provided in one computer to execute processing, and the two methods described above There is a method of executing processing by combining the above.

JP 2002-342165 A JP 2002-351850 A JP 2002-358289 A JP 2002-366533 A JP 2002-366534 A

  However, in this distributed processing system, what is realized by hardware is realized by software in the sub processor, so that the load of the sub processor becomes larger than that of the main processor. Therefore, the conventional method for distributing the load of the main processor to the sub processors has a problem that it is difficult to reduce the load of the sub processors.

  That is, in this distributed processing system, for example, when all of the sub processors are being executed or reserved, the sub processor is overloaded and the throughput of the system cannot be executed. There was a problem that would decrease.

  The present invention has been made in view of such a situation, and makes it possible to achieve load distribution of data processing in a sub processor.

  An information processing apparatus according to the present invention includes at least one first processing means for executing data processing based on a first program, second processing means for executing processing for managing the entire apparatus, In the processing means, a resource determination means for determining whether or not a calculation resource necessary for the execution of the first program is available, and a calculation required for the execution of the first program in the first processing means by the resource determination means. And a process control means for controlling the second processing means to execute a second program that obtains a result equivalent to the first program when it is determined that the resources are not free. To do.

  The data processing can be processing of video data or audio data.

  The processing control unit is configured to execute the first program so that the resource determining unit executes the first program when the first processing unit determines that the calculation resource necessary for executing the first program is free. The processing means can be controlled.

  According to the information processing method of the present invention, in at least one first processing means that executes data processing based on a first program, it is determined whether or not a calculation resource necessary for executing the first program is free. When the first processing means determines that the calculation resources necessary for executing the first program are not available in the resource determination step and the resource determination step, a process for managing the entire apparatus is executed. And a processing control step of controlling the second processing means so as to execute a second program that obtains a result equivalent to the first program.

  In the recording medium on which the program of the present invention is recorded, at least one first processing means that executes data processing based on the first program has free computing resources necessary for executing the first program. When the first processing means determines that there are no calculation resources necessary for executing the first program by the resource determination step for determining whether or not there is a resource determination step, the entire apparatus is managed. And a processing control step of controlling the second processing means for executing the processing so that the second program that obtains a result equivalent to the first program is also executed.

  The program according to the present invention is a resource for determining whether or not a calculation resource necessary for execution of the first program is available in at least one first processing unit that executes data processing based on the first program. When the first processing means determines in the determination step and the resource determination step that the calculation resources necessary for executing the first program are not available, a process for managing the entire apparatus is executed. And a processing control step of controlling the processing means so as to execute a second program that obtains a result equivalent to the first program.

  In the present invention, in at least one first processing means for executing data processing based on the first program, it is determined whether or not calculation resources necessary for executing the first program are free, In the first processing means, when it is determined that the calculation resources necessary for executing the first program are not available, the second processing means for executing processing for managing the entire apparatus is equivalent to the first program. The second program that obtains the result is also controlled to be executed.

  According to the present invention, load distribution of data processing can be achieved. Further, according to the present invention, it is possible to improve throughput due to reservation waiting.

  BEST MODE FOR CARRYING OUT THE INVENTION The best mode of the present invention will be described below. The correspondence relationship between the disclosed invention and the embodiments is exemplified as follows. Although there are embodiments which are described in this specification but are not described here as corresponding to the invention, the embodiments correspond to the invention. It does not mean that it is not a thing. Conversely, even if an embodiment is described herein as corresponding to an invention, that means that the embodiment does not correspond to an invention other than the invention. Absent.

  Further, this description does not mean all the inventions described in the specification. In other words, this description is for the invention described in the specification and not claimed in this application, i.e., for the invention that will be applied for in the future or that will appear as a result of amendment and added. It does not deny existence.

  The information processing apparatus according to claim 1 (for example, the information processing apparatus 1-1 of FIG. 1) executes data processing based on a first program (for example, the speech encoding module 151 of FIG. 6), at least 1 first processing means (for example, sub-processor 32-1 in FIG. 1), second processing means for executing processing for managing the entire apparatus (for example, main processor 31 in FIG. 1), In the processing means, a resource determination means (for example, OS 111 in FIG. 6) for determining whether or not a calculation resource necessary for executing the first program is free, and the first processing means by the resource determination means in the first processing means. When it is determined that the calculation resources necessary for the execution of the program are not free, the second processing unit is configured to use a second program (for example, the speech encoding shown in FIG. 6) that obtains a result equivalent to the first program. La Library function 152) processing control means also controls to execute (e.g., characterized by comprising a voice recording program 123) in FIG. 6.

  The information processing method according to claim 4 includes at least one first processing unit (for example, FIG. 1) that performs data processing based on a first program (for example, the speech encoding module 151 in FIG. 6). In the sub-processor 32-1), a resource determination step (for example, step S32 in FIG. 9) for determining whether or not a calculation resource necessary for the execution of the first program is free, and the resource determination step perform the first. In this processing means, when it is determined that the calculation resources necessary for executing the first program are not available, the second processing means (for example, the main processor 31 in FIG. 1) that executes processing for managing the entire apparatus. Is a process control step for controlling so as to also execute a second program (for example, the audio recording program 123 of FIG. 6) from which a result equivalent to the first program is obtained. For example, characterized in that it comprises a step S39) and FIG.

  Note that the recording medium according to claim 5 and the program according to claim 6 have basically the same configuration as the information processing method according to claim 4 described above, and are therefore repeated. Omitted.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The present invention can be applied to, for example, a live video streaming distribution system or a communication system that transmits streaming data in real time such as a television.

  FIG. 1 is a diagram showing an embodiment of a communication system to which the present invention is applied. In this communication system, an information processing device 1-1, an information processing device 1-2, and an information processing device 1-3 are connected to each other via a network 2 such as a cell network. In one network 2, one information processing apparatus (for example, the information processing apparatus 1-1) operates as a master apparatus, and other information processing apparatuses (for example, the information processing apparatus 1-2 and the information processing apparatus 1). -3) operates as a slave device.

  The information processing apparatuses 1-1 to 1-3 are configured by, for example, AV (Audio Visual) equipment such as a portable CD (Compact Disk) player, a hard disk recorder, or a camcorder, a personal computer, or a PDA (Personal Digital Assistant). The

  When the information processing apparatus 1-1 is instructed to execute the distributed processing, the information processing device 1-1 generates a software cell including data and a program necessary for executing the requested processing, and the generated software cell is transmitted via the network 2. To the information processing device 1-2 and the information processing device 1-3.

  Each of the information processing device 1-2 and the information processing device 1-3 receives the software cell transmitted from the information processing device 1-1, and executes the requested process based on the received software cell. Each of the information processing apparatus 1-2 and the information processing apparatus 1-3 executes the requested process, and then transmits the data obtained as a result of the requested process via the network 2 to the information processing apparatus 1-1. Send to address.

  The information processing device 1-1 receives the data transmitted from the information processing device 1-2 or the information processing device 1-3, and executes predetermined processing based on the received data or receives the received data. Record.

  The information processing apparatus 1-1 includes an information processing controller 11, a main memory 12, a recording unit 13-1, a recording unit 13-2, a bus 14, an operation input unit 15, an input unit 16, an output unit 17, a communication unit 18, and a drive. 19.

  The information processing controller 11 executes various programs recorded in the main memory 12 and controls the entire information processing apparatus 1-1. The information processing controller 11 generates a software cell and supplies the generated software cell to the communication unit 18 via the bus 14. The information processing controller 11 supplies the data supplied from the communication unit 18 to the recording unit 13-1 or 13-2. Based on the instruction signal from the operation input unit 15, the information processing controller 11 acquires designated data from the main memory 12, the recording unit 13-1 or 13-2, and acquires the acquired data via the bus 14. This is supplied to the output unit 17.

  The information processing controller 11 is assigned a device ID that can uniquely identify the information processing device 1-1 throughout the network 2.

  The information processing controller 11 includes a main processor 31, sub processors 32-1 to 32-3, a direct memory access controller (DMAC) 33, a disk controller (DC) 34, a key management table storage unit 35, and a bus 36. Configured to join.

  The main processor 31, the sub processor 32-1 to the sub processor 32-3, the DMAC 33, the DC 34, and the key management table storage unit 35 are connected to each other via a bus 36. Further, a main processor ID for identifying the main processor 31 is assigned to the main processor 31 as an identifier. Similarly, each of the sub processors 32-1 to 32-3 is assigned with an identifier of a sub processor ID for specifying each of the sub processors 32-1 to 32-3.

  The main processor 31 performs schedule management of program execution by the sub processors 32-1 to 32-3 and overall management of the information processing controller 11 (information processing apparatus 1-1). The main processor 31 includes a local storage 41 composed of a RAM (Random Access Memory) or the like.

  The main processor 31 controls the DC 34 to read out data and programs recorded in the recording unit 13-1 or 13-2, controls the DMAC 33, loads it into the main memory 12, and temporarily stores it. . The main processor 31 reads data and programs from the main memory 12 and executes various processes of the information processing apparatus 1 based on the read data and programs. The main processor 31 when the information processing device 1-1 is a slave device is not only the data and programs recorded in the recording unit 13-1 or 13-2, but also other information processing that is a master device. Programs and data included in the cells received from the apparatus are also loaded into the main memory 12.

  When the main processor 31 causes the information processing device 1-2 or the information processing device 1-3 connected via the network 2 to execute the distributed processing, the main processor 31 executes the processing requested via the operation input unit 15. Therefore, a software cell including data and a program necessary for this is generated, and the generated software cell is supplied to the communication unit 18 via the bus 36 and the bus 14. When the main processor 31 executes processing in the information processing apparatus 1-1, for example, the sub processor 32-1 to the sub processor 32-3 are each executing another program, and the requested processing is performed. When a program corresponding to the above cannot be executed, a program other than the management program is executed instead. In this case, the main processor 31 functions in the same manner as the sub processor.

  The sub processors 32-1 to 32-3 execute programs and process data in parallel and independently under the control of the main processor 31. If necessary, the program executed by the main processor 31 can be configured to operate in cooperation with each of the programs executed by the sub processors 32-1 to 32-3. .

  Each of the sub-processors 32-1 to 32-3 includes local storage 42-1 to local storage 42-3. Each of the sub-processors 32-1 to 32-3 temporarily stores data and programs in the local storage 42-1 to local storage 42-3 as necessary. Each of the sub processors 32-1 to 32-3 reads data and programs from the local storage 42-1 to local storage 42-3, and executes various processes based on the read data and programs. To do.

  Hereinafter, when it is not necessary to individually distinguish each of the sub processors 32-1 to 32-3, they are simply referred to as sub processors 32. Similarly, the local storage 42-1 to the local storage 42-3 are hereinafter simply referred to as the local storage 42 when it is not necessary to individually distinguish them. Note that the information processing apparatus 1 includes three sub-processors 32, but the number connected is arbitrary.

  The DMAC 33 stores the programs stored in the main memory 12 from the main processor 31 and the sub processor 32 based on the main processor key, the sub processor key, and the access key recorded in the key management table storage unit 35. Manage access to data. The DC 34 accesses the recording units 13-1 and 13-2 from the main processor 31 and the sub processor 32.

  The key management table storage unit 35 records a main processor key, a sub processor key, and an access key. Details of the main processor key, sub-processor key, and access key will be described later.

  The main memory 12 is configured by, for example, a DRAM (Dynamic Random Access Memory). The main memory 12 temporarily stores various programs and data executed by the main processor 31 and the sub processor 32.

  The recording units 13-1 and 13-2 are each configured with, for example, a hard disk. The recording unit 13-1 and the recording unit 13-2 record various programs and data executed by the main processor 31 and the sub processor 32. Further, the recording unit 13-1 and the recording unit 13-2 record data supplied from the information processing controller 11. Hereinafter, when it is not necessary to distinguish the recording units 13-1 and 13-2 from each other, they are simply referred to as the recording unit 13.

  The recording unit 13 is not only a hard disk such as a fixed disk or a removable disk, but also an optical disk such as a Blu-ray Disc, a CD-RW (Compact Disk ReWritable), a DVD ± RW (Digital Versatile Disk ReWritable), or a magnetic disk. (Including a flexible disk), a magneto-optical disk (including MD (Mini-Disk) (trademark)), or a semiconductor memory.

  An operation input unit 15, an input unit 16, an output unit 17, a communication unit 18, and a drive 19 are connected to the information processing controller 11 via a bus 14. The operation input unit 15 includes a keyboard, a mouse, and the like, and supplies an instruction signal corresponding to a user operation to the information processing controller 11. The input unit 16 collects sound, picks up a microphone to be supplied to the information processing controller 11 as sound data, and picks up an image of a subject and supplies image data corresponding to the image obtained by the image pickup to the information processing controller 11. It consists of parts. The output unit 17 includes, for example, a display, a speaker, a lamp, and the like, and outputs data supplied from the information processing controller 11.

  The communication unit 18 transmits the software cell supplied from the information processing controller 11 to the information processing apparatus 1-2 or the information processing apparatus 1-3 via the network 2. In addition, the communication unit 18 supplies data transmitted from the information processing apparatus 1-2 or the information processing apparatus 1-3 to the information processing controller 11 via the bus 14.

  When the magnetic disk 51, the optical disk 52, the magneto-optical disk 53, the semiconductor memory 54, or the like is mounted, the drive 19 drives them to acquire programs and data recorded therein. The acquired program and data are transferred to the information processing controller 11 via the bus 14 as necessary, and are recorded in the recording unit 13 by the information processing controller 11.

  Note that the information processing device 1-2 or the information processing device 1-3 is configured in the same manner as the information processing device 1-1, and thus the description thereof is omitted, but the information processing device 1-2 or the information processing device 1- 3 is not limited to the configuration described above, and functions can be added or deleted as necessary, and a configuration corresponding to the function can be provided. Hereinafter, when there is no need to distinguish the information processing apparatus 1-1, the information processing apparatus 1-2, and the information processing apparatus 1-3, they are simply referred to as the information processing apparatus 1.

  In the example of FIG. 1, the information processing apparatus 1 is described as the three network 2, but the number of connected apparatuses is arbitrary.

  Next, processing when the sub processor 32 accesses the main memory 12 will be described with reference to FIGS.

  As shown in FIG. 2, the main memory 12 is provided with memory locations that can specify a plurality of addresses. Each memory location is allocated an additional segment for storing information indicating the state of the data. The additional segment includes an F / E bit, a sub processor ID, and an LS address (local storage address). Each memory location is assigned an access key to be described later.

  The F / E bit that is “0” indicates that the data being processed being read by the sub processor 32 or invalid data that is not the latest data because it is empty, and cannot be read from the memory location. Show. An F / E bit of “0” indicates that data can be written to the memory location. When data is written, the F / E bit is set to “1”.

  The F / E bit that is “1” indicates that the data at the memory location has not been read by the sub-processor 32 and is the latest unprocessed data. The data in the memory location whose F / E bit is “1” can be read, and after being read by the sub processor 32, the F / E bit is set to “0”. Further, the F / E bit which is “1” indicates that the memory location cannot write data.

  Further, it is possible to set a read reservation for the memory location in a state where the F / E bit is “0” (reading impossible / writing possible). When a read reservation is made for a memory location whose F / E bit is “0”, the sub processor 32 adds the sub processor ID of the sub processor 32 as read reservation information to an additional segment of the memory location where the read reservation is made. And write the LS address. Then, when the data is written to the memory location reserved for reading by the sub processor 32 to which the data is written and the F / E bit is set to “1” (readable / not writable), an additional segment is set in advance as read reservation information. Is read out to the local storage 42 specified by the sub processor ID and the LS address.

  When it is necessary to process data in multiple stages by a plurality of sub-processors 32, the sub-processor 32 that performs the process in the previous stage is controlled by controlling the reading and writing of data in each memory location in this way. Immediately after the data is written to a predetermined address in the main memory 12, another sub-processor 32 that performs the subsequent processing can read the pre-processed data.

  Further, as shown in FIG. 2, the local storage 42 of the sub-processor 32 is configured by memory locations that can specify a plurality of addresses. An additional segment is similarly allocated for each memory location. The additional segment includes a busy bit.

  When the sub processor 32 reads the data stored in the main memory 12 to the memory location of the local storage 42 of the sub processor 32, the corresponding busy bit is set to “1” to make a reservation. No other data can be stored in the memory location where the busy bit is “1”. When data is read to the memory location of the local storage 42, the busy bit is set to “0”, and other data can be stored.

  Furthermore, as shown in FIG. 2, the main memory 12 connected to the information processing controller 11 includes a plurality of sandboxes. The sandbox defines an area in the main memory 12, and each sandbox is assigned to each sub processor 32 and can be used exclusively by the assigned sub processor 32. That is, the sub-processor 32 can use the assigned sandbox, but cannot access data beyond this area.

  The main memory 12 is composed of a plurality of memory locations, and the sandbox is a collection of these memory locations.

  Furthermore, in order to realize exclusive control of the main memory 12, the key management table shown in FIG. 2 is used. The key management table is recorded in the key management table storage unit 35 and associated with the DMAC 33. Each entry in the key management table includes a sub processor ID, a sub processor key, and a key mask.

  When the sub processor 32 accesses the main memory 12, the sub processor 32 outputs a read or write command to the DMAC 33. This command includes a sub-processor ID that identifies the sub-processor 32 and the address of the main memory 12 that is the access request destination.

  When executing the command supplied from the sub processor 32, the DMAC 33 refers to the key management table and checks the sub processor key of the sub processor 32 of the access request source. Then, the DMAC 33 compares the checked sub-processor key of the access request source with the access key allocated to the memory location of the main memory 12 that is the access request destination, and only when the two keys match, The command supplied from the processor 32 is executed.

  FIG. 4 is a diagram illustrating the key management table. The key mask recorded in the key management table sets the corresponding bit of the sub processor key associated with the key mask to “0” or “1” by setting any bit to “1”. Can do.

  For example, assume that the sub-processor key is “1010”. Normally, this sub-processor key only allows access to a sandbox with an access key of “1010”. However, if the key mask associated with this sub-processor key is set to “0001”, the sub-processor key matches the access key only for the digits whose key mask bit is set to “1”. Access key whose judgment key is masked (no judgment is made for the digit whose key mask bit is set to “1”) and whose access key is either “1010” or “1011” by this sub-processor key “1010” Access to a sandbox with is possible.

  As described above, the sandbox exclusivity of the main memory 12 is realized. That is, when it is necessary to process data in multiple stages by a plurality of sub-processors 32, only the sub-processor 32 that performs the pre-stage process and the sub-processor 32 that performs the post-stage process are configured as described above. However, it becomes possible to access a predetermined address of the main memory 12, and data can be protected.

  For example, the value of the key mask can be changed as follows. First, immediately after the information processing apparatus 1 is activated, the values of the key masks are all “0”. It is assumed that the program loaded on the main processor 31 is executed and operates in cooperation with the program loaded on the sub processor 32. The processing result data output by the sub processor 32-1 is stored in the main memory 12, and the processing result data stored in the main memory 12 is output by the sub processor 32-1 when it is desired to input to the sub processor 32-2. The area of the main memory 12 that stores the processed result data needs to be accessible from the sub processor 32-1 and the sub processor 32-2. In such a case, the main processor 31 appropriately changes the value of the key mask and provides a main memory area that can be accessed from the plurality of sub processors 32, thereby enabling multi-stage processing by the sub processor 32. To do.

  More specifically, for example, data that has been subjected to predetermined processing by the sub-processor 32-1 based on data transmitted from the information processing device 1-2 or the information processing device 1-3, and processed. Are stored in the first area of the main memory 12. Then, the sub-processor 32-2 reads the stored data from the first area of the main memory 12, executes predetermined processing based on the read data, and stores the processed data in the main memory Twelve first areas are stored in a different second area.

  Here, the sub processor key of the sub processor 32-1 is “0100”, the access key of the first area of the main memory 12 is “0100”, and the sub processor key of the sub processor 32-2 is “0101”. When the access key of the second area of the main memory 12 is “0101”, the sub-processor 32-2 cannot access the first area of the main memory 12. Therefore, by setting the key mask of the sub processor 32-2 to “0001”, the sub processor 32-2 can access the first area of the main memory 12.

  2 to 4, the case where the sub processor 32 accesses the main memory 12 has been described. However, the main processor 31 corresponds to the above-described sub processor ID and sub processor key, and the main processor ID and the main processor. The same processing is executed when the main processor 31 has a key and the main processor 31 accesses the main memory 12 in order to perform processing in the local storage 41, for example.

  FIG. 5 shows the configuration of the program stored in the main memory 12. These programs are stored in the recording unit 13 or the like before the information processing apparatus 1 is turned on.

  Each program is divided into a control program 101, a function program 102, and a device driver 103 according to functions or features.

  The control program 101 is executed by the main processor 31, and is a resident program that always operates while the main power supply of the information processing apparatus 1 is turned on, for example, OS (Operating System) 111, MS (Master). / Slave) manager 112, capability exchange program 113, and the like.

  The OS 111 is a program that controls basic operations of the information processing apparatus 1. The MS manager 112 is a program for setting a master device and a slave device among the information processing devices 1-1 to 1-3 electrically and functionally connected to the network 2. The capability exchange program 113 is a program that acquires device information of the information processing devices 1-1 to 1-3 that are electrically and functionally connected to the network 2 and registers them in a device information table stored in the main memory 12. is there.

  These control programs 101 are not limited to being executed by the main processor 31, and may be executed by any one of the sub processors 32. These control programs 101 are preferably resident programs that always operate while the main power supply of the information processing apparatus 1 is turned on.

  The function program 102 is executed by controlling the necessary resources (resources) in the information processing apparatus 1 by the main processor 31, and includes, for example, a recording program 121, a reproduction program 122, and an audio recording program 123. Consists of.

  The recording program 121 is a program that controls the device driver 103 as necessary, inputs audio and video data, encodes input data, and causes the recording unit 13 to record the encoded data. The reproduction program 122 controls the device driver 103 as necessary, reads out video and audio data recorded in the recording unit 13, performs decoding, decompression, and the like on a display and a speaker constituting the output unit 17. This program outputs the corresponding video and audio. The audio recording program 123 is a program that inputs audio data, encodes the input data, and causes the recording unit 13 to record the encoded data.

  The function program 102 is configured according to each information processing apparatus 1. That is, for example, when the information processing apparatus 1 is configured by a hard disk recorder, the function program is configured by a video / audio recording program, a video / audio reproduction program, a material search program, a program reservation program, and the like. For example, when the information processing apparatus 1 is configured by a PDA, the function program is configured by a video / audio recording program, a video / audio reproduction program, a telephone directory program, a word processing program, a spreadsheet program, a Web browser program, and the like. Is done.

  The device driver 103 is a program for executing input / output (transmission / reception) control of the information processing apparatus 1, and includes an operation input driver 131, an audio input driver 132, a recording control driver 133, and a network driver (not shown). . The operation input driver 131 is a program that executes processing corresponding to the input from the operation input unit 15. The voice input driver 132 is a program that controls voice input of a microphone constituting the input unit 16. The recording control driver 133 is a program that controls the DC 34 and controls recording on the recording unit 13. The network driver is a program that controls the communication unit 18 and executes input / output of the network 2.

  These programs are read from the recording unit 13 and loaded into the main memory 12 after the information processing apparatus 1 is powered on. That is, the main power supply is turned on to the information processing apparatus 1 in a state where the information processing apparatus 1 is physically connected to the network 2 by inserting a cable or the like, and the information processing apparatus 1 is electrically and functionally connected to the network 2. The main processor 31 loads each program belonging to the control program 101 and each program belonging to the device driver 103 into the main memory 12.

  Specifically, the main processor 31 reads the program from the recording unit 13 by causing the DC 34 to execute a read command and writes the program to the main memory 12 by causing the DMAC 33 to execute a write command.

  Each program belonging to the function program 102 is loaded only when necessary, but as with the programs belonging to the control program 101 and device driver 103, each program is loaded immediately after the main power is turned on. It may be configured. Each program belonging to the function program 102 is included in the software cell as long as it is recorded in the recording unit 13 of another information processing apparatus connected via the network 2 even though it is not recorded in the recording unit 13. Thus, it is possible to load using a software cell.

  Each program belonging to the function program 102 is equivalent to a module (for example, spu_module) for causing the sub-processor 32 to execute a predetermined process and a predetermined process executed by the module, as shown in FIG. A library function (for example, pu-xxx ()) for causing the main processor 31 to execute processing is provided. The library function is a program generated for the main processor 31 so that a processing result equivalent to the processing result executed by the module in the sub processor 32 can be obtained. That is, the processing result executed by the module in the sub processor 32 and the processing result executed by the library function in the main processor 31 are stored at the same address in the main memory 12.

  FIG. 6 is a diagram illustrating a program executed by the information processing apparatus 1 that records audio data. In the case of the example in FIG. 6, a case where the information processing apparatus 1 operates in a stand-alone manner will be described. Therefore, in this case, descriptions of the MS manager 112 and the capability exchange program 113 are omitted. Further, in the example of FIG. 6, the parts corresponding to those in the case of FIG.

  The main processor 31 turns on the main power supply to the information processing apparatus 1, reads the OS 111 from the recording unit 13 by causing the DC 34 to execute a read command, and causes the DMAC 33 to execute the write command, thereby causing the OS 111 to enter the main memory 12. Write and execute the OS 111. At this time, the main processor 31 also loads the operation input driver 131, the audio input driver 132, and the recording control driver 133 into the main memory 12, and executes them.

  For example, the user requests the activation of the voice recording program 123 by operating the operation input unit 15. The operation input unit 15 supplies a request signal to the main processor 31 via the bus 14. In response to this, the main processor 31 loads the audio recording program 123 from the recording unit 13 to the main memory 12 and executes it under the control of the OS 111.

  Then, when the voice recording program 123 makes a request to record the voice from the microphone constituting the input unit 16 in the recording unit 13, for example, the OS 111 acquires resources necessary for processing the request.

  That is, the OS 111 determines whether there is a resource of the sub processor 32 that can execute the audio encoding process in response to a resource acquisition request from the audio recording program 123, and executes the audio encoding process. If there is a resource of the sub processor 32 that can be used, the resource of the sub processor 32 is acquired and locked, and the determination result is supplied to the audio recording program 123. In addition, when the encoding process by the audio recording program 123 is completed, the OS 111 releases the acquired resources of the sub processor 32.

  When the OS 111 determines that there is no resource of the sub processor 32 that can execute the audio encoding process, the OS 111 supplies the determination result to the audio recording program 123. At this time, the OS 111 performs speech encoding processing based on, for example, whether or not the sub-processor 32 is executing other processing, or whether or not other processing is reserved for the sub-processor 32. It is determined whether there are resources of the sub processor 32 that can be executed.

  Further, the OS 111 controls the operation input driver 131, the audio input driver 132, and the recording control driver 133 in response to a request from the audio recording program 123, and causes the request from the audio recording program 123 to be processed.

  The audio recording program 123 has an audio encoding module 151 for causing the sub processor 32 to execute audio data encoding processing, and an audio encoding library function 152 for causing the main processor 31 to execute audio data encoding processing. doing. The audio encoding library function 152 is configured so that the main processor 31 can obtain a processing result equivalent to the audio data encoding processing executed by the audio encoding module 151 in the sub processor 32. It is a program generated according to.

  When the OS 111 acquires the resources of the sub processor 32, the audio recording program 123 loads the audio encoding module 151 into the local storage 42 of the sub processor 32, and uses the kick command and the program counter to load the audio encoding module 151. Let it run. The kick command is a command for starting execution of the program, and the program counter gives an address for the program counter for program execution.

  On the other hand, the audio recording program 123 loads the audio encoding library function 152 into the main memory 12 of the main processor 31 and executes the audio encoding library function 152 when the OS 111 cannot acquire the resources of the sub processor 32. In this case, the speech encoding library function 152 may be loaded into the local storage 41 of the main processor 31 and executed instead of the main memory 12.

  The audio recording program 123 controls the recording control driver 133 when notified of completion of execution from the audio encoding module 151 or the audio encoding library function 152, and stores the encoding process stored in a predetermined area of the main memory 12. The encoded data as a result is read out, and the read out encoded data is recorded in the recording unit 13.

  When the audio encoding module 151 is executed in the sub-processor 32, the audio encoding module 151 executes encoding processing of audio data, and stores the execution result in a predetermined area of the main memory 12 via the DMAC 33. Thereafter, the audio recording program 123 is notified that the execution has been completed. When the audio encoding library function 152 is executed in the main processor 31, the audio encoding library function 152 executes encoding processing of audio data, and the execution result (encoded data) is transmitted via the DMAC 33. Then, the data is stored in a predetermined area of the main memory 12, and then the audio recording program 123 is notified that the execution is completed.

  The operation input driver 131 supplies a signal corresponding to the input from the operation input unit 15 to the OS 111. The voice input driver 132 controls the voice input of the microphone constituting the input unit 16 under the control of the OS 111 corresponding to the request from the voice recording program 123 and records the input voice data in a predetermined area of the main memory 12. To do. The recording control driver 133 controls the DC 34 to record the encoded data in the recording unit 13 under the control of the OS 111 corresponding to the request from the audio recording program 123.

  FIG. 7 shows another example of modules and library functions included in the program.

  In the case of the example in FIG. 7, the recording program 121 includes an audio encoding module 151 for causing the sub processor 32 to execute encoding processing of audio data similar to the audio recording program 123 described above with reference to FIG. An audio encoding library function 152 for causing the main processor 31 to execute the encoding process, video encoding modules 161-1 to 161-3 for causing the sub processor 32 to execute the encoding process of the video data, and video Video encoding library functions 162-1 to 162-3 for causing the main processor 31 to execute data encoding processing are included. Although not shown in the example of FIG. 7, actually, other modules and library functions are also included.

  The video encoding library functions 162-1 to 162-3 have processing results equivalent to the results of the video data encoding processing executed by the video encoding modules 161-1 to 161-3 in the sub-processor 32, respectively. As shown in FIG. 31, the programs are generated in accordance with the video encoding modules 161-1 to 161-3.

  Here, the local storage 42 of the sub processor 32 is configured to be considerably smaller than the capacity of the main memory 12 on which the main processor 31 executes modules. For this reason, since the module of the main processor 31 is generated in an execution unit according to the capacity of the local storage 42 of the sub processor 32, in the case of a module with a large number of processes such as a video encoding process, Divided into multiple modules.

  Therefore, when the resource of the sub processor 32 is acquired, the recording program 121 loads the video encoding module 161-1 into the local storage 42 of the sub processor 32, and the video encoding module 161-1 is loaded with the kick command and the program. Run using a counter. When the video encoding module 161-1 is executed in the sub-processor 32, the video encoding module 161-1 executes video data encoding processing, and the execution result is stored in the main memory 12 via the DMAC 33. The data is stored in a predetermined area, and thereafter, the recording program 121 is notified that the execution has been completed.

  In response to this, the recording program 121 loads the video encoding module 161-2 into the local storage 42 of the sub-processor 32, and causes the video encoding module 161-2 to be executed using a kick command and a program counter. Hereinafter, although the description is omitted, the video encoding module 161-3 is similarly executed.

  On the other hand, when the resource of the sub-processor 32 is not acquired, the recording program 121 loads the video encoding library function 162-1 into the main memory 12 of the main processor 31, and executes the video encoding library function 162-1. . When the video encoding library function 162-1 is executed in the main processor 31, the video encoding library function 162-1 executes video data encoding processing, and the execution result is sent to the main memory via the DMAC 33. 12 is stored in a predetermined area, and then the recording program 121 is notified that the execution has been completed.

  In response to this, the recording program 121 loads the video encoding library function 162-2 into the main memory 12 of the main processor 31, and executes the video encoding library function 162-2. Hereinafter, although the description is omitted, the video encoding library function 162-3 is executed in the same manner.

  As described above, when one process is composed of a plurality of modules or libraries, the processes until all the modules or libraries are completed are repeated.

  In the example of FIG. 7, the case where the video encoding module and the video encoding library function are configured by three has been described. However, the number of modules and library functions is not limited to three, and actually It consists of more modules and library functions.

  Further, when the video encoding module 161-1 and the video encoding module 161-2 can be processed in parallel, if the resources of the sub-processor 23 can be used, the processing of one video encoding module 161 can be waited for. Two may be executed in parallel.

  Next, the audio data recording process of the information processing apparatus 1 will be described with reference to the flowchart of FIG. For example, when the user requests the activation of the audio recording program 123 by operating the operation input unit 15 or the like, the main processor 31 loads the audio recording program 123 from the recording unit 13 to the main memory 12 and controls the OS 111. Run under.

  In step S11, the audio recording program 123 controls the audio input driver 132 to input audio from the microphone constituting the input unit 16, and proceeds to step S12. That is, in step S11, the voice input driver 132 controls the voice input of the microphone constituting the input unit 16 under the control of the OS 111 corresponding to the request from the voice recording program 123, inputs voice data, and sets the DMAC 33. And record it in the first predetermined area of the main memory 12.

  In step S12, the audio recording program 123 executes audio data encoding processing, and proceeds to step S13. The audio data encoding process will be described later in detail with reference to the flowchart of FIG. 9, but in the process of step S12, the audio data is encoded by the sub processor 32 or the main processor 31, and the encoded data is the main data. It is stored in a second predetermined area of the memory 12.

  In step S13, the audio recording program 123 controls the recording control driver 133 to record the encoded data in the recording unit 13, and proceeds to step S14. That is, in step S13, the recording control driver 133 controls the DMAC 33, reads the encoded data from the second predetermined area, controls the DC 34, and causes the recording unit 13 to record the data.

  For example, the user operates the operation input unit 15 to request the end of recording of the audio data. In response to this, the voice recording program 123 determines whether or not the user's recording end request is input via the operation input unit 15 in step S14, and the user's recording is performed via the operation input unit 15. If it is determined that an end request has been input, the audio data recording process ends. If the audio recording program 123 determines in step S14 that the user's recording end request has not yet been input, it returns to step S11 and repeats the subsequent processing.

  Next, the audio data encoding process in step S12 of FIG. 8 will be described in detail with reference to the flowchart of FIG.

  In step S31, the audio recording program 123 requests the OS 111 for sub-processor resources in order to encode audio data from the microphone constituting the input unit 16, and proceeds to step S32.

  In step S <b> 32, the OS 111 determines whether there is a resource of the sub-processor 32 capable of executing the speech encoding process in response to a resource acquisition request from the speech recording program 123, and the speech encoding process If there is a resource of the sub processor 32 that can execute the process, the resource of the sub processor 32 is acquired and locked, and the determination result is supplied to the audio recording program 123, and the process proceeds to step S33.

  The audio recording program 123 loads the audio encoding module 151 into the sub-processor 32 from which the resource has been acquired by the OS 111 in step S33 according to the determination result that there is a resource from the OS 111, and proceeds to step S34. That is, the audio recording program 123 controls the DMAC 33 to read the audio encoding module 151 from the main memory 12 and write the read audio encoding module 151 in the local storage 42 of the sub processor 32.

  In step S34, the audio recording program 123 outputs a kick command and a program counter to the sub processor 32, causes the audio encoding module 151 to be executed, and proceeds to step S35.

  Thereby, the speech encoding module 151 is executed in the sub processor 32. That is, the audio encoding module 151 controls the DMAC 33 to read out audio data in the first predetermined area of the main memory 12, and executes a predetermined encoding process on the read audio data. Then, the voice encoding module 151 controls the DMAC 33 to store the encoded data in the second predetermined area of the main memory 12 and notifies the voice recording program 123 that the execution has been completed.

  In step S35, the audio recording program 123 saves the execution priority of its own thread in the main processor 31, sets the execution priority to the highest level, and waits for an execution completion notification from the sub processor 32 in step S36. ing. That is, in the main processor 31, since the audio recording program 123 has the highest execution priority and enters the waiting state, the main processor 31 preempts the execution right to another thread that has been in the executable state, Let me. Thereby, in the main processor 31, execution of another thread is started.

  When the audio recording program 123 is notified of the completion of execution from the sub-processor 32, the audio recording program 123 determines in step S36 that there has been an execution completion notification from the sub-processor 32, enters an executable state, and proceeds to step S37. Proceed to That is, since the audio recording program 123 has the highest execution priority, it immediately enters the execution state. In step S36, the execution priority of its own thread is returned to the one saved in step S35, and the process returns to step S38. move on. Thereby, the encoded data stored in the second predetermined area of the main memory 12 can be used.

  When the encoding process is completed, the audio recording program 123 requests the OS 111 to release the resources of the sub processor 32. Therefore, in step S38, the OS 111 releases the resources of the sub processor 32 and ends the encoding process. Returning to step S12 of FIG. 8, the process proceeds to step S13.

  On the other hand, for example, when all the sub-processors 32 are executing other processes or other processes are reserved, the OS 111 can execute the speech encoding process in step S32. It is determined that there is no other resource, the determination result is supplied to the audio recording program 123, and the process proceeds to step S39.

  The audio recording program 123 loads the audio encoding library function 152 of the main memory 12 in step S39, and executes the loaded audio encoding library function 152 in step S40. That is, the audio recording program 123 controls the DMAC 33 to read and execute the audio encoding module 151 of the main memory 12.

  As a result, the speech encoding library function 152 is executed in the main processor 31. That is, the audio encoding library function 152 controls the DMAC 33 to read out audio data in the first predetermined area of the main memory 12 and execute a predetermined encoding process on the read audio data. Then, the audio encoding library function 152 controls the DMAC 33, stores the encoded data in the second predetermined area of the main memory 12, notifies the audio recording program 123 that the execution is completed, and encodes the code. The process is terminated, the process returns to step S12 in FIG. 8, and proceeds to step S13.

  As described above, the encoded data stored in the second predetermined area of the main memory 12 can be used. That is, as a result of the process in step S40, a result similar to that of the speech encoding module 151 in step S34 is obtained.

  In the example of FIG. 8, for convenience of explanation, it has been described that the resource of the sub-processor 32 is released when one encoding process is completed, but actually, until the recording process of the audio data is completed. The resource of the sub processor 32 is locked and not released until all the encoding processing of the input voice data is completed.

  As described above, not only the module executed by the sub-processor 32 but also a library function that produces the same result as the sub-processor 32 is generated in the module execution unit, and the resource of the sub-processor 32 cannot be acquired. Since the library function is executed by the main processor 31 that executes management of the information processing apparatus 1, even if the resources of the sub-processor 32 are not available, processing that should be prioritized in response to a user request, etc. Can be executed immediately.

  Therefore, the main processor and sub-processor can be used in a flexible manner, and the throughput and performance of the information processing apparatus 1 as a whole can be improved.

  In the above description, the audio data recording process has been described. However, the present invention is not limited to this. In the above description, the processing when the information processing apparatus operates stand-alone has been described. However, not only the module executed by the sub-processor 32 but also the sub-processor 32 in the execution unit of the module in the software cell. By including a library function that can obtain the same result, it is possible to cause the other information processing apparatus 1 to execute the above-described processing via the network. It is also possible to execute the above-described processing according to the software cell transmitted from.

  As described above, the entire information processing apparatus 1 as well as the entire communication system can be improved in throughput and performance.

  Further, in the above description, the case where execution by the main processor 31 is enabled depending on the presence or absence of the resource of the sub processor 32 has been described. You may make it give top priority.

  The series of processes described above can be executed by hardware, but can also be executed by software. When a series of processing is executed by software, a program constituting the software may execute various functions by installing a computer incorporated in dedicated hardware or various programs. For example, it is installed from a program storage medium in a general-purpose personal computer or the like.

  As shown in FIG. 1, a program storage medium for storing a program installed in a computer and executable by the computer includes a magnetic disk 51 (including a flexible disk), an optical disk 52 (CD-ROM (Compact Disc -Read Only Memory), DVD (Digital Versatile Disc) included), magneto-optical disk 53 (including MD (Mini-Disc) (trademark)), or removable recording medium such as semiconductor memory 54, or program temporarily Alternatively, the recording unit 13-1 or 13-2 is stored permanently. That is, such a removable recording medium can be provided as so-called package software.

  In addition to being installed in the information processing apparatus 1 from the removable recording medium as described above, the program is wirelessly transferred from the download site to the information processing apparatus 1 via a digital satellite broadcasting artificial satellite, (Local Area Network) is transferred to the information processing apparatus 1 via a network such as the Internet, and the information processing apparatus 1 receives and incorporates the program transferred in this way by the communication unit 18. It can be installed in the recording unit 13-1 or 13-2.

  In the present specification, the steps shown in the flowcharts include not only processes performed in time series according to the described order, but also processes executed in parallel or individually even if not necessarily performed in time series. Is included.

  In the present specification, the term “system” represents the entire apparatus constituted by a plurality of apparatuses.

It is a block diagram which shows the structural example of the communication system of this invention. It is a figure explaining a main memory. It is a figure explaining the local storage of a sub processor. It is a figure explaining a key management table. It is a figure which shows the program of the information processing apparatus of FIG. It is a figure which shows the program which the information processing apparatus which records audio | voice data performs. It is a figure which shows the recording program of FIG. 3 is a flowchart for explaining a recording process of the information processing apparatus in FIG. 1. It is a flowchart explaining the example of the encoding process of FIG.8 S12.

Explanation of symbols

  1-1 to 1-3 Information processing device, 2 network, 11 information processing controller, 12 main memory, 13-1 and 13-2 recording unit, 15 operation input unit, 16 input unit, 18 communication unit, 31 main processor, 32-1 to 32-3 Sub-processor, 33 DMAC, 34 DC, 35 Key management table storage unit, 41, 42-1 to 42-3 Local storage, 101 Control program, 102 Function program, 103 Device driver, 111 OS, 123 voice recording program, 131 operation input driver, 132 voice input driver, 133 recording control driver, 151 voice coding module, 162 voice coding library function

Claims (6)

In an information processing apparatus that executes data processing,
At least one first processing means for executing the data processing based on a first program;
Second processing means for executing processing for managing the entire apparatus;
In the first processing means, resource determining means for determining whether or not calculation resources necessary for executing the first program are available;
If the first processing means determines that the calculation resources necessary for executing the first program are not available by the resource determination means, the second processing means is equivalent to the first program. An information processing apparatus comprising: a process control unit that performs control so as to execute a second program that obtains a correct result. The information processing apparatus according to claim 1, wherein the data processing is processing of video data or audio data. The processing control unit executes the first program when the resource determining unit determines that the first processing unit has free computing resources necessary for executing the first program. The information processing apparatus according to claim 1, further comprising: controlling the first processing unit. In an information processing method of an information processing apparatus that executes data processing,
A resource determination step for determining whether or not a calculation resource necessary for executing the first program is available in at least one first processing unit that executes the data processing based on a first program;
A second process for executing a process for managing the entire apparatus when it is determined in the first process means that the calculation resource necessary for the execution of the first program is not free by the process of the resource determination step. An information processing method comprising: a process control step for controlling the means to execute a second program that obtains a result equivalent to the first program. A recording medium on which a program for causing a computer to perform data processing is recorded,
A resource determination step for determining whether or not a calculation resource necessary for executing the first program is available in at least one first processing unit that executes the data processing based on a first program;
A second process for executing a process for managing the entire apparatus when it is determined in the first process means that the calculation resource necessary for the execution of the first program is not free by the process of the resource determination step. And a processing control step for controlling the means to execute a second program that obtains a result equivalent to the first program. A recording medium on which the program is recorded. A program that causes a computer to perform data processing,
A resource determination step for determining whether or not a calculation resource necessary for executing the first program is available in at least one first processing unit that executes the data processing based on a first program;
A second process for executing a process for managing the entire apparatus when it is determined in the first process means that the calculation resource necessary for the execution of the first program is not free by the process of the resource determination step. And a processing control step for controlling the means so as to execute a second program that obtains a result equivalent to the first program.

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