JP2005326614A - Method and apparatus for simulating cathode ray tube impulse type image display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and apparatus for simulating cathode ray tube impulse type image display. <P>SOLUTION: The apparatus has a first and second input control lines connected to a gate driver, first and second input data lines connected to a data driver, first and second capacitors, a driving voltage output line and first and second transistors. The first transistor has a first gate connected to the first input control line, a first source connected to the first input data line, a driving voltage output line, and a first drain connected to the drain of the first and second transistors, The second transistor has a second gate connected to the second control line, a second source connected to the second input data line, the drain of the first transistor, and the second drain connected to the second capacitor and the driving voltage output line. The first and second capacitors are grounded and the driving voltage output line outputs the simulated driving voltage to the pixel of the LCD panel. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method and an apparatus for simulating a cathode ray tube impulse image display, and more particularly to a method and an apparatus for simulating a cathode ray tube impulse image display on a liquid crystal display.

  Liquid crystal display technology and devices are widely used in consumer electronic products, especially video signal products such as televisions, computers, displays, mobile phones, PDAs, and there are many types of products, and the technical progress of liquid crystal displays is rapid. It meets the demand for constant development of future electronic products such as weight reduction, thinning, miniaturization, low power consumption, and low heat dissipation.

  Currently, televisions and screens manufactured with liquid crystal display technology are mass-produced and are replaced by televisions and displays manufactured with traditional cathode ray tubes (CRTs). However, current liquid crystal display technology still has drawbacks and limitations to be overcome and improved.

  The CRT image display uses an impulse-type image display method, and irradiates a pixel to which a fluorescent material is applied with a single electron beam to emit a light beam. As shown by a curve (a) in FIG. This pixel only emits light rays at a short instant of each frame period, so there is almost no phenomenon of visual overlap in the image displayed during the frame.

  However, the image display of the LCD uses a hold type image display method due to the characteristics of the LCD material itself, and the image is displayed by the optical response (that is, the gray scale response) generated by the driving voltage applied to the LCD. indicate. However, due to the limitation of the characteristics of the liquid crystal material itself, the image display time occupies most of the time of each frame and is as shown by the curve (c) in FIG. Each time the image is modified, its brightness is also modified in a stepped manner. For this reason, when viewed from the viewer, the image of the previous frame and the image of the new frame overlap, the image contour becomes ambiguous, and a so-called after image phenomenon is formed.

  When the LCD is used as a display of a personal computer, most of the image display is a static display, and such an afterimage phenomenon is not so clear. However, when the LCD is used in a television, the problem is that the optical grayscale response of this LCD is slow because most television programs are dynamic images. For this reason, the image display effect of a traditional LCD television is clearly inferior to that of a CRT television.

  In order to deal with and eliminate the phenomenon that the above-mentioned afterimage formed by slow optical response of LCD obscures the image outline, most LCD TV manufacturers now perform LCD load type image display, so-called overshoot. Drive technology produces pseudo impulse type LCDs similar to CRT displays. The optical response that the image display depends on occupies only a part of the frame time as shown by the curve (b) in FIG. 1, that is, there is a time during which no image is displayed in each frame period.

  Such an overdrive method increases the response speed of liquid crystal molecules by applying a voltage (for example, code 200) higher than a set target voltage (for example, code 120) to the liquid crystal, thereby accelerating the achievement of the set optical response value. The liquid crystal gray scale response time of the LCD manufactured with the liquid crystal material is shortened from the time of one frame to obtain a curve (b) in FIG.

  However, LCDs manufactured using such overdrive technology reduce the grayscale response time within one frame time, but the liquid crystal material has a slow optical response and a slow decay. Therefore, it is impossible to completely remove the phenomenon of contour ambiguity due to image overlap and afterimage from the display image of the frame.

  There are three known methods for thoroughly removing afterimages as follows. (1) Write black data or black frame in the remaining time after displaying an image in this frame, (2) Backlight off, for example, use of blink light method announced by Hitachi, 3) Combine (1) and (2) above, that is, insert a black frame and turn off the backlight. Each content and its limitations are described below.

  First, in the well-known first type method shown in FIG. 2, there is a series of frames 1, 2, 3, 4, between frames 1, 2, between frames 2, 3, and between frames 3, 4. Full black frames 11, 12 and 13 are inserted between them to achieve the purpose of displaying simulated CRT impulse images. All of the backlight sources 14-20 corresponding to the time points of the above frames are in a light emitting state.

  A well-known second type method is as shown in FIG. 3, and at this time, an image appearing on the LCD is composed of frames 1-7 broadcast in order. This second type of method turns off the backlight sources 22, 24 and 26 corresponding to the time points of frames 2, 4 and 6, and the backlights corresponding to the time points of frames 1, 3, 5, 7 and 9 The light sources 21, 23, 25, and 27 are set in a light emitting state, and this method achieves the purpose of simulating an impulse-type image display of a CRT display and removing an afterimage on the LCD.

  The well-known third type method is composed of a series of frames 1-4 as shown in FIG. Full black data frames 11, 12, and 13 are inserted between frames 1 and 2, 2 and 3, and 3 and 4, respectively, and baclite corresponding to the time points of frames 11, 12, and 13, respectively. The light sources 22, 24, and 26 are turned off, and the backlight light sources corresponding to the time points of the other frames 1, 2, 3, and 4 are turned on. That is, in this third type of method, the replacement of inserting a full black frame between the frames 1, 2, 3 and 4 and turning off the backlight light source is a light emitting state and an off flashing mode. The effect of simulating the impulse-type image display of the CRT display on the LCD is achieved.

  However, each of the above three known methods has drawbacks and limitations.

  The first type of method of inserting a black frame between display frames requires equipment to double the frequency. If the original image display is 60 frames / minute, to use this method, the image display speed must be increased to 120 frames / minute with equipment that doubles the frequency, and half of the number of frames is black. Served in a frame. For this reason, such a method increases the equipment cost. And doubling the image display frequency leads to an increase in electromagnetic interference. This is a drawback and limitation of the known first type method.

  The well-known type 2 method also requires frequency doubling equipment and must achieve the number of display frames / unit time as well. This is because half of the frames in the display screen within this unit time correspond to the backlight off state and no image is displayed. For this reason, this second type of method also increases equipment costs and electromagnetic interference. In addition, in order to blink the backlight light source, it is necessary to add related facilities, which further increases the cost. This is a limitation and drawback of the second known technique.

  The known third type method is a combination of the above two types of methods, that is, a black frame is inserted and the backlight module is blinked. The disadvantages and limitations of this method include the disadvantages and limitations of the above two methods. This is also not ideal.

  In addition, among the first and second types of methods, the characteristics and speed of the optical response differ depending on the liquid crystal material, and the method of inserting a black frame is not applicable depending on the liquid crystal material. This is because, depending on the liquid crystal material, the change from light to dark is rapid and the change from dark to light is slow, while in another liquid crystal material, the change from light to dark is slow and the change from dark to light is rapid. As a result, the effect of simulating CRT impulse-type image display by inserting black frames at equal time intervals is not ideal, and some cannot be used at all, and the purpose of simulating a CRT display on an LCD cannot be achieved. The afterimage removal effect cannot be achieved.

  It is a primary object of the present invention to provide an apparatus that simulates a type of cathode ray tube (CRT) impulse image display and remedies the limitations and disadvantages of known techniques. The present invention aims at simulating a CRT impulse image display by a method of providing a scanning black line on the screen without using the well-known technique of black frame insertion and without using a backlight off design and method. Achieved and effectively removed afterimage and image outline ambiguity, greatly improved the image display quality of LCD, and saved extra equipment cost.

The first input control line, the second input control line, the first input data line, the second input data line, the first capacitor, the second capacitor, the drive voltage output line, the first transistor, With transistors,
The first transistor is connected to a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a drain of the second transistor. With a first drain
The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. A second drain formed,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, and each of them simulates a cathode ray tube impulse image display that is grounded.
The first and second input control lines are connected to one gate driver, the first and second input data lines are connected to one data driver,
A cathode ray tube impulse image display characterized in that the time difference between the cycle pulse waveforms of the first and second control signals is adjusted to be the time difference between n scanning lines of n pulses. It is a device to simulate.
The invention of claim 2 is a method for simulating a cathode ray tube impulse image display,
A circuit comprising a first input control line, a second input control line, a first input data line, a second input data line, a first transistor, a second transistor, a first capacitor, a second capacitor, and a drive voltage output line Providing steps,
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a first data signal to a source of the first transistor, and when triggered by the first control signal, the circuit feeds the first data signal to a drive voltage output line;
Providing a second data signal to the source of the second transistor, and when triggered by the second control signal, the circuit feeds the second data signal to the drive voltage output line;
An output drive voltage generated by the above steps is output to a pixel and an image is displayed. The method comprises the above steps, and is a method for simulating a cathode ray tube impulse image display.
The invention of claim 3 is a method of simulating a cathode ray tube impulse image display according to claim 2,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) a drive voltage pulse D ₁ of the before, during the N-1 frames of the time point A1 'values of V _1', the and a value V ₁ 'of the driving voltage pulse V _LC, is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time advances to the time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ , and the value of the driving voltage pulse V _LC becomes instantaneous due to the action of the control voltage pulse G _{1 ′.} Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is V ₁ ′, and the value of the drive voltage pulse V _LC rises to V ₁ ′ by the action of the control voltage pulse G _{1 ′.} Is negative and is held until time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously rises to V ₃ and is held until time point A6.
This is a method for simulating a cathode ray tube impulse type image display characterized by the above.
According to a fourth aspect of the present invention, in the method of simulating the cathode ray tube impulse image display according to the third aspect, when the output drive voltage V _LC of the simulator is (code 0) between the time points, this time period is used. To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.
The invention of claim 5 includes a first input control line, a second input control line, a first input data line, a second input data line, a third input data line, a fourth input data line, a fifth input data line, 1 capacitor, 2nd capacitor, 3rd transistor, 4th transistor, drive voltage output line, 1st transistor, 2nd transistor,
The first transistor is connected to a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a drain of the second transistor. With a first drain
The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. A second drain formed,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded. The drive voltage output line simulates a cathode ray tube impulse-type image display in which the drive voltage is output to the pixel of the LCD panel to display an image. In the device to
The first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to the drains of third and fourth transistors connected in parallel, respectively. The sources of the connected third and fourth transistors are connected to one data driver, their gates are connected to the third and fourth input data lines, respectively, between the cycle pulse waveforms of the first and second control signals. The time difference is the time difference between n scanning lines of n pulses, and is adjustable, and the apparatus simulates the cathode ray tube impulse image display.
The invention of claim 6 is an overdrive method for a liquid crystal display,
First input control line, second input control line, first input data line, second input data line, third input data line, fourth input data line, fifth input data line, first transistor, second transistor, Providing a circuit comprising a third transistor, a fourth transistor, a first capacitor, a second capacitor, a drive voltage output line;
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a fifth data signal to the sources of a third transistor and a fourth transistor connected in parallel;
A third data signal is provided to the gate of the third transistor, and a voltage pulse generated at its drain is provided to the source of the first transistor to form the first data signal, which is triggered by the first control signal. The circuit feeds a first data signal to the drive voltage output line when
The fourth data signal is provided to the source of the fourth transistor, and the voltage pulse signal generated by the drain is provided to the source of the second transistor to be used as the second data signal, and the second transistor is used as the second control signal. When triggered, the circuit feeds a second data signal to the drive voltage output line;
A step of outputting an output drive voltage generated in the above steps to a pixel to display an image A method of simulating a cathode ray tube impulse image display, comprising the above steps.
The invention of claim 7 is the overdrive method of the liquid crystal display according to claim 6,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) a drive voltage pulse D ₁ of the before, during the N-1 frames of the time point A1 'values of V _1', the and a value V ₁ 'of the driving voltage pulse V _LC, is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time advances to the time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ , and the value of the driving voltage pulse V _LC becomes instantaneous due to the action of the control voltage pulse G _{1 ′.} Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is V ₁ ′, and the value of the drive voltage pulse V _LC rises to V ₁ ′ by the action of the control voltage pulse G _{1 ′.} Is negative and is held until time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously rises to V ₃ and is held until time point A6.
This is a method for simulating a cathode ray tube impulse type image display characterized by the above.
The invention of claim 8 is the method of simulating the cathode ray tube impulse image display according to claim 7, wherein the output drive voltage V _LC of the simulator is (code 0) between the time points. To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.
The invention of claim 9 comprises a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, a second transistor, One transistor is connected to the first gate connected to the first input control line, the first source connected to the first input data line, and the drive voltage output line, the first capacitor, and the second drain of the second transistor. A first drain formed,
The second transistor comprises a second gate connected to a second input control line, a grounded second source, and a drain of the first transistor and a second drain connected to a second capacitor and a drive voltage output line,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to a pixel of the LCD panel to display an image. In a device that simulates display,
The first and second input control lines are connected to one gate driver, the first input data line is connected to the data driver,
The time difference between the cycle pulse waveforms of the first and second control signals is adjustable as a time difference between n scanning lines of n pulses, and can be adjusted. It is a device to do.
The invention of claim 10 is a method of simulating a cathode ray tube impulse image display,
Providing a circuit comprising a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, a second transistor;
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a first data signal to a source of the first transistor, and when triggered by the first control signal, the circuit feeds the first data signal to a drive voltage output line;
Providing a second data signal to the source of the second transistor, and when triggered by the second control signal, the circuit feeds a ground potential to the drive voltage output line;
An output drive voltage generated by the above steps is output to a pixel and an image is displayed. The method comprises the above steps, and is a method for simulating a cathode ray tube impulse image display.
The invention of claim 11 is a method of simulating the cathode ray tube impulse image display according to claim 10,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and the driving voltage pulse V _LC is V _{1 ′} due to the ground of the source of the second transistor. a negative polarity, (b) to start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, the simulation device The value of the output drive voltage pulse V _LC generated by the voltage rises to V _{2 and} becomes positive, and is held until time point A2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _2, controlled by the action of the voltage pulse G _{1 ',} specifically the value of the driving voltage pulse V _LC moment Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′ and is held until the time point A4. (E) After that, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is At V ₃ ′, the value of the drive voltage pulse V _LC rises to V ₁ ′ due to the action of the control voltage pulse G _{1 ′} , but is negative and is held until the time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously increases to V _{3 and} becomes positive, and this is held until time point A6.
This is a method for simulating a cathode ray tube impulse type image display characterized by the above.
According to a twelfth aspect of the present invention, in the method of simulating the cathode ray tube impulse image display according to the eleventh aspect, when the output drive voltage V _LC of the simulator is (code 0) between the time points, To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.
The invention of claim 13 comprises a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor,
The first transistor includes a gate connected to the first input control line or the second input control line, a source connected to the first input data line, and a driving voltage output line and two first and second connected in parallel. Having a drain connected to the second capacitor;
Cathode ray tube impulse-type image display in which the first capacitor and the second capacitor are grounded as a storage capacitor and a liquid crystal equivalent capacitor, and the drive voltage output line displays the image by outputting the drive voltage of the simulator to the pixel of the LCD panel. In a device that simulates
The input data line is connected to the data driver, the input control line is connected to the gate driver, and the gate driver has an output enable (OE) input line and a start horizontal pulse (STH) input line. In addition, a related signal is received through these input lines to generate the synchronous control voltage pulses G1 and Gm of the input control lines, and the drive voltage pulses generated by the control are separated from each other by m scanning lines on the screen. A device for simulating a cathode ray tube impulse-type image display, wherein the synchronous scanning lines are simultaneously generated to display an image.
The invention of claim 14 is a method of simulating a cathode ray tube impulse image display,
Providing a circuit comprising a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor;
Providing a data signal having a cycle pulse waveform to the source of the first transistor;
Providing OE and STH control signals to the gate driver to allow the gate driver to generate the synchronization control signals G1, Gm and to provide the gate of the first transistor;
When triggered by these synchronization control signals G1, Gm, the circuit feeds a data signal to the drive voltage output line;
Providing an output drive voltage generated in the above steps to a pixel and displaying an image;
It is a method for simulating a cathode ray tube impulse-type image display characterized by comprising the above steps.
The invention of claim 15 is a method of simulating a cathode ray tube impulse image display according to claim 14,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and is negative with the value V ₁ ′ of the driving voltage pulse V _LC .
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D ₁ is V ₁ ′, which is negative, and the value of the drive voltage pulse V _LC becomes V ₁ ′ by the action of the control voltage pulse G _1. Rises but has negative polarity and is held until time point A5,
If (f) time reaches the time point A5, the (N + 2) of the entry to the start of the frame, at this time, the value of the driving voltage pulse D ₁ is increased V _3, and the under the action of the control voltage pulse G _1, drive The value of the voltage pulse V _LC instantaneously rises to V ₃ , which is positive polarity, and is maintained until the time point A6. This is the liquid crystal display overdrive method.
The invention according to claim 16 is the method for simulating the cathode ray tube impulse type image display according to claim 15, wherein the output drive voltage V _LC of the simulator is (code 0) between the time points. To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.
The invention of claim 17 comprises a first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, The first transistor includes a gate connected to the first input control line, the second input control line, or the third input control line, a source connected to the first input data line, and a drive voltage output line in parallel with the first transistor. With a drain connected to a capacitor connected to
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to the pixel of the LCD panel to display an image. In the overdrive device of
The first input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver is connected to the first, second and third output enable (OE) input lines and the start horizontal Two sets of control voltage pulses synchronized with the outputs of these gate drivers are provided by controlling the OE signal input to these gate drivers by receiving a related signal through these input lines and having a pulse (STH) input line. The following three sets of control voltage pulses are generated: (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ), And two sets of control voltage pulses (1,3) or (1,2) or (2,3) selected and combined from these three sets of control voltage pulses are cyclically switched. In mode, the drive voltage pulses generated by the control are supplied to the gates of these transistors through corresponding first, second or third input control lines to drive the pixels on the screen in a circular alternating mode, and from the first An apparatus for simulating a cathode ray tube impulse image display is characterized in that two scanning lines having an interval of 2m scanning lines are generated at the same time starting from the 2m + 1 line and an image is displayed.
The invention of claim 18 is a circuit comprising a first input control line, a second input control line, a third input control line, a first input data line, a transistor, a first capacitor, a second capacitor, and a drive voltage output line. Providing steps,
Providing a data signal having a cycle pulse waveform to the source of the transistor; providing OE and STH control signals to the first, second and third OE input lines and the STH input line of the gate driver; And the control of the OE signal input by these gate drivers generates two sets of synchronous control voltage pulses at the output terminals of these gate drivers, which are the following three sets of control voltage pulses: (1) ( G _1, G _m), combined elected from _{(2) (G m + 1} , G 2m), (3) (G 2m + 1, elected from G _3m), the control voltage pulses of the three pairs Two sets of control voltage pulses (1,3) or (1,2) or (2,3) are in the cyclic alternation mode, and the gates of these transistors through the corresponding first, second or third input control lines. Step fed,
In a method of simulating a cathode ray tube impulse image display comprising the above steps,
When triggered by these two sets of synchronization control signals (1,3) or (1,2) or (2,3), this circuit feeds the data signal to the drive voltage output line, and
The output driving voltage generated in the above steps is output to these pixels, and two synchronous scanning lines separated from each other by 2 m scanning lines are started on the screen from the first to (2m + 1) th scanning lines and in the cyclic alternate mode. This is a method for simulating a cathode ray tube impulse-type image display, which is characterized by generating an image and displaying the image.
The invention of claim 19 is a method of simulating a cathode ray tube impulse image display according to claim 18,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and the value V ₁ ′ of the driving voltage pulse V _LC is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the driving voltage pulse D ₁ is V ₁ ′, and the value of the driving voltage pulse V _LC is increased to V ₁ ′ by the action of the control voltage pulse G _1. Is negative and is held until time point A5,
If (f) time reaches the time point A5, the (N + 2) of the entry to the start of the frame, at this time, the value of the driving voltage pulse D ₁ is increased V _3, and the under the action of the control voltage pulse G _1, drive The value of the voltage pulse V _LC instantaneously rises to V ₃ , which is positive polarity, and is maintained until the time point A4. This is an overdrive method for a liquid crystal display characterized by the above.
In the method of simulating the cathode ray tube impulse image display according to claim 19, when the output drive voltage V _LC of the simulator is (code 0) between the time points, To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.
The invention of claim 21 comprises a first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, The first transistor is connected in parallel with the gate connected to the first input control line or the second input control line or the third input control line, the source connected to the input data line, and the drive voltage output line. A drain connected to the first and second capacitors connected,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to the pixels of the LCD panel to display an image. In a device that simulates
An input data line is connected to one data driver, an input control line is connected to a gate driver, and the gate driver is connected to a first, second and third output enable (OE) input line and a start horizontal pulse (STH). A start pulse horizontal) input line and receiving a related signal through these input lines, and by controlling the OE signal input by these gate drivers, three sets of control voltage pulses synchronized with the outputs of these gate drivers are generated; It consists of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ) The three sets of control voltage pulses are supplied to the gates of the first transistors through corresponding first, second or third input control lines, and the three sets of synchronous control pulses are supplied. When triggered by the control signal (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and the drive voltage pulse generated by the control drives the pixel and is on the screen. The apparatus simulates a cathode ray tube impulse-type image display, which generates three synchronous scanning lines separated from each other by m scanning lines and displays an image.
The invention of claim 22 comprises a first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor. Providing a circuit,
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
OE and STH control signals are provided to the first, second and third OE input lines and STH input lines of the gate driver, and related signals are received through these input lines. Two sets of synchronous control voltage pulses are generated at the output terminal of the gate driver, which is composed of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m +1} , G _2m ), (3) (G _{2m + 1} , G _3m ), and the first, second or third input control lines to which the three sets of control voltage pulses (1, 2, 3) correspond. Supplied to the gates of these transistors (Q1) through
In a method of simulating a cathode ray tube impulse image display comprising the above steps,
When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
A cathode ray tube characterized in that the output drive voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated from each other by m scanning lines on the screen and display an image. This method simulates impulse-type image display.
The invention of claim 23 is a method of simulating a cathode ray tube impulse image display according to claim 22,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and the value V ₁ ′ of the driving voltage pulse V _LC is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D ₁ is V ₁ ′, which is negative, and the value of the drive voltage pulse V _LC rises due to the action of the control voltage pulse G ₁ and increases to V ₁ ', but negative polarity, held until time point A5,
If (f) time reaches the time point A5, ingress starts to the (N + 2) frames, the value of the drive voltage pulse D ₁ rises to V _3, by the action of the control voltage pulse G _1, the driving voltage pulse V _{The LC} value rises momentarily to V ₃ , which is positive and holds this up to time point A6.
The liquid crystal display overdrive method is characterized as described above.
The invention of claim 24 is the method of simulating the cathode ray tube impulse image display according to claim 23, wherein when the output drive voltage V _LC of the simulator is (code 0) between each time point, To achieve a better simulation function of scanning the black line on the screen and inserting a black frame between frames or turning off the backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD This is a method of simulating a cathode ray tube impulse image display.

In summary, the apparatus and method of the present invention that features black line scanning of the present invention is a cathode ray tube impulse-type LCD that is achieved by well-known techniques of black frame insertion, backlight blinking, or a combination of both. It achieves the effect of simulating image display and is superior to the known technology in the following points.
1. This saves the cost of extra frequency doubling equipment or backlight flashing equipment required for known technology.
2. Electromagnetic interference due to increased equipment can be prevented.
3. The time interval between the two types of input control pulses G ₁ and G _{1 ′} during the same frame time can be adjusted according to actual needs, and the liquid crystal optical response and black line scanning time length during the same frame time (especially black (Line scanning) can be adjusted. As a result, the designer of the liquid crystal display can adjust the black line scanning time according to the time required for different optical response characteristics depending on the liquid crystal material, has sufficient design elasticity, and is thoroughly formed by an afterimage of well-known technology. The image overlap and the phenomenon that the outline becomes ambiguous can be removed, and the image quality can be optimized. Thus, the present invention reliably achieves the purpose and effect of simulating the effect and purpose of the impulse-type image display of the CRT display on the LCD.

  Taken together, the method and apparatus for simulating the cathode ray tube impulse image display of the present invention certainly improves the shortcomings and limitations of the known liquid crystal display, saves the cost of the apparatus and greatly enhances its function. It is increasing. Therefore, the method and apparatus for simulating the cathode ray tube impulse-type image display of the present invention is superior to the well-known technology, and certainly has industrial utility value, and has novelty and inventive step.

  In order to achieve the above object, an apparatus for simulating a cathode ray tube impulse image display provided by the present invention includes a first input control line, a second input control line, a first input data line, a second input data line, a second input data line, One capacitor, a second capacitor, a drive voltage output line, a first transistor, and a second transistor are provided. The first transistor is connected to a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a drain of the second transistor. A first drain. The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. Second drain. The first capacitor and the second capacitor are grounded, and the drive voltage output line outputs an overdrive voltage to the pixels of the LCD panel. The feature is that the first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to one data driver.

  Other variations and implementation types of the apparatus simulating the cathode ray tube impulse image display used in the present invention will be described in detail below.

  The present invention also provides a method for simulating a cathode ray tube impulse image display.

  Various features and advantages of the present invention are described in detail in the following examples, and are described with reference to the drawings for better understanding. Among them, the same reference numerals are used for the same parts.

  In the following embodiments, the advantages and features of the present invention will be described by describing the voltage applied to the liquid crystal, the liquid crystal optical response path and the action using the waveform as a tool.

  In the following examples, the horizontal axis in FIGS. 6, 8, 10, 12, and 14 is time, the unit is ms, A1 to A6 are time points that progress in time sequence, the vertical axis is the drive voltage, and the code (code). ) Is the display unit. Of these, for ease of explanation, each of the above-mentioned figures is divided into (N-1), N, (N + 1), and (N + 2) frame time sections (partitions) with the frame time as a unit. (A), (a) in FIG. 8, (a) in FIG. 10, (a) in FIG. 12, (a) in FIG. 14 and (a) in FIG. 14 are applied with different driving voltages for liquid crystal molecules. FIG. 4 is a path characteristic curve of the optical response (i.e. gray scale response) of time. This optical response is usually the luminance at which the liquid crystal appears, and its unit is nits (candela / square centimeter).

6 (a) to (e), FIG. 8 (a) to (g), FIG. 10 (a) to (d), FIG. 12 (a) to (d), FIG. The meanings of the representative symbols of the voltage pulses in (a) to (e) are shown in (b) in FIG. 5, (b) in FIG. 7, (b) in FIG. 9, (b) in FIG. This can be understood from the circuit structure in FIG. For example, the waveform shown in FIG. 6B represents the control voltage pulse applied to the gate of the transistor Q of the simulator in FIG. 5B, and the waveform shown in FIG. 6C. Represents a control voltage pulse applied to the gate of the transistor (Q ′) in FIG. 5 (b), and the waveform shown in FIG. 6 (d) is the transistor (Q) in FIG. 5 (b). 6 represents the driving voltage pulse applied to the source of the transistor, and the waveform shown in FIG. 6E represents the driving voltage pulse applied to the source of the transistor (Q ′) in FIG. V _LC is an output drive voltage pulse generated by this simulator, and V _COM is a reference voltage. The above is for facilitating comparison and comparison of (a) to (e) in FIG. 6, and the horizontal axis for the time is the one drawn under (e) in FIG. 6 from (a) in FIG. 6. (E) is jointly used. A1 to A6 are time points that proceed in time order. The other FIGS. 8, 10, 12, and 14 are all described in a manner similar to the above.

  The simulation apparatus and method of the present invention will be described below with reference to circuit diagrams, liquid crystal display controller pixel unit control voltage pulse waveforms, drive voltage pulse waveforms, and optical response characteristic curves generated by the circuit diagrams shown in the respective embodiments.

A first embodiment of the present invention will be described below with reference to FIGS. 5A and 5B and FIGS. 6A to 6E. First, FIG. 5A shows a pixel array formed by intersections of a plurality of gate lines and data lines and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers in the first embodiment of the present invention. . FIG. 5B shows a simulation apparatus according to an embodiment of the present invention.
Simulation device:
As can be seen from FIGS. 5A and 5B, the overdrive device of the liquid crystal display includes a first input control line (G ₁ ), a second input control line (G _{1 ′} ), and first input data. Line (D ₁ ), second input data line (D _{1 ′} ), first capacitor (C _S ), second capacitor (C _LC ), drive voltage output line (not shown), first transistor (Q), A second transistor (Q ′) is provided.
The first transistor (Q) includes a first gate connected to the first input control line (G ₁ ), a first source connected to the first input data line (D ₁ ), a driving voltage output line, and a first voltage. 1 capacitor (C _S ) and a first drain connected to the drain of the second transistor (Q ′).
The second transistor (Q ′) includes a second gate connected to the second input control line (G ₁ ′), a second source connected to the second input data line (D _{1 ′} ), and a first source. A drain of the transistor (Q) and a second capacitor (C _LC ) and a second drain connected to the drive voltage output line are provided.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel. The feature is that the first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to one data driver.
Simulation method:
A method for driving the simulation apparatus according to the first embodiment of the present invention will be described below. It has the following steps:
Providing a first control signal (G ₁ ) having a cycle pulse waveform to a first gate of a first transistor (Q);
Providing a second control signal (G _{1 ′} ) having a cycle pulse waveform to the second gate of the second transistor (Q ′), the second control signal (G _{1 ′} ) being a first control other than a phase delay; Same as signal (G ₁ ),
A first data signal (D ₁ ) is provided to the source of the first transistor (Q) and the circuit drives the first data signal (D ₁ ) when triggered by the first control signal (G ₁ ). Feeding to the voltage output line,
When the second data signal (D _{1 ′} ) is provided to the source of the second transistor (Q ^′ ) and is triggered by the second control signal (G _{1 ′} ), the circuit becomes the second data signal (D _{1 ′} ). Feeding to the drive voltage output line,
Outputting the output drive voltage generated by the above steps to a pixel and displaying an image;
Waveform analysis:
The control voltage pulses G ₁ and G ₁ generated by the simulation apparatus of FIGS. 5A and 5B of the first embodiment of the present invention will be described in detail with reference to FIGS. 6A to 6E. The relationship between _' and the driving voltage pulses D ₁ and D _1' and the waveform of _VLC will be described.
When the control voltage pulse of this device is G ₁ (FIG. 6B), the corresponding drive voltage pulse is D ₁ (FIG. 6D). When the control voltage pulse of this device is G _{1 ′} (FIG. 6C), the corresponding drive voltage pulse is D _{1 ′} (FIG. 6E). The actual combined output drive voltage pulse generated for the liquid crystal by the simulator of the present invention is V _LC ((a) of FIG. 6).
In the following discussion, the driving voltages V ₀ , V ₁ , V ₂ , V ₃ are voltage values displayed by a kind of code.
The emphasis here is that the target voltage can be achieved instantaneously when these drive voltages are applied, but the target optical response position can only be reached after a certain time response after the liquid crystal molecules have received the applied voltage. This is due to the material properties of the liquid crystal itself.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases alternate with respect to the reference voltage V _COM ).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the drive voltage pulse D _{1 in} the (N−1) -th frame before the time point A1 is V _{1 ′} (code 0), and the value of the drive voltage pulse V _LC is also V _{1 ′} (code 32). It is sex. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V ₂ becomes (CODE32), by the action of the control voltage pulse G _1, generated by the simulator output The value of the drive voltage pulse V _LC also rises to V ₂ (code 32), becomes positive, and holds it until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ (code 0), and the value of the driving voltage pulse V _LC is instantaneous due to the action of the control voltage pulse G _{1 ′.} The voltage drops from V ₂ (code 32) to V ₁ (code 0), but is positive, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame is started, and at this time, the value of the drive voltage pulse D ₁ decreases to V ₃ ′ (code 120) and becomes negative, and the drive voltage pulse is driven by the action of the control voltage pulse G _1. The value of V _LC instantaneously drops to V ₃ ′ (code 120), which is negative and held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the drive voltage pulse D _{1 ′} is V _{1 ′} (code 0), and the value of the drive voltage pulse V _LC is V ₁ due to the action of the control voltage pulse G _{1 ′. '} Rises to (code 0), which is of negative polarity and held until time point A5. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₃ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulses G ₁ , G _{1 ′} , drive voltage pulses D ₁ , D _{1 ′,} and V _LC at other time points after the time point A 6 can be easily inferred from the above description.
A dotted line (a) shown in (a) of FIG. 6 is a liquid crystal optical response curve when the simulation drive is performed. In this figure, when the output drive voltage V _LC of the simulator between time points is (code 0), that is, during this time period, a black line scan is performed on the screen. The technology can achieve the same effect as inserting a black frame between frames, or turning off the backlight between frames, and achieves the purpose of simulating an impulse image display of a CRT display on an LCD.
In addition, n shown in the impulse G _{1 ′} portion in the Nth frame in FIG. 6C indicates n pulses, which are control voltage pulses G ₁ and G _{1 ′} in the same frame. It is shown that there is a time difference between n scanning lines. That is, when viewed from the perspective of the pixels, after the first one in G ₁ pulse, unless elapse of n in G ₁ pulse, indicating that it can not enter another control voltage pulse G _{1 '.} The length of the time interval represented by n can be adjusted appropriately by the designer according to actual needs such as liquid crystal material characteristics, etc., and the black line can be scanned to simulate the impulse-type image display of the CRT display. it can. This is the greatest feature superior to the known technique of the present invention.

A second embodiment of the present invention will be described below with reference to (a), (b) in FIG. 7 and (a) to (g) in FIG. First, (a) in FIG. 7 shows a pixel array formed by intersections of a plurality of gate lines and data lines of this embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. In FIG. 7, (b) shows a liquid crystal display simulation apparatus of the present embodiment.
Simulation device:
As can be seen from FIGS. 7A and 7B, the liquid crystal display simulation apparatus includes a first input control line (G ₁ ), a second input control line (G _{1 ′} ), and a first input data line. (D ₁ ), second input data line (D _{1 ′} ), third input data line (D ′), fourth input data line (D), fifth input data line (D _S ), first capacitor (C _S ), the second capacitor (C _LC ), the third transistor (Q3), the fourth transistor (Q4), the drive voltage output line (not shown), the first transistor (Q), and the second transistor (Q ′). It has.
The first transistor (Q) includes a first gate connected to the first input control line (G ₁ ), a first source connected to the first input data line (D ₁ ), a driving voltage output line, and a first voltage. 1 capacitor (C _S ) and a first drain connected to the drain of the second transistor (Q ′).
The second transistor (Q ′) includes a second gate connected to the second input control line (G ₁ ′), a second source connected to the second input data line (D _{1 ′} ), and a first source. A drain of the transistor (Q) and a second capacitor (C _LC ) and a second drain connected to the drive voltage output line are provided.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel. The feature is that these first and second input control lines (G ₁ , G _{1 ′} ) are connected to one gate driver, and these first and second input data lines (D ₁ , D _{1 ′} ) are respectively connected. The drains of the third and fourth transistors (Q3 and Q4) connected in parallel are connected to each other, the sources of the third and fourth transistors connected in parallel are connected to one data driver, and the gates thereof are connected to the first and second transistors, respectively. 3 and the fourth input data line (D, D ′), and the time difference between the cycle pulse waveforms of the first and second control signals G ₁ and G _{1 ′} is n scans of n pulses. This is the time difference between the lines and is adjustable.
Simulation method:
Hereinafter, a driving method of the overdrive device of the liquid crystal display according to the second embodiment of the present invention will be described. It has the following steps:
Providing a first control signal (G ₁ ) having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal (G _{1 ′} ) having a cycle pulse waveform to the gate of the second transistor, the second control signal (G _{1 ′} ) being the same as the first control signal except for the phase delay; Providing a fifth data signal (D ₁ ) to the sources of a third transistor (Q3) and a fourth transistor (Q4) connected in parallel;
A third data signal (D ′) is provided to the gate of the third transistor (Q3), and a voltage pulse generated at the drain of the third data signal (D ′) is provided to the source of the first transistor (Q) to provide the first data signal (D ₁ ) and None, when the first transistor (Q1) is triggered by the first control signal (G ₁ ), the circuit feeds a first data signal (D ₁ ) to the drive voltage output line;
The fourth data signal (D) is provided to the source of the fourth transistor (Q4), and the voltage pulse signal generated by the drain of the fourth data signal (D4) is provided to the source of the second transistor (Q ′) to provide the second data signal (D _{1). When} the second transistor (Q ′) is triggered by the second control signal (G _{1 ′} ), the circuit feeds the second data signal (D _{1 ′} ) to the drive voltage output line. ,
The output drive voltage generated in the above steps is output to the pixel and the image is displayed. Waveform analysis:
The control voltage pulses G ₁ and G generated by the simulation apparatus of the second embodiment of FIGS. 7A and 7B of the present invention will be described in detail with reference to FIGS. 8A to 8G. The relationship between the waveform of _{1 ′} and the drive voltage pulses D ₁ , D _{1 ′} and V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases alternate with respect to the reference voltage V _COM ).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the drive voltage pulse D _{1 ′ in} the (N−1) th frame before the time point A1 is V _{1 ′} (code 0), which is negative, and the value of the drive voltage pulse V _LC is also V _{1 ′} ( code 32) and negative polarity. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V ₂ becomes (CODE32), a positive polarity by the action of a control voltage pulse G _1, the simulation device The value of the output drive voltage pulse V _LC generated by the above also rises to V ₂ (code 32), becomes positive, and is held until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ (code 0), and the value of the driving voltage pulse V _LC is instantaneous due to the action of the control voltage pulse G _{1 ′.} The voltage drops from V ₂ (code 32) to V ₁ (code 0), but is positive, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame is started, and at this time, the value of the drive voltage pulse D ₁ decreases to V ₃ ′ (code 120) and becomes negative, and the drive voltage pulse is driven by the action of the control voltage pulse G _1. The value of V _LC instantaneously drops to V ₃ ′ (code 120), which is negative and held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the drive voltage pulse D _{1 ′} is V _{1 ′} (code 0), and the value of the drive voltage pulse V _LC is V ₁ due to the action of the control voltage pulse G _{1 ′. '} It rises to (code 0), but is negative polarity and is held until time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of starts entering the frame, this time, the value of the drive voltage pulse D ₁ rises to V ₃ (code120), a positive polarity, the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulses G ₁ , G _{1 ′} , drive voltage pulses D ₁ , D _{1 ′,} and V _LC at other time points after the time point A 6 can be easily inferred from the above description.
8D and 8E show the waveforms of the third and fourth data signal voltage pulses in FIG. 7A.
A dotted line shown in (a) of FIG. 8 is a liquid crystal optical response curve when the simulated drive is performed. In this figure, when the output drive voltage V _LC of the simulator between time points is (code 0), that is, during this time period, a black line scan is performed on the screen. The technology can achieve the same effect as inserting a black frame between frames, or turning off the backlight between frames, and achieves the purpose of simulating an impulse image display of a CRT display on an LCD.
In addition, n shown in the impulse G _{1 ′} portion in the Nth frame in FIG. 8C indicates n pulses, which are control voltage pulses G ₁ and G _{1 ′} in the same frame. It is shown that there is a time difference between n scanning lines. That is, when viewed from the perspective of the pixels, after the first one in G ₁ pulse, unless elapse of n in G ₁ pulse, indicating that it can not enter another control voltage pulse G _{1 '.} The length of the time interval represented by n can be adjusted appropriately by the designer according to actual needs such as liquid crystal material characteristics, etc., and the black line can be scanned to simulate the impulse-type image display of the CRT display. it can. This is the greatest feature superior to the known technique of the present invention.
The waveform of the drive voltage pulse V _LC output from the above simulation apparatus of the present embodiment is the same as that of the first embodiment so as to be convenient for explanation and understanding, and the situation where the explanation process is too complicated to be understood is prevented. doing. However, the designer can design the waveform to have various changes as required.

A third embodiment of the present invention will be described below with reference to FIGS. 9 (a) and 9 (b) and FIGS. 10 (a) to 10 (d). First, (a) in FIG. 9 shows a pixel array formed by intersections of a plurality of gate lines and data lines of this embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. In FIG. 9, (b) shows a liquid crystal display simulation apparatus of the present embodiment.
Simulation device:
As can be seen from FIGS. 9A and 9B, the liquid crystal display simulation apparatus includes a first input control line (G ₁ ), a second input control line (G _{1 ′} ), and a first input data line. (D), a first capacitor (C _S ), a second capacitor (C _LS ), a drive voltage output line, a first transistor (Q), and a second transistor (Q ′).
The first transistor (Q) includes a first gate connected to the first input control line (G ₁ ), a first source connected to the first input data line (D ₁ ), and a drive voltage output line. A first capacitor (C _S ) and a first drain connected to the second drain of the second transistor (Q ′) are provided.
The second transistor (Q ′) includes a second gate connected to the second input control line (G _{1 ′} ), a grounded second source, a drain of the first transistor (Q), and a second capacitor (C _LS). And a second drain connected to the drive voltage output line.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting a simulated voltage to a pixel of the LCD panel.
The feature is that the first and second input control lines are connected to the gate driver, the first input data line is connected to the data driver, and there are n time differences between the cycle pulse waveforms of the first and second control signals. This is a time difference between n scanning lines of the above-mentioned pulse and can be adjusted.
Simulation method:
The driving method of the simulation apparatus according to the third embodiment of the present invention will be described below. It has the following steps:
Providing a first control signal (G ₁ ) having a cycle pulse waveform to a first gate of a first transistor;
Providing a second control signal (G _{1 ′} ) having a cycle pulse waveform to the second gate of the second transistor (Q ′), the second control signal (G _{1 ′} ) being a first control except for a phase delay; The same as the signal,
When the first data signal (D ₁ ) is provided to the source of the first transistor (Q) and triggered by the first control signal (G ₁ ), the circuit converts the first data signal (D ₁ ) to the drive voltage. Feeding to the output line,
When triggered by the second control signal (G _{1 ′} ), the circuit feeds a ground potential (code 0) to the drive voltage output line;
The output drive voltage generated in the above steps is output to the pixel and the image is displayed. Waveform analysis:
The control voltage pulses G ₁ and G _{1 ′} and the drive voltage pulses D ₁ and V _LC generated in detail by the simulation apparatus of the embodiment of FIG. 3 according to the present invention will be described in detail with reference to FIGS. The relationship between the waveforms will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases alternate with respect to the reference voltage V _COM ).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V _{2 ′} (code 32) (because the source of the second transistor is connected to V _COM ), and the driving voltage pulse The value of V _LC is V _COM and starts entering the Nth frame at time point A1, and at this time, the value of the drive voltage pulse D ₁ rises to V ₂ (code 32), and the control voltage pulse G ₁ Due to the action, the value of the output drive voltage pulse V _LC generated by this simulation device also rises to V ₂ (code 32), becomes positive, and holds it until time point A2. Then, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V ₂ (CODE32) next, by the action of the control voltage pulse G _{1 'is} (the source of the second transistor is connected to the V _COM Therefore, the value of the drive voltage pulse V _LC instantaneously drops from V ₂ (code 32) to V ₁ (code 0), but is positive, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame is started, and at this time, the value of the drive voltage pulse D ₁ decreases to V ₃ ′ (code 120) and becomes negative, and the drive voltage pulse is driven by the action of the control voltage pulse G _1. The value of V _LC instantaneously drops to V ₃ ′ (code 120), which is negative and held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V _{3 ′} (code 120) and is negative, and the source of the second transistor is V by the action of the control voltage pulse G _{1 ′. Since} it is connected to _COM ), the value of the drive voltage pulse V _LC rises to V _COM (code0) but has a negative polarity and is held until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₃ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulses G ₁ , G _{1 ′} , drive voltage pulses D ₁ , D _{1 ′,} and V _LC at other time points after the time point A 6 can be easily inferred from the above description.
A dotted line shown in (a) of FIG. 10 is a liquid crystal optical response curve when the simulation drive is performed. In this figure, when the output drive voltage V _LC of the simulator between the time points is V _COM , that is, during this time period, black line scanning is performed on the screen, which is a well-known technique. Can achieve the same effect as inserting a black frame between frames or turning off the backlight between frames, and achieves the purpose of simulating an impulse-type image display of a CRT display on an LCD.
In addition, n shown in the impulse G _{1 ′} portion in the Nth frame in FIG. 10C indicates n pulses, which are control voltage pulses G ₁ and G _{1 ′} in the same frame. It is shown that there is a time difference between n scanning lines. That is, when viewed from the perspective of the pixels, after the first one in G ₁ pulse, unless elapse of n in G ₁ pulse, indicating that it can not enter another control voltage pulse G _{1 '.} The length of the time interval represented by n can be adjusted appropriately by the designer according to actual needs such as liquid crystal material characteristics, etc., and the black line can be scanned to simulate the impulse-type image display of the CRT display. it can. This is the greatest feature superior to the known technique of the present invention.

A fourth embodiment of the present invention will be described below with reference to FIGS. 11A and 11B and FIGS. 12A to 12D. First, (a) in FIG. 11 shows a pixel array formed by intersections of a plurality of gate lines and data lines of this embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. In FIG. 11, (b) shows a liquid crystal display simulation apparatus of the present embodiment.
Simulation device:
As can be seen from FIGS. 11A and 11B, the liquid crystal display simulation apparatus includes a first input control line (G ₁ ), a second input control line (G _m ), and a first input data line ( D ₁ ), a first capacitor (C _S ), a second capacitor (C _LS ), a drive voltage output line, and a first transistor (Q 1).
Among them, the first capacitor and the second capacitor are grounded, and the drive voltage output line is used to display the image by outputting the simulated drive voltage to the pixels of the LCD.
The input data line is connected to the data driver, the input control line is connected to the gate driver, and the gate driver outputs the output enable (OE) input line and the start horizontal pulse (STH). A drive voltage pulse that is provided by an input line and receives a related signal through these input lines to generate synchronous control voltage pulses G1 and Gm of the input control line, and is supplied to the gate of the transistor through the input control line. The V _LC is to simultaneously generate two synchronous scanning lines separated by m scanning lines from each other on the screen to display an image.
Simulation method:
The driving method of the liquid crystal display simulation apparatus according to the fourth embodiment of the present invention will be described below. It has the following steps:
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the first transistor (Q1);
OE and STH control signals are provided to the gate driver to allow the gate driver to generate the synchronization control signals G1 and Gm and provided to the gate of the first transistor (Q1) through the first and second input control lines. Step to make,
When triggered by these synchronization control signals G1, Gm, the circuit feeds a data signal to the drive voltage output line;
Providing an output drive voltage generated in the above steps to a pixel and displaying an image;
Waveform analysis:
The control voltage pulses G ₁ and Gm generated by the simulation apparatus of FIGS. 11A and 11B of the fourth embodiment of the present invention will be described in detail with reference to FIGS. 12A to 12D. The relationship between the driving voltage pulses D ₁ and V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases appear alternately during the control and driving process (that is, the reference voltage V _{COM in} the waveforms of the driving voltage pulses D ₁ and V _LC ). Phenomenon in which positive and negative phases appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the drive voltage pulse D _{1 in} the (N−1) th frame before the time point A1 is V _{1 ′} (code0), which is negative, and the value of the drive voltage pulse V _LC is also V _{1 ′} (code0). ) And negative polarity. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V ₂ becomes (CODE32), a positive polarity by the action of a control voltage pulse G _1, the simulation device The value of the output drive voltage pulse V _LC generated by the above also rises to V ₂ (code 32), becomes positive, and is held until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₁ (code 0), and the value of the drive voltage pulse V _LC is instantaneously caused by the action of the control voltage pulse G _1. Although it falls to V ₁ (code 0) from V ₂ (code 32), it has a positive polarity, and its value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame is started, and at this time, the value of the drive voltage pulse D ₁ decreases to V ₃ ′ (code 120) and becomes negative, and the drive voltage pulse is driven by the action of the control voltage pulse G _1. The value of V _LC instantaneously drops to V ₃ ′ (code 120), which is negative and held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the drive voltage pulse D _{1 ′} is V _{1 ′} (code 0), and the value of the drive voltage pulse V _LC is V ₁ due to the action of the control voltage pulse G _{1 ′. '} It rises to (code 0), but is negative polarity and is held until time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₃ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulse G ₁ , the drive voltage pulse D _1, and V _LC at other time points after the time point A 6 can be easily inferred in light of the above description.
A dotted line shown in (a) of FIG. 12 is a liquid crystal optical response curve when the simulation drive is performed. In this figure, when the output drive voltage V _LC of the simulator between time points is (code 0), that is, during this time period, a black line scan is performed on the screen. The technology can achieve the same effect as inserting a black frame between frames, or turning off the backlight between frames, and achieves the purpose of simulating an impulse image display of a CRT display on an LCD.
In addition, Hsync in FIG. 12C indicates that the control voltage pulses G ₁ and G _m are synchronization signals.
According to the design of this embodiment, the control voltage pulses G ₁ and G _m are synchronous control voltage pulses, and the scanning line generated by the control of G _m and the scanning line generated by the control of G ₁ are m− on the screen. There is one scan line interval, and these two types of scan lines scan on the screen in a synchronous manner.該制relationship between the waveforms of the control voltage pulse G _m and the driving voltage pulses D _1, V _LC, the relationship between the waveforms of the control voltage pulse G _m and the driving voltage pulses D _1, V _LC described above (i.e., in FIG. 12 ( Since it is the same as (a) to (d), a duplicate description will not be given.
The waveform of the drive voltage pulse V _LC output from the above-described simulation apparatus of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, and prevents a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.
What must be particularly emphasized here is that, even if the value of the liquid crystal drive voltage pulse V _LC is positive or negative, if it can achieve the set eye standard, it will eventually This also means that the purpose and effect of overdrive of the liquid crystal optical reaction can be achieved.
In addition, according to the design feature of the present invention, two mutually consecutive control voltage pulses G ₁ ((b) in FIG. 12) and G _m (FIG. 12) in the same frame (for example, the Nth frame). The interval m during (c)) can be adjusted as needed according to the effect and design that are actually desired, and this is an important feature of the present invention and is not present in the related art.

The fifth embodiment of the present invention will be described below with reference to FIGS. 13 (a) and 13 (b) and FIGS. 14 (a) to 14 (e). Both the device of the fifth embodiment and the sixth embodiment described below will be described with reference to FIGS. 13A and 13B, and its purpose is to use the same device with different control methods. This is to explain that different display effects can be achieved on the screen.
First, (a) in FIG. 13 shows a pixel array formed by intersections of a plurality of gate lines and data lines of the fifth embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. In FIG. 13, (b) shows a liquid crystal display simulation apparatus of the present embodiment.
Simulation device:
As can be seen from FIGS. 13A and 13B, the liquid crystal display simulation apparatus includes a first input control line (G ₁ ), a second input control line (G _{m + 1} ), and a third input control. A line (G _{2m + 1} ), a first input data line (D ₁ ), a first capacitor (C _S ), a second capacitor (C _LS ), a drive voltage output line, and a first transistor (Q 1).
The first transistor (Q1) has a gate connected to the first input control line (G ₁ ), the second input control line (G _{m + 1} ), or the third input control line (G _{2m + 1} ), It has a source connected to the input data line (D ₁ ) and a drain connected to the drive voltage output line and two capacitors (C _S , C _LS ) connected in parallel.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting a simulated drive voltage to a pixel of the LCD panel.
The feature is that the input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver starts with the first, second and third output enable (OE) input lines. Two sets of control voltage pulses that have a horizontal pulse (STH) input line, receive a related signal through these input lines, and are synchronized with the outputs of these gate drivers by controlling the OE signals input by these gate drivers. It is selected from the following three sets of control voltage pulses. That is, (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ). Two sets of control voltage pulses (1, 3) or (1, 2) or (2, 3) selected and combined from these three sets of control voltage pulses are the first, 2 or the third input control line is supplied to the gate of the transistor (Q1).
The drive voltage pulse V _LC generated by the control drives the pixels on the screen in a cyclic alternate mode, and generates two scanning lines having an interval of 2m scanning lines simultaneously from the first to the second m + 1 line, Display an image.
Driving method:
The driving method of the simulated driving apparatus for the liquid crystal display according to the fifth embodiment of the present invention will be described below. It has the following steps:
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
Providing OE and STH control signals to the first, second and third OE input lines and STH input lines of the gate driver and receiving related signals through these input lines; By controlling the OE signal input by these gate drivers, two sets of synchronous control voltage pulses are generated at the output terminals of these gate drivers, which are selected from the following three sets of control voltage pulses: (1) ( G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ), which are selected from these three sets of control voltage pulses and combined. A set of control voltage pulses (1,3) or (1,2) or (2,3) is in the cyclic alternation mode, and the gate of these transistors (Q1) through the corresponding first, second or third input control line To be supplied.
The feature is that when triggered by these two sets of synchronous control signals (1,3) or (1,2) or (2,3), this circuit feeds the data signal to the drive voltage output line, and
The output driving voltage generated in the above steps is output to these pixels, and two synchronous scanning lines separated from each other by 2 m scanning lines are started on the screen from the first to (2m + 1) th scanning lines and in the cyclic alternate mode. Occur and display the image.
Waveform analysis:
The control voltage pulses (G ₁ ) generated by the liquid crystal overdrive device shown in FIGS. 13A and 13B according to the fifth embodiment of the present invention will be described in detail with reference to FIGS. 14A to 14E. , G _m ), (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) and the relationship between the waveforms of the drive voltage pulses D ₁ and V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D _{1 in} the (N−1) th frame before the time point A1 is V _{1 ′} (code 0), the value of the driving voltage pulse V _LC is V _{1 ′} (code 0), and the negative polarity It is. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V ₂ becomes (CODE32), by the action of the control voltage pulse G _1, generated by the simulator output The value of the drive voltage pulse V _LC also rises to V ₂ (code 32), becomes positive, and holds it until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₁ (code 0), and the value of the drive voltage pulse V _LC is instantaneously caused by the action of the control voltage pulse G _1. Although it falls to V ₁ (code 0) from V ₂ (code 32), it has a positive polarity, and its value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts, and at this time, the value of the drive voltage pulse D ₁ drops to V ₃ ′ (code 120), and the value of the drive voltage pulse V _LC is obtained by the action of the control voltage pulse G _1. Momentarily drops to V ₃ ′ (code 120), which is negative and held up to time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V _{1 ′} (code 0), and the value of the driving voltage pulse V _LC is V _{1 ′} (by the action of the control voltage pulse G _1. code0) but negative polarity and held until time point A5. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₃ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in control voltage pulses G _{m + 1} and G _{2m + 1} , drive voltage pulses D ₁ and V _LC at other time points after time point A6 can be easily inferred in light of the above description.
A dotted line shown in (a) of FIG. 14 is a liquid crystal optical response curve when the simulation drive is performed. In this figure, when the output drive voltage V _LC of the simulator between time points is (code 0), that is, during this time period, a black line scan is performed on the screen. The technology can achieve the same effect as inserting a black frame between frames, or turning off the backlight between frames, and achieves the purpose of simulating an impulse image display of a CRT display on an LCD.
The waveform of the drive voltage pulse V _LC output from the above-described simulation apparatus of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, and prevents a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.
The purpose of this example is to expand the two synchronous scanning line on the screen, it in FIG. 14 (a), (b) , is like shown in (c), G _1, G _{m + 1} and _{G2m + 1} are synchronous control voltage pulses, and the drive voltage pulse generated by the control generates two sets of scanning lines on the screen, which perform synchronous scanning with an interval of 2m scanning lines. Do.

A sixth embodiment of the present invention will be described below with reference to (a), (b) in FIG. 13 and (a) to (e) in FIG. Both the apparatus of the sixth embodiment and the above-described fifth embodiment are explained using FIGS. 13 (a) and (b), the purpose of which is on the screen with different control methods using the same apparatus. This is to explain that different display effects can be achieved.
First, (a) in FIG. 13 shows a pixel array formed by intersections of a plurality of gate lines and data lines of the sixth embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. In FIG. 13, (b) shows a liquid crystal display simulation apparatus of the present embodiment.
Simulation device:
As can be seen from FIGS. 13A and 13B, the liquid crystal display simulation apparatus includes a first input control line (G ₁ ), a second input control line (G _{m + 1} ), and a third input control. A line (G _{2m + 1} ), an input data line (D ₁ ), a first capacitor (C _S ), a second capacitor (C _LS ), a drive voltage output line, and a first transistor (Q 1).
The first transistor (Q1) has a gate connected to the first input control line (G ₁ ), the second input control line (G _{m + 1} ), or the third input control line (G _{2m + 1} ), and input data. A source connected to the line (D ₁ ) and a drain connected to the drive voltage output line and two capacitors (C _S , C _LS ) connected in parallel.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting a simulated drive voltage to a pixel of the LCD panel.
The feature is that the input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver starts with the first, second and third output enable (OE) input lines. Three sets of control voltage pulses that have a horizontal pulse (STH) input line, receive a related signal through these input lines, and are synchronized with the outputs of these gate drivers by controlling the OE signals input by these gate drivers. Which consists of three sets of control voltage pulses: That is, (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ). These three sets of control voltage pulses are supplied to the gates of these transistors (Q1) through corresponding first, second or third input control lines. When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and the drive voltage pulse V _LC generated by the control drives the pixel. Then, three synchronous scanning lines that are on the screen and separated from each other by m scanning lines are generated to display an image.
Simulation method:
The driving method of the liquid crystal display simulation apparatus according to the sixth embodiment of the present invention will be described below. It has the following steps:
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
Providing OE and STH control signals to the first, second and third OE input lines and STH input lines of the gate driver and receiving related signals through these input lines; The control of the OE signal input by these gate drivers generates two sets of synchronous control voltage pulses at the output terminals of these gate drivers, which are composed of the following three sets of control voltage pulses: (1) ( G _1, G _m), is _{(2) (G m + 1} , G 2m), a _{(3) (G 2m + 1} , G 3m), the three sets of control voltage pulse (1,2,3) It is supplied to the gates of these transistors (Q1) through corresponding first, second or third input control lines.
The feature is that when triggered by these three sets of synchronization control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
The output drive voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated from each other by m scanning lines on the screen, and display an image.
Waveform analysis:
The control voltage pulses (G ₁ , G ₁ ) generated by the simulation device of FIGS. 13A and 13B of the sixth embodiment of the present invention will be described in detail with reference to FIGS. 15A to 15E. _m), is described _{(G m + 1, G 2m} ), the relationship between the waveforms of _{(G 2m + 1, G 3m} ) and the driving voltage pulses D _1, V _LC.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases appear alternately during the control and driving process (that is, the reference voltage V _{COM in} the waveforms of the driving voltage pulse D ₁ and V _LC Phenomenon in which the positive and negative phases alternate with respect to each other).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D _{1 in} the (N−1) th frame before the time point A1 is V _{1 ′} (code 0), the value of the driving voltage pulse V _LC is V _{1 ′} (code 0), and the negative polarity It is. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V ₂ becomes (CODE32), by the action of the control voltage pulse G _1, generated by the simulator output The value of the drive voltage pulse V _LC also rises to V ₂ (code 32), becomes positive, and holds it until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₁ (code 0), and the value of the drive voltage pulse V _LC is instantaneously caused by the action of the control voltage pulse G _1. Although it falls to V ₁ (code 0) from V ₂ (code 32), it has a positive polarity, and its value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts, and at this time, the value of the drive voltage pulse D ₁ drops to V ₃ ′ (code 120), and the value of the drive voltage pulse V _LC is obtained by the action of the control voltage pulse G _1. Momentarily drops to V ₃ ′ (code 120), which is negative and held up to time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V _{1 ′} (code 0), and the value of the driving voltage pulse V _LC is V _{1 ′} (by the action of the control voltage pulse G _1. code0) but negative polarity and held until time point A5. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₃ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC rises instantaneously to V ₃ (code 120) and becomes positive, and this is held until time point A6.
Changes in control voltage pulses G _{m + 1} and G _{2m + 1} , drive voltage pulses D ₁ and V _LC at other time points after time point A6 can be easily inferred in light of the above description.
A dotted line shown in (a) of FIG. 15 is a liquid crystal optical response curve when the simulation drive is performed. In this figure, when the output drive voltage V _LC of the simulator between time points is (code 0), that is, during this time period, a black line scan is performed on the screen. The technology can achieve the same effect as inserting a black frame between frames, or turning off the backlight between frames, and achieves the purpose of simulating an impulse image display of a CRT display on an LCD.
The purpose of this embodiment is to develop three synchronous scanning lines on the screen, as shown in (a), (b) and (c) of FIG. 12, and G ₁ , G _{m + 1} and _{G2m + 1} are synchronous control voltage pulses, and the drive voltage pulse generated by the control generates three sets of scanning lines on the screen, which perform synchronous scanning with an interval of m scanning lines. Do.
Thus, according to the design of this embodiment, G _{m + 1} and G ₁ are synchronous control voltage pulses, and the scanning line generated by the control of G _{m + 1} and the scanning line generated by the control of G ₁ are displayed on the screen. There are m scanning line intervals above, and these two sets of scanning lines scan on the screen in a synchronous manner. That is, scanning starts from the first scanning line and the mth scanning line on the screen. The relationship between the control voltage pulse G _{m + 1} and the waveforms of the drive voltage pulses D ₁ and V _LC is the same as the relationship between the control voltage pulse G ₁ and the waveforms of the drive voltage pulses D ₁ and V _LC (that is, ( Since it is the same as (a) to (e), it will not be repeated.
At the same time as described above, the scanning lines generated on the screen by the corresponding drive voltage pulses generated by the control voltage pulses (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) are respectively synchronized in a synchronous manner. Start scanning down from the (m + 1, 2m + 1) scanning lines on the screen (ie, this embodiment generates three sets of scanning lines on the screen, which are downwards from the first, (m + 1, 2m + 1) scanning lines, respectively. To perform a redundant scan). The relationship between the control voltage pulses (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) and the waveforms of the drive voltage pulses D ₁ , V _LC is the same as the control voltage pulses (G ₁ , G _m ) is the same as the relationship between the waveforms of the drive voltage pulses D ₁ and V _LC (that is, as described in (a) to (e) of FIG. 15), and therefore, redundant description is not performed.
The waveform of the driving voltage pulse V _LC output from the liquid crystal overdrive device of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, so as to prevent a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.

It is a comparison figure of the liquid crystal optical response curve of a CRT display waveform, a liquid crystal display waveform, and a CRT impulse image display simulation. FIG. 3 is a display diagram of a method for simulating a CRT display on a well-known LCD. FIG. 6 is a display diagram of a method for simulating a CRT display on another known technology LCD. FIG. 6 is a display diagram of a method for simulating a CRT display on another known technology LCD. Schematic diagram (a) showing a pixel array composed of intersections of a plurality of gate lines and data lines and a drive circuit composed of a plurality of data drivers and a plurality of gate drivers according to the first embodiment of the present invention, It is a display figure (b) of the simulation apparatus of 1st Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of 1st Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. The schematic diagram (a) which shows the pixel array comprised by the intersection of the several gate line and data line of 2nd Example of this invention, and the drive circuit comprised by several data driver and several gate driver, and this book It is a display figure (b) of the simulation apparatus of 2nd Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of 2nd Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. The schematic diagram (a) which shows the pixel array comprised by the intersection of the some gate line and data line of 3rd Example of this invention, the drive circuit comprised by the some data driver and the some gate driver, and this book It is a display figure (b) of the simulation apparatus of 3rd Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of 3rd Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. Schematic diagram (a) showing a pixel array constituted by intersections of a plurality of gate lines and data lines, and a drive circuit constituted by a plurality of data drivers and a plurality of gate drivers according to the fourth embodiment of the present invention, It is a 4th simulation apparatus display figure (b) of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of the 4th Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. The schematic diagram (a) which shows the drive circuit comprised by the pixel array comprised by the intersection of the some gate line and data line of 5th Example of this invention, and the some data driver and the some gate driver, and this book It is a simulation apparatus display figure (b) of the 5th and 6th Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of 5th Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. It is a corresponding | compatible waveform figure of the control voltage pulse which the simulation apparatus of 6th Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response.

Explanation of symbols

(A) Characteristic curve (b) Characteristic curve A1, A2, A3 Time point A4, A5, A6 Time point Cs Storage capacitor DS Input data line D ₁ Input data line D ₂ Input data line D Input data line D 'Input data line D ₁ 'input data line G ₁ input control line G ₂ input control line G _1' input control line G _m input control line G _{m + 1} input control line G _2m input control line G _{2m + 1} input control line G _3m input control Line V _LC Output drive voltage Q Transistor Q 'Transistor Q ₁ Transistor Q ₂ Transistor Q ₃ Transistor Q ₄ Transistor V _COM Reference voltage

Claims (24)

A first input control line; a second input control line; a first input data line; a second input data line; a first capacitor; a second capacitor; a drive voltage output line; a first transistor; a second transistor; The transistor has a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a first transistor connected to the drain of the second transistor. With a drain,
The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. A second drain formed,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, and each of them simulates a cathode ray tube impulse image display that is grounded.
The first and second input control lines are connected to one gate driver, the first and second input data lines are connected to one data driver,
A cathode ray tube impulse-type image display characterized in that the time difference between the cycle pulse waveforms of the first and second control signals is adjusted to be the time difference between n scanning lines of n pulses. A device to simulate. In a method of simulating a cathode ray tube impulse image display,
A circuit comprising a first input control line, a second input control line, a first input data line, a second input data line, a first transistor, a second transistor, a first capacitor, a second capacitor, and a drive voltage output line Providing steps,
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a first data signal to a source of the first transistor, and when triggered by the first control signal, the circuit feeds the first data signal to a drive voltage output line;
Providing a second data signal to the source of the second transistor, and when triggered by the second control signal, the circuit feeds the second data signal to the drive voltage output line;
A step of outputting an output drive voltage generated by the above steps to a pixel and displaying an image, and a method of simulating a cathode ray tube impulse-type image display comprising the above steps. In the method of simulating the cathode ray tube impulse image display according to claim 2,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) a drive voltage pulse D ₁ of the before, during the N-1 frames of the time point A1 'values of V _1', the and a value V ₁ 'of the driving voltage pulse V _LC, is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time advances to the time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ , and the value of the driving voltage pulse V _LC becomes instantaneous due to the action of the control voltage pulse G _{1 ′.} Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is V ₁ ′, and the value of the drive voltage pulse V _LC rises to V ₁ ′ by the action of the control voltage pulse G _{1 ′.} Is negative and is held until time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously rises to V ₃ and is held until time point A6.
A method of simulating a cathode ray tube impulse image display, characterized by the above. 4. The method for simulating a cathode ray tube impulse image display according to claim 3, wherein when the output drive voltage V _LC of the simulator is (code 0) between the time points, the black line scan is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function of performing a black frame between frames or turning off a backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD A method of simulating impulse image display. First input control line, second input control line, first input data line, second input data line, third input data line, fourth input data line, fifth input data line, first capacitor, second capacitor, Comprising a third transistor, a fourth transistor, a drive voltage output line, a first transistor, a second transistor;
The first transistor is connected to a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a drain of the second transistor. With a first drain
The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. A second drain formed,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded. The drive voltage output line simulates a cathode ray tube impulse-type image display in which the drive voltage is output to the pixel of the LCD panel to display an image. In the device to
The first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to the drains of third and fourth transistors connected in parallel, respectively. The sources of the connected third and fourth transistors are connected to one data driver, their gates are connected to the third and fourth input data lines, respectively, between the cycle pulse waveforms of the first and second control signals. An apparatus for simulating a cathode ray tube impulse image display, wherein the time difference is a time difference between n scanning lines of n pulses and is adjustable. In the liquid crystal display overdrive method,
First input control line, second input control line, first input data line, second input data line, third input data line, fourth input data line, fifth input data line, first transistor, second transistor, Providing a circuit comprising a third transistor, a fourth transistor, a first capacitor, a second capacitor, a drive voltage output line;
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a fifth data signal to the sources of a third transistor and a fourth transistor connected in parallel;
A third data signal is provided to the gate of the third transistor, and a voltage pulse generated at its drain is provided to the source of the first transistor to form the first data signal, which is triggered by the first control signal. The circuit feeds a first data signal to the drive voltage output line when
The fourth data signal is provided to the source of the fourth transistor, and the voltage pulse signal generated by the drain is provided to the source of the second transistor to be used as the second data signal, and the second transistor is used as the second control signal. When triggered, the circuit feeds a second data signal to the drive voltage output line;
A step of outputting an output drive voltage generated in the above steps to a pixel to display an image A method for simulating a cathode ray tube impulse image display comprising the above steps. In the overdrive method of the liquid crystal display of Claim 6,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) a drive voltage pulse D ₁ of the before, during the N-1 frames of the time point A1 'values of V _1', the and a value V ₁ 'of the driving voltage pulse V _LC, is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time advances to the time point A2, at this time, the value of the driving voltage pulse D _{1 ′} becomes V ₁ , and the value of the driving voltage pulse V _LC becomes instantaneous due to the action of the control voltage pulse G _{1 ′.} Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is V ₁ ′, and the value of the drive voltage pulse V _LC rises to V ₁ ′ by the action of the control voltage pulse G _{1 ′.} Is negative and is held until time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously rises to V ₃ and is held until time point A6.
A method of simulating a cathode ray tube impulse image display, characterized by the above. 8. The method of simulating a cathode ray tube impulse image display according to claim 7, wherein when the output drive voltage V _LC of the simulator is (code 0) between each time point, black line scanning is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function of performing a black frame between frames or turning off a backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD A method of simulating impulse image display. A first input control line; a second input control line; a first input data line; a first capacitor; a second capacitor; a drive voltage output line; a first transistor; a second transistor;
The first transistor includes a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a second drain of the second transistor. A first drain connected to the
The second transistor comprises a second gate connected to a second input control line, a grounded second source, and a drain of the first transistor and a second drain connected to a second capacitor and a drive voltage output line,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to a pixel of the LCD panel to display an image. In a device that simulates display,
The first and second input control lines are connected to one gate driver, the first input data line is connected to the data driver,
The time difference between the cycle pulse waveforms of the first and second control signals can be adjusted by adjusting the time difference between n scanning lines of n pulses, and the cathode ray tube impulse image display is simulated Device to do. In a method of simulating a cathode ray tube impulse image display,
Providing a circuit comprising a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, a second transistor;
Providing a first control signal having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal to the gate of the second transistor that is the same as the first control signal except having a cycle pulse waveform and a phase delay;
Providing a first data signal to a source of the first transistor, and when triggered by the first control signal, the circuit feeds the first data signal to a drive voltage output line;
Providing a second data signal to the source of the second transistor, and when triggered by the second control signal, the circuit feeds a ground potential to the drive voltage output line;
A step of outputting an output drive voltage generated by the above steps to a pixel and displaying an image, and a method of simulating a cathode ray tube impulse-type image display comprising the above steps. The method of simulating a cathode ray tube impulse image display according to claim 10,
AC power (AC) is used as a control voltage and drive voltage, and these voltages have a phenomenon in which positive and negative phases appear alternately during the control and drive process. Circulate redundantly in the time sequence of time points A1 to A6, ie
(A) The value of the driving voltage pulse D _{1 in} the (N−1) -th frame before the time point A1 is V ₁ ′, and the driving voltage pulse V _LC is V _{1 ′} due to the ground of the source of the second transistor. a negative polarity, (b) to start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, the simulation device The value of the output drive voltage pulse V _LC generated by the above also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _2, controlled by the action of the voltage pulse G _{1 ',} specifically the value of the driving voltage pulse V _LC moment Although decreases to _{V 1 (V 1 <V 2} ) from V ₂ is positive, its value is retained until the time point A3, the
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′ and is held until the time point A4. (E) After that, when the time point A4 is reached, the value of the drive voltage pulse D _{1 ′} is At V ₃ ′, the value of the drive voltage pulse V _LC rises to V ₁ ′ due to the action of the control voltage pulse G _{1 ′} , but is negative and is held until the time point A5,
If (f) time reaches the time point A5, enters began on N + 2 frames, this time, the value of the drive voltage pulse D ₁ rises to V _3, a positive polarity, the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously increases to V _{3 and} becomes positive, and this is held until time point A6.
A method of simulating a cathode ray tube impulse image display, characterized by the above. 12. The method for simulating a cathode ray tube impulse image display according to claim 11, wherein when the output drive voltage V _LC of the simulator is (code 0) between the time points, black line scanning is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function of performing a black frame between frames or turning off a backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD A method of simulating impulse image display. Comprising a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor;
The first transistor includes a gate connected to the first input control line or the second input control line, a source connected to the first input data line, and a driving voltage output line and two first and second connected in parallel. Having a drain connected to the second capacitor;
Cathode ray tube impulse-type image display in which the first capacitor and the second capacitor are grounded as a storage capacitor and a liquid crystal equivalent capacitor, and the drive voltage output line displays the image by outputting the drive voltage of the simulator to the pixel of the LCD panel. In a device that simulates
An input data line is connected to a data driver, the input control line is connected to a gate driver, and the gate driver has an output enable (OE) input line and a start horizontal pulse (STH) input line. In addition, a related signal is received through these input lines to generate synchronous control voltage pulses G1 and Gm of the input control lines, and two drive voltage pulses generated by the control are separated from each other by m scanning lines on the screen. An apparatus for simulating a cathode ray tube impulse-type image display, wherein the synchronous scanning lines are simultaneously generated to display an image. In a method of simulating a cathode ray tube impulse image display,
Providing a circuit comprising a first input control line, a second input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor;
Providing a data signal having a cycle pulse waveform to the source of the first transistor;
Providing OE and STH control signals to the gate driver to allow the gate driver to generate the synchronization control signals G1, Gm and to provide the gate of the first transistor;
When triggered by these synchronization control signals G1, Gm, the circuit feeds a data signal to the drive voltage output line;
Providing an output drive voltage generated in the above steps to a pixel and displaying an image;
A method of simulating cathode ray tube impulse image display, comprising the above steps. The method of simulating a cathode ray tube impulse image display according to claim 14,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and is negative with the value V ₁ ′ of the driving voltage pulse V _LC .
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D ₁ is V ₁ ′, which is negative, and the value of the drive voltage pulse V _LC becomes V ₁ ′ by the action of the control voltage pulse G _1. Rises but has negative polarity and is held until time point A5,
If (f) time reaches the time point A5, the (N + 2) of the entry to the start of the frame, at this time, the value of the driving voltage pulse D ₁ is increased V _3, and the under the action of the control voltage pulse G _1, drive A method of overdriving a liquid crystal display, characterized in that the value of the voltage pulse V _LC instantaneously rises to V ₃ , which is positive and held until time point A6. 16. The method for simulating a cathode ray tube impulse image display according to claim 15, wherein when the output drive voltage V _LC of the simulator is (code 0) between time points, black line scanning is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function of performing a black frame between frames or turning off a backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD A method of simulating impulse image display. A first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor;
The first transistor includes a gate connected to the first input control line, the second input control line, or the third input control line, a source connected to the first input data line, and a drive voltage output line in parallel with the first transistor. With a drain connected to a capacitor connected to
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to the pixel of the LCD panel to display an image. In the overdrive device of
The first input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver is connected to the first, second and third output enable (OE) input lines and the start horizontal Two sets of control voltage pulses synchronized with the outputs of these gate drivers are provided by controlling the OE signal input to these gate drivers by receiving a related signal through these input lines and having a pulse (STH) input line. The following three sets of control voltage pulses are generated: (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ), And two sets of control voltage pulses (1,3) or (1,2) or (2,3) selected and combined from these three sets of control voltage pulses are cyclically switched. The drive voltage pulses generated by the control are supplied to the gates of these transistors through the corresponding first, second or third input control lines in the mode, driving the pixels on the screen in a cyclic alternating mode, An apparatus for simulating a cathode ray tube impulse image display, wherein two scanning lines having an interval of 2m scanning lines are generated at the same time starting from the 2m + 1 line and an image is displayed. Providing a circuit comprising a first input control line, a second input control line, a third input control line, a first input data line, a transistor, a first capacitor, a second capacitor, and a drive voltage output line, a cycle pulse waveform Providing a data signal to the source of the transistor, providing OE and STH control signals to the first, second and third OE input lines and the STH input line of the gate driver and receiving related signals through these input lines; The control of the OE signal input by these gate drivers generates two sets of control voltage pulses at the output terminals of these gate drivers, which are the following three sets of control voltage pulses: (1) (G ₁ , G _m), combined elected from _{(2) (G m + 1} , G 2m), (3) (G 2m + 1, elected from G _3m), the control voltage pulses of the three pairs A set of control voltage pulses (1,3) or (1,2) or (2,3) is supplied to the gates of these transistors through the corresponding first, second or third input control line in the cyclic alternation mode. Step,
In a method of simulating a cathode ray tube impulse image display comprising the above steps,
When triggered by these two sets of synchronization control signals (1,3) or (1,2) or (2,3), this circuit feeds the data signal to the drive voltage output line, and
The output drive voltage generated in the above steps is output to these pixels, and two synchronous scan lines separated from each other by 2 m scan lines in a cyclic alternate mode starting from the first to (2m + 1) th scan lines on the screen. A method of simulating cathode ray tube impulse image display, characterized in that it generates and displays an image. The method of simulating a cathode ray tube impulse image display according to claim 18,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and the value V ₁ ′ of the driving voltage pulse V _LC is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the driving voltage pulse D ₁ is V ₁ ′, and the value of the driving voltage pulse V _LC is increased to V ₁ ′ by the action of the control voltage pulse G _1. Is negative and is held until time point A5,
If (f) time reaches the time point A5, the (N + 2) of the entry to the start of the frame, at this time, the value of the driving voltage pulse D ₁ is increased V _3, and the under the action of the control voltage pulse G _1, drive A method of overdriving a liquid crystal display, characterized in that the value of the voltage pulse V _LC instantaneously rises to V ₃ , which is positive and is held until time point A4. 20. The method for simulating a cathode ray tube impulse image display according to claim 19, wherein when the output drive voltage V _LC of the simulator is (code 0) between time points, black line scanning is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function, i.e., a simulation function of a cathode ray tube impulse-type image display by an LCD, wherein a black frame is inserted between frames or a backlight is turned off between frames. A method of simulating impulse image display. A first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor;
The first transistor is connected in parallel with the gate connected to the first input control line or the second input control line or the third input control line, the source connected to the input data line, and the drive voltage output line. A drain connected to the first and second capacitors connected,
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line outputs a simulated drive voltage to the pixels of the LCD panel to display an image. In a device that simulates
An input data line is connected to one data driver, an input control line is connected to a gate driver, and the gate driver is connected to a first, second and third output enable (OE) input line and a start horizontal pulse (STH). A start pulse horizontal) input line and receiving a related signal through these input lines, and by controlling the OE signal input by these gate drivers, three sets of control voltage pulses synchronized with the outputs of these gate drivers are generated; It consists of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ) The three sets of control voltage pulses are supplied to the gates of the first transistors through corresponding first, second or third input control lines, and the three sets of synchronous control pulses are supplied. When triggered by the control signal (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and the drive voltage pulse generated by the control drives the pixel and is on the screen. An apparatus for simulating a cathode ray tube impulse-type image display, which generates three synchronous scanning lines separated from each other by m scanning lines and displays an image. Providing a circuit comprising a first input control line, a second input control line, a third input control line, a first input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor;
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
OE and STH control signals are provided to the first, second and third OE input lines and STH input lines of the gate driver, and related signals are received through these input lines. Two sets of synchronous control voltage pulses are generated at the output terminal of the gate driver, which is composed of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m +1} , G _2m ), (3) (G _{2m + 1} , G _3m ), and the first, second or third input control lines to which the three sets of control voltage pulses (1, 2, 3) correspond. Supplied to the gates of these transistors (Q1) through
In a method of simulating a cathode ray tube impulse image display comprising the above steps,
When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
A cathode ray tube characterized in that the output driving voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated by m scanning lines from each other on the screen and display an image. A method of simulating impulse image display. The method of simulating a cathode ray tube impulse image display according to claim 22,
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the driving voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₁ ′, and the value V ₁ ′ of the driving voltage pulse V _LC is negative,
(B) begin entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased to V _2, and the under the action of the control voltage pulse G _1, generated output of the simulator The value of the drive voltage pulse V _LC also rises to V ₂ , becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _1, controlled by the action of the voltage pulse G _1, the driving voltage pulse V _LC values momentarily Although drops below V ₂ to _{V 1 (V 1 <V 2} ) is positive and its value is retained until the time point A3,
(D) Thereafter, the process proceeds to time the time point A3, this time entry starts to the (N + 1) frames, at this time, the value of the drive voltage pulse D ₁ is lowered V ₃ ', and the control voltage pulses G ₁ Due to the action, the value of the drive voltage pulse V _LC instantaneously drops to V ₃ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the drive voltage pulse D ₁ is V ₁ ′, which is negative, and the value of the drive voltage pulse V _LC rises due to the action of the control voltage pulse G ₁ and increases to V ₁ ', but negative polarity, held until time point A5,
If (f) time reaches the time point A5, ingress starts to the (N + 2) frames, the value of the drive voltage pulse D ₁ rises to V _3, by the action of the control voltage pulse G _1, the driving voltage pulse V _{The LC} value rises momentarily to V ₃ , which is positive and holds this up to time point A6.
A liquid crystal display overdrive method characterized by the above. 24. The method for simulating a cathode ray tube impulse image display according to claim 23, wherein when the output drive voltage V _LC of the simulator is (code 0) between the time points, the black line scan is performed on the screen during this time period. A cathode ray tube characterized in that it achieves a better simulation function of performing a black frame between frames or turning off a backlight between frames, that is, a simulation function of cathode ray tube impulse image display by LCD A method of simulating impulse image display.