JP2005317223A - Load commutation inverter arrangement - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a load commutation inverter arrangement which can operate stably without overvoltages, even if a load impedance changes rapidly, and so on. <P>SOLUTION: The inverter arrangement is composed of a forward converter 2 for converting alternating current into direct current, an inverter 4 for converting the direct current converted by this forward converter into alternating current and supplying it to a load coil, a control means 8 for controlling the forward converter, and a voltage detection means for detecting the output voltage of the inverter. The control means is provided with a first voltage controller 83 for controlling the firing phase of the forward converter according to the difference between the detected voltage of the voltage detection means and a first reference voltage 81, and a second voltage controller 88 for calculating and amplifying the difference between the detected voltage of the voltage detection means and a second reference voltage 86, and adds the output of the second voltage controller to the output of the first voltage controller, when the detected voltage of the voltage detection means is larger than the second reference voltage. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an improved load commutated inverter device used for induction heating of a material to be heated such as a metal material.

  Conventionally, as a power conversion device used for induction heating of a heated material such as a metal material, a power factor correction capacitor is connected in parallel to a load coil, and a thyristor of an inverse converter is commutated by this advance voltage. A so-called load commutation type inverter device is used. Since the frequency required for induction heating is a high frequency, a load commutation type inverter device with little loss is suitable for this application. In this case, the forward converter is generally configured to convert the three-phase AC power into DC power and supply the DC power to the single-phase reverse converter via the DC reactor.

In this load commutation type inverter device control method, the firing phase of the forward converter is often controlled so that the output voltage of the inverter device becomes a given voltage reference value. Use control together. When using AC input current control together, compare the control output of the voltage control circuit with the control output of the current control circuit, give priority to the control with the larger control output, and balance the control speed and control accuracy. I've been taking it. Moreover, since the conditions at the time of starting, etc. change with the state of load, the device which tries to continue driving | operation by stable control is also made (refer patent document 1).
Japanese Patent Laid-Open No. 11-26145 (page 3-6, FIG. 1)

In such a load commutation type inverter device, the capacity of the power factor correction capacitor may be several times the capacity of the inverter device. The voltage control circuit and the current control circuit are composed of a first-order lag advance or proportional integration circuit. If the capacity of the power factor correction capacitor is large, the response of the voltage control circuit and the current control circuit is required to operate the device stably. It was necessary to lengthen the time.
By the way, if the load of the load commutation type inverter device is inserted into the inside of the load coil, the load material seen from the inverter device is due to the presence of the magnetic material to be heated in the load coil. The impedance is low impedance.

  However, when the inverter device is started in a state where the material to be heated is not inserted into the load coil, the load impedance becomes high because there is no material to be heated in the load coil. Therefore, when the material to be heated enters or leaves the load coil at a high speed, the impedance change becomes abrupt. At this time, since the response time of the voltage control circuit and the current control circuit is long, the follow-up cannot be performed. For this reason, the output voltage becomes excessive, or the overvoltage protection is activated and the operation cannot be continued.

  The present invention has been made in view of the above, and an object of the present invention is to provide a load commutation type inverter device that can be stably operated without overvoltage even when there is a sudden change in load impedance.

  In order to achieve the above object, a load commutation type inverter device according to the present invention includes a forward converter that converts alternating current into direct current, and converts the direct current converted by the forward converter into alternating current to supply power to a load coil. An inverter, a controller for controlling the forward converter, and a voltage detector for detecting an output voltage of the inverter; the controller detects a voltage detected by the voltage detector and a first voltage A first voltage controller for controlling an ignition phase of the forward converter in accordance with a difference from a reference voltage; and a second voltage for calculating and amplifying a difference between a detection voltage of the voltage detection means and a second reference voltage. A voltage controller is provided, and when the detected voltage of the voltage detecting means is larger than the second reference voltage, the output of the second voltage controller is added to the output of the first voltage controller. It is characterized by.

  ADVANTAGE OF THE INVENTION According to this invention, even if there is a sudden change of load impedance, it becomes possible to provide a load commutation type inverter device that can be stably operated without overvoltage.

Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram of a load commutation type inverter device according to Embodiment 1 of the present invention.

  The three-phase alternating current of the alternating current power source 1 is converted into direct current by the forward converter 2. The obtained direct current is smoothed by a direct current reactor 3 and supplied to an inverse converter 4. The AC output of the inverse converter 4 is supplied to the parallel resonant load 6 including the power factor correction capacitor 61 and the load coil 62 via the starting circuit 5. The start circuit 5 is an auxiliary circuit for smoothly commutating the thyristor of the reverse converter 4 when the reverse converter 4 is started. Further, the material to be heated 7 is configured to be heated by causing eddy current loss by the high frequency magnetic flux generated by the load coil 62. The forward converter 2 is controlled by the control circuit 8. For this control, the output voltage of the inverse converter 4 detected by the voltage detector 9 and the voltage detection circuit 10 is given to the control circuit 8 as a feedback voltage signal.

  Hereinafter, an internal configuration of the control circuit 8 will be described.

  The voltage reference set by the first voltage reference setting circuit 81 is compared with the output of the voltage detection circuit 10 by the first difference circuit 82, and the output is calculated and amplified by the first voltage controller 83, and the adder One input of 84. The output of the adder 84 becomes an input of a phase control circuit 85 that controls the firing phase of the thyristor of the forward converter 2.

  Further, a second voltage reference setting circuit 86 for limiting overvoltage is provided, and the second difference circuit 87 calculates the difference between the output thereof and the output of the voltage detection circuit 10. The output of the second difference circuit 87 is input to the second voltage controller 88, and this output is used as the other input of the adder 84. Here, the second voltage controller 88 is constituted by a circuit having an output limit function so that its output does not become a negative value. The output of the second voltage reference setting circuit 86 is set to a value higher than the output of the first voltage reference setting circuit 81 and lower than the overvoltage protection level of the apparatus, for example, 105% of the rated voltage.

  Next, the operation and effects of the above configuration will be described.

  During normal operation, since the output voltage of the inverse converter 4 is lower than the output of the second voltage reference set value 86, the output of the second difference circuit 87 has a negative value, and therefore the second voltage controller 88. The output of the second voltage controller 88 is set to 0 so that the second voltage controller 88 does not become a negative value. Becomes 0. The output of the first voltage controller 83 and the second voltage controller 88 is input to the adder 84. Since the output of the second voltage controller 88 is 0, the output of the adder 84 is the first output. 1 is equal to the output of the voltage controller 83. The forward converter 2 is controlled by a signal from the first voltage controller 83.

  Next, consider a case where the output voltage of the inverter 4 becomes higher than the output of the second voltage reference set value 86 due to factors such as load fluctuations. At this time, the output of the second difference circuit 87 becomes a positive value, and the output of the second voltage controller 88 is proportional to the output of the second difference circuit 87. Therefore, the output of the adder 84 is a value obtained by adding the output of the second voltage controller 88 to the output of the first voltage controller 83. As a result, the phase control circuit 85 operates so as to delay the firing phase of the forward converter 2, so that the output voltage of the forward converter 2 decreases, and hence the output voltage of the inverse converter 4 also decreases, and the output of the inverse converter 4. Suppresses the voltage from reaching the overvoltage protection level.

  As is clear from the above description, according to the present invention, it is possible to effectively suppress overvoltage caused by load fluctuation or the like. Further, since the output of the second voltage controller 88 is 0 during normal operation, there is no occurrence of an unstable phenomenon that occurs when the response time of the first voltage controller 83 is increased.

  FIG. 2 is a circuit configuration diagram of the load commutation inverter device according to the second embodiment of the present invention. About each part of this Example 2, the same part as each part of the load commutation type inverter apparatus which concerns on Example 1 of FIG. 1 is shown with the same code | symbol, and the description is abbreviate | omitted. The second embodiment is different from the first embodiment in that a current detector 11 and a current detection circuit 12 for detecting the input current of the forward converter 2 are provided, and the current reference set by the output and the current reference setting circuit 89 is used. The difference circuit 90 compares and the current controller 91 performs operational amplification. The output of the current controller 91 and the output of the first voltage controller 83 are input to the high output priority circuit 92, and the high output priority is given. The larger signal input to the circuit 92 is selected and used as one input of the adder 93, and the output of the second voltage controller 88 is used as the other input of the adder 93. The output of 93 is provided to the phase control circuit 85.

  Next, the operation and effects of the above configuration will be described.

  During normal operation, since the output voltage of the inverse converter 4 is lower than the output of the second voltage reference set value 86, the output of the second difference circuit 87 has a negative value, and therefore the second voltage controller 88. Although the output lower limit value is set to 0 so that the second voltage controller 88 does not become a negative value, the output of the second voltage controller 88 is 0. Further, since the output value of the first voltage controller 83 is usually larger than the output of the current controller 91, the output of the high output priority circuit 92 is equal to the output of the first voltage controller 83. The output of the high output priority circuit 92 and the second voltage controller 88 is input to the adder 93. However, since the output of the second voltage controller 88 is 0, the output of the adder 93 is high output priority. It is equal to the output of the circuit 92. Therefore, the forward converter 2 is controlled by the signal of the first voltage controller 83, and the output of the second voltage controller 88 does not contribute to the operation.

  Further, when there is a current fluctuation or the like, the output value of the first voltage controller 83 becomes smaller than the output of the current controller 91, and the output of the high output priority circuit 92 becomes equal to the output of the current controller 91, the reverse conversion is performed. Since the output voltage of the device 4 is lower than the set value of the first voltage reference setting circuit 81, the output of the first difference circuit 82 is a negative value. Similarly, the output of the second voltage controller 88 also attempts to take a negative value, but the output lower limit value is set to 0 so that the second voltage controller 88 does not become a negative value. The output of the second voltage controller 88 is zero. Therefore, the forward converter 2 is controlled by the output of the first voltage controller 83, and the output of the second voltage controller 88 does not contribute to the operation.

  When the output voltage of the inverter 4 becomes higher than the output of the second voltage reference set value 86 due to factors such as load fluctuations, the output of the second difference circuit 87 becomes a positive value, and an output proportional to the input is obtained. . The output of the adder 93 is a value obtained by adding the output of the second voltage controller 88 to the output of the high output priority circuit 92, and this is given to the phase control circuit 85. Since the phase control circuit 85 delays the ignition phase of the forward converter 2 by this signal, the output voltage of the forward converter 2 decreases, the output voltage of the inverse converter 4 also decreases, and the stable operation is achieved without reaching the overvoltage protection level. Can continue.

  As is apparent from the above description, according to the second embodiment, it is possible to suppress current fluctuation and effectively suppress overvoltage caused by load fluctuation or the like. Further, since the output of the second voltage controller 88 is 0 during normal operation, there is no occurrence of an unstable phenomenon that occurs when the response time of the first voltage controller 83 is increased.

  FIG. 3 is a circuit configuration diagram of the load commutation inverter device according to the third embodiment of the present invention. About each part of this Example 3, the same part as each part of the load commutation type inverter apparatus which concerns on Example 2 of FIG. 2 is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment is different from the second embodiment in that an adder 94 is provided which takes the output of the first voltage controller 83 as one input in place of the adder 93, and the output of the second voltage controller 88 is changed. This is that the other input of the adder 94 is used and the output of the adder 94 is given to the high output priority circuit 92.

  As described in the second embodiment, the output of the second voltage controller 88 is 0 during normal operation, and the output of the first voltage controller 83 is larger than the output of the current controller 91. The output of 92 is equal to the output of the first voltage controller 83.

  When the output value of the first voltage controller 83 is smaller than the output of the current controller 91 due to current fluctuation or the like, and the output of the high output priority circuit 92 becomes equal to the output of the current controller 91, the output of the inverse converter 4 Since the voltage is lower than the set value of the first voltage reference setting circuit 81, the output of the second voltage controller 88 does not contribute to the operation as described above.

  When the output voltage of the inverse converter 4 becomes higher than the output of the second voltage reference setting circuit 86 due to factors such as load fluctuation, the output of the second difference circuit 87 becomes a positive value, and an output proportional to the input is obtained. . As the output of the adder 94, a value obtained by adding the output of the second voltage controller 88 to the output of the first voltage controller 83 is input to the high level priority circuit 92.

  Thus, when the output voltage of the inverse converter 4 is high, since the output of the first voltage controller 83 is originally larger than the output of the current controller 91, the output of the high output priority circuit 92 is the output of the adder 94. Is supplied to the phase control circuit 85. As a result, the phase control circuit 85 delays the ignition phase of the forward converter 2, so that the output voltage of the forward converter 2 is lowered, and hence the output voltage of the inverse converter 4 is also lowered. .

  As is apparent from the above description, the third embodiment can effectively suppress overvoltage caused by load fluctuations and the like. Further, since the output of the second voltage controller 88 is 0 during normal operation, there is no occurrence of an unstable phenomenon that occurs when the response time of the first voltage controller 83 is increased.

  FIG. 4 is a circuit configuration diagram of the load commutation inverter device according to the fourth embodiment of the present invention. About each part of this Example 4, the same part as each part of the load commutation type inverter apparatus which concerns on Example 2 of FIG. 2 is shown with the same code | symbol, and the description is abbreviate | omitted. The fourth embodiment is different from the second embodiment in that the adder 92 is removed and the output of the priority circuit 92 is directly supplied to the phase control circuit 85, and the output of the first difference circuit 82 is the third. The output of the voltage controller 95 and the output of the second voltage controller 88 are added by the adder circuit 96, and the output of the adder circuit 96 is used as the lower limit of the first voltage controller 83A. This is the point where the limit value is changed.

  As described in the second embodiment, during normal operation, the output of the second voltage controller 88 is 0, and the output of the first voltage controller 83A is larger than the output of the current controller 91. The output of the circuit 92 is equal to the output of the first voltage controller 83A.

  When the output value of the first voltage controller 83A is smaller than the output of the current controller 91 due to current fluctuation or the like, and the output of the high output priority circuit 92 is the output of the current controller 91, the inverter 4 This is because the output voltage is lower than the set value of the first voltage reference setting circuit 81. As above, the output of the second voltage controller 88 does not contribute to operation.

  Since the same signal is input to the first voltage controller 83A and the third voltage controller 95, the output is basically the same. The lower limit value of the first voltage controller 83A is limited by the output of the adder circuit 96. Under normal conditions, the output of the adder circuit 96 is equal to the output of the third voltage controller 95 as described above. The output of the voltage controller 83A is equal to the output of the first voltage controller 83A when there is no lower limit value limit. Since this signal is larger than the output of the current controller 91, the output of the high output priority circuit 92 is equal to the output of the first voltage controller 83A. Therefore, the forward converter 2 is controlled by the signal of the first voltage controller 83A, and the output of the second voltage controller 88 does not contribute to the operation.

  When the output voltage of the inverse converter 4 becomes higher than the output of the second voltage reference setting circuit 86 due to factors such as load fluctuation, the output of the second difference circuit 87 becomes a positive value, and an output proportional to the input is obtained. . The input of the adder 96 becomes a value obtained by adding the output of the third voltage controller 95 and the output of the second voltage controller 88, and this added output becomes the lower limit value of the first voltage controller 83A. Become. As a result, the output of the first voltage controller 83A is raised to the output value of the adder 96. Thus, when the output voltage of the inverse converter 4 is high, since the output of the first voltage controller 83A is originally larger than the output of the current controller 91, the output of the high output priority circuit 92 is the first voltage. The output of the controller 83A is selected. The output signal of the high output priority circuit 92 is input to the phase control circuit 85, and the phase control circuit 85 thereby delays the ignition phase of the forward converter 2, so that the output voltage of the forward converter 2 decreases and the inverse converter 4 The output voltage also drops, and stable operation is possible without reaching the overvoltage protection level.

  The output voltage of the inverse converter 4 once increased is reduced by the above control operation, the output of the second difference circuit 87 is decreased from a certain value to 0, and the lower limit value of the first voltage controller 83A is reduced. Even if it is sharply reduced, the output of the first voltage controller 83A changes with the original response time of the first voltage controller 83A. Therefore, the change in the output voltage of the inverse converter 4 is compared with the other embodiments. And smooth.

  As is apparent from the above description, the fourth embodiment can also effectively suppress overvoltage caused by load fluctuation or the like. Further, since the output of the second voltage controller 88 is 0 during normal operation, there is no occurrence of an unstable phenomenon that occurs when the response time of the first voltage controller 83A is increased.

  FIG. 5 is a circuit configuration diagram of the load commutation inverter device according to the fifth embodiment of the present invention. About each part of this Example 5, the same part as each part of the load commutation type inverter apparatus which concerns on Example 1 of FIG. 1 is shown with the same code | symbol, and the description is abbreviate | omitted. The fifth embodiment is different from the first embodiment in that the control characteristic of the second voltage controller 88A is such that the input value becomes the lower limit and a control element with a first order delay is added. is there.

  With this configuration, when the output of the second difference circuit 87 rises stepwise, the output of the second voltage controller 88A rises instantaneously as the lower limit is pushed up, and vice versa. Even if the output of the second difference circuit 87 is reduced stepwise, the output of the second voltage controller 88A is smoothly reduced with a predetermined time constant due to the first-order lag control characteristics of the second voltage controller 88A. To do.

  According to the fifth embodiment described above, when the reverse converter 4 becomes overvoltage, this is quickly suppressed, and once the overvoltage is suppressed, control voltage divergence is prevented by setting the overvoltage control to a first-order lag characteristic. Thus, it is possible to provide a load commutation type inverter device that enables more stable overvoltage suppression.

  According to the first to fifth embodiments of the present invention, the control constant inside the first voltage controller 83 is not changed and is used as it is, so that the operation reliability is improved. In addition, since the adjustment of the control constant of the first voltage controller 83 and the adjustment of the control constant of the second voltage controller 88 can be performed independently of each other, it is easy to adjust the load on site. A flow type inverter device can be provided.

The block block diagram of the load commutation type inverter apparatus which concerns on Example 1 of this invention. The block block diagram of the load commutation type inverter apparatus which concerns on Example 2 of this invention. The block block diagram of the load commutation type inverter apparatus which concerns on Example 3 of this invention. The block block diagram of the load commutation type inverter apparatus which concerns on Example 4 of this invention. The block block diagram of the load commutation type inverter apparatus which concerns on Example 5 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Forward converter 3 DC reactor 4 Reverse converter 5 Starting circuit 6 Parallel resonance load 61 Power factor improvement capacitor 62 Load coil 7 Material to be heated 8 Control circuit 9 Voltage detector 10 Voltage detection circuit 11 Current detector 12 Current Detection circuit 81 First voltage reference setting circuit 82 First difference circuit 83, 83A First voltage controller 84 Adder circuit 85 Phase control circuit 86 Second voltage reference setting circuit 87 Second difference circuit 88, 88A 2 voltage controller 89 current reference setting circuit 90 difference circuit 91 current controller 92 high output priority circuit 93, 94 addition circuit 95 third voltage controller 96 addition circuit

Claims (6)

A forward converter that converts alternating current to direct current;
An inverse converter that converts the direct current converted by the forward converter into alternating current and feeds the load coil;
Control means for controlling the forward converter;
Voltage detecting means for detecting the output voltage of the inverse converter,
The control means includes
A first voltage controller for controlling an ignition phase of the forward converter according to a difference between a detection voltage of the voltage detection means and a first reference voltage;
A second voltage controller for calculating and amplifying a difference between a detection voltage of the voltage detection means and a second reference voltage;
When the detected voltage of the voltage detecting means is greater than the second reference voltage, the output of the second voltage controller is added to the output of the first voltage controller. Flow type inverter device. A forward converter that converts alternating current to direct current;
An inverse converter that converts the direct current converted by the forward converter into alternating current and feeds the load coil;
Control means for controlling the forward converter;
Voltage detection means for detecting an output voltage of the inverse converter;
A current detecting means for detecting an input current of the forward converter;
The control means includes
A first voltage controller for calculating and amplifying a difference between a detection voltage of the voltage detection means and a first reference voltage;
A current control circuit for calculating and amplifying a difference between a detection current of the current detection means and a reference current;
A high output priority circuit that compares the output of the voltage control circuit and the output of the current control circuit to select the larger signal and determine the firing phase of the forward converter;
A second voltage controller for calculating and amplifying the difference between the detection voltage of the voltage detection means and the second reference voltage;
A load commutation type wherein the output of the second voltage controller is added to the output of the high output priority circuit when the detection voltage of the voltage detection means is greater than the second reference voltage. Inverter device. A forward converter that converts alternating current to direct current;
An inverse converter that converts the direct current converted by the forward converter into alternating current and feeds the load coil;
Control means for controlling the forward converter;
Voltage detection means for detecting an output voltage of the inverse converter;
A current detecting means for detecting an input current of the forward converter;
The control means includes
A first voltage controller for calculating and amplifying a difference between a detection voltage of the voltage detection means and a first reference voltage;
A current control circuit for calculating and amplifying a difference between a detection current of the current detection means and a reference current;
A high output priority circuit that compares the output of the voltage control circuit and the output of the current control circuit to select the larger signal and determine the firing phase of the forward converter;
A second voltage controller for calculating and amplifying the difference between the detection voltage of the voltage detection means and the second reference voltage;
When the detected voltage of the voltage detecting means is greater than the second reference voltage, the output of the second voltage controller is added to the output of the first voltage controller. Flow type inverter device. A forward converter that converts alternating current to direct current;
An inverse converter that converts the direct current converted by the forward converter into alternating current and feeds the load coil;
Control means for controlling the forward converter;
Voltage detection means for detecting an output voltage of the inverse converter;
A current detecting means for detecting an input current of the forward converter;
The control means includes
A first voltage controller that amplifies and amplifies the difference between the detection voltage of the voltage detection means and the first reference voltage, and has a lower limit value;
A current control circuit for calculating and amplifying a difference between a detection current of the current detection means and a reference current;
A high output priority circuit that compares the output of the voltage control circuit and the output of the current control circuit to select the larger signal and determine the firing phase of the forward converter;
A second voltage controller for calculating and amplifying a difference between a detection voltage of the voltage detection means and a second reference voltage;
A third voltage controller that computes and amplifies the difference between the detection voltage of the voltage detection means and the first reference voltage, and changes the lower limit value by its output;
When the detection voltage of the voltage detection means is larger than the second reference voltage,
A load commutation type inverter device characterized in that the output of the second voltage controller is added to the output of the third voltage controller.   5. The input / output characteristics according to claim 1, wherein the second voltage controller has an input / output characteristic that responds instantaneously when the input increases, and becomes a delayed response when the input decreases. The load commutation type inverter device described in item 1. 5. The second reference voltage is higher than the first reference voltage and the rated voltage of the inverse converter and lower than an overvoltage protection level of the inverse converter. The load commutation type inverter device described in any one of the above.

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