JP2005316338A5 - - Google Patents
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- JP2005316338A5 JP2005316338A5 JP2004138610A JP2004138610A JP2005316338A5 JP 2005316338 A5 JP2005316338 A5 JP 2005316338A5 JP 2004138610 A JP2004138610 A JP 2004138610A JP 2004138610 A JP2004138610 A JP 2004138610A JP 2005316338 A5 JP2005316338 A5 JP 2005316338A5
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- substrate
- pixel electrode
- liquid crystal
- display device
- crystal display
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Claims (7)
前記信号線の各々と複数のスイッチング素子を介して接続された複数の画素電極とを有する基板を備え、
前記各画素電極と当該各画素電極に接続されていない隣接する信号線との間隔は、前記各画素電極と当該各画素電極に前記各スイッチング素子を介して接続された信号線との間隔より広いことを特徴とする液晶表示装置。 Multiple signal lines,
A substrate having each of the signal lines and a plurality of pixel electrodes connected via a plurality of switching elements;
An interval between each pixel electrode and an adjacent signal line not connected to each pixel electrode is wider than an interval between each pixel electrode and the signal line connected to each pixel electrode via each switching element. A liquid crystal display device.
前記画素電極の各々は前記絶縁層上に形成されており、当該画素電極の各々の一部は、前記絶縁層に形成された各開口を通じて、対応する前記スイッチング素子の各々に接続されていることを特徴とする請求項1に記載の液晶表示装置。 The substrate includes an insulating layer that covers the plurality of signal lines and the plurality of switching elements,
Each of the pixel electrodes is formed on the insulating layer, and a part of each of the pixel electrodes is connected to each of the corresponding switching elements through each opening formed in the insulating layer. The liquid crystal display device according to claim 1.
前記対向電極は、前記画素電極に対向する領域に開口又は突起を有し、
前記基板と前記対向基板との間には負の誘電率異方性を有する液晶層が挟持されていることを特徴とする請求項1乃至5のいずれか一項に記載の液晶表示装置。 A counter substrate disposed opposite to the substrate and having a counter electrode on the substrate side;
The counter electrode has an opening or a protrusion in a region facing the pixel electrode,
The liquid crystal display device according to claim 1, wherein a liquid crystal layer having negative dielectric anisotropy is sandwiched between the substrate and the counter substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004138610A JP4453434B2 (en) | 2004-03-30 | 2004-05-07 | Liquid crystal device and electronic device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004099209 | 2004-03-30 | ||
JP2004138610A JP4453434B2 (en) | 2004-03-30 | 2004-05-07 | Liquid crystal device and electronic device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2005316338A JP2005316338A (en) | 2005-11-10 |
JP2005316338A5 true JP2005316338A5 (en) | 2006-10-19 |
JP4453434B2 JP4453434B2 (en) | 2010-04-21 |
Family
ID=35443811
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004138610A Active JP4453434B2 (en) | 2004-03-30 | 2004-05-07 | Liquid crystal device and electronic device |
Country Status (1)
Country | Link |
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JP (1) | JP4453434B2 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150261276A1 (en) * | 2012-10-19 | 2015-09-17 | Sharp Kabushiki Kaisha | Liquid crystal display device |
KR20150033404A (en) * | 2013-09-24 | 2015-04-01 | 하이디스 테크놀로지 주식회사 | Liquid crystal display device |
KR102010493B1 (en) * | 2015-08-25 | 2019-08-14 | 하이디스 테크놀로지 주식회사 | Liquid crystal display device |
CN106802522B (en) * | 2017-03-10 | 2019-08-13 | 深圳市华星光电技术有限公司 | Thin-film transistor array base-plate and display panel |
JP6862258B2 (en) * | 2017-04-20 | 2021-04-21 | 株式会社ジャパンディスプレイ | Display device |
CN108020970A (en) * | 2017-11-30 | 2018-05-11 | 深圳市华星光电技术有限公司 | Array base palte and liquid crystal display panel |
CN111090203B (en) * | 2020-03-22 | 2020-07-14 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
CN111090204A (en) * | 2020-03-22 | 2020-05-01 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
CN111584514B (en) * | 2020-05-14 | 2022-09-09 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and preparation method thereof |
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2004
- 2004-05-07 JP JP2004138610A patent/JP4453434B2/en active Active
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