JP2005309298A - Device and method for controlling video signal - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent an afterimage from appearing on a display screen when the number of vertical lines of an inputted video signal changes. <P>SOLUTION: When a video signal control device measures the number of vertical lines for a unit frame from an analog video signal and compares the measured number of vertical lines with the reference number of vertical lines, and the number of vertical lines is different from the reference number of vertical lines, the device converts a field size composing the unit frame, and displays the unit frame of the converted field size on a screen. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a video signal control device and a video signal control method.

  When an analog video signal is handled by a digital television receiver, the analog signal is converted into a digital signal, the digital signal is processed, transmitted to a display unit, and displayed on a screen.

  However, when the signal source of the input analog video signal is input from, for example, a video tape recorder, the video playback function of the video tape recorder causes the video to be sent to the digital television receiver with a synchronization signal different from the standard signal. A signal may be input.

  In such a case, the number of vertical lines of the video signal input to the circuit for processing the digital signal of the digital television receiver may change. At that time, the image for each display screen is not updated at all, and the image output to the display screen is processed in the display unit as, for example, a combination of the image and a part of the image one screen before the image, A part of the image one screen before may be displayed as an afterimage on the display screen.

On the other hand, in order to avoid such a phenomenon, for example, in a digital still camera, when the number of input vertical lines changes, a circuit is further provided in the subsequent stage of the circuit that processes the digital signal, and the circuit in the subsequent stage is provided. There has been proposed a complicated method of securing a route for sending a signal to (for example, see Patent Document 1).
Japanese Patent Laid-Open No. 2003-234879 (page 13, FIG. 5)

  An object of the present invention is to prevent an afterimage from being generated on a display screen of a digital television receiver when the number of vertical lines of an analog video signal input to the digital television receiver changes.

  In order to solve the above-mentioned problems, a first aspect of the present invention is a video signal control device, wherein image processing means for image processing a signal digitized from an analog video signal, and the image processed image data A unit for storing the unit frame; a measuring unit for measuring the number of vertical lines of the unit frame in the analog video signal; a comparing unit for comparing the measured number of vertical lines with a reference number of vertical lines; Variable means for converting the size of the field, and sending means for sending the image data to a display unit based on the unit frame in which the size of the field is converted.

  According to a second aspect of the present invention, there is provided a video signal control apparatus, wherein image processing means for image-processing a signal digitized from an analog video signal, and storage means for storing the image-processed image data. Measuring means for measuring the number of vertical lines of the unit frame in the analog video signal, comparing means for comparing the measured number of vertical lines with the number of reference vertical lines, and a predetermined area in a region where the field of the unit frame is insufficient An insertion color designating unit that inserts a color, and a sending unit that sends the image data to a display unit based on the unit frame in which the color is inserted.

  According to a third aspect of the present invention, there is provided an apparatus for controlling a video signal, image processing means for performing image processing on a signal digitized from an analog video signal, and storage means for storing the image processed image data. Measuring means for measuring the number of vertical lines of a unit frame from the analog video signal; comparing means for comparing the measured number of vertical lines with a reference number of vertical lines; and setting a predetermined background color in the field of the unit frame Background color instruction means, superimposing means for superimposing the image data of the unit frame on the background color, and sending means for sending the image data to a display unit based on the unit frame having a background color. It is characterized by.

  A fourth aspect of the present invention is a video signal control method, which is a video signal control method used in a digital television receiver, in which an image processing step of image-processing a signal digitized from an analog video signal And step means for storing the image-processed image data, a measuring step for measuring the number of vertical lines of the unit frame in the analog video signal, and a comparison for comparing the measured number of vertical lines with a reference number of vertical lines A variable step of converting a size of a field constituting the unit frame, and a sending step of sending the image data to a display unit based on the unit frame in which the size of the field is converted. And

  According to the present invention, when the number of vertical lines of the analog video signal input to the digital television receiver changes, the afterimage is generated on the display screen of the digital television receiver by changing the size of the field. Can be prevented.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a block diagram of a video signal control apparatus according to the first embodiment of the present invention. The video signal control device is generally configured as a semiconductor integrated circuit device. The video signal control semiconductor device 10, the A / D conversion circuit 15, and the display unit 14 are installed inside a digital television receiver (not shown).

  As a function of receiving a digital broadcast, a digital television receiver receives a digital video signal from, for example, a satellite receiving antenna (not shown), performs predetermined processing such as tuning and detection, and then performs a video signal control semiconductor device. 10a, and the MPEG decoding circuit 11 performs image compression and the like.

  Further, the image data that has undergone processing such as image compression is converted into image data in field units, and is written and stored in the memory circuit 12. Next, the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13 designates, for example, the number of horizontal pixels and the number of vertical lines input to the display unit 14 such as a liquid crystal display. The conversion process is performed, and finally, the display unit 14 displays the screen.

  On the other hand, the digital television receiver of the present embodiment also supports input of analog video signals from, for example, a VHF antenna (not shown) or a video cassette recorder that has been conventionally used.

  An analog video signal input from a VHF antenna or a video cassette recorder is converted into a digital signal by the A / D conversion circuit 15 and sent to the image processing circuit 16 in the video signal control semiconductor device 10. Further, based on the input analog video signal synchronization signal and the reference clock signal generated inside the digital television receiver, the synchronization circuit 17 in the video signal control semiconductor device 10 performs horizontal scanning from the input synchronization signal. The period is counted and a horizontal synchronization signal is generated. Further, the number of vertical lines is counted based on the horizontal synchronization signal, and a vertical synchronization signal indicating a vertical period is generated.

  In order to synchronize the vertical synchronizing signal and the externally input analog video signal, the synchronizing circuit 17 that generates the vertical synchronizing signal is reset by the synchronizing signal input from the outside, and the timing at which the reset is applied. The reference time is determined, and a timing signal indicating the timing at which the memory circuit 12 should capture the image data is generated, and the signal is sent to the image processing circuit 16. The image processing circuit 16 processes the signal digitized by the A / D conversion circuit 15 as image data, writes it in the memory circuit 12 in units of fields in accordance with the above timing, and stores it in the memory circuit 12.

  The synchronization circuit 17 sends these synchronization signals to the line number detection circuit 18, and the line number detection circuit 18 measures the number of vertical lines of the image data written to the memory circuit 12. The data of the number of vertical lines detected by the line number detection circuit 18 is sent to the first microcomputer 19, and the first microcomputer 19 sends image data to the image processing circuit 16 and the format conversion circuit 13 based on the data. Send control command.

  The subsequent operation is the same as the process of processing the digital video signal described above, and the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13, for example, a liquid crystal display or the like. The number of horizontal pixels and the number of vertical lines to be input to the display unit 14 are designated, conversion processing is performed, and finally the screen is displayed on the display unit 14.

  For example, consider a case where an external input signal to a digital television receiver is output from a video cassette recorder. As shown in the chart of FIG. 2, in the standard reproduction mode, the vertical synchronization signal is generated at a predetermined timing. On the other hand, in the fast playback mode or the rewind mode, the vertical synchronization signal is shifted.

  In a digital television receiver that is based on a digital system and also supports analog video signals, the following problems arise when analog video signals are input in a different cycle from the vertical sync signal during standard playback. In other words, since image data is once written in the memory circuit, a part of the screen one frame before is not updated and may be displayed on the screen as an afterimage.

  In particular, when the vertical sync signal is shortened as in the high-speed playback mode, since the vertical sync period input from the outside is short, a reset is applied with a smaller number of vertical lines than the normal vertical sync period, and new image data is saved. It is captured. At this time, the relatively second half of the previous frame is not updated and is displayed on the screen as an afterimage.

  On the other hand, when the vertical synchronization signal becomes longer as in the rewind mode, since the reset of writing is entered even in the standard vertical period, for example, the display screen has a small number of lines every other field.

  In this embodiment, the number of vertical lines of the actually captured frame is measured by the line number detection circuit 18 and the number is compared with the reference number of vertical lines by the first microcomputer 19. When the number changes from the reference vertical line number, the range to be displayed is controlled by converting the field size by the format conversion circuit, and only the updated image data is always displayed on the screen. FIG. 3 shows the situation as a schematic diagram.

  For example, in the standard case, image data input to the memory circuit is stored from H001 to HE01 in the memory area. The size of the frame is set by the format conversion circuit so that it can be fully displayed on the display screen in the display unit. The next image data input to the memory circuit usually has the same memory capacity, and there is no need to change the frame size setting of the format conversion circuit.

  On the other hand, for example, when the number of vertical lines input to the memory circuit is reduced and image data is reduced and stored from H001 to HC01 in the memory area, the frame size setting in the format conversion circuit can be changed. This is a feature of this embodiment.

  That is, the number of vertical lines of the input image is measured by the line number detection circuit and sent to the first microcomputer. The first microcomputer compares the number of vertical lines with the number of reference vertical lines, and when the number decreases, for example, reads an instruction to change the size of the field constituting the frame from the built-in program, An instruction is sent to the format conversion circuit to perform scaling. Upon receiving the instruction, the format conversion circuit scales the image data, increases the size of the field, and controls the display unit so that it is fully displayed on the screen. Needless to say, it is possible to cope with an increase in image data.

  At this time, if the change in the number of vertical lines is performed in units of one field, it may be erroneously detected, for example, when the tape of the video cassette recorder is damaged. For this reason, the first microcomputer may issue an instruction after detecting a change in the number of vertical lines for a predetermined number of fields.

  For example, if it lasts for 10 field periods, the format conversion circuit scales the scaling of the image data. For example, considering the use of a video cassette recorder, the continuation check of the number of vertical lines is the same when the special mode is entered and when the standard playback is performed, or when the standard playback is performed, Various methods can be used, such as making the time shorter than when shifting to the special mode.

  FIG. 4 shows a program flow of this embodiment, which will be described with reference to FIG.

  For example, an analog video signal input from a video cassette recorder undergoes A / D conversion processing (S11) by the A / D conversion circuit 15 and is converted into a digital signal. Further, a synchronization signal and a timing signal for taking a predetermined timing are generated from the synchronization circuit 17 (S14). The timing signal is sent to the image processing circuit 16, image processing (S12) is performed in accordance with the timing, and digitized image data is stored in the memory circuit 12 (S13).

  At this time, the number of vertical lines of the image data written to the memory circuit 12 is measured by the line number detection circuit 18 (S15), and the line number detection circuit 18 notifies the first microcomputer 19 of the data on the number of lines (S16). ). The first microcomputer 19 compares the number of vertical lines for each frame with the number of reference vertical lines (S17). If there is no change, the first microcomputer 19 sends the format conversion circuit 13 so that the size of the field constituting the frame continues. Instruct (S19).

  On the other hand, when a change occurs in the number of vertical lines, the first microcomputer 19 reads a program for changing the size of the built-in field, calculates the size of the field (S18), and changes the size to the format conversion circuit. 13 is instructed (S20).

  Upon receiving the instruction, the format conversion circuit 13 reads the image data from the memory circuit 12 (S21), scales the image data, and designates the size of the field on the display screen (S22). The screen is displayed on the display unit 14 according to the size of the designated field (S23).

  As described above, when image data is converted into screen display data, the size of the field in the conversion can be made variable so that no afterimage remains on the display screen.

  Further, for example, an afterimage can be prevented from remaining on the display screen even when the input signal changes due to high-speed reproduction such as fast-forwarding or rewinding in a video cassette recorder.

  Furthermore, even when a change in the number of vertical lines due to deterioration of the magnetic tape occurs in the video cassette recorder, it is possible to always display an updated image without capturing afterimages.

  Furthermore, it is possible to cope with a change in the number of vertical lines due to a difference in high-speed playback speed depending on the connected video cassette recorder model.

  FIG. 5 shows a block diagram of a video signal control apparatus according to the second embodiment of the present invention. The video signal control semiconductor device 10a, the A / D conversion circuit 15, and the display unit 14 are installed inside a digital television receiver (not shown).

  In this embodiment, the number of vertical lines in the input image is detected. If the number of vertical lines is smaller than the reference number of vertical lines, the image after the last vertical line is regarded as no image, and the designated color is output in that portion. Is provided with a color designation circuit. Other functions are basically the same as those of the first embodiment.

  As a function of receiving a digital broadcast, a digital television receiver receives a digital video signal from, for example, a satellite receiving antenna (not shown), performs predetermined processing such as tuning and detection, and then performs a video signal control semiconductor device. 10a, and the MPEG decoding circuit 11 performs image compression and the like.

  Further, the image data that has undergone processing such as image compression is converted into image data in field units, and is written and stored in the memory circuit 12. Next, the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13 designates, for example, the number of horizontal pixels and the number of vertical lines input to the display unit 14 such as a liquid crystal display. The conversion process is performed, and finally, the display unit 14 displays the screen.

  On the other hand, the digital television receiver of the present embodiment also supports input of analog video signals from, for example, a VHF antenna (not shown) or a video cassette recorder that has been conventionally used.

  An analog video signal input from a VHF antenna or a video cassette recorder is converted into a digital signal by the A / D conversion circuit 15 and sent to the image processing circuit 16 in the video control semiconductor device 10a. Further, based on the input analog video signal synchronization signal and the reference clock signal generated inside the digital television receiver, the synchronization circuit 17 in the video control semiconductor device 10a performs a horizontal period from the input synchronization signal. And a horizontal synchronizing signal is generated. Further, the number of vertical lines is counted based on the horizontal synchronization signal, and a vertical synchronization signal indicating a vertical period is generated.

  In order to synchronize the vertical synchronizing signal and the externally input analog video signal, the synchronizing circuit 17 that generates the vertical synchronizing signal is reset by the synchronizing signal input from the outside, and the timing at which the reset is applied. The reference time is determined, and a timing signal indicating the timing at which the memory circuit 12 should capture the image data is generated, and the signal is sent to the image processing circuit 16. The image processing circuit 16 processes the signal digitized by the A / D conversion circuit 15 as image data, writes it to the memory circuit 12 in units of fields in accordance with the timing described above, and stores it in the memory circuit 12.

  The synchronization circuit 17 sends these synchronization signals to the line number detection circuit 18, and the line number detection circuit 18 measures the number of vertical lines of the image data written to the memory circuit 12. The data of the number of vertical lines detected by the line number detection circuit 18 is sent to the second microcomputer 19a, and the second microcomputer 19a uses the image processing circuit 16, the color designation circuit 13a and the format conversion based on the data. An image data control command is sent to the circuit 13.

  FIG. 6 shows a block diagram of the color designation circuit 13a. A selector 22 is provided so as to input a specified color before the format conversion circuit 13, and the number of vertical lines specified from the second microcomputer 19 a is input to the comparator 21. If they match, the selector is switched to output a predetermined color from the color designation memory circuit 23. The color designation memory circuit 23 may be provided in the second microcomputer 19a.

  The subsequent operation is the same as the process of processing the digital video signal described above, and the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13, for example, a liquid crystal display or the like. The number of horizontal pixels and the number of vertical lines to be input to the display unit 14 are designated, conversion processing is performed, and finally the screen is displayed on the display unit 14.

  FIG. 7 schematically shows the relationship between the image data and the display screen in this embodiment. In the present embodiment, a display screen portion in which screen data does not exist is displayed as a designated color portion so as to be displayed in a designated predetermined color so that an afterimage of the previous screen is not displayed on the display screen.

  For example, in the standard case, image data input to the memory circuit 12 is stored from H001 to HE01 in the memory area. The size of the frame is set by the format conversion circuit so that it can be fully displayed on the display screen in the display unit. The next image data input to the memory circuit usually has the same memory capacity, and there is no need to change the format such as the frame size setting of the format conversion circuit.

  On the other hand, when the number of vertical lines changes and the image data input to the memory circuit 12 is stored, for example, by decreasing from H001 to HC01 in the memory area, the following is handled.

  That is, the number of vertical lines of the input image is measured by the line number detection circuit 18 and sent to the second microcomputer 19a. The second microcomputer 19a compares the number of vertical lines with the reference number of vertical lines, reads an instruction to form a color designation portion from the built-in program for the amount of image data decreased from H001 to HC01, An instruction is sent to the color designation circuit 13a to fill the area. Upon receiving the instruction, the color designation circuit 13a controls to display a predetermined color on the display screen.

  FIG. 8 shows a program flow diagram of this embodiment, which will be described with reference to FIG.

  The analog video signal input from the video cassette recorder is subjected to A / D conversion processing (S11) by the A / D conversion circuit 15 and converted into a digital signal. Further, a synchronization signal and a timing signal for taking a predetermined timing are generated from the synchronization circuit 17 (S14). The timing signal is sent to the image processing circuit 16, image processing (S12) is performed in accordance with the timing, and digitized image data is stored in the memory circuit 12 (S13).

  At this time, the number of vertical lines of the image data written to the memory circuit 12 is measured by the line number detection circuit 18 (S15), and the line number detection circuit 18 notifies the second microcomputer 19a of the data of the number of vertical lines (S15). S16). The second microcomputer 19a compares the number of vertical lines for each frame with the number of reference vertical lines (S17). If there is no change, the second microcomputer 19a sends the format conversion circuit 13 so that the size of the field constituting the frame continues. Instruct (S20).

  On the other hand, when a change occurs in the number of vertical lines, the color designating circuit 13a identifies an area to be a non-display screen according to an instruction from the second microcomputer 19a (S28), and changes the color of the area to be the non-display screen. Specify (S29).

  Upon receiving the instruction, the format conversion circuit 13 reads the image data from the memory circuit 12 (S21). In this case, the designated color is set for the portion where the screen is not displayed (S22), and the screen is displayed on the display unit 14 (S23).

  As described above, when image data is converted to screen display data, an afterimage can be prevented from remaining on the display screen by filling a region where the image data is not displayed with a specified color. .

  Further, for example, an afterimage can be prevented from remaining on the display screen even when the input signal changes due to high-speed reproduction such as fast-forwarding or rewinding in a video cassette recorder.

  Furthermore, even when a change in the number of vertical lines due to deterioration of the magnetic tape occurs in the video cassette recorder, it is possible to always display an updated image without capturing afterimages.

  Furthermore, it is possible to cope with a change in the number of vertical lines due to a difference in high-speed playback speed depending on the connected video cassette recorder model.

  FIG. 9 shows a block diagram of a video signal control apparatus according to the third embodiment of the present invention. The video signal control semiconductor device 10b, the A / D conversion circuit 15, and the display unit 14 are installed inside a digital television receiver (not shown).

  In this embodiment, a method of displaying a back color and displaying a predetermined image on the back color using a mechanism for outputting the back color will be described. Normally, the back color does not appear on the screen, but, for example, when the number of vertical lines has decreased below the reference number of vertical lines, such as in the high speed playback mode of a video cassette recorder, The vacant screen area is filled with the back color, and an afterimage is not displayed, and the screen can be displayed without extending the image.

  As a function of receiving a digital broadcast, a digital television receiver receives a digital video signal from, for example, a satellite receiving antenna (not shown), performs predetermined processing such as tuning and detection, and then performs a video signal control semiconductor device. 10b, and the MPEG decoding circuit 11 performs image compression and the like.

  Further, the image data that has undergone processing such as image compression is converted into image data in field units, and is written and stored in the memory circuit 12. Next, the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13 designates, for example, the number of horizontal pixels and the number of vertical lines input to the display unit 14 such as a liquid crystal display. The conversion process is performed, and finally, the display unit 14 displays the screen.

  On the other hand, the television receiver of the present embodiment also supports input of analog video signals from, for example, a VHF antenna (not shown) or a video cassette recorder that has been conventionally used.

  An analog video signal input from a VHF antenna or a video cassette recorder is converted into a digital signal by the A / D conversion circuit 15 and sent to the image processing circuit 16 in the video control semiconductor device 10b. Further, based on the input analog video signal synchronization signal and the reference clock signal generated inside the television receiver, the synchronization circuit 17 in the video control semiconductor device 10b determines the horizontal period from the input synchronization signal. Count and generate a horizontal sync signal. Further, the number of vertical lines is counted based on the horizontal synchronization signal, and a vertical synchronization signal indicating a vertical period is generated.

  In order to synchronize the vertical synchronizing signal and the externally input analog video signal, the synchronizing circuit 17 that generates the vertical synchronizing signal is reset by the synchronizing signal input from the outside, and the timing at which the reset is applied. The reference time is determined, and a timing signal indicating the timing at which the memory circuit 12 should capture the image is generated, and the signal is sent to the image processing circuit 16. The image processing circuit 16 processes the signal digitized by the A / D conversion circuit 15 as image data and writes it in the memory circuit 12 in units of fields in accordance with the above timing.

  The synchronization circuit 17 sends these synchronization signals to the line number detection circuit 18, and the line number detection circuit 18 measures the number of vertical lines of the image data written to the memory circuit 12. The data of the number of vertical lines detected by the line number detection circuit 18 is sent to the third microcomputer 19b, and the third microcomputer 19b uses the image processing circuit 16, the format conversion circuit 13, and the superposition based on the data. An image data control command is sent to the circuit 13b.

  FIG. 10 shows a block diagram of the superposition circuit 13b and the third microcomputer 19b. Receiving the data of the number of vertical lines from the line detection circuit 18, the CPU 19c in the third microcomputer 19b instructs the superposition of the background color and the image, and the superposition circuit 13b receives a predetermined color from the background color memory circuit 19d. Pull out the background color.

  The subsequent operation is the same as the process of processing the digital video signal described above, and the image data written in the memory circuit 12 is read out to the format conversion circuit 13, and the format conversion circuit 13, for example, a liquid crystal display or the like. The number of horizontal pixels and the number of vertical lines input to the display unit 14 are designated, conversion processing is performed, the image is superimposed on the background color by the superposition circuit 13b, and finally displayed on the display unit 14.

  FIG. 11 schematically shows the relationship between the image data and the display screen in this embodiment. In the present embodiment, a display screen portion having no screen data is supplemented with a background color.

  For example, in the case of the standard operation, image data input to the memory circuit 12 is stored from H001 to HE01 in the memory area. The size of the frame is set by the format conversion circuit 13 so that it can be fully displayed on the display screen in the display unit. The next image data input to the memory circuit 12 usually has the same memory capacity, and it is not necessary to change the format such as the frame size setting of the format conversion circuit.

  On the other hand, when the number of vertical lines decreases, for example, and the image data input to the memory circuit 12 is stored, for example, by decreasing from H001 to HC01 in the memory area, the following is handled.

  That is, the number of vertical lines of the input image is measured by the line number detection circuit 18 and sent to the third microcomputer 19b. The third microcomputer 19b compares the number of vertical lines with the number of reference vertical lines, and instructs the display of the screen on which the image is arranged from the built-in program for the amount of image data decreased from H001 to HC01. Read, for example, arrange except the top and bottom of the screen. The superposition circuit selects a predetermined color from the background color memory circuit 19d so that the background color is displayed on the entire display screen, and the image data from the format conversion circuit 13 is arranged at the center of the display screen, for example. .

  FIG. 12 shows a program flow diagram of this embodiment, which will be described with reference to FIG.

  The analog video signal input from the video cassette recorder is subjected to A / D conversion processing (S11) by the A / D conversion circuit 15 and converted into a digital signal. Further, a synchronization signal and a timing signal for taking a predetermined timing are generated from the synchronization circuit 17 (S14). The timing signal is sent to the image processing circuit 16, image processing (S12) is performed in accordance with the timing, and digitized image data is stored in the memory circuit 12 (S13).

  At this time, the number of vertical lines of the image data written to the memory circuit 12 is measured by the line number detection circuit 18 (S15), and the line number detection circuit 18 notifies the third microcomputer 19b of the data of the number of vertical lines (S15). S16). The third microcomputer 19b compares the number of vertical lines for each frame with the number of reference vertical lines (S17). If there is no change, the third microcomputer 19b sends the format conversion circuit 13 so that the size of the field constituting the frame continues. Instruct (S20).

  On the other hand, if there is a change in the number of vertical lines, the superimposing circuit 13b sets an area of the display screen according to an instruction from the third microcomputer 19b (S38), and further specifies a background color of the screen (S39). .

  Upon receiving the instruction from the third microcomputer 19b, the format conversion circuit 13 reads the image data from the memory circuit 12 (S21). In the superposition circuit 13b, a predetermined display format is set (S22), and a screen is displayed on the display unit 14 (S23).

  As described above, by setting a background color and superimposing image data on the background color, it is possible to prevent the occurrence of afterimages on the display screen.

  Further, for example, an afterimage can be prevented from remaining on the display screen even when the input signal changes due to high-speed reproduction such as fast-forwarding or rewinding in a video cassette recorder.

  Furthermore, even when a change in the number of vertical lines due to deterioration of the magnetic tape occurs in the video cassette recorder, it is possible to always display an updated image without capturing afterimages.

  Furthermore, it is possible to cope with a change in the number of vertical lines due to a difference in high-speed playback speed depending on the connected video cassette recorder model.

  Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

  For example, when the number of vertical lines changes, the display screen may continue to change if a countermeasure is taken so that no afterimage remains immediately. Therefore, when the amount of change is small, a method may be used in which the screen is changed if measurement is performed for a certain period of time and the same number of vertical lines continues for the certain period of time.

  For example, when the amount of change is large, it is changed after measuring for a certain time, and thereafter, it is measured for a longer time, so that the number of vertical lines is the same as when the amount of change is small.

  In addition, when the change width of the number of vertical lines changes relatively greatly, or when it does not become a stable value even if measured for a certain period of time, it is not treated as a video signal, and the video is not projected, so that the display screen due to the afterimage is displayed. The change may be eliminated.

  Further, the present invention can be configured as described in the following supplementary notes.

  Supplementary note 1 is a video signal control method used in a digital television receiver, in which an image processing step of image-processing a signal digitized from an analog video signal and a storage step of storing the image-processed image data A measurement step of measuring the number of vertical lines of the unit frame in the analog video signal, a comparison step of comparing the measured number of vertical lines with the number of reference vertical lines, and a predetermined area in a region where the field of the unit frame is insufficient A video signal control method comprising: an insertion color designating step for inserting a color; and a sending step for sending the image data to a display unit based on the unit frame in which the color is inserted.

  Supplementary note 2 is a video signal control method used in a digital television receiver, in which an image processing step of image-processing a signal digitized from an analog video signal, and a storage step of storing the image-processed image data A measurement step of measuring the number of vertical lines of a unit frame from the analog video signal, a comparison step of comparing the measured number of vertical lines with the number of reference vertical lines, and a predetermined background color in the field of the unit frame A background color indicating step to be installed; a superimposing step of superimposing the image data of the unit frame on the background color; and a sending step of sending the image data to a display unit based on the unit frame having a background color. And a video signal control method.

  The video signal control method according to claim 3, wherein the insertion color designation step is performed after the comparison step is performed a plurality of times.

  The video signal control method according to claim 4, wherein a background color instruction step is performed after the comparison step is performed a plurality of times.

  As a supplementary note 5, a digital television having any one of the video signal control devices according to claim 1, claim 2, and claim 3.

  Further, the video signal control device of the present invention is not limited to the semiconductor device shown in each of the above embodiments, and other types of digital television receivers having the configuration described in the claims are also included. It is included.

The block block diagram of the principal part in the 1st Example of the apparatus for video signal control by this invention. 3 is a timing chart for generating a synchronization signal in the first embodiment of the apparatus for controlling video signals according to the present invention. The schematic diagram of the plane which shows the scaling by the format conversion circuit in the 1st Example of the apparatus for video signal control by this invention. The flowchart which shows the operation | movement procedure of the signal processing in the 1st Example of the apparatus for video signal control by this invention. The block block diagram of the principal part in the 2nd Example of the apparatus for video signal control by this invention. The circuit block block diagram which shows the principal part of the color designation circuit in the 2nd Example of the apparatus for video signal control by this invention. The schematic diagram of the plane which shows the painting by the color designation circuit in the 2nd Example of the apparatus for video signal control by this invention. The flowchart which shows the operation | movement procedure of the signal processing in the 2nd Example of the apparatus for video signal control by this invention. The block block diagram of the principal part in the 3rd Example of the apparatus for video signal control by this invention. The circuit block block diagram which shows the principal part of the microcomputer in the 3rd Example of the apparatus for video signal control by this invention. FIG. 10 is a schematic plan view showing image data area setting by an overlay circuit in a third embodiment of the video signal control apparatus according to the present invention. The flowchart which shows the operation | movement procedure of the signal processing in the 3rd Example of the apparatus for video signal control by this invention.

Explanation of symbols

10, 10a, 10b Video signal control semiconductor device 11 MPEG decoding circuit 12 Memory circuit 13 Format conversion circuit 13a Color designation circuit 13b Superposition circuit 14 Display unit 15 A / D conversion circuit 16 Image processing circuit 17 Synchronization circuit 18 Number of lines detection Circuit 19 First microcomputer 19a Second microcomputer 19b Third microcomputer 19c CPU
19d Background color memory circuit 21 Comparison circuit 22 Selector 23 Color designation memory circuit

Claims (5)

Image processing means for image processing of a digitized signal from an analog video signal;
Storage means for storing the image processed image data;
Measuring means for measuring the number of vertical lines of a unit frame in the analog video signal;
A comparison means for comparing the measured number of vertical lines with a reference number of vertical lines;
Variable means for converting the size of the field constituting the unit frame;
An apparatus for controlling a video signal, comprising: sending means for sending the image data to a display unit based on the unit frame in which the size of the field is converted. Image processing means for image processing of a digitized signal from an analog video signal;
Storage means for storing the image processed image data;
Measuring means for measuring the number of vertical lines of a unit frame in the analog video signal;
A comparison means for comparing the measured number of vertical lines with a reference number of vertical lines;
Insertion color designation means for inserting a predetermined color into an area where the field of the unit frame is insufficient,
An apparatus for controlling a video signal, comprising: sending means for sending the image data to a display unit based on the unit frame in which a color is inserted. Image processing means for image processing of a digitized signal from an analog video signal;
Storage means for storing the image processed image data;
Measuring means for measuring the number of vertical lines of a unit frame from the analog video signal;
A comparison means for comparing the measured number of vertical lines with a reference number of vertical lines;
Background color instruction means for setting a predetermined background color in the field of the unit frame;
Superimposing means for superimposing the image data of the unit frame on the background color;
An apparatus for controlling a video signal, comprising: sending means for sending the image data to a display unit based on the unit frame having a background color. A video signal control method used in a digital television receiver,
An image processing step for image processing of a digitized signal from an analog video signal;
Means for storing the image processed image data;
A measurement step of measuring the number of vertical lines of a unit frame in the analog video signal;
A comparison step of comparing the measured number of vertical lines with a reference number of vertical lines;
A variable step of converting the size of the field constituting the unit frame;
A video signal control method comprising: a transmission step of transmitting the image data to a display unit based on the unit frame in which the size of the field is converted.   The video signal control method according to claim 4, wherein the variable step is performed after the comparison step is performed a plurality of times.

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