JP2005302907A - Inductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inductor capable of increasing an inductance value without enlarging inductor itself and capable of being simply manufactured. <P>SOLUTION: A first metallic pattern composed of a plurality of metallic pattern pieces is arranged and formed spirally on a main substrate. Then, a second metallic pattern composed of a plurality of the metallic pattern pieces is arranged and formed spirally on a sub-substrate. A structure is formed in which the first metallic pattern and the second metallic pattern are arranged spirally from the top face of the main substrate, while being spirally connected along the disposal of the spiral shape by alternately connecting the first metallic pattern and the second metallic pattern. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an inductor, and more particularly to an inductor having a small occupation area and a high inductance value.

  In radio equipment for high-frequency circuits, a spiral inductor is flip-chip mounted on a main substrate on which a microstrip line, a coplanar line, and the like are formed in order to reduce the size, thickness, and cost of the device. FIG. 4 is a perspective view of this type of spiral inductor, in which a chip inductor 102 is flip-chip mounted on a main substrate 101 on which a microstrip line is formed. The chip inductor 102 includes a rectangular spiral pattern 103 on a substrate, and the spiral pattern 103 is connected to two input / output terminals 105 on the main substrate 101 by bumps 104. The substrate is indicated by a broken line.

  This type of chip inductor 102 used in radio equipment for high-frequency circuits is required to have a high inductance value as the chip itself becomes smaller. In order to obtain a high inductance value, the number of turns of the spiral pattern 103 may be increased. However, if the number of turns is increased while keeping the line width of the spiral pattern and the dimension between the patterns constant, the occupied area of the spiral pattern 103 increases, and the area of the chip inductor 102 increases, which is mounted. There is a problem that the radio equipment for the high-frequency circuit itself is also increased in size. On the other hand, miniaturization of pattern line width and pattern dimension has a certain limit in production technology.

On the other hand, in a multilayer inductor, a coil body in which a metal pattern is spirally connected is built in a chip body (laminated body), and a method of forming a multilayer body that is a chip body and a lead conductor is also proposed (Patent Document 1). . However, a multilayer inductor is formed by a manufacturing method such as a sheet lamination method in which metal patterns are stacked on an insulating sheet such as a ceramic, or a printing lamination method (screen printing) in which an insulating paste and a conductive paste are alternately applied. However, both have the problem that the manufacturing process increases and the production cost increases. Further, when the number of stacked layers is increased, there is a problem that a problem such as a pattern shift occurs.
JP 2003-332129 A

  In the conventional inductor, in order to obtain a high inductance value, it is necessary to increase the number of turns of the spiral pattern. However, when the number of turns is increased, there is a problem that the inductor and a device for mounting the inductor are increased in size. In addition, the method of forming a spiral coil in a multilayer inductor has a problem that the manufacturing process is complicated and the production cost increases. An object of the present invention is to provide an inductor that can increase the inductance value without enlarging the inductor itself and can be easily manufactured.

  In order to achieve the above object, an inductor according to the present invention has a main board having a first metal pattern made of a plurality of metal pattern pieces, a sub board having a second metal pattern made of a plurality of metal pattern pieces, and the main board. A metal pattern piece of the second metal pattern is connected in series to each of two input / output terminals formed on either the substrate or the sub-board and both ends of at least one metal pattern piece of the first metal pattern. The metal pattern piece of the first metal pattern, the metal pattern piece of the second metal pattern, and the bump between the input / output terminals as viewed from the upper surface of the main substrate. It is arranged in a spiral shape and is connected in a spiral shape along the spiral arrangement.

  In the inductor according to the present invention, when a current is passed through a single spiral conductor arranged in a spiral shape, magnetic lines of force are formed in the direction perpendicular to the main substrate, and in addition to that, the spiral conductors follow the spiral arrangement. Magnetic field lines are also formed in the direction. As a result, a large magnetic force can be generated compared to the conventional structure, and a large inductance value can be obtained. Furthermore, since it is not what is arrange | positioned spirally through a dielectric film, a parasitic capacitance becomes small.

  The inductor according to the present invention can be easily formed by connecting the metal pattern pieces formed on the main substrate and the sub-substrate on each of the main board and the sub-board by bumps. Compared to this, it is very simple, and the manufacturing cost can be kept low.

  In the inductor of the present invention, the conductor line is formed in a spiral structure along the spiral pattern in order to increase the inductance value without changing the size of the chip inductor. Details will be described below.

  FIG. 1 is a perspective view of an inductor according to an embodiment of the present invention. FIG. 2 is a plan view of a mounting surface (a side to be connected to each other) of the main substrate 1 and the chip inductor 2 (sub-substrate) of the inductor shown in FIG. As shown in FIG. 2, a first metal pattern 3 in which a plurality of metal pattern pieces are spirally arranged and two input / output terminals 4 are formed on the main substrate 1. A second metal pattern 5 in which a plurality of metal pattern pieces are arranged in a spiral shape is formed on the surface of the chip inductor 2. On the second metal pattern 5, bumps 6 for connecting to the first metal pattern 3 and the input / output terminals 4 on the main substrate 1 are formed. When viewed from the upper surface of the main substrate 1, the conductor line constituted by the first metal pattern 3, the second metal pattern 5, and the bump 6 is connected between the two input / output terminals 4 and arranged in a spiral shape. Furthermore, a spiral structure is formed along this spiral arrangement.

  The material of the main substrate 1 and the chip inductor 2 (sub-substrate) may be, for example, a semiconductor substrate having an insulating film formed on its surface in addition to an insulating substrate made of alumina or glass.

  The first metal pattern 3 is formed, for example, by forming a copper film with a thickness of about 4.5 μm on the surface of the main substrate 1 by vacuum deposition or sputtering, patterning it to a desired shape, and then applying gold plating to the surface. Can be formed.

  The second metal pattern 5 is formed in a desired shape by forming a copper film on the surface of the sub-substrate on the surface of the sub-substrate by vacuum deposition or sputtering to a thickness of about 4.5 μm, as in the case of the first metal pattern 3. After patterning, it can be formed by a method in which the surface is further plated with gold. Further, bumps 6 are formed on the second metal pattern 5. The bump 6 can be formed by patterning a photoresist so as to open a bump formation scheduled region and performing gold plating in the opening in accordance with a normal bump electrode forming method of a semiconductor device. In this example, the bumps 6 are formed on the second metal pattern 5, but may be formed on the first metal pattern 3.

  The main substrate 1 and the chip inductor 2 can be connected by a so-called flip chip mounting method. The main substrate 1 and the chip inductor 2 are stacked so as to face a predetermined position indicated by a dotted line in FIG. The first metal pattern 3 and the second metal pattern 5 are connected via the bumps 6.

  FIG. 3 shows specific dimensions of the main substrate 1 and the chip inductor 2 of the inductor according to the embodiment of the present invention shown in FIG. The spiral shape was such that the first metal pattern 3 on the main substrate and the second metal pattern 5 on the chip inductor 2 both had a line width of 100 μm and a line spacing of 50 μm, and the bumps 6 had a width and height of 20 μm. The spiral shape is formed in a range of 800 μm × 800 μm as shown in the figure, and a conductor having a spiral spiral structure joined by the bump 6 is formed. The dimensions of the spiral spiral conductor viewed from the upper surface of the main substrate 1 are the same as the spiral pattern of the conventional example of FIG. 4, and the size, thickness, and input / output terminal dimensions of the other metal pattern are formed. Etc. were formed in the same manner as the conventional example, and the inductance values were compared. As a result, it was confirmed that the inductance value of the present invention was 2.3 nH while the conventional example shown in FIG. 4 was 2.1 nH, and the inductance value per unit area was increased. The dielectric constant of the main substrate 1 was 9.9, and the dielectric constant of the chip inductor 2 was 3.9.

  The dimensions shown in FIG. 3 are shown in order to compare the inductance values of the conventional example and the present invention, and are not optimal dimensions for obtaining a high inductance value, but are appropriately changed to obtain a desired inductance value. There is a need to.

It is a perspective view of the inductor which concerns on the Example of this invention. It is a top view of the main board | substrate of the inductor which concerns on the Example of this invention, and a chip inductor. FIG. 3 is a dimension diagram of the main substrate and the chip inductor shown in FIG. 2. It is a perspective view which shows an example of the conventional inductor.

Explanation of symbols

1: main substrate, 2: chip inductor, 3: first metal pattern, 4: input / output terminal, 5: second metal pattern, 6: bump

Claims (1)

A main board comprising a first metal pattern comprising a plurality of metal pattern pieces;
A sub-board comprising a second metal pattern comprising a plurality of metal pattern pieces;
Two input / output terminals formed on either the main substrate or the sub-substrate;
And at least two bump electrodes for connecting the metal pattern pieces of the second metal pattern in series to both ends of at least one metal pattern piece of the first metal pattern,
Between the input / output terminals, the metal pattern piece of the first metal pattern, the metal pattern piece of the second metal pattern, and the bump are arranged in a spiral shape when viewed from the upper surface of the main substrate, and the spiral An inductor characterized by being connected in a spiral shape along an arrangement of the shape.

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