JP2005294693A - High frequency module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency module which can expect a high isolation effect with a low cost. <P>SOLUTION: In the high frequency module, a region 1 on which a semiconductor chip is to be mounted is provided on a surface of a metallic module casing 3. In the region 1, a recess region 2 of a rectangular parallelopiped shape is provided and an edge region 4 is left. The recessed region 2 is obtained by cutting the metallic module casing 3 or by another method to remove part thereof. The semiconductor chip is mounted into the region 1 of a structure having the recessed region having air or a dielectric material filled therein. The region having the recessed and projected parts of the semiconductor chip has a part connected with the surface of the casing 3 and a part not connected therewith. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a high frequency module.

  The present invention relates to a high-frequency module having a semiconductor integrated circuit chip as a constituent element, and more particularly to a high-frequency module to which a high-frequency signal isolation technique is applied in a millimeter-wave band semiconductor integrated circuit chip.

  This phenomenon is particularly remarkable in a semiconductor chip that operates in a millimeter wave band of about 30 GHz or more, but a high-frequency signal leaking from a circuit on the semiconductor chip to the inside of the semiconductor substrate does not attenuate much over the long distance inside the semiconductor substrate. There is a problem that the original function of the semiconductor chip is impaired by interfering with another circuit on the same semiconductor chip.

  Even at frequencies sufficiently lower than 30 GHz, there is an interference problem similar to the above. However, considering that the cause is mainly due to capacitive coupling, unlike the millimeter wave band, an isolator that is particularly effective in the millimeter wave band. Therefore, there is a need for a technique for preventing interference of high-frequency signals through a semiconductor substrate.

Next, interference through the semiconductor substrate in the millimeter wave band will be described in more detail. A semiconductor substrate is generally a dielectric, and its relative dielectric constant has a relatively large value such as 11.7 in the case of Si, 12.0 in the case of GaAs, and 12.1 in the case of InP. On the other hand, if the semiconductor chip is regarded as one rectangular waveguide made of a dielectric, the cutoff frequency in the TE ₁₀ mode (fundamental mode) having the lowest cutoff frequency propagating inside the waveguide is:
f _c = c / 2a ………………………… (1)
It is expressed. Where c = (εμ) ^−0.5 is the speed of the electromagnetic wave in the dielectric, ε is the dielectric constant of the semiconductor, μ is the magnetic permeability of the semiconductor, and a is the length of the longer side of the rectangular waveguide. is there. Approximately 20~40GHz Substituting the value carried typical semiconductor chip on expression for f _c it is seen that the cut-off frequency.

  A semiconductor chip having an operation speed of 30 GHz or more is often a compound semiconductor such as GaAs or InP. In these semiconductor chips, since a semi-insulating substrate is used, tan δ representing the loss of high-frequency signals inside the semiconductor substrate is usually well below 0.01. That is, it can be seen that in a semiconductor chip manufactured using these compound semiconductors, a high-frequency signal of several tens of GHz or more can easily propagate inside the substrate and is transmitted without being attenuated far.

The problem of interference becomes apparent not only when a high-frequency signal can propagate inside the semiconductor chip but also when a high-frequency signal leaks from the circuit on the semiconductor chip into the semiconductor chip. A high frequency signal propagating through a coplanar line (CPW) used in an integrated circuit propagates in a pseudo TEM mode, and the efficiency of directly exciting the TE ₀₁ mode inside the semiconductor chip is low. However, since the TEM mode is disturbed in the bent portion of the CPW line, the TE ₀₁ mode inside the semiconductor chip can be excited. Further, the TEM mode disturbance becomes more conspicuous as the width of the CPW line becomes wider. In actual circuits, a wide CPW is used everywhere in order to suppress transmission loss, and the CPW line is bent at a very large portion.

  In addition, when a semiconductor chip is mounted, high-frequency signals are connected between an external circuit and the semiconductor chip, but the symmetry of the line is disturbed at the connection point due to imperfections during assembly or the structure itself. Or, because there is a disturbance of characteristic impedance, unnecessary electromagnetic radiation is likely to occur. In a semiconductor chip having a plurality of ports for high-frequency signals, high isolation between ports is necessary, and therefore interference between ports due to propagation inside the semiconductor substrate often becomes a problem.

  As a method usually used for preventing the above-mentioned interference problem, a method of forming a via generally used for a dielectric substrate is first considered (see Patent Documents 1 to 3 below). In this method, the front and back surfaces of the semiconductor chip are connected in as many places as possible, and the isolation frequency is improved by moving the cutoff frequency to the high frequency side. By forming conductive vias with high density, the inside of the semiconductor substrate is partitioned into several small areas surrounded by metal. Therefore, when the semiconductor substrate is regarded as a waveguide, the waveguide is effectively cut off. The area is reduced, and the cutoff frequency moves to the high frequency side. Although this method can improve isolation over a wide band from direct current to the cutoff frequency, there are complicated via formation steps and circuit formation problems. This will be described below.

When forming a via, a metal thin film is also formed on the back surface of the semiconductor chip, so that it is necessary to perform a back surface metallization process. In addition, since there is a limit that depends on the drilling method in the thickness of the semiconductor substrate that can open the via, it is necessary to thin the semiconductor substrate by polishing the back surface in advance, and metal filling processing to the formed via is necessary. I need it. A characteristic value of the thickness of the semiconductor substrate after the back surface polishing is 100 μm. The interval and number of vias are determined depending on the required cutoff frequency. In order to obtain a cutoff frequency sufficiently higher than the operating frequency of the semiconductor chip, it is a guideline when considering the value of a in Equation (1) as the interval between vias. For example, in the case of a semiconductor chip operating at 90GHz or less, the _{f c} seeing some margin in the 100GHz is approximately 430μm is required as a value of a. Since the propagation of the high-frequency signal inside the semiconductor chip is two-dimensional, the vias also need to be two-dimensionally arranged at an interval narrower than 430 μm. Although it is easy to arrange the via diameter as small as possible, since the aspect ratio of drilling is generally about 1.0, the diameter of the via is about the same as the thickness of the semiconductor substrate after the backside polishing. That is, 100 μm is a characteristic value. Further, a margin area for connecting the ground of the semiconductor chip and the metal filling the via is necessary around the via, and the area occupied by the via extends to the periphery of several tens of μm from the via diameter of 100 μm. . As described so far, via isolation can be improved over a wide band, but it is necessary to form vias at a very high density to secure isolation up to a high frequency, and the effective area of the semiconductor chip is considerable. You can see that the part is lost by the via.

  As another method for improving the isolation of the semiconductor chip, there is a method using a radio wave absorber (see Patent Documents 4 to 7 below). In this method, a radio wave absorber that absorbs electromagnetic waves in a target frequency band is prepared separately from the semiconductor chip, and the radio wave absorber is disposed so as to approach the front surface, back surface, or side surface of the semiconductor chip. Interference is suppressed by absorbing leaking electromagnetic waves and converting them into Joule heat. In order to efficiently absorb electromagnetic waves, it is important to arrange the radio wave absorber as close to the semiconductor chip as possible. When the circuit is arranged so as to be in contact with the surface of the semiconductor chip on which the circuit is formed, the circuit characteristics deteriorate, so that it is difficult to make it approach too much. In many cases, the above arrangement does not improve the isolation of the semiconductor chip, but rather prevents resonance of electromagnetic waves due to the space (cavity) inside the module in which the semiconductor chip is mounted. When the radio wave absorber is disposed in contact with the back surface of the semiconductor chip, the contact area increases, but there is a problem that the heat dissipation characteristics of the semiconductor chip deteriorate due to the thermal resistance of the radio wave absorber. Although the materials of commercially available radio wave absorbers have not been clarified precisely, the materials required to add radio waves by adding necessary additives to rubbery or resinous materials, and those required for ceramics In addition, there are materials that have an electromagnetic wave absorbing action, and all materials have higher thermal resistance than metals, and are not suitable as heat dissipation materials. For this reason, it is difficult to select a radio wave absorber for a semiconductor chip that requires low thermal resistance, such as a power amplifier. In addition, since the contact area is small when placed in contact with the side surface of the semiconductor chip, it is difficult to obtain good isolation only with this method, and auxiliary means used in combination with some other isolation technology it is conceivable that.

JP 2003-133471 A JP 2000-040895 A JP 2003-224408 A JP-A-8-162559 JP 2000-165084 A JP 2003-298004 A JP 2003-273571 A

  The method of improving isolation by vias requires additional steps such as polishing of the backside of the semiconductor chip, drilling of the vias, backside metallization, and filling of the conductor into the via, and at the same time, part of the effective area of the semiconductor chip is lost. Difficult to place, and in the method using the radio wave absorber, if the radio wave absorber is placed in contact with the backside of the semiconductor chip, the heat dissipation characteristics are likely to deteriorate, and the radio wave absorber is placed in contact with the side surface of the semiconductor chip. In this case, the effect is small, and there is a problem that it is necessary to separately prepare a radio wave absorber having sufficient electromagnetic wave absorption characteristics in the frequency band to be used.

  An object of the present invention is to provide a high-frequency module that solves the above-described problems of conventional methods and that can be expected to have a higher isolation effect at a lower cost.

In the present invention, in order to achieve the above object, as described in claim 1,
In a high-frequency module in which a semiconductor chip is mounted on the surface of a module base, irregularities made of a conductor exist in a region where the semiconductor chip is mounted on the surface of the module base, and the semiconductor chip and the conductor Constitutes a high-frequency module characterized in that it is connected at the concave and convex portions but not at the concave portions.

In the present invention, as described in claim 2,
2. The high frequency module according to claim 1, wherein a space between the semiconductor chip and the conductor in the concave and convex portions is filled with a dielectric.

In the present invention, as described in claim 3,
3. The high-frequency module according to claim 1, wherein the concave and convex portions make a plurality of rectangular regions arranged in a lattice shape or a staggered lattice shape on the surface of the module base lower than the surface of the module base around the region. Thus, a high frequency module is formed.

In the present invention, as described in claim 4,
3. The high-frequency module according to claim 1, wherein the concave and convex portions make a plurality of rectangular regions arranged in a lattice shape or a staggered lattice pattern on the surface of the module base higher than the surface of the module base around the region. Thus, a high frequency module is formed.

In the present invention, as described in claim 5,
5. The high-frequency module according to claim 3, wherein the length of each side of the rectangle and the height difference of the unevenness are the wavelength of the electromagnetic wave in the semiconductor chip having the same frequency as the frequency of the high-frequency signal in the semiconductor chip. The high-frequency module is characterized by being 1/8 or more.

  By implementing the present invention, it is possible to expect a higher isolation effect at a lower cost by making the irregularities made of a conductor present in the region where the semiconductor chip is mounted and reflecting the electromagnetic waves propagating through the semiconductor chip. A high-frequency module can be provided.

  Hereinafter, the present invention will be described by way of embodiments.

[First Embodiment]
FIG. 1 shows a first embodiment. In the figure, there is a region 1 where a semiconductor chip is mounted on the surface of a metal module housing 3 which is a module base, and a rectangular parallelepiped recess region 2 is formed in the region 1 leaving an edge region 4. The metal module housing 3 is removed by a method such as cutting in the region 2 of the concave portion, and the concave portion is filled with air or a dielectric. In this way, irregularities made of a conductor are present in the region 1 where the semiconductor chip on the surface of the metal module housing 3 is mounted. When a semiconductor chip is mounted in the region 1, the semiconductor chip and the conductor are connected to each other at the concave and convex portions and are not connected at the concave portions. As described above, the space between the body and the body is filled with air or a dielectric.

  As a material of the metal module housing 3, any good conductor can be used without depending on the type of metal. For example, brass, copper, copper tungsten, kovar, aluminum, duralumin, etc. and all materials whose surfaces are coated with another good conductor by a method such as plating can be used. Further, even a material other than a conductor can be used as long as the surface is coated with a metal which is a good conductor.

  The principle of the present invention will be described below.

  FIG. 2 shows a cross-sectional structure of a portion where the semiconductor chip 7 is mounted on the metal module housing 3. FIG. 2A shows a case where the metal module housing 3 is uniform and flat. As described in the description of the background art, since the incident wave (Vin) 9 propagates through the semiconductor chip 7 without loss, the transmitted wave (Vt) 10 has the same strength as the incident wave (Vin) 9. . That is, it can be seen that the isolation of the semiconductor chip 7 is bad.

  On the other hand, FIG. 2B shows a case where a discontinuous portion 8 is formed in the metal module housing 3, and this discontinuous portion 8 is generated by filling the heterogeneous region 12 with air or a dielectric. ing. In the place where the discontinuous portion 8 is generated, the boundary condition with respect to the electromagnetic wave changes abruptly so that mismatch occurs, and the incident wave (Vin) 9 is pushed back as the reflected wave (Vr) 11, and only a small part of the transmitted wave is transmitted. Propagate as (Vt) 10. That is, it can be seen that the electromagnetic wave propagating inside the semiconductor chip 7 is prevented from propagating only by the presence of the discontinuous portion 8 in the metal module housing 3.

  FIG. 3 shows a case where the semiconductor chip 7 is actually bonded to the structure shown in FIG. 1, wherein (a) is a plan view seen from above the semiconductor chip 7, and (b) is a cross section aa of (a). It is sectional drawing which showed '. The heterogeneous region 12 is filled with air or a dielectric. In the case of FIG. 3A, the incident wave (Vin) 9 is reflected at the place where the two discontinuous portions 8 are generated, and the high-frequency power of the transmitted wave (Vt) 10 is very small. It can be seen that the isolation of is improved.

  The structure shown in FIG. 4 is a structure in which the material is reversed to that of FIG. 1, and a rectangular parallelepiped convex region 5 is formed in the metal module housing 3, and the semiconductor chip has the convex region 5. It is mounted on the area 1 to be included. In this way, irregularities made of a conductor are present in the region 1 where the semiconductor chip on the surface of the metal module housing 3 is mounted. When a semiconductor chip is mounted in the region 1, the semiconductor chip and the conductor are connected in the concave and convex portion but not in the concave portion, but the concave and convex portion, that is, the periphery of the convex portion region 5. The space between the semiconductor chip and the conductor in the area 6 is filled with air or a dielectric. Also in this case, the isolation of the semiconductor chip is improved by the action of the convex region 5 based on the principle already described.

  In the following embodiment, for the sake of convenience, description will be made based on the structure shown in FIG. 1. However, the structure shown in FIG. The principle improves the isolation of the semiconductor chip.

  Further, considering that the essence of the invention is the reflection of electromagnetic waves at the discontinuous portion 8 in FIG. 2B, all of the rectangular parallelepiped concave region 2 formed in the metal module housing 3 is a semiconductor chip. There is no need to be hidden under 7, and a part of the recess 2 may protrude beyond the semiconductor chip 7.

  FIGS. 5A and 5B show structural examples when the recessed region 2 protrudes from the region 1 where the semiconductor chip is mounted. Here, as seen in the structure of FIG. 5B, the most effective isolation can be obtained when the discontinuous portion 8 completely crosses between two opposing sides of the region 1. Is easily understood from the fact that the essence of the invention is the reflection of electromagnetic waves at the discontinuous portion 8.

  The edge region 4 seen in FIG. 1 does not have the recessed region 2 and can cause degradation of isolation. However, since it is necessary to bond the semiconductor chip 7 to the metal module housing 3 satisfactorily, the structure as shown in FIG. In this case, a structure in which the edge region 4 is left as in the structure shown in FIG. Considering the edge region 4 as a thin dielectric waveguide, the cutoff frequency described in the description of the background art can be obtained. It is necessary to suppress degradation of isolation by narrowing the edge region 4 until the cutoff frequency becomes sufficiently higher than the frequency used by the circuit.

  Although the rectangular parallelepiped shape is given as an example of the concave shape of the region 2 of the concave portion, if the cross-sectional structure of the discontinuous portion 8 in FIG. It is clear that improvements can be made. In addition, it can be easily inferred that the isolation can be improved even when the regions 2 of the rectangular parallelepiped recesses and the regions of the recesses having different shapes such as the cylindrical recesses are mixed. Furthermore, even if several concave regions are combined, isolation can be improved if the discontinuous portion 8 exists under the semiconductor chip 7.

  FIG. 6 shows changes in the isolation characteristics when the size of the region 2 of the rectangular parallelepiped recess is changed. The length of each part is defined in (a) and (b) of FIG. FIG. 6A shows a case where the width W1 of the concave portion is changed, and FIG. 6B shows a case where the depth H2 of the concave portion is changed. Here, all the lengths are the in-tube wavelength at the use frequency of the circuit when the semiconductor chip 7 is regarded as a rectangular waveguide, that is, an electromagnetic wave semiconductor chip having the same frequency as the frequency of the high-frequency signal in the semiconductor chip 7. 7 is normalized by the wavelength λ in FIG. Similarly, the frequency axis is also standardized by the circuit use frequency, that is, the frequency of the high-frequency signal in the semiconductor chip 7. From FIGS. 6A and 6B, it can be seen that the width W1 of the recess and the depth H2 of the recess are as large as possible to effectively improve the isolation. Conversely, when the width W1 of the recess and the depth H2 of the recess are reduced, the isolation effect is gradually lost, and the improvement in isolation is about 6 dB between 0.1 and 0.2 wavelengths. It becomes. If improvement of isolation of 6 dB or more is taken as a guide, it can be seen that about 1/8 of the in-tube wavelength λ is the necessary minimum amount of W1 and H2. Here, W1 is the length of a pair of sides of the rectangle, but the same conditions are required for the lengths (W2) of the other pairs of sides. H2 is the height difference of the unevenness, which is the depth of the concave portion in this case, but is the height of the convex portion in the structure shown in FIG.

  Further, considering that a plurality of the recessed portions 2 are formed under the semiconductor chip, more discontinuous portions 8 shown in FIG. 3A are formed, and high isolation can be obtained. The size of the concave region 2 must be sufficiently smaller than the size of the semiconductor chip. On the other hand, there is a lower limit in the size of the recessed area 2 as described above. That is, the isolation improvement method according to the present invention can be effectively used when the sizes L1 and L2 of the semiconductor chip 7 shown in FIG. 3 are larger than 1/8 of the guide wavelength λ at the frequency at which isolation is desired. It can be said that.

  When it is necessary to consider the heat dissipation of the semiconductor chip 7, it is not preferable to increase the recessed area 2 because the contact area between the semiconductor chip 7 and the metal module housing 3 decreases and the thermal resistance of the contact portion increases. In this case, the maximum size and the number of the recessed regions 2 are determined in consideration of the necessary thermal resistance. As an example, if the allowable thermal resistance is within twice the thermal resistance of the mounting portion when the concave region 2 is not provided, less than half of the total mounting area of the semiconductor chip 7 and the metal module housing 3 is the concave portion. A measure of the area of 2. The problem of heat dissipation is alleviated by filling the recessed area 2 with a dielectric having a higher thermal conductivity than air. Examples of materials that can be used for this purpose include alumina (thermal conductivity = 36 W / m ° C.), sapphire (thermal conductivity = 46 W / m ° C.), and the like. It is also possible to fill the recess using the same material as the semiconductor chip 7, that is, Si, GaAs, InP, GaN, or the like.

  Finally, it will be described that anisotropy exists in the isolation improvement according to the present invention. Reflection can be expected for the electromagnetic wave traversing the discontinuous portion 8 in FIG. 2B, whereas there is no reason for reflection to occur in parallel with the discontinuous portion 8, and therefore isolation cannot be expected. That is, the magnitude of the isolation effect depends on the traveling direction of the electromagnetic wave. In order to improve this point, a case will be described in which the recessed regions 2 are arranged in a lattice shape or a staggered lattice shape in the third and fourth embodiments. In the fifth embodiment, a method for improving the local isolation of the semiconductor chip 7 in consideration of the anisotropy of the isolation will be described.

[Second Embodiment]
FIG. 7 shows a second embodiment. There is a region 1 where a semiconductor chip is mounted on the surface of the metal module housing 3, and the region 2 of the rectangular parallelepiped recess in the region 1 is removed by a method such as cutting the metal module housing 3. The recess is filled with air or a dielectric. This is an embodiment in which the isolation is improved by arranging two recessed regions 2.

[Third embodiment]
FIG. 8 shows a third embodiment. There is a region 1 where a semiconductor chip is mounted on the surface of the metal module housing 3, and the region 2 of the rectangular parallelepiped recess in the region 1 is removed by a method such as cutting the metal module housing 3. The recess is filled with air or a dielectric. This is an embodiment in which the anisotropy of isolation is improved by arranging the recessed regions 2 in a lattice pattern. In order to obtain high isolation, it is necessary to make the region 15 between the recessed region 2 and the edge region 4 sufficiently thin in consideration of the cutoff frequency of the semiconductor chip 7 as in the first embodiment. is there. Note that the same effect as in the present embodiment can be obtained by using the rectangular parallelepiped convex areas 5 shown in FIG. 4 in a grid instead of the concave areas 2 arranged in a grid. .

[Fourth Embodiment]
FIG. 9 shows a fourth embodiment. There is a region 1 where a semiconductor chip is mounted on the surface of the metal module housing 3, and the region 2 of the rectangular parallelepiped recess in the region 1 is removed by a method such as cutting the metal module housing 3. The recess is filled with air or a dielectric. This is an embodiment in which the anisotropy of isolation is improved by arranging the recessed regions 2 in a staggered pattern. Note that the rectangular parallelepiped convex regions 5 shown in FIG. 4 may be used in a staggered pattern instead of the concave regions 2 arranged in a staggered pattern, as in the present embodiment. An effect is obtained.

[Fifth Embodiment]
FIG. 10 shows a fifth embodiment. There is a region 1 on which the semiconductor chip is mounted on the surface of the metal module housing 3, and the metal module housing 3 cuts the portion of the L-shaped recessed region 13 on the surface of the metal module housing 3. The recess is filled with air or a dielectric. As described above, by deforming the recessed region 2 of the first to fourth embodiments into an L shape, a region 14 with locally improved isolation is formed, and the isolating of the portion of the semiconductor chip 2 on the region 14 is performed. Can be improved locally.

  As described above, complex via formation for isolation is achieved by configuring a high-frequency module using a module base (metal module housing 3 in the above-described embodiment) having irregularities of conductors on the surface. There is no need to use a process, and the chip area can be used effectively for circuit formation. In addition, by using the high frequency module according to the present invention, it is not necessary to prepare an electromagnetic wave absorber separately and to be mounted separately from the semiconductor chip, the mounting method can be simplified, and high isolation which is difficult to obtain by the method using only the electromagnetic wave absorber. Is possible. As a result, the millimeter-wave band semiconductor integrated circuit can be easily mounted, and the module performance can be improved and the cost can be reduced.

It is a figure which shows the structure of the metal module housing | casing in the example of 1st Embodiment. It is a figure which shows the cross-section of the part by which the semiconductor chip was mounted in the metal module housing | casing for demonstrating the principle of this invention, (a) is sectional drawing in case a metal module housing | casing is homogeneous and flat. (B) is sectional drawing in case the discontinuous part is formed in the metal module housing | casing. It is a figure which shows the structure by which the semiconductor chip was mounted in the metal module housing | casing of the example of 1st Embodiment, (a) is a top view, (b) is sectional drawing. It is a figure which shows the 1st modification of the structure of the metal module housing | casing in a 1st embodiment. It is a figure which shows the 2nd and 3rd modification of the structure of the metal module housing | casing in a 1st embodiment. It is a figure which shows an example of the isolation characteristic of the metal module housing | casing in the example of 1st Embodiment. It is a figure which shows the structure of the metal module housing | casing in the example of 2nd Embodiment. It is a figure which shows the structure of the metal module housing | casing in the example of 3rd Embodiment. It is a figure which shows the structure of the metal module housing | casing in the example of 4th Embodiment. It is a figure which shows the structure of the metal module housing | casing in the example of 5th Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Area | region where a semiconductor chip is mounted, 2 ... Area | region of a rectangular parallelepiped recessed part, 3 ... Metal module housing | casing, 4 ... Area | region of an edge, 5 ... Area | region of a rectangular parallelepiped convex part, 6 ... Around the area | region 5 of a convex part Area 7: Semiconductor chip 8 ... Discontinuous part 9 ... Incident wave (Vin) 10 ... Transmitted wave (Vt) 11 ... Reflected wave (Vr) 12 ... Heterogeneous area 13 ... L-shaped recess 14... 14, a region where the isolation is locally improved, 15.

Claims (5)

  In a high-frequency module in which a semiconductor chip is mounted on the surface of a module base, irregularities made of a conductor exist in a region where the semiconductor chip is mounted on the surface of the module base, and the semiconductor chip and the conductor Are connected at the convex and concave portions of the concave and convex portions and are not connected at the concave portions.   2. The high frequency module according to claim 1, wherein a space between the semiconductor chip and the conductor in the concave and convex portions is filled with a dielectric.   3. The high-frequency module according to claim 1, wherein the concave and convex portions make a plurality of rectangular regions arranged in a lattice shape or a staggered lattice shape on the surface of the module base lower than the surface of the module base around the region. The high frequency module characterized by being formed.   3. The high-frequency module according to claim 1, wherein the concave and convex portions make a plurality of rectangular regions arranged in a lattice shape or a staggered lattice pattern on the surface of the module base higher than the surface of the module base around the region. The high frequency module characterized by being formed.   5. The high-frequency module according to claim 3, wherein the length of each side of the rectangle and the height difference of the unevenness are the wavelength of the electromagnetic wave in the semiconductor chip having the same frequency as the frequency of the high-frequency signal in the semiconductor chip. A high-frequency module characterized by being 1/8 or more.

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