JP2005286294A - Method of manufacturing circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method by which a high reliability circuit board that solves problems, such as positional deviation of holes in lands, caused by the positional deviation in an exposing step or the defective conduction of conductive layers in the holes can be manufactured. <P>SOLUTION: The method of manufacturing the circuit board is composed of a step of forming a photoconductive layer 15 on the surface of an insulating substrate 1, having the conductive layer 13 on its surface and on the internal walls of a through hole or/and a non-through hole, a step of forming a second resin layer on the photoconductive layer 15 except the holes, and a step of removing the photoconductive layer 15 formed on the holes. The method also comprises a step of removing the second resin layer, a step of forming an electrostatic latent image on the photoconductive layer, and a step of forming a third resin layer 8 on the photoconductive layer 15 in the portion, corresponding to a circuit section and on the conductive layer 13 formed in the holes. In addition, the method is also composed of a step of removing the photoconductive layer 15 corresponding to a non-circuit section, a step of etching the exposed conductive layer 13, and a step of removing the third resin layer 8 and photoconductive layer 15. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a circuit board having a through hole and / or a non-through hole.

  As electronic devices have become smaller and more multifunctional in recent years, circuit boards have also been increased in density and wiring patterns, and means for achieving such conditions include multilayer circuit boards. . As shown in FIG. 49, a circuit board formed by laminating a plurality of wiring layers is generally referred to as a through hole 31, a via hole 32, or an interstitial via hole 33. The inner wall is covered or filled with a conductive layer. Conduction between layers is performed through pores such as through holes and non-through holes (hereinafter referred to as holes).

  FIG. 50 is a schematic view of the hole as viewed from above. A conductive layer called a land 18 is formed around the hole 17. There are various types of lands, such as a square, a circle, an ellipse, and an irregular shape. A circle is often used because of the occupied area or the ease of use of the design surface. In order to cope with higher density, a landless or narrow land width hole is required.

  As a method for manufacturing a circuit board, there are a subtractive method, an additive method, a semi-additive method, and the like. The most common method is the subtractive method. In the subtractive method, an etching resist layer is provided on a portion corresponding to a circuit portion of an insulating substrate (FIG. 51) having a conductive layer on the surface and the inner wall of the through hole or non-through hole (FIG. 52) and exposed. The conductive layer in the non-circuit portion is removed by etching (FIG. 53), and an unnecessary etching resist layer is removed to form a circuit (FIG. 54).

  When a circuit board is manufactured by a subtractive method, it is necessary to protect a conductive layer previously provided on the inner wall of the hole with an etching resist layer so that the conductive layer on the inner wall of the hole is not removed in the etching process. When forming an etching resist layer using a negative (photo-crosslinking type) dry film photoresist, the hole and land portions are exposed and crosslinked with a dry film photoresist that has been cross-linked to form a hole. The conductive layer on the inner wall of the hole is protected by preventing the etchant from entering the inside.

  When protecting holes with the tenting method, it is important to align the hole drilling and exposure process, especially in the case of landless and narrow land width holes required for high-density circuit boards. Alignment accuracy is required. That is, as shown in FIG. 55 (b), in the case of a large land width, a resist lid can be completely formed on the hole even if a positional deviation occurs by a distance of X, but FIG. As shown in Fig. 2, in the case of a narrow land width, if the hole and the land are shifted by the same distance X, the land is cut off from the hole portion, and the etching solution enters the hole, resulting in a problem of poor conduction. To do. However, due to the accuracy of drilling, expansion / contraction of the substrate, dimensional change of the photomask for exposure, etc., the actual situation is that the alignment accuracy is limited. In addition, since there are many types of holes formed on the high-density circuit board and the number of holes is extremely large, it is very difficult to accurately align all the holes. Therefore, even though landless and narrow land width holes are required in high-density circuit boards, there is a problem that the land width must be designed to be large in order to ensure tenting. (For example, refer to Patent Documents 1 and 2).

  An electrodeposition photoresist is known as a method for forming an etching resist layer. As shown in FIG. 56, the electrodeposition photoresist layer is uniformly provided on the conductive layer including the hole inner wall by the electrodeposition coating method, and then exposed through a photomask and developed. This is a method of providing an etching resist layer.

  Electrodeposited photoresists include negative types (photocrosslinking types) and positive types (photolytic types). In the case of the negative type (photocrosslinking type), it is necessary to expose and crosslink the photoresist, but the inside of the through hole 31 cannot be exposed and the electrodeposited photoresist inside the hole cannot be completely crosslinked. Therefore, it cannot be used as an etching resist layer.

  In the via hole 32, a landless hole can be formed using a photomask having only a pattern having no land, but there is a problem that the conductive layer inside the hole cannot be completely protected. In addition, when manufacturing a hole with a narrow land width, a photomask designed to expose the land portion is used, but as described in the above-mentioned negative (photocrosslinking type) dry film photoresist, Since there is a problem of alignment accuracy, there is a problem that the position of the land is shifted as shown in FIG. 55 (a), and it is impossible to form a hole in which a narrow land exists over the entire outer periphery. There is also a problem that the conductive layer inside the hole cannot be completely protected. Therefore, the land width must be increased, and there is a problem that the land cannot be narrowed.

  On the other hand, in the case of a positive type (photodecomposition type) electrodeposition photoresist, there is no need to expose the inside of the hole, so it is effective as a means for forming a landless hole using a photomask having only a pattern without a land. It is said that there is. Since light does not enter through the cylindrical through hole 31, it is possible to protect the positive (photolytic) photoresist layer on the inner wall of the hole. However, the tapered via hole 32 has a problem that the etching resist layer cannot remain on the inner wall and the bottom surface of the hole because light partially penetrates. Therefore, in the case of a circuit board in which through holes and via holes coexist, it is impossible to protect the internal conductive layers in all the holes existing in the circuit board.

  In addition, when manufacturing a hole with a narrow land width using a positive type (photodecomposition type) electrodeposition photoresist, a photomask designed to shield the land portion is used. In the same manner as described in the type) dry film photoresist, there is a problem of alignment accuracy, and therefore there is a problem that the position of the land is shifted as shown in FIG. Since light does not enter the hole in the through hole 31, the conductive layer inside the hole can be protected even if there is a positional shift, but a hole with a narrow land can be formed over the entire outer periphery. In addition, the via hole 32 exposes the inside of the hole, so that there is a problem that the conductive layer inside the hole cannot be completely protected. Therefore, the land width must be increased, and there is a problem that the land cannot be narrowed.

When the electrophotographic method is used as the etching resist layer forming method, the conductive layer inside the hole can be protected. However, since the land is formed by the exposure process, as in the case of the photoresist, FIG. There has been a problem that the positional deviation as shown occurs (for example, Patent Documents 3 to 4).
Japanese Patent Application Laid-Open No. 3-236955 Japanese Patent Laid-Open No. 7-7265 Japanese Patent No. 3281476 Japanese Patent No. 3281486

  SUMMARY OF THE INVENTION An object of the present invention is to provide a highly reliable circuit board manufacturing method that solves problems such as a positional deviation in a land of a hole and a conduction failure of a conductive layer in a hole, which have occurred due to a positional deviation in an exposure process. It is to be.

As a result of intensive studies to solve the above problems, the present inventors have
(1) A step of forming a photoconductive layer on the surface and the surface of the insulating substrate having a conductive layer on the inner wall of the through hole and / or non-through hole, and forming a second resin layer on the photoconductive layer other than the hole. A step, a step of removing the photoconductive layer on the hole, a step of removing the second resin layer, a step of forming an electrostatic latent image on the photoconductive layer, a portion on the photoconductive layer corresponding to the circuit portion and in the hole From the step of forming the third resin layer on the conductive layer, the step of removing the photoconductive layer corresponding to the non-circuit portion, the step of etching the exposed conductive layer, the step of removing the third resin layer and the photoconductive layer A method of manufacturing a circuit board,
(2) A step of forming a photoconductive layer on the surface and the surface of the insulating substrate having a conductive layer on the inner wall of the through hole and / or non-through hole, and forming a second resin layer on the photoconductive layer other than the hole. A step, a step of removing the photoconductive layer above the hole, a step of forming a fourth resin layer on the conductive layer in the hole, a step of removing the second resin layer, and forming an electrostatic latent image on the photoconductive layer A step, a step of forming a third resin layer on the photoconductive layer corresponding to the circuit portion, a step of removing the photoconductive layer corresponding to the non-circuit portion, a step of etching the exposed conductive layer, a third resin layer , A method of manufacturing a circuit board comprising a step of removing the photoconductive layer and the fourth resin layer,
(3) The step of forming the second resin layer on the photoconductive layer other than on the hole uniformly charges the surface of the photoconductive layer, and the photoconductive layer on the hole and the photoconductive layer on the surface conductive layer And a step of forming a second resin layer on the photoconductive layer other than on the hole using the potential difference. The circuit board according to (1) or (2), Production method,
(4) To find a method for manufacturing a circuit board according to any one of the above (1) to (3), which includes a step of providing a plated conductive layer on a conductive layer in a hole after removing the photoconductive layer in the hole. It came.

  In the method for producing a circuit board of the present invention, first, a photoconductive layer is provided on the surface and the surface of an insulating substrate having a conductive layer on the inner wall of the through hole and / or non-through hole so as to close the hole. Next, a second resin layer is formed on the photoconductive layer by means such as electrodeposition.

  In the method (1) for producing a circuit board of the present invention, in order to form the second resin layer, a liquid in which a resin used for the second resin layer is dispersed in a liquid is used. The resin particles are positively or negatively charged. As shown in FIG. 57, the developing electrode 19 is provided so as to face the circuit forming substrate 4 having the conductive layer 2 on the surface and the inner wall of the hole 3 and having the photoconductive layer 15 attached thereto. When the conductive layer 2 of the substrate 4 is grounded and an appropriate bias voltage is applied, the charged resin particles 20 are electrophoresed in the direction of the circuit forming substrate 4 according to the electric field E. FIG. 57 shows a case where the resin particles 20 are positively charged and a positive bias voltage is applied, but the resin particles are similarly charged even when the resin particles are negatively charged and a negative bias voltage is applied. The particles 20 are electrophoresed in the direction of the circuit forming substrate 4.

  The amount of resin particles adhering to the photoconductive layer approaching the circuit forming substrate by electrophoresis is determined by the capacitance of the photoconductive layer. As shown in FIG. 58, in the insulating substrate 1 having the conductive layer 2 on the surface and the inner wall of the through hole (through hole) 31 and / or the via hole (non-through hole) 32 and the photoconductive layer 15 attached thereto, The capacitance of the photoconductive layer 15 is affected by the shape below it. That is, there is a difference in capacitance between the photoconductive layer 15 on the conductive layer 2 and the photoconductive layer 15 on the through hole (through hole) 31 and / or the via hole (non-through hole) 32.

Hereinafter, the difference in the capacitance of the photoconductive layer and the difference in the second resin layer adhesion amount based on the difference will be described. When the capacitor is regarded as a capacitor having the conductive layer surface and the photoconductive layer surface as an electrode, the following equation (1) is established.
Q = CV (1)
[Where Q: charge on the photoconductive layer, C: electrostatic capacity, V: potential on the surface of the photoconductive layer with respect to the surface of the conductive layer]
The capacitance C is expressed by the following formula (2).
C = εS / d (2)
[Where ε: dielectric constant, d: distance between photoconductive layer surface and conductive layer surface, S: area]

Here, the capacitance of the photoconductive layer on the hole is C _H , the capacitance of the photoconductive layer on the surface conductive layer is C _S , the charge on the photoconductive layer on the hole is Q _H , on the surface conductive layer The charge on the photoconductive layer is Q _S , the photoconductive layer surface potential on the hole is V _H , the photoconductive layer potential on the surface conductive layer is V _{S, and the} photoconductive layer on the photoconductive layer is deposited on the photoconductive layer on the hole. The number of resin particles forming the two resin layers is N _H , the number of resin particles forming the second resin layer adhered on the photoconductive layer on the surface conductive layer is N _S , and the surface of the photoconductive layer and the conductive layer surface on the hole a distance d _S of the distance d _H, the photoconductive layer surface on the surface conductive layer and the conductive layer surface of the.

That is, as shown in FIG. 59, when comparing the capacitance C in a constant area (S is constant) on the hole and the surface conductive layer, the distance between the surface of the photoconductive layer and the surface of the conductive layer on the hole. Since d _H 21 is larger than the distance d _S 22 between the surface of the photoconductive layer on the surface conductive layer and the surface of the conductive layer, the capacitance C _H on the hole is smaller than the capacitance C _S on the surface conductive layer. Become. The resin particles adhere to the photoconductive layer so that the entire surface of the photoconductive layer is equipotential (that is, V _H = V _S ). Therefore, the charge Q _H on the hole is smaller than the charge Q _S on the surface conductive layer. As in the following formula (3), the magnitude of the charge Q is proportional to the number N of resin particles forming the second resin layer.
Q = Nq (3)
[Where N: number of resin particles forming the second resin layer, q: charge of one particle forming the second resin layer]

Therefore, the number of resin particles _NH forming the second resin layer attached on the photoconductive layer on the hole is very small, and the second resin layer attached on the photoconductive layer on the surface conductive layer is formed. It is smaller than the resin particle number N _S.

  As described above, due to the difference in capacitance C, the adhesion amount of the second resin layer on the photoconductive layer on the hole and the adhesion amount of the second resin on the photoconductive layer on the surface conductive layer A difference is made. A second resin layer is provided on the photoconductive layer on the surface conductive layer to a thickness that allows resist to the photoconductive layer developer, and the photoconductive layer on the hole is eroded by the photoconductive layer developer. An amount of the second resin layer is provided. By removing the photoconductive layer on the hole using the second resin layer as a resist, the inner wall of the hole and the conductive layer around the hole can be exposed accurately and selectively.

  In the circuit board manufacturing method (3) of the present invention, in order to form the second resin layer, first, the surface of the photoconductive layer is charged. If the photoconductive layer provided on the surface conductive layer and the photoconductive layer provided on the insulating layer such as air or an insulating substrate are charged under the same conditions, The absolute value of the charged potential in the provided photoconductive layer is larger than the value on the photoconductive layer provided on the surface conductive layer. When this charge potential difference is regarded as an electrostatic latent image and the second resin layer is formed on the photoconductive layer by means such as electrodeposition, the amount of adhesion of the second resin layer on the photoconductive layer above the hole, and the surface There is a difference in the amount of the second resin deposited on the photoconductive layer on the conductive layer. A second resin layer is provided on the photoconductive layer on the surface conductive layer to a thickness that allows resist to the photoconductive layer developer, and the photoconductive layer on the hole is eroded by the photoconductive layer developer. An amount of the second resin layer is provided. By removing the photoconductive layer on the hole using the second resin layer as a resist, the inner wall of the hole and the conductive layer around the hole can be exposed accurately and selectively.

  In the method (1) for producing a circuit board of the present invention, after exposing the inner wall of the hole and the conductive layer around the hole, the second resin layer is removed, and then photoconductive by electrophotography including a charging step and an exposure step. An electrostatic latent image is formed on the layer. At this time, the conductive layer is not affected by the charging step and the exposure step, and the charged position is zero. Therefore, when the third resin layer is formed by means such as an electrodeposition method, the photoconductive layer corresponding to the circuit portion is formed. A third resin layer is formed on the top and the conductive layer. Thus, utilizing the fact that the conductive layer is not charged, the inner wall of the hole and the conductive layer around the hole can be reliably protected with the third resin layer serving as the etching resist layer.

  In the method (2) for producing a circuit board of the present invention, after exposing the inner wall of the hole and the conductive layer around the hole, a fourth resin layer is provided on the exposed conductive layer by means such as electrodeposition. Next, the second resin layer is removed, and then an electrostatic latent image is formed on the photoconductive layer by electrophotography including a charging step and an exposure step, and a third resin is formed on the photoconductive layer corresponding to the circuit portion. Form a layer. In order to provide the fourth resin layer, for example, a method of selectively providing the fourth resin layer on the conductive layer by an aqueous electrodeposition method can be used. Alternatively, a method can be used in which the second resin layer is charged by means such as corona charging, and the fourth resin layer is selectively provided on the conductive layer having no charged potential by means such as electrodeposition.

  In the circuit board manufacturing method of the present invention, the conductive layer portion around the hole covered with the third resin layer or the fourth resin layer becomes the land. As shown in FIGS. 12 to 14, the land width can be arbitrarily adjusted by controlling the photoconductive layer removal amount in the hole photoconductive layer removal step using the second resin layer as a resist. Can do. Further, according to this method, the land of the hole has a uniform width as shown in FIG.

  As described above, in the circuit board manufacturing method of the present invention, the etching resist layer can be formed in the hole and the land only by the steps that do not require alignment such as the charging step, the electrodeposition method, and the photoconductive layer removing step. It has the excellent effect of being able to control the land width arbitrarily.

  Hereinafter, the circuit board manufacturing method of the present invention will be described in detail. Although a description will be given by taking the through hole as an example, a circuit board can be manufactured even in a non-through hole by the same method as described below. Further, even a build-up substrate in which through holes and via holes coexist can be manufactured by the same method.

  In the circuit board manufacturing method (1) of the present invention, first, light is applied to the surface of the circuit forming substrate 4 (FIG. 1), which is an insulating substrate having a conductive layer on the surface and inner walls of the through holes and / or non-through holes. A conductive layer 15 is provided (FIG. 2). As the insulating substrate having the conductive layer on the surface and the inner wall of the through-hole or non-through-hole, for example, a hole is formed in the insulating substrate 1 having the conductive layer 12 bonded on both sides, and then electroless plating treatment and electrolytic plating treatment For example, the conductive layer 13 provided in the hole 3 and on the surface can be used.

  Next, the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 3 by means such as electrodeposition (FIG. 4). Next, the photoconductive layer 15 on the hole 3 not covered with the second resin layer 6 is removed with a photoconductive layer developer (FIG. 5). As shown in FIGS. 12 to 14, the land width of the hole can be adjusted by the removal amount of the photoconductive layer.

  Next, the remaining second resin layer 6 is removed with the second resin layer removing liquid (FIG. 6). A positive or negative electrostatic latent image is formed on the exposed photoconductive layer 15 (FIG. 7), and means such as an electrodeposition method is used on the conductive layer in the circuit portion and the hole by using the electrostatic latent image. Thus, the third resin layer 8 is formed (FIG. 8). After the photoconductive layer 15 not covered with the third resin layer 8 is removed with the photoconductive layer developer (FIG. 9), the conductive layers 13 and 12 corresponding to the exposed non-circuit parts are removed by etching (FIG. 10). ), The remaining third resin layer 8 and photoconductive layer 15 are peeled and removed to produce a circuit board (FIG. 11).

  The circuit board manufacturing method (2) of the present invention is an insulating substrate having a conductive layer on the surface and inner walls of through holes and / or non-through holes, as in the circuit board manufacturing method (1) of the present invention. A photoconductive layer 15 is provided on the surface of the circuit forming substrate 4 (FIG. 1) (FIG. 2). Next, the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 3 by means of electrodeposition or the like. (FIG. 4). Next, the photoconductive layer 15 on the holes 3 not covered with the second resin layer 6 is removed with a photoconductive layer developer (FIG. 5). As shown in FIGS. 12 to 14, the land width of the hole can be adjusted by the removal amount of the photoconductive layer.

  Subsequently, the fourth resin layer 10 is formed on the exposed conductive layer in the hole by means such as electrodeposition (FIG. 16). Next, the remaining second resin layer 6 is removed with the second resin layer removing liquid (FIG. 17). Alternatively, after removing the second resin layer 6 with the second resin layer removing liquid (FIG. 6), the fourth resin layer 10 is formed on the exposed conductive layer in the hole by means such as electrodeposition (FIG. 17). ). A positive or negative electrostatic latent image is formed on the exposed photoconductive layer 15 (FIG. 18), and the third resin layer 8 is further formed on the circuit portion by means such as electrodeposition using the electrostatic latent image. (FIG. 19). After removing the photoconductive layer 15 not covered with the third resin layer 8 with the developer for the photoconductive layer (FIG. 20), the conductive layers 13 and 12 corresponding to the exposed non-circuit parts are removed by etching (FIG. 21). ), The remaining third resin layer 8, photoconductive layer 15 and fourth resin layer 10 are peeled and removed to produce a circuit board (FIG. 11).

  In the method (3) for producing a circuit board according to the present invention, in the step of forming the second resin layer on the photoconductive layer other than the hole in the method (1) or (2) for producing the circuit board according to the present invention, a charging step Is used. The photoconductive layer 15 is provided on the surface and the surface of the insulating substrate (FIG. 1) having a conductive layer on the inner surface of the through hole and / or non-through hole (FIG. 2). Next, the surface of the photoconductive layer 15 is substantially uniformly charged by means such as corona charging to be positively or negatively charged, and the photoconductive layer 15 on the hole 3 and the photoconductive layer 15 on the conductive layer 13 are charged. Is induced (FIG. 3). In FIG. 3, the case of positive charging is shown, and the magnitude of the potential value is represented by the size of the character. That is, depending on the same charging conditions, the photoconductive layer 15 on the hole 3 in contact with air has a higher charging potential than the photoconductive layer 15 on the conductive layer 13. Next, using the potential difference, the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 13 by means such as electrodeposition (FIG. 4).

  Next, in the case where the circuit board manufacturing method (4) of the present invention is applied to the circuit board manufacturing method (1) of the present invention, the insulating property having a conductive layer on the surface and the inner wall of the through hole or non-through hole An example of using a substrate in which a hole is formed in an insulating substrate 1 having conductive layers 12 bonded on both sides and a conductive layer 13 is provided in the hole 3 and on the surface by electroless plating (FIG. 22). Show. A photoconductive layer 15 is provided on the surface of the substrate (FIG. 23), and then the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 13 by means such as electrodeposition (FIG. 25). . When the method (3) for producing a circuit board of the present invention is used in combination, the surface of the photoconductive layer 15 is substantially uniformly charged to be charged to a positive or negative charge, and the photoconductive layer 15 on the hole 3 is electrically conductive. A potential difference is induced in the photoconductive layer 15 on the layer 13 (FIG. 24). Using this potential difference, the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 13 by means such as electrodeposition (FIG. 25).

  Subsequently, the photoconductive layer 15 on the hole 3 not covered with the second resin layer 6 is removed with a photoconductive layer developer (FIG. 26), and electrolytic plating or the like is applied on the exposed conductive layer 13 in the hole. The plating conductive layer 7 is provided by means (FIG. 27). In the circuit board manufacturing method (4) of the present invention, a thick conductive layer is provided on the entire surface as in the circuit board manufacturing method (1) of the present invention while ensuring the thickness of the conductive layer in the hole. In some cases, there is an advantage that the thickness of the conductive layer on the surface is thin and uniform.

  After the plating conductive layer 7 is provided, the photoconductive layer 15 can be removed again with a photoconductive layer developer, as the case may be. By adjusting the removal amount of the photoconductive layer, it is possible to manufacture a circuit board having a desired land width as shown in FIGS.

  Next, the remaining second resin layer is removed with the second resin layer removing liquid (FIG. 28). A positive or negative electrostatic latent image is formed on the exposed photoconductive layer 15 (FIG. 29), and the electrostatic latent image is used to apply means such as an electrodeposition method on the circuit layer and the conductive layer in the hole. Thus, the third resin layer 8 is formed (FIG. 30). After the photoconductive layer 15 not covered with the third resin layer 8 is removed with the photoconductive layer developer (FIG. 31), the conductive layers 13 and 12 corresponding to the exposed non-circuit parts are removed by etching (FIG. 32). ), The remaining third resin layer 8 and photoconductive layer 15 are peeled and removed to manufacture a circuit board (FIG. 33).

  The circuit board manufacturing method (4) of the present invention can also be applied to the circuit board manufacturing method (2) of the present invention. As an insulating substrate having a conductive layer on the surface and the inner wall of the through hole or non-through hole, a hole is formed in the insulating substrate 1 having the conductive layer 12 bonded on both sides, and then the inside of the hole 3 and the surface by electroless plating treatment. A substrate provided with a conductive layer 13 (FIG. 22) is used, a photoconductive layer 15 is provided on the surface of the substrate (FIG. 23), and then the photoconductive layer on the conductive layer 3 is formed by means such as electrodeposition. A second resin layer 6 is formed on 15 (FIG. 25). When the method (3) for producing a circuit board according to the present invention is used in combination, the surface of the photoconductive layer 15 is substantially uniformly charged, charged to a positive or negative charge, and electrically conductive with the photoconductive layer 15 on the hole 3. A potential difference is induced in the photoconductive layer 15 on the layer 13 (FIG. 24). Using this potential difference, the second resin layer 6 is formed on the photoconductive layer 15 on the conductive layer 13 by means such as electrodeposition (FIG. 25).

  Subsequently, the photoconductive layer 15 on the hole 3 not covered with the second resin layer 6 is removed with a photoconductive layer developer (FIG. 26), and electrolytic plating or the like is applied on the exposed conductive layer 3 in the hole. The plating conductive layer 7 is provided by means (FIG. 27). After the plating conductive layer 7 is provided, the photoconductive layer 15 can be removed again with a photoconductive layer developer, as the case may be. By adjusting the removal amount of the photoconductive layer, it is possible to manufacture a circuit board having a desired land width as shown in FIGS.

  Subsequently, the fourth resin layer 10 is formed on the exposed conductive layer in the hole by means such as electrodeposition (FIG. 36). Next, the remaining second resin layer 6 is removed with the second resin layer removing liquid (FIG. 37). Alternatively, after removing the second resin layer 6 with the second resin layer removing liquid (FIG. 28), the fourth resin layer 10 is formed on the exposed conductive layer in the hole by means such as electrodeposition (FIG. 37). ). A positive or negative electrostatic latent image is formed on the exposed photoconductive layer 15 (FIG. 38), and the third resin layer 8 is further formed on the circuit portion by means such as electrodeposition using the electrostatic latent image. (FIG. 39). After removing the photoconductive layer 15 not covered with the third resin layer 8 with the developer for the photoconductive layer (FIG. 40), the conductive layers 13 and 12 corresponding to the exposed non-circuit parts are removed by etching (FIG. 41). ), The remaining third resin layer 8, photoconductive layer 15 and fourth resin layer 10 are peeled and removed to manufacture a circuit board (FIG. 33).

  The insulating substrate having a conductive layer on the surface and the inner wall of the through hole or / and the non-through hole according to the circuit board manufacturing method of the present invention, that is, as a circuit forming substrate, is a laminated plate in which a conductive layer is bonded to an insulating substrate. After providing a hole, a form in which a conductive layer is provided on the inner wall and surface of the hole by plating treatment, after forming a hole in the insulating substrate, and a form in which a conductive layer is provided on the inner wall and surface of the hole by plating treatment, After providing a hole, the form etc. which provided the conductive layer in the hole inner wall and surface by various coating means can be used. As the insulating substrate, a paper base phenolic resin or glass base epoxy resin substrate, a polyester film, a polyimide film, a liquid crystal polymer film, or the like can be used. As the conductive layer, copper, silver, gold, aluminum, stainless steel, 42 alloy, nichrome, tungsten, ITO, conductive polymer, various metal complexes, and the like can be used. Examples of these are described in “Handbook of Printed Circuit Technology” (edited by Japan Printed Circuit Industry Association, published in 1987, published by Nikkan Kogyo Shimbun).

  The photoconductive layer according to the present invention is roughly classified into a conventional type and a memory type according to a method of forming an electrostatic latent image. In the conventional type, first, the surface of the photoconductive layer is charged almost uniformly positively or negatively in the dark or in a safe light, and then the photoconductive layer is exposed to light by exposure to reduce the amount of charge in the exposed area. By doing so, an electrostatic latent image corresponding to the circuit pattern is formed. Next, the charged resin particles forming the third resin layer are electrodeposited and fixed along the electrostatic latent image to form the third resin layer in the circuit portion. In the conventional type, as the photoconductive layer, for example, West German Patent No. 1171731, No. 526720, No. 3210577, JP-A-52-2437, 57-48736, Those described in JP-A-59-168462, JP-A-63-129689, JP-A-2001-352148, and the like can be used.

  The memory type performs exposure processing corresponding to the circuit pattern in the dark or in the safe light, and develops the conductivity in the exposed area, and then performs positive or negative charging on the surface of the photoconductive layer. Then, the surface of the photoconductive layer other than the exposed portion is charged to form an electrostatic latent image corresponding to the circuit pattern. Next, the charged resin particles forming the third resin layer are electrodeposited and fixed along the electrostatic latent image to form the third resin layer in the circuit portion. In the memory type, a photoconductive layer described in JP 2002-158422 A, JP 2002-23470 A, or the like can be used. The photoconductive layer according to the present invention has a three-layer structure sandwiched between a carrier film (polyethylene terephthalate, etc.) and a protective film (polyethylene, etc.), and is suitable for storage and pasting. If blocking does not become a problem, a two-layer structure not using a protective film may be used.

  The method of attaching the photoconductive layer to the surface conductive layer is any method as long as the photoconductive layer can be provided without causing unevenness or undulation in the photoconductive layer and without mixing air or dust on the attachment surface. It may be a method. For example, an apparatus is used in which a hot rubber roll for a printed circuit board is pressed with pressure to perform thermocompression bonding.

  After pasting the photoconductive layer, the carrier film is peeled off. At this time, peeling electrification occurs, and the surface of the photoconductive layer is charged unevenly. When this charging unevenness occurs, the second resin is electrodeposited along the charging unevenness, so it is necessary to remove or make the charge uniform. For example, a method of spraying an ion blower, a method of heat treatment (annealing) at 50 ° C. or higher, a method of wiping water vapor or water, and the like can be mentioned.

  The photoconductive layer of the present invention is formed by thermocompression bonding to an insulating substrate having a conductive layer on the surface and inner walls of through holes and / or non-through holes, and covering the holes with a tenting. Moreover, it has a solubility with respect to the developing solution for photoconductive layers, and in the manufacturing method (4) of the circuit board of this invention, it is required to have tolerance with respect to a plating solution.

  In the present invention, as a method for charging the surface of the photoconductive layer or the second resin layer and a charging process for forming an electrostatic latent image, a non-contact charging method such as a corotron method or a scorotron method, or a conductive roll charging method has been conventionally used. The contact charging method is known, and any method may be adopted.

  The exposure method is performed by laser direct drawing, exposure processing through a photomask, or projection exposure. An ultra-high pressure mercury lamp, a high pressure mercury lamp, a metal halide lamp, a xenon lamp, or the like can be used.

  The second resin layer may be any resin as long as it is insoluble or hardly soluble in the photoconductive layer developer and can be used in the electrodeposition method. The second resin layer formation uses a liquid in which the resin used for the second resin layer is dispersed in a liquid in a particle state. The resin particles are positively or negatively charged. As the liquid, water or an electrically insulating liquid can be used. When water is used, the second resin layer is mainly composed of a polymer having an appropriate acid value and is neutralized with an organic amine or the like to form colloidal particles charged in water. When electrical insulating liquid is used, acrylic resin, vinyl acetate resin, vinyl chloride resin, vinylidene chloride resin, vinyl acetal resin such as polyvinyl butyral, polystyrene, polyethylene, polypropylene and its chloride, polyethylene terephthalate, polyethylene isophthalate, etc. Polyester resins, polyamide resins, vinyl-modified alkyd resins, resins such as cellulose ester derivatives such as gelatin and carboxymethylcellulose are dispersed in an electrically insulating liquid in the form of particles. The resin particles can contain a charge control agent, and it is necessary to use positive or negative charge depending on the positive / negative of the bias voltage when forming the second resin layer. As the liquid in which the resin for forming the second resin layer is dispersed in such an electrically insulating liquid, an electrophotographic wet toner can be preferably used.

  In the second resin layer, a developing electrode is placed so as to face the circuit forming substrate on which the photoconductive layer is bonded, and charged resin particles are dispersed in the liquid between the circuit forming substrate and the developing electrode. It can be formed by filling the liquid thus prepared, grounding the conductive layer of the circuit forming substrate, and applying an appropriate bias voltage. For example, a developing device described in JP-A No. 2004-163605, JP-A No. 2002-132049, or the like can be used. The film thickness of the second resin layer can be determined by controlling the charge and applied voltage of the resin particles, the conveyance speed, and the supply amount of the resin particle-containing dispersion. The resin particles adhered by the electrodeposition method are fixed on the photoconductive layer by heating, pressure, light, solvent, etc., and become the second resin layer. Using the second resin layer as a resist layer, the photoconductive layer on the hole is removed with a developer for photoconductive layer.

  The removal method of the second resin layer may be any method as long as it can be quickly removed from the photocrosslinkable resin layer. For example, it is dissolved using an organic solvent, an alkaline aqueous solution, an acidic aqueous solution, an aqueous solution, or the like. Or there is a method of decomposing and removing. Examples of the acidic aqueous solution include sulfuric acid, acetic acid, hydrochloric acid, ammonium chloride water, hydrogen peroxide water, a copper ion-containing liquid, a copper ion-containing liquid, and an iron ion-containing liquid. Further, a tape peeling method, a polishing method, or the like can be used.

  In the present invention, the developer for the photoconductive layer is a solution that can dissolve or disperse the photoconductive layer, and a developer that matches the composition of the photoconductive layer to be used is used. The photoconductive layer on the hole is removed with a developer, and only the hole is opened. Further, after the third resin layer is provided in the circuit portion, the photoconductive layer in the non-circuit portion is removed. The photoconductive layer removing liquid may not dissolve the second resin layer, the third resin layer, and the fourth resin layer, or may dissolve the second resin layer, the third resin layer, and the fourth resin layer. Any liquid can be used as long as the second resin layer, the third resin layer, and the fourth resin layer do not swell or change in shape under the condition of dissolving the photoconductive layer by the thickness. May be. When an alkali water-soluble resin is used for the photoconductive layer, an alkaline aqueous solution is usefully used. For example, alkali metal silicate, alkali metal hydroxide, phosphoric acid and alkali metal carbonate, phosphoric acid and ammonium carbonate An aqueous solution of an inorganic basic compound such as a salt, an organic basic compound such as ethanolamines, ethylenediamine, propanediamine, triethylenetetramine, and morpholine can be used. In order to control the solubility with respect to the 2nd resin layer, the 3rd resin layer, and the 4th resin layer, these aqueous solutions need to adjust a density | concentration, temperature, a spray pressure, etc. The removal of the photoconductive layer can be quickly stopped by washing with water or acid treatment following the treatment with the developer for photoconductive layer.

  In the present invention, the third resin layer contains a resin that is insoluble or hardly soluble in the photoconductive layer developer and the conductive layer etchant. The third resin layer is also preferably formed by electrodeposition. Electrodeposition methods include a positive development method in which a third resin layer is formed on a non-exposed portion, that is, a charged photoconductive layer, using resin particles having a charge opposite to that of the electrostatic latent image, and electrostatic latent image. There is a reversal development method in which a third resin layer is provided on a photoconductive layer of an exposed portion, that is, an uncharged portion under application of an appropriate bias voltage using resin particles having the same polarity as the image. In the present invention, since it is necessary to provide the third resin layer on the conductive layer around and / or around the holes that are not charged, it is preferable to use the reverse development method.

  In order to form the third resin layer according to the present invention, a liquid in which the resin used in the third resin layer is dispersed in a liquid state is used. The resin particles are positively or negatively charged. As the liquid, water or an electrically insulating liquid can be used. When water is used, the third resin layer is mainly composed of a polymer having an appropriate acid value and is neutralized with an organic amine or the like to form colloidal particles charged in water. When electrical insulating liquid is used, acrylic resin, vinyl acetate resin, vinyl chloride resin, vinylidene chloride resin, vinyl acetal resin such as polyvinyl butyral, polystyrene, polyethylene, polypropylene and its chloride, polyethylene terephthalate, polyethylene isophthalate, etc. Polyester resins, polyamide resins, vinyl-modified alkyd resins, resins such as cellulose ester derivatives such as gelatin and carboxymethylcellulose are dispersed in an electrically insulating liquid in the form of particles. The resin particles can contain a charge control agent, and it is necessary to use positive or negative charge depending on the positive or negative of the bias voltage when forming the third resin layer. As the liquid in which the resin for forming the third resin layer is dispersed in such an electrically insulating liquid, a wet toner for electrophotography can be suitably used. The film thickness of the third resin layer can be determined by controlling the charge and applied voltage of the resin particles, the transport speed, and the resin particle dispersion supply amount. The charged resin particles attached by the electrodeposition method are fixed by heating, pressure, light, a solvent, or the like to form a third resin layer.

  The fourth resin layer according to the present invention contains a resin that is insoluble or hardly soluble in the photoconductive layer developer, the second resin layer removing solution, and the conductive layer etching solution. The fourth resin layer is also preferably formed by an electrodeposition method. As the electrodeposition method, an aqueous electrodeposition method that can be selectively deposited on the conductive layer can be used. Alternatively, as shown in FIG. 15, a reversal development method in which the second resin layer on the surface is charged and a fourth resin layer can be provided on the conductive layer around the hole and / or around the hole that is not charged. It is preferable to use it. If the second resin layer is removed before the fourth resin layer is provided, the photoconductive layer on the surface is charged, and the conductive layer around and / or around the hole is not charged by reversal development. A fourth resin layer can be provided. As the developing device, for example, a developing device described in JP-A No. 2004-163605, JP-A No. 2002-132509, or the like can be used.

  For the formation of the fourth resin layer according to the present invention, a liquid in which the resin used for the fourth resin layer is dispersed in a liquid state is used. The resin particles are positively or negatively charged. As the liquid, water or an electrically insulating liquid can be used. When water is used, the fourth resin layer is mainly composed of a polymer having an appropriate acid value and is neutralized with an organic amine or the like to form colloidal particles charged in water. When electrical insulating liquid is used, acrylic resin, vinyl acetate resin, vinyl chloride resin, vinylidene chloride resin, vinyl acetal resin such as polyvinyl butyral, polystyrene, polyethylene, polypropylene and its chloride, polyethylene terephthalate, polyethylene isophthalate, etc. Polyester resins, polyamide resins, vinyl-modified alkyd resins, resins such as cellulose ester derivatives such as gelatin and carboxymethylcellulose are dispersed in an electrically insulating liquid in the form of particles. The resin particles can contain a charge control agent, and the charge needs to be positive or negative depending on whether the bias voltage at the time of forming the fourth resin layer is positive or negative. As the liquid in which the resin for forming the fourth resin layer is dispersed in such an electrically insulating liquid, an electrophotographic wet toner can be preferably used.

  The film thickness of the fourth resin layer can be determined by controlling the charge and applied voltage of the resin particles, the transport speed, and the resin particle dispersion supply amount. The resin particles adhered by the electrodeposition method are fixed on the photoconductive layer by heating, pressure, light, solvent, or the like to form a fourth resin layer.

  Any method may be used for removing the third resin layer and the fourth resin layer. For example, there is a method of dissolving or decomposing using an organic solvent, an alkaline aqueous solution, an acidic aqueous solution, an aqueous solution, or the like. Examples of the acidic aqueous solution include sulfuric acid, acetic acid, hydrochloric acid, ammonium chloride water, hydrogen peroxide water, a copper ion-containing liquid, a copper ion-containing liquid, and an iron ion-containing liquid. Further, a tape peeling method, a polishing method, or the like can be used.

  The etching solution used for etching the conductive layer according to the present invention may be any solution that can dissolve and remove the conductive layer. For example, common etching solutions such as alkaline ammonia, sulfuric acid-hydrogen peroxide, cupric chloride, persulfate, ferric chloride, and the like can be used. Moreover, as an apparatus and a method, apparatuses and methods, such as horizontal spray etching and immersion etching, can be used, for example. These details are described in “Printed Circuit Technology Handbook” (edited by Japan Printed Circuit Industry Association, published in 1987, published by Nikkan Kogyo Shimbun). Moreover, the plating method which can be used for this invention is described in the same book, for example.

  Hereinafter, the present invention will be described in more detail by way of examples. However, the present invention is not limited to these examples. In addition, the Example was performed under yellow safe light.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through-hole portion was observed with a microscope, the through-hole diameter L1 at the time of drilling shown in FIG. 42 was 150 μm, the through-hole diameter at the time of copper plating was L2 = 125 μm, and the photoconductive layer removal portion diameter L3 was 158 μm. It was. Next, propylene carbonate was used as a solvent in which the second resin layer was dissolved but the photoconductive layer was not dissolved. Only the second resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the third resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the through hole diameter L16 at the time of drilling shown in FIG. 43 was 150 μm, the through hole diameter at the time of copper plating was L17 = 125 μm, and the through hole land diameter L18 was 150 μm. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the photoconductive layer around the through hole was removed concentrically with the through hole. The through-hole diameter L1 at the time of drilling shown in FIG. 42 was 150 μm, the through-hole diameter at the time of copper plating was L2 = 125 μm, and the diameter L3 of the photoconductive layer removal portion was 188 μm. Next, propylene carbonate was used as a solvent in which the second resin layer was dissolved but the photoconductive layer was not dissolved. Only the second resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the third resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the land as the conductive layer around the through hole was concentrically formed with the through hole. The through hole diameter L4 at the time of drilling shown in FIG. 44 = 150 μm, the through hole diameter at the time of copper plating L5 = 125 μm, and the land diameter L6 = 178 μm, and it is confirmed that a through hole having a narrow land width is formed. did. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless copper plating treatment was performed. An electroless copper plating layer having a thickness of about 0.5 μm was provided on the inner wall and the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Next, propylene carbonate was used as a solvent in which the second resin layer was dissolved but the photoconductive layer was not dissolved. Only the second resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer and the third resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the obtained circuit board was observed with a microscope. Through hole diameter L19 = 150 μm at the time of drilling shown in FIG. 46, through hole diameter L20 = 125 μm at the time of copper plating, The through-hole land diameter L21 = 150 μm, and it was confirmed that a landless through-hole was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless plating treatment was performed to form an inner wall of the through hole An electroless copper plating layer having a thickness of about 0.5 μm was provided on the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Further, the photoconductive layer in the through-hole portion was dissolved and removed again using a 1% by mass aqueous sodium carbonate solution (30 ° C.). The photoconductive layer around the through hole was removed concentrically with the through hole. The through hole diameter L10 at the time of drilling shown in FIG. 47 was 150 μm, the through hole diameter at the time of copper plating was L11 = 125 μm, and the diameter L12 of the photocrosslinkable resin layer removal portion was 188 μm. Next, propylene carbonate was used as a solvent in which the second resin layer was dissolved but the photoconductive layer was not dissolved. Only the second resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer and the third resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the obtained circuit board was observed with a microscope. Through hole diameter L13 = 150 μm at the time of drilling shown in FIG. 48, through hole diameter L14 = 125 μm at the time of copper plating, The through-hole land diameter L15 = 178 μm, and it was confirmed that a through-hole having a narrow land width was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through-hole portion was observed with a microscope, the through-hole diameter L1 at the time of drilling shown in FIG. 42 was 150 μm, the through-hole diameter at the time of copper plating was L2 = 125 μm, and the photoconductive layer removal portion diameter L3 was 158 μm. It was. Next, both surfaces were charged using a corona charging device (charging transformer output +5.0 V). The surface potential was measured and found to be + 380V. Subsequently, using an acrylic resin emulsion (the toner described in Example 1 of JP-A-2002-296847), reversal development is performed by applying a bias voltage of +300 V so that the toner adheres to the conductive layer on the inner wall of the hole. It was. The toner was heat-fixed at 90 ° C. for 2 minutes to obtain a fourth resin layer.

  Next, propylene carbonate is used as a solvent in which the second resin layer is dissolved but the fourth resin layer and the photoconductive layer are not dissolved. Only the second resin layer is dissolved and removed from the surface, washed with water and dried at 90 ° C. for 20 minutes. Did.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and a toner image is formed on the circuit portion on the photoconductive layer. Obtained. A toner image was obtained. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the third resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) and isopropyl alcohol to obtain a circuit board. When the obtained circuit board was observed with a microscope, the through-hole diameter L16 at the time of drilling shown in FIG. 43 was 150 μm, the through-hole diameter at the time of copper plating was L17 = 125 μm, and the through-hole land diameter L18 was 150 μm. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless plating treatment was performed to form an inner wall of the through hole An electroless copper plating layer having a thickness of about 0.5 μm was provided on the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer. Thereafter, the polyethylene terephthalate film was peeled off at room temperature, heated at 80 ° C. for 1 minute, and the unevenness of peeling charge on the photoconductive layer generated by peeling the polyethylene terephthalate film was eliminated.

  Next, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), a bias voltage of +200 V is applied to perform electrodeposition coating. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good second resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Further, the photoconductive layer in the through-hole portion was dissolved and removed again using a 1% by mass aqueous sodium carbonate solution (30 ° C.). The photoconductive layer around the through hole was removed concentrically with the through hole. The through hole diameter L10 at the time of drilling shown in FIG. 47 was 150 μm, the through hole diameter at the time of copper plating was L11 = 125 μm, and the diameter L12 of the photocrosslinkable resin layer removal portion was 188 μm.

  Next, both surfaces were charged using a corona charging device (charging transformer output +5.0 V). The surface potential was measured and found to be + 380V. Subsequently, using an acrylic resin emulsion (the toner described in Example 1 of JP-A-2002-296847), reversal development is performed by applying a bias voltage of +300 V so that the toner adheres to the conductive layer on the inner wall of the hole. It was. The toner was heat-fixed at 90 ° C. for 2 minutes to obtain a fourth resin layer. Next, propylene carbonate is used as a solvent in which the second resin layer is dissolved but the fourth resin layer and the photoconductive layer are not dissolved. Only the second resin layer is dissolved and removed from the surface, washed with water and dried at 90 ° C. for 20 minutes. Did.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using an acrylic resin emulsion (toner described in Example 1 of JP-A-2002-296847), a bias voltage of 220 V is applied to perform reverse development, and a toner image is formed on a circuit portion on the photoconductive layer. Got. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

The photoconductive layer not covered with the third resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer, the third resin layer, and the fourth resin layer used as an etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) and isopropyl alcohol to obtain a circuit board. When the obtained circuit board was observed with a microscope, when the obtained circuit board was observed with a microscope, the through hole diameter L13 = 150 μm at the time of drilling shown in FIG. 48, the through hole diameter L14 = 125 μm at the time of copper plating, The through-hole land diameter L15 = 178 μm, and it was confirmed that a through-hole having a narrow land width was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through-hole portion was observed with a microscope, the through-hole diameter L1 at the time of drilling shown in FIG. 42 was 150 μm, the through-hole diameter at the time of copper plating was L2 = 125 μm, and the photoconductive layer removal portion diameter L3 was 160 μm. It was. Next, propylene carbonate was used as a solvent in which the first resin layer was dissolved but the photoconductive layer was not dissolved. Only the first resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the second resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the through-hole diameter L16 at the time of drilling shown in FIG. 43 was 150 μm, the through-hole diameter at the time of copper plating was L17 = 125 μm, and the through-hole land diameter L18 was 150 μm. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the photoconductive layer around the through hole was removed concentrically with the through hole. The through-hole diameter L1 at the time of drilling shown in FIG. 42, the through-hole diameter L2 at the time of copper plating, and the diameter L3 of the photoconductive layer removal portion were L1 = 150 μm, L2 = 125 μm, and L3 = 190 μm. Next, propylene carbonate was used as a solvent in which the first resin layer was dissolved but the photoconductive layer was not dissolved. Only the first resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the second resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the land as the conductive layer around the through hole was concentrically formed with the through hole. The through hole diameter L4 at the time of drilling shown in FIG. 44 = 150 μm, the through hole diameter at the time of copper plating L5 = 125 μm, and the land diameter L6 = 180 μm, confirming that a through hole having a narrow land width is formed. did. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless copper plating treatment was performed. An electroless copper plating layer having a thickness of about 0.5 μm was provided on the inner wall and the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Next, propylene carbonate was used as a solvent in which the first resin layer was dissolved but the photoconductive layer was not dissolved. Only the first resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer and the second resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the obtained circuit board was observed with a microscope. Through hole diameter L19 = 150 μm at the time of drilling shown in FIG. 46, through hole diameter L20 = 125 μm at the time of copper plating, The through-hole land diameter L21 = 150 μm, and it was confirmed that a landless through-hole was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless plating treatment was performed to form an inner wall of the through hole An electroless copper plating layer having a thickness of about 0.5 μm was provided on the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Further, the photoconductive layer in the through-hole portion was dissolved and removed again using a 1% by mass aqueous sodium carbonate solution (30 ° C.). The photoconductive layer around the through hole was removed concentrically with the through hole. The through hole diameter L10 at the time of drilling shown in FIG. 47 was 150 μm, the through hole diameter at the time of copper plating was L11 = 125 μm, and the diameter L12 of the photocrosslinkable resin layer removal portion was 190 μm. Next, propylene carbonate was used as a solvent in which the first resin layer was dissolved but the photoconductive layer was not dissolved. Only the first resin layer was dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and the exposed conductive layer and the photoconductive layer A toner image was obtained in the upper circuit section. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer and the second resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) to obtain a circuit board. When the obtained circuit board was observed with a microscope, the through hole diameter L13 = 150 μm at the time of drilling shown in FIG. 48, the through hole diameter L14 = 125 μm at the time of copper plating, and the through hole land diameter L15 = 180 μm were narrow. It was confirmed that a through hole having a land width was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  After opening a through hole of 0.15 mmφ in a copper-clad glass substrate epoxy resin substrate (area 340 mm × 510 mm, substrate thickness 0.1 mm, copper layer thickness 12 μm), electroless copper plating treatment and electrolytic copper plating treatment The electroless copper plating layer having a thickness of about 0.5 μm and the electrolytic copper plating layer having a thickness of about 12 μm were provided on the inner wall and the surface of the through hole. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through-hole portion was observed with a microscope, the through-hole diameter L1 at the time of drilling shown in FIG. 42 was 150 μm, the through-hole diameter at the time of copper plating was L2 = 125 μm, and the photoconductive layer removal portion diameter L3 was 160 μm. It was. Next, both surfaces were charged using a corona charging device (charging transformer output +5.0 V). The surface potential was measured and found to be + 380V. Subsequently, reversal development was performed by applying a bias voltage of +300 V using an acrylic resin emulsion (the toner described in Example 1 of JP-A No. 2002-296847), and the toner was deposited on the conductive layer on the inner wall of the hole. . The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer.

  Next, propylene carbonate is used as a solvent that dissolves the first resin layer but does not dissolve the third resin layer and the photoconductive layer, and only the first resin layer is dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes. Did.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using a Mitsubishi OPC printing system positively charged toner (ODP-TW, manufactured by Mitsubishi Paper Co., Ltd.), a bias voltage of 220 V is applied to perform reverse development, and a toner image is formed on the circuit portion on the photoconductive layer. Obtained. A toner image was obtained. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electrolytic copper plating layer corresponding to the non-circuit portion. Next, it is treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ), and the exposed electrolytic copper plating layer, the underlying electroless copper plating layer, and the copper-clad laminate The copper layer was removed. The photoconductive layer and the second resin layer used as the etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) and isopropyl alcohol to obtain a circuit board. When the obtained circuit board was observed with a microscope, the through-hole diameter L16 at the time of drilling shown in FIG. 43 was 150 μm, the through-hole diameter at the time of copper plating was L17 = 125 μm, and the through-hole land diameter L18 was 150 μm. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  Using a coating solution having the composition shown in Table 1, a film comprising a photoconductive layer on a polyethylene terephthalate film (Mitsubishi Chemical Polyester Film) having a thickness of 25 μm using a curtain coating method (film thickness after drying 20 μm) Manufactured.

  A through-hole of 0.15 mmφ was opened in a copper-clad glass-based epoxy resin substrate (area 340 mm × 510 mm, base material thickness 0.1 mm, copper layer thickness 12 μm), and then electroless plating treatment was performed to form an inner wall of the through hole An electroless copper plating layer having a thickness of about 0.5 μm was provided on the surface. Using a laminator for dry film photoresist, the photoconductive layer film was thermocompression bonded to both surfaces of the substrate to provide a photoconductive layer on the conductive layer.

  Next, after the polyethylene terephthalate film was peeled off at room temperature, a charge was applied to both surfaces using a corona charging device (charging transformer output; +5.0 kV) on the surface of the photoconductive layer. When the surface potential was measured, the photoconductive layer on the surface conductive layer was +100 V, the photoconductive layer on the hole was +300 V, and it was confirmed that charge contrast was formed on the surface conductive layer and the hole. . Subsequently, using a positively charged toner for Mitsubishi OPC printing system (“ODP-TW” manufactured by Mitsubishi Paper Industries Co., Ltd.), reversal development is performed by applying a bias voltage of +200 V, and the toner is charged on the entire surface except for the hole. I wore it. Subsequently, the toner was fixed by heating at 70 ° C. for 2 minutes to obtain a good first resin layer.

  Next, only the photoconductive layer on the hole was dissolved and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.). When the through hole portion was observed with a microscope, the through hole diameter L7 at the time of drilling shown in FIG. 45 was 150 μm, the through hole diameter at the time of copper plating was L8 = 149 μm, and the diameter L9 of the photoconductive layer removal portion was 110 μm. It was. Subsequently, an electrolytic copper plating treatment was performed to form an electrolytic copper plating layer having a thickness of about 12 μm on the electroless copper plating layer in the through hole. Further, the photoconductive layer in the through-hole portion was dissolved and removed again using a 1% by mass aqueous sodium carbonate solution (30 ° C.). The photoconductive layer around the through hole was removed concentrically with the through hole. The through hole diameter L10 at the time of drilling shown in FIG. 47 was 150 μm, the through hole diameter at the time of copper plating was L11 = 125 μm, and the diameter L12 of the photocrosslinkable resin layer removal portion was 190 μm.

  Next, both surfaces were charged using a corona charging device (charging transformer output +5.0 V). The surface potential was measured and found to be + 380V. Subsequently, using an acrylic resin emulsion (the toner described in Example 1 of JP-A-2002-296847), reversal development is performed by applying a bias voltage of +300 V so that the toner adheres to the conductive layer on the inner wall of the hole. It was. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a third resin layer. Next, propylene carbonate is used as a solvent that dissolves the first resin layer but does not dissolve the third resin layer and the photoconductive layer, and only the first resin layer is dissolved and removed from the surface, washed with water, and dried at 90 ° C. for 20 minutes. Did.

  Subsequently, a photomask (conductor width and gap: 50 μm) on which a circuit pattern was drawn was placed, and UV exposure was performed for 30 seconds using a high pressure mercury lamp light source device for printing (Unirec URM300, manufactured by Ushio Electric) having a suction adhesion mechanism. . Further, the substrate was inverted, and the photoconductive layer on the opposite side was exposed in the same manner to induce conductivity in the exposed portion on the photoconductive layer.

  The substrate after the exposure processing was charged using a corona charging device (charging transformer output +5.0 V) to form an electrostatic latent image. The surface potential of the unexposed part after 1 minute of the charging treatment was 330 V, and the surface potential of the exposed part was 100 V. Subsequently, using an acrylic resin emulsion (toner described in Example 1 of JP-A-2002-296847), a bias voltage of 220 V is applied to perform reverse development, and a toner image is formed on a circuit portion on the photoconductive layer. Got. The toner was thermally fixed at 90 ° C. for 2 minutes to obtain a second resin layer.

The photoconductive layer not covered with the second resin layer was eluted and removed using a 1% by mass aqueous sodium carbonate solution (30 ° C.) to expose the electroless copper plating layer corresponding to the non-circuit portion. Then, it was treated with a ferric chloride-based etching solution (40 ° C., spray pressure 3.0 kg / cm ² ) to remove the exposed electroless copper plating layer and the copper layer of the copper-clad laminate below it. . The photoconductive layer, the second resin layer, and the third resin layer used as an etching resist were removed with a 3% by mass aqueous sodium hydroxide solution (40 ° C.) and isopropyl alcohol to obtain a circuit board. When the obtained circuit board was observed with a microscope, when the obtained circuit board was observed with a microscope, the through hole diameter L13 = 150 μm at the time of drilling shown in FIG. 48, the through hole diameter L14 = 125 μm at the time of copper plating, The through-hole land diameter L15 = 180 μm, and it was confirmed that a through-hole having a narrow land width was formed. Moreover, no disconnection was confirmed in the circuit portion and the through hole portion.

  The present invention can be used for manufacturing circuit boards such as printed wiring boards and semiconductor devices.

Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. Sectional drawing which shows 1 process in the manufacturing method of the circuit board of this invention. 1 is a schematic cross-sectional view showing an example of a multilayer circuit board. Schematic showing holes and lands. Sectional drawing which shows the manufacturing process of the circuit board by a subtractive method. FIG. 52 is a cross-sectional view showing a step following the step in FIG. 51 in the circuit substrate manufacturing process by the subtractive method. FIG. 53 is a cross-sectional view showing a step following the step in FIG. 52 in the circuit substrate manufacturing process by the subtractive method. FIG. 54 is a cross-sectional view showing a step following the step in FIG. 53 in the circuit substrate manufacturing process by the subtractive method. The schematic diagram showing the position gap of a hole and a land. Sectional drawing which shows the example which provided the electrodeposition photoresist in the manufacturing process of the circuit board by a subtractive method. Sectional drawing showing the 2nd resin layer formation process in the manufacturing method of the circuit board of this invention. Sectional drawing showing 1 process of the manufacturing method of the circuit board of this invention. Sectional drawing showing 1 process of the manufacturing method of the circuit board of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulating board | substrate 2 Conductive layer 3 Hole 4 Circuit formation board | substrate 6 2nd resin layer 7 In-hole plating layer 8 3rd resin layer 10 4th resin layer 12 Conductive layer 13 Conductive layer 15 Photoconductive layer 17 Hole 18 Land 19 Development Electrode 20 Resin particle 21 Distance between photoconductive layer surface and conductive layer surface on surface conductive layer 22 Distance between photoconductive layer surface and conductive layer surface on hole 31 Through-hole (through hole)
32 Via hole (non-through hole)
33 Interstitial via hole 34 Electrodeposited photoresist 35 Etching resist

Claims (4)

  A step of forming a photoconductive layer on the surface of the insulating substrate having a conductive layer on the surface and through holes and / or inner walls of non-through holes, a step of forming a second resin layer on the photoconductive layer other than on the holes, and holes A step of removing the upper photoconductive layer, a step of removing the second resin layer, a step of forming an electrostatic latent image on the photoconductive layer, a portion of the photoconductive layer corresponding to the circuit portion, and a conductive layer in the hole A circuit board comprising a step of forming a third resin layer thereon, a step of removing a photoconductive layer corresponding to a non-circuit portion, a step of etching an exposed conductive layer, and a step of removing the third resin layer and the photoconductive layer Manufacturing method.   A step of forming a photoconductive layer on the surface of the insulating substrate having a conductive layer on the surface and through holes and / or inner walls of non-through holes, a step of forming a second resin layer on the photoconductive layer other than on the holes, and holes Removing the upper photoconductive layer, forming a fourth resin layer on the conductive layer in the hole, removing the second resin layer, forming an electrostatic latent image on the photoconductive layer, circuit Forming a third resin layer on the photoconductive layer corresponding to the portion, removing the photoconductive layer corresponding to the non-circuit portion, etching the exposed conductive layer, third resin layer, photoconductive The manufacturing method of the circuit board which consists of a process of removing a layer and a 4th resin layer.   The step of forming the second resin layer on the photoconductive layer other than on the hole uniformly charges the surface of the photoconductive layer, and generates a potential difference between the photoconductive layer on the hole and the photoconductive layer on the surface conductive layer. 3. The method of manufacturing a circuit board according to claim 1, comprising a step of inducing, and a step of forming a second resin layer on the photoconductive layer other than on the hole using the potential difference.   The method for manufacturing a circuit board according to claim 1, further comprising a step of providing a plated conductive layer on the conductive layer in the hole after removing the photoconductive layer on the hole.

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