JP2005281727A - Dlc film body manufacturing method and dlc film body - Google Patents

Dlc film body manufacturing method and dlc film body Download PDF

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JP2005281727A
JP2005281727A JP2004093543A JP2004093543A JP2005281727A JP 2005281727 A JP2005281727 A JP 2005281727A JP 2004093543 A JP2004093543 A JP 2004093543A JP 2004093543 A JP2004093543 A JP 2004093543A JP 2005281727 A JP2005281727 A JP 2005281727A
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dlc film
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film
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Yoshimi Nishimura
芳実 西村
Mitsuyasu Yatsuka
充保 八束
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KURITA SEISAKUSHO KK
Kurita Seisakusho Corp
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KURITA SEISAKUSHO KK
Kurita Seisakusho Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To form a thick DLC (diamond-like carbon) film on a surface of a base material to reduce the residual stress in the film. <P>SOLUTION: A base material to be coated is placed in a vacuum container filled with hydrocarbon-based gas, the pulse RF voltage and the high-voltage DC pulse voltage of negative polarity are alternately applied to the base material, the DC pulse voltage is applied after completion of application of the pulse RF voltage, and the pulse-height value of the DC pulse voltage is set to the threshold voltage transferred to the glow discharge. The hydrocarbon-based gas is toluene gas, the gas pressure is set to be 0.1-2 Pa, and the DC pulse voltage is applied in 10-50 μs after completion of application of the pulse RF voltage. The DLC film having the residual stress of the coated base material, which is 0-0.5 GPa is provided. The DLC film having thickness of 1-40 μm is provided. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、工業および医用部材の耐摩擦摩耗特性を向上させる表面加工技術に関するものである。   The present invention relates to a surface processing technique for improving friction and wear resistance characteristics of industrial and medical members.

工業用に利用されるダイヤモンド状カーボン「DLC(Diamond-Like Carbon)」膜は、PVD法もしくはCVD法によるドライコーティング技術で作製されている。図8に現在用いられているCVD法によるDLC膜作製装置(従来例1)の構成を示す。この装置では真空容器11の内部にフィードスルー16を介してDLC膜がコーティングされる基材1が設置されている。真空容器11の上部にはRF入射窓23とアンテナ24が設けられ、アンテナ24には整合器22aを介してRF電源21aが接続され、フィードスルー16には整合器22bを会してRF電源21bが接続されている。   A diamond-like carbon “DLC (Diamond-Like Carbon)” film used for industrial use is produced by a dry coating technique using a PVD method or a CVD method. FIG. 8 shows a configuration of a DLC film manufacturing apparatus (conventional example 1) using the CVD method currently used. In this apparatus, a base material 1 on which a DLC film is coated through a feedthrough 16 is installed inside a vacuum vessel 11. An RF incident window 23 and an antenna 24 are provided on the upper portion of the vacuum vessel 11, and an RF power source 21a is connected to the antenna 24 via a matching unit 22a. The matching unit 22b is connected to the feedthrough 16 to meet the RF power source 21b. Is connected.

また、真空容器11の内部にはボンベ17からトルエンガスが供給されている。アンテナ24から真空容器11の内部に放射された電磁波はトルエンガスを電離し、プラズマ化する。一方、基材1にはRF電源21bにより高周波電圧が印加されるため、プラズマから基材1に向かって高エネルギーを持つイオンが引き出される。基材1表面にはプラズマ中で生成されるラジカルがイオンとともに到達するため、熱非平衡状態で化学反応が起き、DLC膜が作製される。   In addition, toluene gas is supplied into the vacuum vessel 11 from a cylinder 17. The electromagnetic waves radiated from the antenna 24 into the vacuum vessel 11 ionize the toluene gas and turn it into plasma. On the other hand, since a high frequency voltage is applied to the base material 1 by the RF power source 21 b, ions having high energy are extracted from the plasma toward the base material 1. Since radicals generated in plasma reach the surface of the substrate 1 together with ions, a chemical reaction occurs in a thermal non-equilibrium state, and a DLC film is produced.

また、本願の発明者は、先に共通のフィードスルーを介してプラズマ発生電源と高電圧パルス発生用電源とにより、基材に高周波パルスと負の高電圧パルスとを重畳的に印加する表面改質装置および改質方法を開発している(従来例2)。(特開2001−26887公報参照)。この従来例2は、基材の外形に沿ってプラズマを発生させる一方、該基材に負の高電圧パルスを印加することにより、前記プラズマ中のイオンを誘引させて基材に注入する誘引注入および基材に薄膜を形成する誘引堆積並びに基材をスパッタクリーニングする誘引衝突を行うものである。
特開2001−26887公報
In addition, the inventor of the present application previously applied a surface modification in which a high-frequency pulse and a negative high-voltage pulse are superimposedly applied to a substrate by a plasma generation power source and a high-voltage pulse generation power source through a common feedthrough. Quality device and reforming method are being developed (conventional example 2). (See JP 2001-26887 A). In this conventional example 2, plasma is generated along the outer shape of the base material, and by applying a negative high voltage pulse to the base material, the ions in the plasma are attracted and injected into the base material. And attracting deposition for forming a thin film on the substrate and attracting collision for sputter cleaning the substrate.
JP 2001-26887 A

しかしながら、従来例1で作製されたDLC膜は、残留応力が圧縮方向に約10Gpaもあり、10μm以上の厚膜コーティングやDLCとの親和性が良くない基材へのコーティングが困難であった。   However, the DLC film produced in Conventional Example 1 has a residual stress of about 10 Gpa in the compression direction, and it is difficult to coat a thick film having a thickness of 10 μm or more or a base material that does not have good affinity with DLC.

本発明は前記従来例2の装置を用いて、基材表面にDLC膜を厚く成膜すると共に膜内の残留応力を低減させることができるDLC成膜物の製造方法およびDLC成膜物を提供することを目的とするものである。   The present invention provides a method for producing a DLC film and a DLC film that can form a DLC film thick on the surface of the substrate and reduce residual stress in the film using the apparatus of Conventional Example 2. It is intended to do.

上記課題を解決するため、本発明の第1の課題解決手段は方法であり、コーティング対象となる基材を炭化水素系ガスで満たされた真空容器内に設置し、基材にパルスRF電圧と負極性の高電圧DCパルス電圧を交互に印加し、パルスRF電圧の印加終了後にDCパルス電圧を印加し、前記DCパルス電圧の波高値電圧をグロー放電に移行するしきい値電圧に設定としたことである。   In order to solve the above problems, a first problem solving means of the present invention is a method, in which a substrate to be coated is placed in a vacuum vessel filled with a hydrocarbon-based gas, and a pulse RF voltage is applied to the substrate. A negative high voltage DC pulse voltage is alternately applied, and after the application of the pulse RF voltage, the DC pulse voltage is applied, and the peak voltage of the DC pulse voltage is set to a threshold voltage for shifting to glow discharge. That is.

第2の課題解決手段は方法であり、第1の方法に加え、前記炭化水素系ガスは、トルエンガスである。   A second problem solving means is a method. In addition to the first method, the hydrocarbon-based gas is toluene gas.

第3の課題解決手段は方法であり、第1の方法に加え、前記炭化水素系ガスのガス圧力は、0.1〜2Paである。   A third problem solving means is a method. In addition to the first method, the gas pressure of the hydrocarbon-based gas is 0.1 to 2 Pa.

第4の課題解決手段は方法であり、第1の方法に加え、前記パルスRF電圧の印加終了後、10〜50μs経過した後に、前記DCパルス電圧を印加することである。   A fourth problem solving means is a method. In addition to the first method, the DC pulse voltage is applied after 10 to 50 μs has elapsed after the application of the pulse RF voltage.

第5の課題解決手段は方法であり、第1の方法に加え、前記炭化水素系ガスはトルエンガス、ガス圧力は0.1〜2Paとし、前記パルスRF電圧の印加終了後、10〜50μs経過した後にDCパルス電圧を印加することである。   The fifth problem solving means is a method. In addition to the first method, the hydrocarbon gas is toluene gas, the gas pressure is 0.1 to 2 Pa, and 10 to 50 μs has elapsed after the application of the pulse RF voltage. After that, a DC pulse voltage is applied.

第6の課題解決手段はDLC成膜物であり、コーティングされた基材の残留応力が0〜0.5GPaである。   A sixth problem solving means is a DLC film, and the residual stress of the coated substrate is 0 to 0.5 GPa.

第7の課題解決手段はDLC成膜物であり、コーティングされた基材の残留応力が0.1〜0.5GPaである。   The seventh problem solving means is a DLC film, and the residual stress of the coated substrate is 0.1 to 0.5 GPa.

第8の課題解決手段はDLC成膜物であり、コーティングされた基材の残留応力が0である。   The eighth problem-solving means is a DLC film, and the residual stress of the coated substrate is zero.

第9の課題解決手段はDLC成膜物は、コーティングされた基材の膜厚が1〜40μmである。   A ninth problem-solving means is that the DLC film is a coated substrate having a thickness of 1 to 40 μm.

このように、本発明のDLC成膜物の製造方法は、少なくとも一以上の炭化水素系ガスを用いて、パルスプラズマによる、イオン注入プロセスと成膜プロセスとを組み合わせた複合プロセスによって、基材表面にDLC膜を成膜する。また、その複合プロセスの前にパルスプラズマによる表面調整プロセスを設けてもよい。   As described above, the method for producing a DLC film-formed product according to the present invention uses a composite process that combines an ion implantation process and a film-forming process using pulsed plasma using at least one or more hydrocarbon-based gas. A DLC film is formed on the substrate. Further, a surface adjustment process using pulsed plasma may be provided before the combined process.

プラズマ発生用高周波電源と高電圧パルス発生用電源とを、共通のフィールドスルーを介してチャンバー内の基材に接続しておき、前記プラズマ発生用高周波電源から基材に高周波パルス(パルスRF電圧)を印加して基材の外形に沿って周囲にプラズマを発生させるのである。   A high-frequency power source for plasma generation and a power source for high-voltage pulse generation are connected to the base material in the chamber via a common field through, and the high-frequency pulse (pulse RF voltage) is applied from the high-frequency power source for plasma generation to the base material. Is applied to generate plasma around the outer shape of the substrate.

そして、そのプラズマ中またはアフターグロープラズマ中に、高電圧パルス発生用電源から基材に負の高電圧パルス(DCパルス電圧)を少なくとも1回印加し、かつ、これら高周波パルスの印加と負の高電圧パルスの印加とを繰り返し行うのである。なお、この高周波パルスの印加と高電圧パルスの印加との繰り返し数は、例えば100回/秒〜5000回/秒程度である。   Then, a negative high voltage pulse (DC pulse voltage) is applied to the base material from the high voltage pulse generating power source at least once in the plasma or afterglow plasma, and the application of these high frequency pulses and the negative high voltage are applied. The voltage pulse is repeatedly applied. The number of repetitions of the application of the high frequency pulse and the application of the high voltage pulse is, for example, about 100 times / second to 5000 times / second.

高周波パルス幅を2〜200μsの短パルスとし、好ましくは、5〜20μsの短パルスとする。高電圧パルス幅を0.2〜50μsの短パルスとし、好ましくは、1〜5μsの短パルスとする。前記高周波パルスの印加後10〜50μs経過した後に高電圧パルスを印加する。   The high-frequency pulse width is a short pulse of 2 to 200 μs, preferably a short pulse of 5 to 20 μs. The high voltage pulse width is a short pulse of 0.2 to 50 μs, preferably a short pulse of 1 to 5 μs. A high voltage pulse is applied after 10 to 50 μs has elapsed since the application of the high frequency pulse.

パルスプラズマによるイオン注入プロセスおよび初期成膜段階での高電圧パルスの電圧を初期成膜段階以後の成膜段階における高電圧パルスの電圧よりも高く設定し、かつ前記高周波パルスと高電圧パルスの印加の繰り返し数を、前記初期成膜段階後の成膜段階でより多くしてもよい。   The voltage of the high voltage pulse in the ion implantation process by the pulse plasma and the initial film formation stage is set higher than the voltage of the high voltage pulse in the film formation stage after the initial film formation stage, and the application of the high frequency pulse and the high voltage pulse is performed. The number of repetitions may be increased in the film formation stage after the initial film formation stage.

パルスプラズマイオン注入プロセスおよび初期成膜段階における高電圧パルスの電圧をマイナス(−)20kVに設定し、それ以後の成膜段階における前記電圧をマイナス10kVに設定する。   The voltage of the high voltage pulse in the pulse plasma ion implantation process and the initial film formation stage is set to minus (−) 20 kV, and the voltage in the subsequent film formation stage is set to minus 10 kV.

少なくともパルスプラズマイオン注入プロセスの後期から初期成膜段階の前期にかけて、不純物としてシランカップリング用剤を加える。シランカップリング用剤としては、例えばアルコキシド系のものが挙げられ、ヘキサメチルジシロキサン(HMDSO),テトラメチルシラン(TMS),テトラエトオキシシリコン(TEOS)等が挙げられる。特に前記ヘキサメチルジシロキサンが最も好適であり、またこの場合、成膜プロセスにおける初期成膜段階でのチャンバー内のガス圧を0.3〜0.5Paとし、その後の成膜段階でのガス圧を0.8〜3Paとするのが好ましい。   A silane coupling agent is added as an impurity at least from the latter stage of the pulse plasma ion implantation process to the first stage of the initial film formation stage. Examples of the silane coupling agent include alkoxide-based agents, such as hexamethyldisiloxane (HMDSO), tetramethylsilane (TMS), tetraethoxysilicon (TEOS), and the like. In particular, the hexamethyldisiloxane is most suitable. In this case, the gas pressure in the chamber at the initial film formation stage in the film formation process is set to 0.3 to 0.5 Pa, and the gas pressure at the subsequent film formation stage is set. Is preferably set to 0.8 to 3 Pa.

表面調整用ガスとして、アルゴンとメタンあるいは更に水素を含む混合ガスを用いる。パルスプラズマイオン注入用ガスとしてメタンガスを用いる。成膜用ガスとしてアセチレン,プロパン,ブタン,ヘキサン,ベンゼン,クロルベンゼン,トルエンからなる群より選ばれた一以上のガスを用いる。   As the surface conditioning gas, a mixed gas containing argon and methane or further hydrogen is used. Methane gas is used as the pulse plasma ion implantation gas. As the film forming gas, one or more gases selected from the group consisting of acetylene, propane, butane, hexane, benzene, chlorobenzene, and toluene are used.

即ち、前記表面調整用ガスのうち、分子量の大きいアルゴンガスにおける分子衝突により、基材表面をクリーニングすると共に、メタンガスにおける炭素原子および水素原子の基材表面への付着により表面調整を行う。   That is, the surface of the substrate is cleaned by molecular collision in argon gas having a large molecular weight among the surface conditioning gases, and the surface is adjusted by adhesion of carbon atoms and hydrogen atoms in methane gas to the substrate surface.

そして、パルスプラズマイオン注入用ガスとしてメタンガスを用いて、炭素単原子を基材に注入した後、成膜用ガスとしてアセチレン,プロパン等の炭素2原子分子以上を基材に衝突させて成膜するのである。   Then, methane gas is used as a pulse plasma ion implantation gas to inject carbon monoatomics into the substrate, and then a film is formed by colliding two or more carbon atoms such as acetylene and propane with the substrate as a film forming gas. It is.

パルスプラズマイオン注入用ガスとしてメタンガスを用いる前に、窒素ガスを用いても良い。この場合、基材に注入された窒素原子は、その後に注入される炭素原子が基材中に拡散するのを防止する機能を有する。   Nitrogen gas may be used before methane gas is used as the pulse plasma ion implantation gas. In this case, the nitrogen atom implanted into the substrate has a function of preventing the subsequently implanted carbon atoms from diffusing into the substrate.

前記基材には、DLC成膜が必要なあらゆる完成品や部品等が含まれ、具体的には試作用金型,工具,ハードディスク,半導体製造用部品,ゴルフクラブヘッドおよび自動車部品等が挙げられる。   The base material includes all finished products and parts that require DLC film formation, and specifically includes prototype molds, tools, hard disks, semiconductor manufacturing parts, golf club heads, automobile parts, and the like. .

基材は金属(鉄など)等の導電性材料の他、プラスチック,ゴムおよびセラミックス等の絶縁性材料であっても良い。   The base material may be an insulating material such as plastic, rubber and ceramics in addition to a conductive material such as metal (iron or the like).

また、基材を低融点合金、例えば、亜鉛合金,アルミニウム合金,マグネシウム合金とすることができる。本発明の成膜方法では、基本的にパルスプラズマによって、イオン注入およびDLC成膜の各プロセスを行うため、成膜中における基材の温度を低く抑えることが可能となり、低融点合金へのDLC成膜が実現し得る。   The base material can be a low melting point alloy such as a zinc alloy, an aluminum alloy, or a magnesium alloy. In the film forming method of the present invention, each process of ion implantation and DLC film formation is basically performed by pulsed plasma, so that the temperature of the substrate during film formation can be kept low, and DLC into a low melting point alloy is achieved. Film formation can be realized.

基材が絶縁性材料である場合に、該基材を導電性材料からなるホルダーに保持した状態で各処理を行う。   When the base material is an insulating material, each treatment is performed with the base material held in a holder made of a conductive material.

DLC成膜物は、基材の表面にDLC膜が直接成膜されたDLC成膜物であって、基材の表面から所定深さまでに炭素原子が注入され、基材とDLC膜との界面には注入原子と炭素原子との傾斜層が形成され、前記基材中の注入原子とDLC膜の炭素原子とが共有結合されており、DLC膜中の炭素原子が整列されているものである。   A DLC film-formed product is a DLC film-formed product in which a DLC film is directly formed on the surface of a base material. Carbon atoms are injected from the surface of the base material to a predetermined depth, and the interface between the base material and the DLC film. Is formed with an inclined layer of implanted atoms and carbon atoms, wherein the implanted atoms in the substrate and the carbon atoms of the DLC film are covalently bonded, and the carbon atoms in the DLC film are aligned. .

本発明によれば、負極性の高電圧DCパルス電圧の波高値電圧の大きさを、DCパルス電圧によりグロー放電が生じるしきい値電圧と一致させることで、DLC膜の残留応力を極めて小さくすることができるとともに、10μm以上の厚膜コーティングやDLCとの親和性が良くない基材へのコーティングも可能となる。   According to the present invention, the residual stress of the DLC film is made extremely small by making the magnitude of the peak value voltage of the negative high voltage DC pulse voltage coincide with the threshold voltage at which glow discharge is generated by the DC pulse voltage. In addition, a thick film coating of 10 μm or more and a coating on a substrate that does not have a good affinity with DLC are also possible.

以下、本発明の実施態様を図に示す一実施例に基づき説明する。
図1において、本装置では真空容器11の内部にフィードスルー16を介してDLC膜がコーティングされる基材1が設置されている。真空容器11には原料ガスとなるトルエンガスがガス供給槽17に供給され、その内部はガス圧力が0.1〜2Paの範囲に設定されている。フィードスルー16には整合器13を介してパルスRF電圧を発生するパルスRF電源12が接続され、基材1に負極性のDCパルス電圧を印加するための高電圧パルス電源3がフィルタ14を介して接続されている。ここで、フィルタ14はパルスRF電圧が高電圧パルス電源3に侵入しないように保護するためのものである。パルスRF電源13と高電圧パルス電源3の動作は同期信号発生器15により制御される。
Hereinafter, embodiments of the present invention will be described based on an example shown in the drawings.
In FIG. 1, in this apparatus, a base material 1 on which a DLC film is coated via a feedthrough 16 is installed inside a vacuum vessel 11. Toluene gas, which is a raw material gas, is supplied to the vacuum vessel 11 to the gas supply tank 17, and the gas pressure is set within a range of 0.1 to 2 Pa. A pulse RF power source 12 for generating a pulse RF voltage is connected to the feedthrough 16 via a matching unit 13, and a high voltage pulse power source 3 for applying a negative DC pulse voltage to the substrate 1 is passed through a filter 14. Connected. Here, the filter 14 is for protecting the pulse RF voltage from entering the high voltage pulse power supply 3. The operations of the pulse RF power supply 13 and the high voltage pulse power supply 3 are controlled by a synchronization signal generator 15.

図2に示すように、重畳装置9は、フィードスルー16と高電圧パルス発生用電源3との間を結合すると共に、パルスRF電源(プラズマ発生用電源)12と高電圧パルス電源(高電圧パルス発生用電源)3との相互干渉を阻止する結合・相互干渉阻止回路19と、プラズマ発生用電源12と基材1とのインピーダンスを整合する整合回路部17とから構成されている。   As shown in FIG. 2, the superimposing device 9 couples between the feedthrough 16 and the high voltage pulse generating power source 3, as well as a pulse RF power source (plasma generating power source) 12 and a high voltage pulse power source (high voltage pulse power source). The power generation unit 3 includes a coupling / mutual interference prevention circuit 19 that prevents mutual interference with the power generation unit 3, and a matching circuit unit 17 that matches the impedance between the plasma generation power source 12 and the substrate 1.

結合・相互干渉阻止回路19は、高電圧パルスによりアーク放電を生じさせ、回路を導通するためのギャップG1,プラズマ発生用電源12からの高周波電力が高電圧パルス発生用電源3に影響するのを阻止するためのダイオードDおよびコイルL1,更に高電圧パルス発生用電源3の高電圧パルスがプラズマ発生用電源12に影響しないようにするための抵抗Rおよび保護ギャップG2を有する。なお、前記ギャップG1は、パルス印加電圧が低い場合には、短絡して使用することがある。この重畳装置9における結合・相互干渉阻止回路19は、ダイオードDのカソード側が高電圧パルス発生用電源3に接続されている。また、抵抗Rの非接地側端が同軸ケーブル18により、プラズマ発生用電源12に接続されている。また、前記ダイオードDは省略しても良い。   The coupling / mutual interference blocking circuit 19 generates an arc discharge by a high voltage pulse, and the high frequency power from the gap G1, the plasma generating power source 12 for conducting the circuit affects the high voltage pulse generating power source 3. A diode D and a coil L1 for blocking, and a resistor R and a protection gap G2 for preventing a high voltage pulse from the high voltage pulse generating power source 3 from affecting the plasma generating power source 12 are provided. The gap G1 may be short-circuited when the pulse application voltage is low. In the coupling / mutual interference blocking circuit 19 in the superimposing device 9, the cathode side of the diode D is connected to the high voltage pulse generating power source 3. The non-ground side end of the resistor R is connected to the plasma generating power source 12 by the coaxial cable 18. The diode D may be omitted.

整合回路部17は、共振用可変コンデンサC1と、インピーダンス変換用コンデンサC2と、高耐圧コンデンサC3と、コイルL2とから構成されている。前記コンデンサC2は前記抵抗Rに並列に接続されているので、非接地側端がやはり同軸ケーブル18により、プラズマ発生用電源12に接続されている。   The matching circuit unit 17 includes a resonance variable capacitor C1, an impedance conversion capacitor C2, a high voltage capacitor C3, and a coil L2. Since the capacitor C2 is connected in parallel to the resistor R, the non-grounded end is also connected to the plasma generating power source 12 by the coaxial cable 18.

高耐性コンデンサC3のギャップG1側における端子は、フィードスルー16および基材1側のギャップG1導体に接続されている。   The terminal on the gap G1 side of the high-resistance capacitor C3 is connected to the feedthrough 16 and the gap G1 conductor on the substrate 1 side.

前記プラズマ発生用電源12は、CPU(整合器)13による制御に基づいて基材1に高周波パルスを印加するものである。また高電圧パルス発生用電源3は、CPU13による制御に基づいて基材1に負の高電圧パルスを印加するものである。   The plasma generating power source 12 applies a high frequency pulse to the substrate 1 based on control by a CPU (matching unit) 13. The high voltage pulse generating power source 3 applies a negative high voltage pulse to the substrate 1 based on control by the CPU 13.

作製されたDLC膜の残留応力を図5に示す片持ち梁法で測定した。この測定方法は、短冊状の基材をホルダーで支持し、この試料を湾曲させて残留応力を計測するのである。その結果が図6のグラフであり、横軸にDCパルス電圧の波高値電圧VPP(kV),縦軸に残留応力σ(GPa)をとったものである。測定に用いた際の基材は厚さ0.5mmの石英基板(ヤング率76.2GPa,ポアソン比0.14)であり、この基板を装置内に設置しその表面にDLC膜を作製した。このときの成膜条件は、ガス圧力が0.5Paであった。 The residual stress of the produced DLC film was measured by the cantilever method shown in FIG. In this measuring method, a strip-shaped base material is supported by a holder, and the residual stress is measured by curving the sample. The result is the graph of FIG. 6, in which the horizontal axis represents the peak voltage V PP (kV) of the DC pulse voltage and the vertical axis represents the residual stress σ (GPa). The base material used for the measurement was a quartz substrate (Young's modulus 76.2 GPa, Poisson's ratio 0.14) having a thickness of 0.5 mm. This substrate was placed in the apparatus and a DLC film was formed on the surface. The film forming condition at this time was a gas pressure of 0.5 Pa.

電源供給条件は図4に示すように、パルスRF電圧の入力電圧,電力およびパルス幅がそれぞれ1〜2kV,100Wおよび50μsであり、DCパルス電圧のパルス幅が5μsであった。また、パルスRF電圧の出力周波数13.56MHz,繰り返し発振周波数500Hzであり、DCパルス電圧はパルスRF電圧の立ち下がりから50μs後に印加した。そして、パルスRF電圧の印加と、DCパルス電圧の印加との組を360万回にわたり、繰り返した(合計2時間)。   As shown in FIG. 4, the power supply conditions were such that the input voltage, power, and pulse width of the pulse RF voltage were 1 to 2 kV, 100 W, and 50 μs, respectively, and the pulse width of the DC pulse voltage was 5 μs. The output frequency of the pulse RF voltage was 13.56 MHz and the repetition oscillation frequency was 500 Hz. The DC pulse voltage was applied 50 μs after the fall of the pulse RF voltage. Then, the combination of application of the pulse RF voltage and application of the DC pulse voltage was repeated 3.6 million times (total of 2 hours).

図6から分かるように、DLC膜の残留応力σはDCパルス電圧の波高値電圧VPPを変化させると、|VPP|が0から5kVまでの領域で、残留応力σは0.27GPaからほぼ直線的に0.2,0.1と低下し、5kV〜7kVの領域では残留応力σは零(0)となり、もしくは限りなく零に近づく。 As can be seen from FIG. 6, when the residual stress σ of the DLC film changes the peak voltage V PP of the DC pulse voltage, the residual stress σ is almost from 0.27 GPa in the region where | V PP | is 0 to 5 kV. Linearly decreases to 0.2 and 0.1, and in the region of 5 kV to 7 kV, the residual stress σ becomes zero (0) or approaches zero as much as possible.

即ち、|VPP|<7kVの領域(イオン注入領域)では、VPPの絶対値が増加するに伴って減少し、VPP=−5kVではσ=0GPaとなった。一方、|VPP|>7kVの領域(グロー放電領域)になると、VPPの絶対値が大きくなるとともに残留応力σも増大した。この領域では、図3で基材近傍でのプラズマの挙動を示すように、シース領域5で起こるイオンの加速作用によるイオン電流よりも、基材から放出される二次電子による電子電流量の方が大きくなるため、基材近傍でグロー放電が生じてシースに加わる電圧が低下し、イオン注入の効果が減少する。 That, | V PP | In <7 kV region (ion implanted region) decreased with the absolute value of V PP increases, becomes V PP = At -5 kV sigma = 0 GPa. On the other hand, in the region of | V PP |> 7 kV (glow discharge region), the absolute value of V PP increased and the residual stress σ increased. In this region, as shown in FIG. 3, the behavior of plasma in the vicinity of the substrate, the amount of electron current due to secondary electrons emitted from the substrate is greater than the ion current caused by the acceleration of ions occurring in the sheath region 5. Therefore, glow discharge occurs in the vicinity of the substrate, the voltage applied to the sheath is lowered, and the effect of ion implantation is reduced.

図7は、横軸にガス圧力pg(Pa),縦軸にしきい値電圧Vsh(kV)をとったグラフである。これから、ガス圧力を0.2Paから2Paまで増加させると、しきい値電圧は、ほぼ|12|kVから|0.1|kVまで減少することが分かる。このグラフ線よりも上方は、グロー放電領域、下方はイオン注入領域と考えられる。そして、このグラフ線の近傍領域(境界領域)で、イオン注入効率が最も良い。   FIG. 7 is a graph in which the horizontal axis represents the gas pressure pg (Pa) and the vertical axis represents the threshold voltage Vsh (kV). From this, it can be seen that when the gas pressure is increased from 0.2 Pa to 2 Pa, the threshold voltage decreases from approximately | 12 | kV to | 0.1 | kV. The area above the graph line is considered to be a glow discharge region, and the lower part is considered to be an ion implantation region. And the ion implantation efficiency is the best in the region (boundary region) near this graph line.

また、前記電源供給条件(図4)で得られた成膜物の膜厚さは0.5μm,成膜運転時の温度は約100℃であった。このときのDLC成膜速度は約0.25μm/hであった。そして、膜厚1μmの場合は4時間、膜厚40μmの場合は160時間、成膜運転を行った。   The film thickness obtained under the power supply conditions (FIG. 4) was 0.5 μm, and the temperature during the film forming operation was about 100 ° C. The DLC film formation rate at this time was about 0.25 μm / h. The film forming operation was performed for 4 hours when the film thickness was 1 μm and for 160 hours when the film thickness was 40 μm.

本発明は前記した実施例や実施態様に限定されず、特許請求の範囲および範囲を逸脱せずに種々の変形を含む。   The present invention is not limited to the examples and embodiments described above, and includes various modifications without departing from the scope and scope of the claims.

本発明は、DLC成膜物の製造方法およびDLC成膜物に利用される。   The present invention is used for a method of manufacturing a DLC film-formed product and a DLC film-formed product.

本発明の一実施例に係る装置構成の全体図である。1 is an overall view of a device configuration according to an embodiment of the present invention. 図1の要部の電気回路図である。It is an electric circuit diagram of the principal part of FIG. 図1の基材近傍での動作説明図である。It is operation | movement explanatory drawing in the base-material vicinity of FIG. 本発明の一実施例に係る動作シーケンス図である。It is an operation | movement sequence diagram which concerns on one Example of this invention. 残留応力試験の一例を示す正面図である。It is a front view which shows an example of a residual stress test. 本発明の実施例に係る残留応力のパルス電圧依存性グラフ例図である。It is a pulse voltage dependence graph example figure of the residual stress based on the Example of this invention. 本発明の一実施例に係る放電特性グラフ例図である。It is an example of a discharge characteristic graph concerning one example of the present invention. 従来のDLC膜作製装置を示す説明図である。It is explanatory drawing which shows the conventional DLC film production apparatus.

符号の説明Explanation of symbols

1 対象物(基材)
2 薄膜
3 高電圧パルス電源
4 プラズマ
5 シース
6 ラジカル
7 イオン
8 高電圧パルス電源
11 真空容器
12 パルスRF電源
13 整合器
14 フィルタ
15 同期信号発生器
16 フィードスルー
17 トルエンガスボンベ
21a RF電源
21b RF電源
22a 整合器
22b 整合器
23 RF入射窓
24 アンテナ


1 Object (base material)
2 Thin Film 3 High Voltage Pulse Power Supply 4 Plasma 5 Sheath 6 Radical 7 Ion 8 High Voltage Pulse Power Supply 11 Vacuum Container 12 Pulse RF Power Supply 13 Matching Device 14 Filter 15 Synchronization Signal Generator 16 Feedthrough 17 Toluene Gas Cylinder 21a RF Power Supply 21b RF Power Supply 22a Matching device 22b Matching device 23 RF incident window 24 Antenna


Claims (9)

コーティング対象となる基材を炭化水素系ガスで満たされた真空容器内に設置し、
基材にパルスRF電圧と負極性の高電圧DCパルス電圧を交互に印加し、
パルスRF電圧の印加終了後にDCパルス電圧を印加し、
前記DCパルス電圧の波高値電圧をグロー放電に移行するしきい値電圧に設定としたことを特徴とするDLC成膜物の製造方法。
The substrate to be coated is placed in a vacuum container filled with hydrocarbon gas,
A pulse RF voltage and a negative high voltage DC pulse voltage are alternately applied to the substrate,
Apply DC pulse voltage after application of pulse RF voltage,
A method for producing a DLC film-formed product, wherein the peak voltage of the DC pulse voltage is set to a threshold voltage for shifting to glow discharge.
前記炭化水素系ガスは、トルエンガスである請求項1記載のDLC成膜物の製造方法。 The method for producing a DLC film-formed product according to claim 1, wherein the hydrocarbon-based gas is toluene gas. 前記炭化水素系ガスのガス圧力は、0.1〜2Paである請求項1記載のDLC成膜物の製造方法。 The method for producing a DLC film-formed product according to claim 1, wherein a gas pressure of the hydrocarbon-based gas is 0.1 to 2 Pa. 前記パルスRF電圧の印加終了後、10〜50μs経過した後に、
前記DCパルス電圧を印加する請求項1記載のDLC成膜物の製造方法。
After 10-50 μs has elapsed after the application of the pulse RF voltage,
The method for producing a DLC film-formed product according to claim 1, wherein the DC pulse voltage is applied.
前記炭化水素系ガスはトルエンガス、ガス圧力は0.1〜2Paとし、前記パルスRF電圧の印加終了後、10〜50μs経過した後にDCパルス電圧を印加することを特徴とする請求項1記載のDLC成膜物の製造方法。 2. The hydrocarbon gas according to claim 1, wherein the hydrocarbon gas is toluene gas, the gas pressure is 0.1 to 2 Pa, and a DC pulse voltage is applied after 10 to 50 [mu] s has elapsed after the application of the pulse RF voltage. A method for producing a DLC film. コーティングされた基材の残留応力が0〜0.5GPaであるDLC成膜物。 A DLC film-formed product in which the residual stress of the coated substrate is 0 to 0.5 GPa. コーティングされた基材の残留応力が0.1〜0.5GPaであるDLC成膜物。 A DLC film-formed product in which the residual stress of the coated substrate is 0.1 to 0.5 GPa. コーティングされた基材の残留応力が0であるDLC成膜物 DLC film with zero residual stress on coated substrate コーティングされた基材の膜厚が1〜40μmであるDLC成膜物。

A DLC film-formed product having a coated substrate thickness of 1 to 40 μm.

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JP2007237219A (en) * 2006-03-07 2007-09-20 Kurita Seisakusho:Kk Powder compacting die, and its manufacturing method
JP2009012039A (en) * 2007-07-04 2009-01-22 Sumitomo Electric Ind Ltd Powder compacting mold, compact compacted using the powder compacting mold and sintered compact
WO2009116552A1 (en) * 2008-03-18 2009-09-24 株式会社タンガロイ Amorphous carbon covered tool
CN116676557A (en) * 2023-06-08 2023-09-01 广东省广新离子束科技有限公司 Drill bit with self-lubricating DLC coating and preparation method thereof

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Publication number Priority date Publication date Assignee Title
JP2002246455A (en) * 2000-12-11 2002-08-30 Advance Ceramics Internatl Corp Method of manufacturing electrostatic chuck
JP2004238649A (en) * 2003-02-04 2004-08-26 National Institute Of Advanced Industrial & Technology Method and apparatus for manufacturing member coated with carbon-based film
JP2004323973A (en) * 2003-04-08 2004-11-18 Kurita Seisakusho:Kk Method of depositing dlc film, and dlc film-deposited product

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002246455A (en) * 2000-12-11 2002-08-30 Advance Ceramics Internatl Corp Method of manufacturing electrostatic chuck
JP2004238649A (en) * 2003-02-04 2004-08-26 National Institute Of Advanced Industrial & Technology Method and apparatus for manufacturing member coated with carbon-based film
JP2004323973A (en) * 2003-04-08 2004-11-18 Kurita Seisakusho:Kk Method of depositing dlc film, and dlc film-deposited product

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007237219A (en) * 2006-03-07 2007-09-20 Kurita Seisakusho:Kk Powder compacting die, and its manufacturing method
JP2009012039A (en) * 2007-07-04 2009-01-22 Sumitomo Electric Ind Ltd Powder compacting mold, compact compacted using the powder compacting mold and sintered compact
WO2009116552A1 (en) * 2008-03-18 2009-09-24 株式会社タンガロイ Amorphous carbon covered tool
CN116676557A (en) * 2023-06-08 2023-09-01 广东省广新离子束科技有限公司 Drill bit with self-lubricating DLC coating and preparation method thereof

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