JP2005276296A - Memory refreshing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a memory refreshing method capable of improving reading or writing throughput by controlling the refreshing operation start time of each divided bank group. <P>SOLUTION: In the memory refreshing method for dividing a memory having a plurality of banks for reading or writing image data into a plurality of groups constituted of the predetermined number of banks and performing a refreshing operation for each divided group, a waiting time until reading or writing of image data after the refreshing operation of one group is enabled and a waiting time until a refreshing operation for the other group are partially overlapped with each other. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a memory refresh method that is executed to maintain data stored in a page memory without reducing throughput.

  In an image processing apparatus that processes image data, such as a facsimile machine, a digital copying machine, a printer, or a multifunction machine that integrates these functions, image data read by the image processing apparatus or an image input from an external device Some data have various image processing functions, such as rotating data 90 degrees clockwise or counterclockwise, compressing or expanding the data.

  Conventional image processing for image data uses a page memory and is performed as follows. In other words, image data read by the image processing device or image data input from an external device is temporarily stored in a buffer, and when a predetermined page of image data is stored in the buffer, later reading is considered. The image data for one page stored in the buffer is developed at a predetermined address of the page memory calculated in this way, and the developed image data is read out and sent to the recording unit.

  When the storage element in the page memory is left unattended, electric charge leaks out as a current, and after a predetermined time has elapsed, the electric charge disappears and the stored data is lost. Therefore, it is necessary to perform a refresh operation to replenish charges periodically to prevent data loss.

  Since the storage element cannot be accessed during the refresh operation, the refresh operation causes a reduction in the access speed of the page memory. In addition, when the entire page memory is refreshed simultaneously, the current consumption becomes excessive and the power supply voltage may become unstable.

Therefore, for example, as in Patent Document 1, by dividing the page memory into a plurality of blocks and refreshing each block, it is possible to prevent an excessive consumption current and avoid a power drop. A refresh method is used.
JP 2003-030982 A

  However, even if the page memory refresh operation is completed, data cannot be read or written immediately after completion. That is, normally, after the refresh operation is completed, there is a waiting time during which data cannot be read or written in the clock period of 7 to 8 cycles. Therefore, in the conventional page memory refresh method, since the refresh operation periods for different blocks are relatively dispersed, the ratio of the waiting time to the refresh interval is relatively large, and it is difficult to improve the throughput. There was a point.

  The present invention has been made in view of such circumstances, and provides a memory refresh method capable of improving read or write throughput by controlling the refresh operation start timing for each divided bank group. Objective.

  In order to achieve the above object, a memory refresh method according to a first aspect of the present invention divides a memory having a plurality of banks for reading or writing image data into a plurality of groups each having a predetermined number of banks, and the divided groups. In the memory refresh method in which a refresh operation is performed every time, a waiting time until image data can be read or written after a refresh operation for one group and a wait time after a refresh operation for another group partially overlap It is characterized by that.

  In the memory refresh method according to the first aspect of the invention, the memory is divided into a plurality of groups each having a predetermined number of banks until image data can be read or written after the refresh operation for one of the divided groups. The start time of the refresh operation is determined so that the waiting time of the second time overlaps with the wait time after the refresh operation for other groups. As a result, when the refresh operation is executed periodically, the ratio of the waiting time to the refresh interval can be reduced, and the ratio of the data readable period from the page memory to the refresh interval or the data writable period to the page memory is increased. Therefore, it is possible to improve the data reading or writing throughput without changing the refresh cycle of the page memory.

  A memory refresh method according to a second invention is characterized in that, in the first invention, after the refresh operation for one group is started, the refresh operation for another group is continuously performed at substantially equal intervals.

  In the memory refresh method of the second invention, after the refresh operation is started for one group obtained by dividing the memory into a plurality of groups each having a predetermined number of banks, the refresh operation for other groups is performed at substantially equal intervals. Do it continuously. As a result, the waiting time until the group that has started the refresh operation can read or write the image data and the wait time until the group that starts the next refresh operation can read or write the image data. Since time zones always overlap with each other, the waiting time for the entire refresh cycle can be surely reduced, and the throughput of data reading or writing can be improved.

  According to a third aspect of the present invention, there is provided a memory refresh method according to the second aspect, wherein the refresh operation of the memory is synchronized with a clock signal, and the refresh operation for the other group is continuously performed every clock.

  In the memory refresh method according to the third aspect of the invention, after the refresh operation is started for one group obtained by dividing the memory into a plurality of groups of a predetermined number of banks, the refresh operation for other groups is continuously performed one clock at a time. To do. As a result, the waiting time until the group that has started the refresh operation can read or write the image data and the wait time until the group that starts the next refresh operation can read or write the image data. It is possible to overlap the time as much as possible, to minimize the waiting time for the entire refresh period, and to maximize the throughput of reading or writing data.

  According to the present invention, when the refresh operation is performed periodically, the ratio of the waiting time to the refresh interval can be reduced, and the period of data read from the page memory relative to the refresh interval or the period of data write to the page memory can be reduced. Since the ratio increases, it is possible to improve the data reading or writing throughput without changing the refresh cycle of the page memory.

  Hereinafter, the present invention will be described in detail with reference to the drawings showing embodiments thereof. FIG. 1 is a block diagram showing a configuration of a facsimile composite apparatus 20 to which a memory refresh method according to an embodiment of the present invention is applied.

  The facsimile multifunction device 20 includes a control unit 1, a reading unit 2, a recording unit 3, a display unit 4, an operation unit 5, a ROM 6, a RAM 7, a codec unit 8, an image memory 9, a page memory 10, a buffer 11, a modem 12, an NCU ( Network Control Unit) 13, a PC interface unit 14 and the like. The facsimile multifunction device 20 responds to a reading function for reading an original by the reading unit 2 to acquire image data, read image data, image data received by facsimile communication, or image data received from an externally connected PC. A recording function for recording an image in the recording unit 3 and a transmission function for facsimile transmission of read image data or received image data are provided.

  Specifically, the control unit 1 is configured by a CPU, and is connected to the above-described hardware units of the facsimile multifunction peripheral 20 via the bus 15. The control unit 1 controls the above-described hardware units and also controls the ROM 6. Various software functions are executed in accordance with the control program stored in. The reading unit 2 reads a document using a CCD image sensor, for example, and outputs the read image data. Specifically, the optical unit irradiates and scans the document fed to the platen glass, and the reflected light from the document is captured into a CCD image sensor via a mirror, a lens, etc., and the scanned document image data is captured. Read. The read image data is output after, for example, shading processing.

  The recording unit 3 is an electrophotographic printer device, and displays images corresponding to image data of a document read by the reading unit 2, image data received by facsimile communication, image data sent from an external PC, and the like. Print on paper. The display unit 4 is a display device such as a liquid crystal display device or a CRT display. The display unit 4 displays an operation state of the facsimile composite device 20, displays a screen for prompting a user to input an operation, or reads an image of a document read for transmission. Data, image data transmitted from other facsimile machines and PCs, etc. are displayed.

  The operation unit 5 includes character keys, numeric keys, abbreviated dial keys, one-touch dial keys, various function keys, and the like necessary for operating the facsimile multifunction device 20. The operation unit 5 includes a rotation processing setting key 5a for setting whether or not to perform image data rotation processing using the page memory 10 and the buffer 11 as function keys. In addition, the display part 4 can substitute for a part or all of the various keys of the operation part 5 by making the display part 4 into a touch panel system. The ROM 6 stores in advance various software programs necessary for the operation of the facsimile composite apparatus 20. The RAM 7 is composed of SRAM, flash memory, etc., and stores temporary data generated when software is executed. The codec unit 8 encodes and compresses the image data and decodes the encoded and compressed image data. The image memory 9 stores image data obtained by reading and encoding a document.

  The page memory 10 is composed of SDRAM, and stores one page of image data read by the reading unit 2 and one page of image data received from another facsimile apparatus or PC. The image data for one page accumulated and developed in the page memory 10 is read to the recording unit 3, and an image corresponding to the read image data is recorded. The buffer 11 has 24 flip-flops for every 16 pixels configured in a 4 × 4 matrix, and multi-value data including 8 flip-flops as a set is converted into R, G, and B data. Hold as value. Data can be read or written between the page memory 10 and the buffer 11 with 4 × 4 16-pixel data of the page memory 10 as a unit.

  The modem 12 is connected to the bus 15 and is a facsimile modem capable of facsimile communication. The modem 12 is also connected to the NCU 13 connected to the bus 15. The NCU 13 is hardware that performs operations of closing and opening the line L1 with a public switched telephone network (PSTN), and connects the modem 12 to the PSTN as necessary. The facsimile composite apparatus 20 is connected to other facsimile apparatuses by PSTN so that normal facsimile communication can be performed. The PC interface unit 14 is connected to an external PC via, for example, a LAN communication line L2, and transmits / receives data to / from the PC. Various image data created and edited by an external PC are transmitted to the facsimile multifunction apparatus 20 (PC interface unit 14) via the communication line L2, and an image corresponding to the transmitted image data is transmitted to the facsimile multifunction apparatus 20. The data is printed out on a sheet at (recording unit 3).

  Hereinafter, a memory refresh method in the facsimile multifunction apparatus 20 having the above-described configuration will be described. FIG. 2 is a diagram showing a configuration example of a page memory (SDRAM) 10 using the memory refresh method according to the embodiment of the present invention. FIG. 3A shows a case where the conventional memory refresh method is used. FIG. 3B is a timing chart showing the refresh operation in the page memory (SDRAM) 10 when the memory refresh method according to the embodiment of the present invention is used. It is.

  As shown in FIG. 2, the page memory 10 is composed of four banks of SDRAM (0), SDRAM (1), SDRAM (2), and SDRAM (3). The control unit 1 receives a clock signal (CLK signal). By outputting a row address strobe signal (/ RAS signal), a column address strobe signal (/ CAS signal), and a write enable signal (/ WE signal) to the page memory 10 in synchronization with the rising edge of the page memory 10. The data write operation or read operation at the address specified by the row number and column number of the memory space is controlled. A signal having “/” added to the head of the signal name means low active (significant when it is low level).

  The control unit 1 designates a bank for performing a refresh operation by a chip select signal (/ CS0 to / CS3). That is, when the control unit 1 outputs / CS0 to the page memory 10 at a low level, the SDRAM (0) enters a refresh operation, and when / CS1 is output at a low level, the SDRAM (1) When CS2 is output at a low level, the SDRAM (2) enters a refresh operation, and when / CS3 is output at a low level, the SDRAM (3) enters a refresh operation.

  In the present embodiment, a case where four banks are divided into two groups will be described in order to facilitate comparison between the conventional memory refresh method and the memory refresh method according to the present embodiment. That is, SDRAM (0) and SDRAM (2) enter a refresh operation simultaneously, and SDRAM (1) and SDRAM (3) enter a refresh operation simultaneously.

  As shown in FIG. 3A, conventionally, the control unit 1 controls the page memory 10 to set the / RAS signal at a low level, the / CAS signal at a low level, and the / CS0 signal and the / CS2 signal at a low level. When output at each level, the SDRAM (0) and the SDRAM (2) simultaneously enter the refresh operation. Then, during the period of 8 clocks, data cannot be read from or written to SDRAM (0) and SDRAM (2) as a waiting time.

  Then, at approximately the center of the refresh cycle, the control unit 1 now turns the / RAS signal to the low level, the / CAS signal to the low level, the / CS1 signal and the / CS3 signal to the low level for the page memory 10. The SDRAM (1) and the SDRAM (3) simultaneously enter a refresh operation. In the period of 8 clocks thereafter, data cannot be read from or written to the SDRAM (1) and the SDRAM (3) as a waiting time.

  As described above, in the conventional memory refresh method, there is a period during which data cannot be read or written for a total of 16 clock periods as a waiting time during the refresh cycle.

  On the other hand, in the memory refresh method according to the present embodiment, as shown in FIG. 3B, the control unit 1 first sets the / RAS signal to the low level and the / CAS signal to the low level for the page memory 10. Thus, when the / CS0 signal and the / CS2 signal are respectively output at a low level, the SDRAM (0) and the SDRAM (2) simultaneously enter a refresh operation. Then, during the period of 8 clocks, data cannot be read from or written to SDRAM (0) and SDRAM (2) as a waiting time.

  Next, immediately after outputting the above-described chip select signal / CS0 signal and / CS2 signal at the low level, the control unit 1 next turns the / RAS signal at the low level and the / CAS signal to the page memory 10. At a low level, the / CS1 signal and the / CS3 signal are output at a low level, respectively, and the SDRAM (1) and the SDRAM (3) simultaneously enter a refresh operation. In the period of 8 clocks thereafter, data cannot be read from or written to the SDRAM (1) and the SDRAM (3) as a waiting time.

  As described above, the waiting time during which data cannot be read from or written to the SDRAM (0) and the SDRAM (2), and the data is read from or written to the SDRAM (1) and the SDRAM (3). By controlling the start time of the refresh operation so that the waiting time that cannot be overlapped, the period during which data cannot be read or written can be reduced. In the example of FIG. 3B, the period during which data cannot be read or written is a total of 9 clock periods, and the period during which data cannot be read or written by 5 clock periods can be shortened. Data reading or writing throughput can be improved.

  In the present embodiment, the case where the page memory is divided into two parts is described. However, the present invention is not limited to two parts, and the same effect can be expected when the page memory is divided into two or more parts.

  As described above, according to the present embodiment, when the refresh operation is periodically executed, the ratio of the waiting time to the refresh interval can be reduced, and the period in which data can be read from the page memory with respect to the refresh interval, or the page memory Since the ratio of the period in which data can be written to increases, the throughput of reading or writing data can be improved without changing the refresh cycle of the page memory.

  In this embodiment, the facsimile complex apparatus is described as an example. However, the present invention is applied to all apparatuses that perform image processing on the acquired image data, such as a facsimile apparatus, a digital copying machine, and a printer. Needless to say, it can be applied.

1 is a block diagram showing a configuration of a facsimile composite apparatus to which a memory refresh method according to an embodiment of the present invention is applied. FIG. It is a figure which shows the structural example of the page memory (SDRAM) using the memory refresh method which concerns on embodiment of this invention. (A) is a timing chart showing a refresh operation in a page memory (SDRAM) when a conventional memory refresh method is used, and (b) is a case where the memory refresh method according to the embodiment of the present invention is used. 5 is a timing chart showing a refresh operation in the page memory (SDRAM).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Control part 2 Reading part 3 Recording part 5 Operation part 5a Rotation process setting key 6 ROM
7 RAM
10 page memory 11 buffer

Claims (3)

  A refresh operation for one group in a memory refresh method in which a memory having a plurality of banks for reading or writing image data is divided into a plurality of groups each having a predetermined number of banks, and a refresh operation is performed for each of the divided groups. A memory refreshing method, characterized in that a waiting time until subsequent reading or writing of image data becomes possible and a waiting time after a refresh operation for another group partially overlap.   2. The memory refresh method according to claim 1, wherein after the refresh operation for one group is started, the refresh operation for another group is continuously performed at substantially equal intervals.   3. The memory refresh method according to claim 2, wherein the refresh operation of the memory is synchronized with a clock signal, and the refresh operation for the other group is continuously performed every clock.

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