JP2005270423A - Ultrasonic diagnosis apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an ultrasonic diagnosis apparatus for reducing the electric power consumption of a sub-array reception delay adding circuit provided inside an ultrasonic probe and preventing generation of noise. <P>SOLUTION: Receiving signals of an ultrasonic vibrator 3 disposed in a two-dimensional array are transmitted to the sub-array reception delay adding circuit 33 by the unit of sub-array, and inputted to CCD delay elements 53a-53e via a preamplifier 51. The receiving signals are converted to charges in input gates CG1-CG5 when inputted in the CCD delay elements 53a-53e, and are transmitted to an electric potential well in the next stage by a two-phase clock. In this case, necessary reception delay is given to the ultrasonic receiving signals according to the number of stages of transmission of the CCD delay elements 53a-53e selected by the input gates CG1-CG5. The ultrasonic receiving signals to which the reception delay is given are added in the state of charges in the common electric potential well 54, and are transmitted to the body of the ultrasonic diagnosis apparatus via a probe cable after converted to the waveform of the voltage by an FGA 55. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an ultrasonic diagnostic apparatus used in the field of medicine and the like, and more particularly to an ultrasonic diagnostic apparatus that obtains a three-dimensional image in a living body in real time by scanning an ultrasonic beam three-dimensionally.

  An ultrasonic probe is an apparatus for irradiating an ultrasonic wave toward an object and receiving reflected waves from interfaces having different acoustic impedances in the object for the purpose of imaging the inside of the object. As an ultrasonic imaging apparatus employing such an ultrasonic probe, a medical diagnostic apparatus for inspecting the inside of a human body has been put into practical use (see, for example, Patent Documents 1 and 2).

  The ultrasonic diagnostic apparatus used as the medical diagnostic apparatus is composed of an ultrasonic probe 1 and an ultrasonic diagnostic apparatus main body 10 as shown in FIG. The ultrasonic probe 1 includes a one-dimensional array transducer 2 and an in-probe transmission / reception circuit 3. The intra-probe transmission / reception circuit 3 is provided with a subarray reception delay adding circuit 4 which will be described in detail later.

  The one-dimensional array transducer 2 has a plurality of, for example, 128 ultrasonic transducers arranged in a one-dimensional array, and the received signal is input to the sub-array reception delay adding circuit 4 in the in-probe transmission / reception circuit 3. The sub-array reception delay adding circuit 4 delays the signal detected by the one-dimensional array transducer 2 and sends it to the ultrasonic diagnostic apparatus body 10 via the probe cable 5.

  The ultrasonic diagnostic apparatus main body 10 is provided with a main body side transmission / reception unit 12 including a main beam former 11, an image processing unit 13, and a display unit 14. The main beamformer 11 is a delay addition circuit on the main body side, and delays a signal sent from the ultrasonic probe 1 via the probe cable 5 and outputs it to the image processing unit 13. The image processing unit 13 processes the output signal of the main beamformer 11 to generate a two-dimensional ultrasonic image and displays it on the display unit 14.

  As described above, the ultrasonic reception signal is delayed by the sub-array reception delay adding circuit 4 provided in the ultrasonic probe 1, and then the additional delay processing is performed by the main beam former 11 provided in the ultrasonic diagnostic apparatus body 10. To form a desired ultrasonic beam.

  The sub-array reception delay adding circuit 4 generally uses a CCD delay element as a delay element, and is configured as shown in FIG. The reception delay element includes an LC (coil, capacitor), a CCD delay element, and a digital delay line. However, the element used for the subarray reception delay addition circuit 4 needs to be incorporated into the ultrasonic probe 1. The CCD delay element is highly suitable because it is essential to suppress the size and power consumption as much as possible.

  The one-dimensional array transducer 2 includes a plurality of, for example, 128 ultrasonic transducers 2a arranged in a one-dimensional array. The reception signals of the ultrasonic transducers 2a are respectively sent to the sub-array reception delay addition circuit 4, amplified to a predetermined signal level by the preamplifier 21, and then input to the delay circuit 22.

  The delay circuit 22 includes a CCD delay element 23 provided with a tap for selecting a delay time, an FGA (Floating Gate Amplifier) 24 for converting a signal charge into a voltage waveform, and a multiplexer 25. In this example, a CCD delay element 23 having five transfer stages is shown. The signal voltage input to the delay circuit 22 is converted into a signal charge by the input gate and injected into the first-stage potential well, and the clock cycle T, for example, 10 nsec, is generated by the two-phase clocks CLK1 and CLK2 for charge transfer shown in FIG. Each time it is sequentially transferred to the potential well in the next stage.

  The potential wells at each stage of the CCD delay element 23 are provided with electrodes for taking out signals, and FGAs 24 for converting signal charges into voltage waveforms are connected to these electrodes. The output signal of the FGA 24 is sent to the multiplexer 25 as the output of the taps 1 to 5. Further, an input signal to the CCD delay element 23 is input to the multiplexer 25 as an output of the tap 0.

  The multiplexer 25 is supplied with a tap selection signal output from the ultrasonic diagnostic apparatus main body 10 via a control circuit (not shown) provided in the subarray reception delay adding circuit 4. The multiplexer 25 selects and outputs the signals from tap 0 to tap 5 by the tap selection signal. A desired delay time can be set by selecting the tap of the multiplexer 25. The output signal of the multiplexer 25 is taken out as the output signal of the delay circuit 22 and is input to the analog amplifier 27 via the resistor 26.

That is, each channel signal output from each ultrasonic transducer 2 a of the one-dimensional array transducer 2 is subjected to delay processing by the delay circuit 22 and then input to an analog adder circuit 28 including a resistor 26 and an analog amplifier 27. Addition processing is performed. The voltage output of the analog amplifier 27 is taken out as an output signal of the subarray reception delay adding circuit 4.
JP-A-8-182680 JP 2001-161689 A

  In the conventional ultrasonic probe 1, the delay circuit 22 is configured using the CCD delay element 23, but since the signal is transferred as an electric charge inside the CCD delay element 23, in order to extract the signal from the tap, It is necessary to convert to an electrical signal using the FGA 24 or the like. Therefore, since a large number of FGAs 24 are used for the delay circuit 22 and normal analog circuits such as the multiplexer 25, the resistor 26, and the analog amplifier 27 are used for the subsequent circuits, there is a problem that power consumption is very large. is there. In addition, since the analog adder circuit 28 is provided with a large number of resistors 26 for adding signals, the influence of noise generated by the resistors 26 becomes a problem.

  In order to improve the so-called reception sound field, which is a characteristic for obtaining an ultrasonic reception signal, weighting processing is usually performed to change the amplitude of the reception signal at each ultrasonic transducer 2a. In the extraction method, an analog amplifier is provided after the multiplexer 25, or the value of the signal addition resistor 26 can be switched. Since these weighting processing methods are amplification or attenuation processing in a normal analog circuit, the influence of noise is unavoidable, and there is a problem that the range of signal levels that can be handled (dynamic range) is deteriorated. .

  In a conventional ultrasonic diagnostic apparatus, a one-dimensional array transducer is used as described above, and a two-dimensional image is displayed. Recently, display of a three-dimensional image by a two-dimensional array transducer is desired. However, if the conventional subarray reception delay adding circuit 4 shown in FIG. 7 is used to process the signal of the two-dimensional array transducer, the number of circuit elements, the number of cables, etc. will increase remarkably, and the practical application will be increased. It is very difficult.

  The present invention has been made to solve the above problems, and provides an ultrasonic diagnostic apparatus capable of reducing power consumption of a subarray reception delay adding circuit provided in an ultrasonic probe and suppressing generation of noise. For the purpose.

  In order to achieve the above object, the present invention takes the following measures.

(1) An ultrasonic diagnostic apparatus according to a first aspect of the present invention divides a plurality of ultrasonic transducers provided in an ultrasonic probe and the ultrasonic transducers into a group of subarrays for each predetermined number, and each subarray First delay addition means for performing delay addition processing for each subarray of an ultrasonic reception signal obtained from the included ultrasonic transducer;
A second delay which is provided in the ultrasonic diagnostic apparatus main body and performs an additional delay addition process on the ultrasonic reception signal subjected to the delay addition process for each subarray by the first delay addition unit, thereby forming a desired ultrasonic beam. Adding means, and image processing means for forming an ultrasonic image based on the reception information formed by the delay addition processing of the second delay addition means,
The first delay adding means provides an input gate at each input end of a plurality of CCD delay elements arranged in parallel and having different delay times, and selects the CCD delay element having a desired delay time by selecting the input gate. It is characterized by.

(2) The first delay adding means includes a plurality of CCD delay elements having different delay times for each delay time, and for each ultrasonic reception signal to which different delay times are given by simultaneously selecting a plurality of input gates. The weighting is performed by adjusting the amplitude.

(3) The first delay adding means is characterized in that the addition of delayed signals is performed as charge accumulation by a common potential well.

(4) Further, the first delay addition means includes means for converting the added signal charge into a voltage and taking it out.

  According to the present invention, it is possible to reduce the power consumption of the subarray reception delay adding circuit provided in the ultrasonic probe and to suppress the generation of noise, and as a result, it is possible to collect high-quality real-time ultrasonic images. become.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an overall schematic configuration of a three-dimensional real-time ultrasonic diagnostic apparatus according to an embodiment of the present invention.
The three-dimensional ultrasonic diagnostic apparatus according to this embodiment includes an ultrasonic probe 30 that collects a three-dimensional image of a living body and an ultrasonic diagnostic apparatus main body 40, and the two are connected by a probe cable 34. The ultrasonic probe 30 includes a two-dimensional array transducer 31 and an in-probe transmission / reception circuit 32. The intra-probe transmission / reception circuit 32 is provided with a sub-array reception delay adding circuit 33 which will be described in detail later.

  As shown in FIG. 2, the two-dimensional array transducer 31 includes a plurality of, for example, “64 × 64 = 4096 elements” ultrasonic transducers 35 arranged in a two-dimensional array. A three-dimensional ultrasonic beam 37 is generated by dividing into sub-arrays 36 of elements to a dozen elements, for example, “4 × 4 = 16 elements”.

  When a three-dimensional image of a living body is collected by the ultrasonic probe 30, a transmission pulse is supplied to each ultrasonic transducer 35 of the two-dimensional array transducer 31 based on a control command of the ultrasonic diagnostic apparatus main body 40, and each ultrasonic wave An ultrasonic beam 37 formed three-dimensionally by the vibrator 35 is sent out toward the living body. Thereby, a reflected wave of the three-dimensional ultrasonic beam 37 is generated from within the living body and is detected by the ultrasonic transducer 35 of the two-dimensional array transducer 31.

  The signal detected by the ultrasonic transducer 35, that is, the received signal is input to the subarray reception delay adding circuit 33 in the in-probe transmitting / receiving circuit 32. The sub-array reception delay adding circuit 33 is provided for each sub-array 36 of the ultrasonic transducer 35, delays the signal detected by the two-dimensional array transducer 31, and performs ultrasonic diagnosis via the probe cable 34. The data is sent to the apparatus main body 40.

  The number of probe cables 34 is reduced by dividing the ultrasonic transducer 35 of the two-dimensional array transducer 31 into sub-arrays 36 and providing a sub-array reception delay adding circuit 33 for each sub-array 36 for delay processing. . For example, when the two-dimensional array transducer 31 is configured by the ultrasonic transducer 35 of “64 × 64 = 4096 elements”, 4096 probe cables are required when directly connected, but the sub-array 36 is “4 × 4 = 16”. In this case, the number of probe cables 34 can be reduced to “4096/16 = 256”.

  The ultrasonic diagnostic apparatus main body 40 is provided with a main body side transmission / reception unit 42 including a main beam former 41, an image processing unit 43, and a display unit 44 such as a CRT or a liquid crystal display panel. The main beam former 41 is a delay addition circuit on the main body side, and further performs an additional delay addition process on the signal sent from the ultrasonic probe 30 via the probe cable 34 and outputs the signal to the image processing unit 43. The image processing unit 43 processes the output signal of the main beamformer 41, generates a three-dimensional ultrasonic image, and displays it on the display unit 44.

  As described above, the ultrasonic transducer 35 of the two-dimensional array transducer 31 is divided into sub-arrays 36, and a sub-array reception delay adding circuit 33 is provided for each sub-array 36 to perform delay processing according to the beam pattern. By performing an additional delay addition process with the main beam former 41 provided on the ultrasonic diagnostic apparatus main body 40 side, the three-dimensional ultrasonic beam 37 in the ultrasonic probe 30 is formed by dividing the beam forming stage.

  Next, a detailed configuration of the subarray reception delay adding circuit 33 in the ultrasonic probe 30 will be described with reference to FIG. FIG. 3 shows a part of the sub-array reception delay adding circuit 33, that is, a circuit part for delaying the reception signal of the ultrasonic transducer 35 with the sub-array 36 as a unit, and the delay circuit part for the other sub-arrays 36. Has the same configuration.

  The reception signals of the ultrasonic transducers 35 constituting the two-dimensional array transducer 31 are sent to the subarray reception delay adding circuit 33 in units of the subarrays 36, amplified to a predetermined signal level by the preamplifier 51, and then delayed. Input to the circuit 52.

  The delay circuit 52 includes a plurality of, for example, six input gates CG0 to CG5, CCD delay elements 53a to 53e provided for the input gates CG1 to CG5, and a common potential well 54 constituting an addition unit. The input gates CG0 to CG5 convert an input signal into electric charges, and are on / off controlled by a control signal (enable signal) from a control unit (not shown). In this case, the output of the input gate CG0 is directly input to the potential well 54, and the outputs of the input gates CG1 to CG5 are sent to the common potential well 54 via the CCD delay elements 53a to 53e.

  The CCD delay elements 53a to 53e are set to different delay times, that is, set to different numbers of elements. For example, the CCD delay element 53a is composed of one element. Hereinafter, one element is provided up to the CCD delay element 53e. Increasing each time.

  The ultrasonic reception signal amplified by the preamplifier 51 is converted into charges at the input gates CG1 to CG5 and input to the CCD delay elements 53a to 53e, and the two-phase clock CLK1 for charge transfer shown in FIG. , CLK2 is sequentially transferred to the potential well of the next stage every clock cycle, for example, 10 nsec. By adjusting the number of transfer stages of the CCD delay elements 53a to 53e selected by the input gates CG1 to CG5 and the period of the clocks CLK1 and CLK2, a necessary reception delay is given. By opening any of the input gates CG1 to CG5, the CCD delay elements 53a to 53e having a desired delay time are selected. When the input gate CG0 is opened, the ultrasonic reception signal is directly guided to the common potential well 54, so that the delay process is not performed.

  The common potential well 54 is connected to an FGA (Floating Gate Amplifier) 55 that converts charges into a voltage waveform. The output signal of the FGA 55 is an output of the subarray reception delay adding circuit 33 in the subarray 36 unit. Extracted as a signal.

  Each of the CCD delay elements 53a to 53e has a plurality of CCD delay elements connected in parallel at the same delay time as shown in FIG. 5, and selects a plurality of CCD delay elements having the same delay time. This makes it possible to adjust the amplitude of the signal by increasing or decreasing the amount of charge transferred simultaneously.

  FIG. 5 shows a configuration example of a CCD delay element 53d that performs a delay of 4 clocks. The CCD delay element 53d includes a plurality of, for example, three CCD delay elements 53d-1, 53d-2, and 53d-3 provided in parallel, and input gates CG4-1, CG4-2, and CG4- at each signal input end. 3 is provided. The output terminals of the CCD delay elements 53d-1, 53d-2, 53d-3 are connected to a common potential well 54. By selecting the number of opening the input gates CG4-1, CG4-2, and CG4-3, the amplitude of the signal is adjusted, that is, the amplitude adjustment (weighting) of each received signal is performed to improve the ultrasonic reception characteristics. It can be done.

Next, the operation of the ultrasonic diagnostic apparatus configured as described above will be described.
First, in the ultrasonic diagnostic apparatus shown in FIG. 1, when collection of a three-dimensional image of a living body is started by the ultrasonic probe 30, transmission pulses are supplied to the ultrasonic transducers 35 of the two-dimensional array transducer 31. Then, the ultrasonic beam 37 formed three-dimensionally by each ultrasonic transducer 35 is sent out toward the living body. As a result, a reflected wave of the three-dimensional ultrasonic beam 37 is generated from within the living body and is detected by the ultrasonic transducer 35 of the two-dimensional array transducer 31.

  The signal detected by the ultrasonic transducer 35, that is, the reception signal of the ultrasonic micro-vibrator 35 is sent to the subarray reception delay adding circuit 33 in units of subarrays 36, and as shown in FIG. The signal is amplified to a predetermined signal level and input to the delay circuit 52.

  The delay circuit 52 includes the number of channels (number of channels) necessary for weighting as shown in FIG. 5 for the CCD delay elements having the necessary delay time from the CCD delay elements 53a to 53e formed for each ultrasonic transducer 35. ), The amplitude of each received signal is adjusted to improve the ultrasonic reception characteristics. The received signals of the ultrasonic transducers 35 are converted into electric charges at the input gates CG1 to CG5 when inputted to the CCD delay elements 53a to 53e, and the clock period is, for example, 10 nsec by the two-phase clocks CLK1 and CLK2 for charge transfer. Each time it is sequentially transferred to the potential well in the next stage. In this case, a necessary reception delay is given by adjusting the number of transfer stages of the CCD delay elements 53a to 53e selected by the input gates CG1 to CG5 and the period of the clocks CLK1 and CLK2. Since the outputs of the CCD delay elements 53a to 53e are led to the common potential well 54, the reception signals of the ultrasonic transducers 35 of the sub-array 36 to which the reception delay is given are added in the state of charge. . The charge added in the common potential well 54 is converted into a voltage waveform by the FGA 55 and output. Therefore, the sub-array reception delay adding circuit 33 obtains a signal voltage delayed and added for each sub-array 36.

  The signal delayed by the subarray reception delay adding circuit 33 is sent to the ultrasonic diagnostic apparatus main body 40 via the probe cable 34. The ultrasonic diagnostic apparatus main body 40 further performs an additional delay addition process on the delayed ultrasonic reception signal sent from the ultrasonic probe 30 by the main beam former 41 and outputs it to the image processing unit 43. The image processing unit 43 processes the output signal of the main beamformer 41, generates a three-dimensional ultrasonic image, and displays it on the display unit 44.

  As shown in the above-described embodiment, the sub-array reception delay adding circuit 33 in the intra-probe transmission / reception circuit 32 of the ultrasonic probe 30 includes the CCD delay elements 53a to 53e selectable by the input gates CG1 to CG5, and the CCD delay elements 53a to 53a. The conventional CCD delay element is configured by a common potential well 54 that adds signals delayed by 53e in the state of charge and can be weighted by the CCD delay elements 53a to 53e. The number of FGAs used can be reduced and power consumption can be reduced as compared with the case where an analog circuit is provided in which taps are provided and charges are converted into electric signals by the FGA for each tap. In addition, since a resistor for adding the delayed signals is unnecessary, generation of noise due to the resistor can be prevented. As a result, high-quality real-time ultrasonic images can be collected.

  The two-dimensional array transducer 31 divides the ultrasonic transducers 35 arranged in the two-dimensional array into units of sub-arrays 36 such as “4 × 4 = 16 elements” and delays them, so that the number of probe cables 34 is increased. The number of signal lines can be significantly reduced. For example, when the ultrasonic transducers 35 of “64 × 64 = 4096 elements” are arranged in a two-dimensional array and the subarray 36 has an element configuration of “4 × 4 = 16” as shown in the above embodiment, the probe cable 34 Can be reduced to “4096/16 = 256”. Therefore, in this case, the main beam former 41 in the ultrasonic diagnostic apparatus main body 40 for processing the signal from the ultrasonic probe 30 may be provided with “256” circuits.

  In the above embodiment, the case where the ultrasonic transducer 35 of the two-dimensional array transducer 31 is a two-dimensional array arrangement of “64 × 64 = 4096 elements” is shown, but the arrangement configuration is limited to the above-described embodiment. It is not something that can be set arbitrarily.

  Further, although the subarray 36 in the two-dimensional subarray has been described with respect to the arrangement configuration of “4 × 4 = 16 elements”, for example, “3 × 3”, “3 × 4”, “4 × 4”, and the like. , “5 × 5”, etc., can be set arbitrarily.

  In the above embodiment, the case where the delay circuit 52 in the sub-array reception delay adding circuit 33 is constituted by five CCD delay elements 53a to 53e has been described, but the number of CCD delay elements 53a to 53e is arbitrarily set. It is possible.

  Each of the CCD delay elements 53a to 53e has been described with respect to a case where three CCD delay elements are provided in parallel to perform weighting processing as shown in FIG. Can also be set arbitrarily.

  Moreover, although the case where it applied to the real-time three-dimensional ultrasonic diagnostic apparatus by a two-dimensional array was shown in the said embodiment, this invention is not limited to the said embodiment, For example, a normal one-dimensional array, It goes without saying that various modifications and applications can be made without departing from the gist of the 1.5-dimensional array.

1 is a block diagram showing a schematic configuration of an ultrasonic diagnostic apparatus according to an embodiment of the present invention. In the embodiment, it is a figure for demonstrating the two-dimensional arrangement configuration of the ultrasonic transducer | vibrator in the two-dimensional array transducer of an ultrasonic probe. It is a block diagram of the subarray reception delay addition circuit in the same embodiment. 4 is a diagram showing a two-phase clock for driving a CCD delay element of a sub-array reception delay adder circuit in the same embodiment. FIG. In the same embodiment, it is a figure which shows the structural example in the case of weighting by each CCD delay element of a subarray reception delay addition circuit. It is a block diagram which shows schematic structure of the conventional ultrasonic diagnostic apparatus. It is a block diagram of the subarray reception delay addition circuit in the conventional ultrasonic diagnostic apparatus. It is a figure which shows the two-phase clock which drives the CCD delay element of the subarray reception delay addition circuit in the conventional ultrasonic diagnostic apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 30 ... Ultrasonic probe, 31 ... Two-dimensional array transducer, 32 ... In-probe transmission / reception circuit, 33 ... Subarray reception delay addition circuit, 34 ... Probe cable, 35 ... Ultrasonic transducer, 36 ... Subarray, 37 ... Three-dimensional ultrasonic wave Beam, 40 ... main body of ultrasonic diagnostic apparatus, 41 ... main beam former, 42 ... main body side transmission / reception unit, 43 ... image processing unit, 44 ... display unit, 51 ... preamplifier, 52 ... delay circuit, 53a-53d ... CCD Delay element, 54 ... common potential well, 55 ... FGA.

Claims (4)

A plurality of ultrasonic transducers provided in an ultrasonic probe, and the ultrasonic transducers are divided into a set of subarrays for each predetermined number, and an ultrasonic reception signal obtained from the ultrasonic transducers included in each subarray First delay addition means for performing delay addition processing for each sub-array,
A second delay which is provided in the ultrasonic diagnostic apparatus main body and performs an additional delay addition process on the ultrasonic reception signal subjected to the delay addition process for each subarray by the first delay addition unit, thereby forming a desired ultrasonic beam. Adding means, and image processing means for forming an ultrasonic image based on the reception information formed by the delay addition processing of the second delay addition means,
The first delay adding means provides an input gate at each input end of a plurality of CCD delay elements arranged in parallel and having different delay times, and selects the CCD delay element having a desired delay time by selecting the input gate. An ultrasonic diagnostic apparatus characterized by:   The first delay addition means includes a plurality of CCD delay elements with different delay times for each delay time, and adjusts the amplitude for each ultrasonic reception signal to which different delay times are given by simultaneously selecting a plurality of input gates. The ultrasonic diagnostic apparatus according to claim 1, wherein weighting is performed.   2. The ultrasonic diagnostic apparatus according to claim 1, wherein the first delay addition means performs addition of delayed signals as charge accumulation by a common potential well.   The ultrasonic diagnostic apparatus according to claim 1, wherein the first delay addition means includes means for converting the added signal charge into a voltage and taking it out.

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