JP2005261053A - Uninterruptible power supply unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an uninterruptible power supply unit which can continue discharge operation even if unbalance load is connected. <P>SOLUTION: This unit possesses a converter 4 which converts AC input to DC, positive and negative capacitors 5A and 5B which are for smoothing the DC output of this converter and constitutes a series circuit, with their midpoint connected to the above AC input and one end of load, an inverter 6 which converts the DC output into AC and supplies AC power to the load, a controller 20 which controls the above converter and the above inverter, and voltage detectors 12A and 12B which detect each voltage of the above positive and negative capacitors. In the state of input voltage drop, the above controller opens an input switch, and also controls the current application to the above converter so that it may discharge a capacitor on the side of large voltage, according to the difference of DC voltage detected by the above voltage detector. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an improved uninterruptible power supply.

  In recent years, there is an increasing number of cases where a load that requires positive or negative unbalanced power is connected as a load of the uninterruptible power supply. When such an unbalanced load is connected, the positive DC voltage and the negative DC voltage of the main circuit are unbalanced. It is not preferable for the load or the uninterruptible power supply to continue the operation while the voltage is unbalanced.

For this reason, a balance circuit for suppressing the above-mentioned imbalance is newly provided, and by controlling this balance circuit, an attempt is made to eliminate the imbalance between the positive DC voltage and the negative DC voltage of the main circuit. Proposals have been made (see, for example, Patent Document 1).
Japanese Patent Laying-Open No. 2001-197757 (page 5-6, FIG. 1)

  However, the countermeasures by adding a balance circuit disclosed in Patent Document 1 have problems of increasing the size of the apparatus and increasing the cost due to an increase in parts.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an uninterruptible power supply capable of continuing operation without adding main circuit components even when an unbalanced load is connected. There is.

  In order to achieve the above object, an uninterruptible power supply according to the present invention includes a converter that converts an AC input into DC via a switch and an input filter, and a DC output smoother for the converter, whose midpoint is the AC input and A positive side capacitor and a negative side capacitor that are connected to one end of a load, and a means for supplying power to the capacitor when the AC input is abnormal; and the DC output is converted into AC to the load when the AC input is abnormal. An inverter that supplies AC power, the converter, a control unit that controls the inverter, a voltage detector that detects the voltages of the positive and negative capacitors, and an input that detects the AC input voltage A voltage detector, and when the input voltage detector detects a voltage drop, the control unit opens the switch and detects the positive side voltage detected by the voltage detector. Which is the difference between the voltage of the voltage and the negative side capacitor capacitor according to a DC voltage difference, is characterized in that the said converter so as to discharge the larger capacitors voltage to control current.

  According to the present invention, control is performed so as to compensate for the detected value of DC voltage imbalance, so even if a load device with input current imbalance is connected without adding main circuit components. An uninterruptible power supply capable of continuing operation can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a circuit configuration diagram of the uninterruptible power supply according to Embodiment 1 of the present invention.

  The AC input of the commercial AC power source 1 is converted into DC by the converter 4 via the switch 2 and the input filter 3. The direct current converted by the converter 4 is smoothed by the capacitors 5A and 5B connected in series, and is converted back to alternating current by the inverter 6. The AC output of the inverter 6 is fed to the load 6 through the output filter 7. Further, the middle point of the capacitors 5 </ b> A and 5 </ b> B connected in series is connected to one end of the commercial AC power supply 1 and the load 6.

  When a voltage drop occurs in the commercial AC power supply 1, the DC power of the storage battery 9 is supplied to the capacitors 5 </ b> A and 5 </ b> B connected in series via the step-up chopper 10.

  The converter 4, the inverter 6, and the step-up chopper 10 are configured to control power by switching a plurality of power devices, and are controlled by a gate control pulse obtained from the control circuit 20. In order to perform this control, the voltage of the commercial AC power supply 1 is input by the input voltage detector 11, the voltages at both ends of the positive capacitor 5A and the negative capacitor 5B are respectively detected by the voltage detectors 12A and 12B, and the input current of the converter 4 Is detected by the current detector 13 and supplied to the control circuit 20. In the control circuit 20 of FIG. 1, control blocks related to the converter 4 are shown, but the control blocks of the inverter 6 and the boost chopper 10 are not shown.

  Hereinafter, the internal configuration of the control circuit 20 will be described.

  The detection signals of the voltage detectors 12A and 12B are input to the adder / subtracter 21. The addition output of the adder / subtracter 21 is compared with a DC voltage reference as a DC voltage feedback signal, and the error signal is amplified by the voltage amplifier 22. The output of the voltage amplifier 22 is multiplied by the output of the PLL circuit 23 for phase-synchronizing with the detection signal of the voltage detector 11 to obtain a current reference including phase information. This current reference is compared with the input current feedback signal obtained by the current detector 13, amplified by the amplifier 25, becomes a DC voltage command, and is given to the PWM control circuit 26.

  In the PWM control circuit 26, this DC voltage command is compared with the carrier signal of the carrier generator 27, and the positive side gate pulse of the converter 4 from the OR circuit 29A and the converter from the OR circuit 29B via the AND circuits 28A and 28B. 4 negative side gate pulses are obtained. The AND circuits 28A and 28B receive the power failure detection inverted signal of the power failure detection circuit 30, and the positive gate pulse and the negative gate pulse are output from the AND circuits 28A and 28B when normal other than the power failure. It has become so.

  The amplifier 25 receives a DC voltage difference signal, which is a subtraction output of the adder / subtractor 21, as a balance correction signal, and corrects the DC voltage command.

  Next, the control part at the time of a power failure is demonstrated. The subtracted output of the adder / subtracter 21 is amplified by the voltage amplifier 31, multiplied by the output of the phase reference circuit 32 for synchronizing with the output voltage phase of the inverter 6 by the multiplier 33, and output synchronized with the control phase of the inverter 6. Get. This output is input to the PWM control circuit 34 and compared with the carrier signal of the carrier generator 27 to obtain the gate pulse of the converter 4.

This gate pulse is ANDed with the power failure signal of the power failure detection circuit 30 described above by AND circuits 28C and 28D, and the detected value of the sign detector 35 of the DC voltage difference signal which is the subtraction output of the adder / subtractor 21. Accordingly, a positive side gate pulse at the time of power failure of the converter 4 is obtained from the OR circuit 29A, and a negative side gate pulse at the time of power failure of the converter 4 is obtained from the OR circuit 29B. Note that the PWM control circuit 26 and the PWM control circuit 34 in FIG. 1 are illustrated as separate ones for the sake of simplicity, but they may be the same.

  The operation of voltage imbalance control in the above configuration will be described below.

  First, consider the normal time when the switch 2 is closed and the converter 4 is operating normally. At this time, the operation of the converter 4 is controlled by the DC voltage command that is the output of the amplifier 25, but a DC bias correction is added to the DC voltage command by the DC voltage difference signal that is the subtraction output of the adder / subtractor 21. Since the voltage is supplied to the PWM control circuit 26, the converter 4 is controlled in a direction in which the DC voltage difference is eliminated, that is, in a direction in which voltage imbalance is eliminated.

  Next, consider a state in which the power failure detection circuit 30 operates, the switch 2 is opened, and a DC voltage is supplied from the boost chopper 10. At this time, the PWM control performed by the PWM control circuit 36 is operated by the DC voltage difference signal which is the subtraction output of the adder / subtractor 21, and the charge of the capacitor having the larger voltage is supplied to the power device of the converter 4. It discharges by the discharge route containing AC filter 3 by control, and operates so that a voltage may be reduced. Although the effect of unbalance correction by this energization control depends on the load factor and the like, it has been confirmed that it operates effectively at least when the load is an exciting current of the transformer.

  Further, the control of the converter 4 is synchronized with the signal of the phase reference detection circuit 32 and is performed in synchronization with the control phase of the inverter 6, thereby making it possible to perform control while suppressing voltage and current pulsations.

  FIG. 2 is a circuit configuration diagram of the uninterruptible power supply according to Embodiment 2 of the present invention. About each part of this Example 2, the same part as each part of the uninterruptible power supply concerning Example 1 of Drawing 1 is shown with the same numerals, and the explanation is omitted. The second embodiment is different from the first embodiment in that a filter circuit 35 is inserted before the voltage amplifier 31, and a DC voltage difference signal, which is a subtraction output of the adder / subtractor 21, is passed through the filter circuit 35. It is the point comprised so that it might become 31 inputs.

  With this configuration, the ripple component included in the DC voltage is removed by the low-pass characteristics of the filter circuit 35, so the control circuit 20 performs control to correct the DC unbalance voltage caused by the unbalanced load. Can be done. The output of the filter circuit 35 may be used as the correction signal for the DC voltage command at the normal time as the input of the amplifier 25.

  FIG. 3 is a circuit configuration diagram of an uninterruptible power supply according to Embodiment 3 of the present invention. About each part of this Example 3, the same part as each part of the uninterruptible power supply concerning Example 1 of Drawing 1 is shown with the same numerals, and the explanation is omitted. The third embodiment is different from the first embodiment in that a dead band circuit 36 is inserted in front of the voltage amplifier 31, and a DC voltage difference signal, which is a subtraction output of the adder / subtractor 21, is passed through the dead band circuit 36. It is the point comprised so that it might become 31 inputs.

  With this configuration, signal processing is performed so that fluctuations of the DC voltage difference signal below a predetermined value are ignored. Therefore, the control circuit 20 is connected to a load without load or without load unbalance. It is possible not to perform unbalance correction more than necessary. The output of the dead zone circuit 36 may be used as a correction signal for a normal DC voltage command as an input to the amplifier 25.

FIG. 4 is a circuit configuration diagram of an uninterruptible power supply according to Embodiment 4 of the present invention. About each part of this Example 4, the same part as each part of the uninterruptible power supply according to Example 1 of FIG.
The description is omitted. The fourth embodiment is different from the first embodiment in that a signed square circuit 37 is inserted in the preceding stage of the voltage amplifier 31, and a DC voltage difference signal which is a subtraction output of the adder / subtractor 21 is used as a signed square circuit. The configuration is such that the input to the voltage amplifier 31 is made via 37.

  With this configuration, signal processing that emphasizes the imbalance of the DC voltage is performed. Therefore, when the unbalance voltage is large, the control circuit 20 performs the imbalance correction rapidly, and the DC overvoltage or DC It is possible to prevent an excessive imbalance. The output of the signed square circuit 37 may be used as a correction signal for a normal DC voltage command as an input to the amplifier 25.

The circuit block diagram of the uninterruptible power supply which concerns on Example 1 of this invention. The circuit block diagram of the uninterruptible power supply which concerns on Example 2 of this invention. The circuit block diagram of the uninterruptible power supply which concerns on Example 3 of this invention. The circuit block diagram of the uninterruptible power supply which concerns on Example 4 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Commercial AC power supply 2 Switch 3 Input filter 4 Converter 5A, 5B Smoothing capacitor 6 Inverter 7 Output filter 8 Load 9 Storage battery 10 Boost chopper 11 Input voltage detector 12A, 12B Voltage detector 13 Current detector 20 Control circuit 21 Addition / Subtraction circuit 22 Voltage amplifier 23 PLL circuit 24 Multiplier 25 Amplifier 26 PWM control circuit 27 Carrier generators 28A, 28B, 28C, 28D AND circuit 29A, 29B OR circuit 30 Power failure detector 31 Voltage amplifier 32 Phase reference detection circuit 33 Multiplier 34 PWM control circuit 35 Filter circuit 36 Dead band circuit 37 Signed square circuit

Claims (3)

A converter that converts alternating current input into direct current through a switch and an input filter;
For DC output smoothing of this converter, its midpoint is connected to one end of the AC input and load, and a positive side capacitor and a negative side capacitor constituting a series circuit,
Means for supplying power to the capacitor when the AC input is abnormal;
An inverter that converts the DC output into AC and supplies AC power to the load;
A control unit for controlling the converter and the inverter;
A voltage detector for detecting the respective voltages of the positive and negative capacitors;
An input voltage detector for detecting the AC input voltage,
The control unit, when the input voltage detector detects a voltage drop,
While opening the switch,
In accordance with a DC voltage difference that is a difference between the voltage of the positive capacitor and the voltage of the negative capacitor detected by the voltage detector, the energization of the converter is controlled so as to discharge the charge of the capacitor having the larger voltage. An uninterruptible power supply characterized in that   The uninterruptible power supply according to claim 1, wherein the energization control of the converter is performed in synchronization with a control phase of the inverter. As the DC voltage difference signal processing means, at least one of a low-pass filter means, a dead band filter means for ignoring a signal below a predetermined value, and a means for enhancing the signal according to the signal magnitude is provided. The uninterruptible power supply according to claim 1 or 2.

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