JP2005260216A - Semiconductor device, and preparing method of semiconductor device, liquid crystal television set, and el television set - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device with high driving capability in a process that the utilization efficiency of a material is improved, and a throughput and a yield are increased. <P>SOLUTION: The device and manufacturing method of the device, wherein a first conductive layer contacting a semiconductor area is formed, an insulating layer is formed on the first conductive layer in a coating process, a mask pattern is formed by radiating a laser beam to a part of the insulating layer, etching is performed with the mask pattern as a mask to form a divided first conductive layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device formed using a droplet discharge method typified by an ink jet method.

  In manufacturing a semiconductor device, it has been studied to use a droplet discharge method as a development of a production technique for efficiently mass-producing a plurality of display panels by cutting out a plurality of display panels from a single mother glass substrate.

  Also, when forming a film pattern of a conventional semiconductor device, a resist is applied to the entire surface of the substrate, pre-baked, and then irradiated with ultraviolet light or the like through a photomask, and a resist pattern is formed by development. After the process, the film pattern is removed by etching away a film (film formed of a semiconductor material, an insulator material, or a conductor material) existing in a portion to be a film pattern using the resist pattern as a mask pattern. The method of forming is used.

On the other hand, as a means for increasing the drain voltage of the TFT in the linear region and the saturation region to improve the current-voltage characteristics, that is, the driving capability, the electron mobility is increased, the capacity of the gate insulating film is increased, and the ratio between the channel width and the channel length. (Hereinafter referred to as W / L) and the like (see Patent Document 1).
JP 2000-275678 A

  However, in the film pattern forming process using the conventional photolithography process, most of the film pattern and the resist material are wasted, and the number of processes for forming the mask pattern is large, resulting in a decrease in throughput. is there.

  Further, as one method for increasing W / L in order to improve the current-voltage characteristics of the TFT, there is a method of widening the channel width (W). However, this structure has a problem that the area of the TFT increases. When TFTs are used for switching pixels of a transmissive display device, one or more TFTs exist in the pixels of the display portion. For this reason, when the area of the TFT becomes large, there is a problem that the display area of the pixel portion becomes narrow and the aperture ratio of the display device decreases.

  As another method for increasing W / L, there is a method of reducing the channel length (L). In order to reduce the channel length (L) using a droplet discharge device, discharge with a small diameter is used. It is necessary to form a film pattern (gate electrode, source electrode, or drain electrode) by discharging a solution having a small droplet diameter using the outlet. However, in a droplet discharge device having a discharge port with a small diameter, the composition of the discharge solution adheres to the tip of the discharge port, dries, and solidifies, resulting in clogging and the like. It is difficult to discharge stably. As a result, there is a problem that the throughput and yield of the semiconductor device are reduced.

  The present invention has been made in view of such circumstances, and manufacture of a semiconductor device having high driving capability (ie, high W / L) by a method of improving material utilization efficiency and increasing throughput and yield. The goal is to provide a method.

  In the present invention, at least one or more of patterns necessary for producing a semiconductor device such as a conductive layer for forming a wiring layer or an electrode, a semiconductor layer, a mask layer for forming a predetermined pattern, In the semiconductor device formed by a method capable of selectively forming a pattern, the distance between the source electrode and the drain electrode or the distance between the source region and the drain region is 0.1 μm or more and 10 μm or less. To do.

  As a method for selectively forming a pattern, a conductive layer, a semiconductor layer, an insulating layer, or the like is formed, and droplets of a composition prepared for a specific purpose are selectively ejected to form a predetermined pattern. A droplet discharge method (also called an inkjet method depending on the method) can be used.

  Note that the droplet discharge method is a method in which a prepared composition is discharged from a nozzle in accordance with an electric signal to form a minute droplet and adhere to a predetermined position.

  In the present invention, a first conductive layer in contact with the semiconductor region is formed, an insulating layer is formed over the first conductive layer by a coating method, and a mask pattern is formed by irradiating a part of the insulating layer with laser light. It is formed and etched using the mask pattern as a mask to form a divided first conductive layer. Since the divided first conductive layer becomes a source region and a drain region or a source electrode and a drain electrode, the channel length substantially matches the width of the mask pattern. The insulating layer is a photosensitive resin layer, and when irradiated with laser light (also referred to as a laser beam), a portion irradiated with the laser light reacts and is modified to form a mask pattern. Therefore, the channel length can be reduced by reducing the beam width of the laser light.

  In the present invention, a first conductive layer in contact with a semiconductor region is formed, a region having a liquid repellent surface is formed on the first conductive layer by a coating method, and a laser is applied to a part of the region having the liquid repellent surface. A first mask pattern is formed by irradiation with light, a second mask pattern is formed using the first mask pattern as a mask, and the first conductive layer is etched using the second mask pattern to be divided. The first conductive layer is formed.

  In the present invention, a region having a liquid repellent surface is formed on a semiconductor region by a coating method, and a part of the region having a liquid repellent surface is irradiated with laser light to form a first mask pattern. A second mask pattern is formed using the mask pattern as a mask, and the first mask pattern is removed using the second mask pattern to form a region having a lyophilic surface. One conductive layer is formed.

  In the present invention, a region having a liquid repellent surface is formed on a semiconductor region by a coating method, and a part of the region having a liquid repellent surface is irradiated with laser light to form a first mask pattern. The first conductive layer is formed using the mask pattern as a mask.

  A region having a liquid repellent surface becomes a region having a lyophilic surface by irradiating a laser beam to react the portion irradiated with the laser beam. The region not irradiated with the laser beam becomes the first mask pattern.

  In the present invention, examples of the semiconductor device include an integrated circuit including a semiconductor element, a display device, a wireless tag, and an IC tag. Typical examples of the display device include a liquid crystal display device, a light emitting display device, DMD (Digital Micromirror Device), PDP (Plasma Display Panel), FED (Field Emission Display). And display devices such as electrophoretic display devices (electronic paper). Note that the TFT is a forward stagger type TFT, an inverted stagger type TFT (channel etch type TFT or channel protection type TFT), and a coplanar type TFT.

  In the present invention, the display device refers to a device using a display element, that is, an image display device. In addition, a connector, for example, a module in which a flexible printed wiring (FPC), TAB (Tape Automated Bonding) tape or TCP (Tape Carrier Package) is attached to the display panel, and a printed wiring board is attached to the end of the TAB tape or TCP. It is assumed that the display device includes all provided modules or modules in which an IC (Integrated Circuit) or a CPU (Central Processing Unit) is directly mounted on a display element by a COG (Chip On Glass) method.

  Moreover, this invention includes the following structures.

  One embodiment of the present invention includes a gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, and a drain electrode, and the gate electrode, the semiconductor region, the source electrode, or the drain electrode is formed by a droplet discharge method The distance between the source region and the drain region is from 0.1 μm to 10 μm.

    One end of the source region and the drain region facing each other is detoured by a certain distance. The shape at this time is curved in a straight line, a curved line, or a straight line and a curved line.

  Another embodiment of the present invention includes a gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, and a drain electrode, and the gate electrode, the semiconductor region, the source electrode, or the drain electrode is formed by a droplet discharge method. A distance between a source electrode and a drain electrode is 0.1 μm or more and 10 μm or less.

  Note that the opposite ends of the source electrode and the drain electrode are detoured at a certain distance. The shape at this time is curved in a straight line, a curved line, or a straight line and a curved line.

  According to another embodiment of the present invention, a first conductive layer in contact with a semiconductor region is formed, an insulating layer is formed over the first conductive layer by a coating method, and a part of the insulating layer is irradiated with laser light to be masked. A method for manufacturing a semiconductor device is characterized in that a pattern is formed and etching is performed using a mask pattern as a mask to form a divided first conductive layer. Note that the insulating layer is formed of a photosensitive resin.

  The divided first conductive layers are a source region and a drain region. Alternatively, the second conductive layer may be formed over the divided first conductive layer by a droplet discharge method.

  Further, the first conductive layer is formed by a droplet discharge method. The divided first conductive layers are a source electrode and a drain electrode.

  Forming a first conductive layer in contact with the semiconductor region; forming a second conductive layer on the first conductive layer; forming an insulating layer on the second conductive layer by a coating method; A mask pattern is formed by irradiating a part of the insulating layer with laser light, and etching is performed using the mask pattern as a mask to form a divided first conductive layer and second conductive layer. A method for manufacturing a semiconductor device. The divided first conductive layer is a source region and a drain region, and the divided second conductive layer is a source electrode and a drain electrode.

  According to another aspect of the present invention, a conductive semiconductor region is formed over a conductive layer, a photosensitive resin layer is formed over the conductive semiconductor region by a coating method, and the photosensitive resin layer is exposed with laser light. Then, development is performed to form a first mask pattern, and a semiconductor region having conductivity is separated using the first mask pattern as a mask.

  According to another aspect of the present invention, a semiconductor region having conductivity is formed on a semiconductor region, a photosensitive resin layer is formed on the semiconductor region having conductivity by a coating method, and the photosensitive resin layer is exposed with laser light. Then, development is performed to form a first mask pattern, and the semiconductor region having conductivity is separated using the first mask pattern as a mask.

  According to another aspect of the present invention, a conductive semiconductor region is formed over a semiconductor region, a conductive film is formed over the conductive semiconductor region, and a photosensitive resin layer is formed over the conductive film by a coating method. The photosensitive resin layer is exposed to a laser beam and developed to form a first mask pattern, the conductive film is separated using the first mask pattern as a mask, and then the semiconductor region exhibiting conductivity is separated. This is a method for manufacturing a semiconductor device.

  Note that the separated semiconductor regions exhibiting conductivity are a source region and a drain region.

  In another embodiment of the present invention, a semiconductor region is formed over an insulating film, a region having a liquid repellent surface is formed over the semiconductor region by a coating method, and a part of the region having a liquid repellent surface is irradiated with laser light. And forming a region having a lyophilic surface, and forming a semiconductor region exhibiting conductivity on the region having a lyophilic surface.

  According to one embodiment of the present invention, a first semiconductor region is formed over a first insulating film, a semiconductor film exhibiting conductivity is formed over the first semiconductor region, and the first semiconductor region is formed over the semiconductor film exhibiting conductivity. A region having a liquid-repellent surface is formed by a coating method, and a region having a lyophilic surface and a region having a second liquid-repellent surface are formed by irradiating a part of the region having the first liquid-repellent surface with laser light. And forming a second insulating film in the lyophilic region, etching the region having the second lyophobic surface and the semiconductor film having conductivity using the second insulating film. A method for manufacturing a semiconductor device is characterized in that a second semiconductor region is formed and a conductive layer in contact with the second semiconductor region is formed.

  According to another aspect of the present invention, a semiconductor region is formed over a first insulating film, a region having a first liquid repellent surface is formed on the semiconductor region by a coating method, and a region having the first liquid repellent surface is formed. A region having a lyophilic surface and a region having a second lyophobic surface are formed, a second insulating film is formed in the region having lyophilicity, A method for manufacturing a semiconductor device is characterized in that a region having a liquid repellent surface is removed to form a semiconductor region exhibiting conductivity, and a conductive layer in contact with the semiconductor region exhibiting conductivity is formed.

Note that the coating method is a droplet discharge method, an inkjet method, a spin coating method, a roll coating method, a slot coating method, or a dipping method.

  Another embodiment of the present invention is a liquid crystal television device or an EL television device formed using the above method, and includes an element having a distance between a source electrode and a drain electrode of 0.1 μm to 10 μm. It is characterized by that.

  By using a droplet discharge method when forming a film pattern such as a conductive layer for forming a wiring layer or an electrode of a device, a semiconductor layer, or a mask layer for forming a predetermined pattern as in the present invention. The liquid droplets can be ejected to any location by changing the relative position between the nozzle, which is a liquid droplet ejection port containing the material of the film, and the substrate. Further, the thickness and thickness of the pattern to be formed can be adjusted by the relative relationship of the nozzle diameter, the droplet discharge amount, and the moving speed between the nozzle and the substrate on which the discharge is formed. For this reason, even on a large-area substrate having a side exceeding 1 to 2 m, the film pattern can be accurately discharged and formed at a desired location.

  Further, by forming a source region and a drain region, or a source electrode and a drain electrode of an element using a mask pattern formed by exposure and development using a laser beam, an exposure / development process using a photomask, that is, An element with a fine structure and an increased W / L can be obtained while omitting the photolithography process, and thus a semiconductor device with high driving ability can be manufactured at low cost. Further, high throughput and yield can be manufactured.

  The best mode for carrying out the invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention should not be construed as being limited to the description of the embodiment modes. In the drawings, common portions are denoted by the same reference numerals, and detailed description thereof is omitted.

(Embodiment 1)
In this embodiment mode, a process for forming a TFT with a small channel length using a mask pattern formed by irradiation with a laser beam (hereinafter also referred to as laser light) will be described with reference to FIGS.

  In this embodiment mode, a step of manufacturing a channel-etched TFT which is one of inverted staggered TFTs as a semiconductor element is shown.

  As shown in FIG. 1A, a first conductive layer 102 is formed over a substrate 101. As a method for forming the first conductive layer 102, a droplet discharge method, a printing method, an electroplating method, a PVD method, or a CVD method is used. In the case of using the PVD method or the CVD method, a conductive layer is formed on the entire surface of the substrate, a photosensitive resin is formed thereon, the photosensitive resin is exposed and developed by laser light, and a mask pattern is formed. Is used to etch the conductive layer to form a conductive layer 102 having a desired shape. In addition, the first conductive layer will be a later gate electrode, but a multi-gate electrode can be formed using a plurality of conductive layers. In this embodiment, the first conductive layer 102 is formed by selectively discharging a composition containing a conductive material over the substrate 101 by a droplet discharge method. In this case, an etching process using a mask pattern is not necessary, so that the manufacturing process can be greatly simplified.

  As the substrate 101, a glass substrate, a quartz substrate, a substrate formed of an insulating material such as ceramic such as alumina, a heat-resistant plastic substrate that can withstand a processing temperature in a later process, a silicon wafer, a metal plate, or the like is used. it can. Further, as the substrate 101, a large area substrate such as 320 mm × 400 mm, 370 mm × 470 mm, 550 mm × 650 mm, 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm can be used.

  Materials for the first conductive layer 102 include titanium (Ti), aluminum (Al), tantalum (Ta), tungsten (W), molybdenum (Mo), copper (Cu), chromium (Cr), neodymium (Nd). , Iron (Fe), nickel (Ni), cobalt (Co), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), silver (Ag), gold (Au) , Platinum (Pt), cadmium (Cd), zinc (Zn), silicon (Si), germanium (Ge), zirconium (Zr), barium (Ba), or an alloy containing the above elements as a main component A single layer of a material or a stacked layer thereof may be used.

  When the first conductive layer is formed by a droplet discharge method, a composition in which a conductor is dissolved or dispersed in a solvent is used as the composition discharged from the discharge port. Examples of the conductor include Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, Ba, and other metal particles, halogen Metal halide fine particles or the like, or dispersible nanoparticles can be used. Or indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), zinc oxide added with gallium (GZO), indium tin oxide containing silicon oxide, organic indium, organic Tin, etc. can be used. In addition, the first conductive layer can be formed by stacking conductive layers made of these materials.

  Moreover, it is preferable to use what dissolved or disperse | distributed the material of either gold | metal | money, silver, and copper in the solvent considering the specific resistance value for the composition discharged from a discharge outlet. More preferably, low resistance and inexpensive silver or copper may be used. However, when copper is used, a barrier film may be provided as a countermeasure against impurities. As the solvent for the composition, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone may be used.

  Here, as a barrier film in the case of using copper as a wiring, an insulating or conductive material containing nitrogen such as silicon nitride, silicon oxynitride, aluminum nitride, titanium nitride, or tantalum nitride (TaN) is used. These may be formed by a droplet discharge method.

  The viscosity of the composition used for the droplet discharge method is preferably 5 to 20 mPa · s, which is to prevent the drying from occurring and to smoothly discharge the composition from the discharge port. . The surface tension is preferably 40 mN / m or less. Note that the viscosity of the composition may be appropriately adjusted according to the solvent to be used and the application.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.5 to 10 μm. However, when formed by the gas evaporation method, the nanomolecules protected with the dispersant are as fine as about 7 nm. When the surface of each particle is covered with a coating agent, the nanomolecules aggregate in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  The step of discharging the composition may be performed under reduced pressure. This is because the solvent of the composition volatilizes before the composition is discharged and landed on the object to be processed, and the subsequent drying and firing steps can be omitted or shortened. After discharging the composition, one or both of drying and baking processes are performed by laser light irradiation, rapid thermal annealing, a heating furnace, or the like under normal pressure or reduced pressure depending on the material of the composition. The drying and firing steps are both heat treatment steps. For example, the drying is performed at 100 degrees for 3 minutes, and the firing is performed at 200 to 350 degrees for 15 minutes to 120 minutes. Time is different. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is 100 to 800 degrees (preferably 200 to 350 degrees). And By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and shrunk to accelerate fusion and fusion. The atmosphere is an oxygen atmosphere, a nitrogen atmosphere or air. However, it is preferable to perform in an oxygen atmosphere in which the solvent in which the metal element is decomposed or dispersed is easily removed.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. Examples of the gas laser include an excimer laser, and examples of the solid laser include a laser using a crystal such as YAG or YVO ₄ doped with Cr, Nd, or the like. Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate, the heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds. Instantaneous thermal annealing (RTA) uses an infrared lamp or a halogen lamp that irradiates ultraviolet light or infrared light in an inert gas atmosphere, and rapidly raises the temperature, from several microseconds to several minutes. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, there is an advantage that only the outermost thin film can be heated substantially without affecting the lower layer film.

  Note that the conductive layer formed by the droplet discharge method is formed by irregularly overlapping fine particles in three dimensions. For this reason, the surface has fine unevenness. Further, since the fine particles are fired by heating and the particle diameter of the particles is increased, a layer having a large surface height difference is formed. Further, the binder formed of an organic substance remains in the conductive layer depending on the heating temperature, atmosphere, and heating time.

Here, a composition containing Ag (hereinafter referred to as “Ag paste”) is selectively ejected, dried and fired by laser beam irradiation or heat treatment as described above, and appropriately subjected to a first film thickness of 600 to 800 nm. A conductive layer 102 is formed. Incidentally, the sintering is performed in an O ₂ atmosphere, organic substances such as binders contained in the Ag paste (thermosetting resin) is decomposed, it is possible to obtain a Ag film containing little organic matter. In addition, the film surface can be smoothed.

  Before forming the first conductive layer 102, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel) are formed on the surface of the substrate 101 by sputtering or vapor deposition. ), A base layer formed of a metal material such as Mo (molybdenum) or an oxide thereof is preferably formed. The underlayer may be formed with a thickness of 0.01 to 10 μm, but may be formed extremely thin, and thus does not necessarily have a layer structure. This underlayer is provided to form the first conductive layer with good adhesion, and may be omitted if sufficient adhesion is obtained. Note that in the case where the base layer is a conductive film, etching can be performed using the first conductive layer 102 as a mask pattern.

  As a method for forming the first conductive layer 102, an insulating film having a recess can be formed first, and a droplet containing a conductive material can be discharged and embedded in the recess. In this case, it is preferable that the surface of the insulating film in which the first conductive layer is embedded in the recess and the surface of the first conductive layer have flatness. With this structure, the first insulating film and the semiconductor film to be formed later have flatness, and disconnection of these can be prevented. Further, by controlling the width of the recess, the wiring can be miniaturized. Further, by controlling the depth of the recess, it is possible to increase the thickness of the wiring. In addition, by providing a colored layer over the insulating film having a recess, a display device capable of full color display without using a color filter can be manufactured.

    Next, a first insulating film 103, a first semiconductor film 104, and a second semiconductor film 105 are sequentially formed over the first conductive layer 102 functioning as a substrate and a gate electrode. The first insulating film, the first semiconductor film, and the second semiconductor film function as a gate insulating film, a channel formation region, a source region, and a drain region of a TFT to be formed later.

  The first insulating film 103 is formed with a single layer or a stacked structure of insulating films containing silicon nitride, silicon oxide, or other silicon by a thin film formation method such as a plasma CVD method or a sputtering method. The first insulating film 103 preferably has a stacked structure of a silicon nitride film (silicon nitride oxide film), a silicon oxide film, and a silicon nitride film (silicon nitride oxide film) from the side in contact with the gate electrode. In this structure, since the gate electrode is in contact with the silicon nitride film, deterioration due to oxidation can be prevented.

  As the first semiconductor film 104, an amorphous semiconductor, a semi-amorphous semiconductor in which an amorphous state and a crystalline state are mixed (also referred to as SAS), and crystal grains of 0.5 nm to 20 nm are formed in the amorphous semiconductor. A film having any state selected from a microcrystalline semiconductor and a crystalline semiconductor that can be observed is formed. In any case, a semiconductor film having a film thickness of 10 to 60 nm whose main component is silicon, silicon germanium (SiGe), or the like can be used.

The SAS is a semiconductor having an intermediate structure between an amorphous structure and a crystal structure (including single crystal and polycrystal) and having a third state that is stable in terms of free energy. It also contains a crystalline region with short-range order and lattice distortion. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wave number side than 520 cm ^−1. ing. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. Further, as a neutralizing agent for dangling bonds, SAS contains 1 atomic% or more of hydrogen or halogen.

SAS can be obtained by glow discharge decomposition of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. By forming a silicide gas diluted with hydrogen or fluorine, or hydrogen or fluorine and one or more kinds of rare gas elements selected from helium, argon, krypton, and neon, the formation of SAS is facilitated. be able to. At this time, it is preferable to dilute the silicide gas so that the dilution rate is in the range of 10 to 1000 times. Further, the SAS can be formed by using Si ₂ H ₆ and GeF ₄ and diluting with helium gas. The reaction generation of the coating by glow discharge decomposition is preferably performed under reduced pressure, and the pressure may be in the range of about 0.1 Pa to 133 Pa. The power for forming the glow discharge may be high frequency power of 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or less, and a substrate heating temperature of 100 to 250 ° C. is recommended.

The crystalline semiconductor film can be formed by crystallizing an amorphous semiconductor film or SAS by heating or laser irradiation. Alternatively, a crystalline semiconductor film may be directly formed. In this case, a crystalline semiconductor film is directly formed using heat or plasma using a fluorine-based gas such as GeF ₄ or F ₂ and a silane-based gas such as SiH ₄ or Si ₂ H _6. Can do.

  The second semiconductor film 105 has conductivity. When an n-channel TFT is formed, an element belonging to Group 15, typically phosphorus or arsenic is added. In the case of forming a p-channel TFT, an element belonging to Group 13, typically boron, is added. The second semiconductor film is formed by a plasma CVD method in which a gas containing a group 13 or group 15 element such as boron, phosphorus, or arsenic is added to a silicide gas. In addition, after forming the semiconductor film, a solution containing an element belonging to Group 13 or 15 can be applied onto the semiconductor film and irradiated with a laser beam to form a conductive second semiconductor film. As the laser beam, a laser beam emitted from a known pulsed laser or continuous wave laser is appropriately used.

  Next, a first mask pattern 106 is formed on the second semiconductor film 105. The first mask pattern 106 is preferably formed using a heat-resistant polymer material, and a liquid containing a polymer having an aromatic ring or a heterocyclic ring as a main chain and a small amount of an aliphatic portion and a highly polar hetero atom group. It is preferable to form by discharging droplets. Typical examples of such a polymer substance include polyimide and polybenzimidazole. In the case of using polyimide, a composition containing polyimide can be discharged from the discharge port onto the second semiconductor film 105 and baked at 200 ° C. for 30 minutes.

  The first mask pattern can be formed by previously forming a mask pattern having a liquid repellent surface and applying a polymer material to a region not covered with the mask pattern having a liquid repellent surface.

  Next, as shown in FIG. 1B, the second semiconductor film 105 and the first semiconductor film 104 are etched using the first mask pattern 106 so that the first semiconductor region 111 and the second semiconductor film are etched. Region 112 is formed. Thereafter, the first mask pattern is removed.

The first semiconductor film 104 and the second semiconductor film 105 are typified by a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. Etching can be performed using fluorine gas or O ₂ .

  Note that the first semiconductor region 111 can be formed using an organic semiconductor material by a printing method, a spray method, a droplet discharge method, or the like. In this case, since the etching process is not necessary, the number of processes can be reduced. The organic semiconductor material used in the present invention is preferably a π-electron conjugated polymer material whose skeleton is composed of conjugated double bonds. Specifically, soluble polymer materials such as polythiophene, poly (3-alkylthiophene), polythiophene derivatives, and pentacene can be used.

  In addition, as an organic semiconductor material that can be used in the present invention, there is a material that can form the first semiconductor region 111 by processing after forming a soluble precursor. Examples of the organic semiconductor material that passes through such a precursor include polythienylene vinylene, poly (2,5-thienylene vinylene), polyacetylene, a polyacetylene derivative, and polyarylene vinylene.

  When converting the precursor into an organic semiconductor, a reaction catalyst such as hydrogen chloride gas is added as well as heat treatment. Typical solvents for dissolving these soluble organic semiconductor materials include toluene, xylene, chlorobenzene, dichlorobenzene, anisole, chloroform, dichloromethane, γ-butyllactone, butyl cellosolve, cyclohexane, NMP (N-methyl-2 -Pyrrolidone), cyclohexanone, 2-butanone, dioxane, dimethylformamide (DMF), THF (tetrahydrofuran), or the like can be applied.

  When an organic semiconductor is used for the first semiconductor region, an organic conductive material such as polyacetylene, polyaniline, PEDOT (poly-ethylene thiothiophene), or PSS (poly-styrene sulfonate) is used instead of the conductive second semiconductor region. A conductive layer (contact layer) formed by (1) can be formed. The conductive layer functions as a source region and a drain region.

  Further, as a conductive layer in contact with the organic semiconductor layer, a conductive layer formed using a metal element can be used instead of a conductive layer formed using an organic material. In this case, since a material that transports charges in many organic semiconductor materials is a p-type semiconductor that transports holes as carriers, it is desirable to use a metal having a high work function in order to make ohmic contact with the semiconductor layer.

  Specifically, metals or alloys such as gold, platinum, chromium, palladium, aluminum, indium, molybdenum, and nickel are desirable. A conductive layer in contact with the organic semiconductor layer can be formed by a printing method, a roll coater method, or a droplet discharge method using a conductive paste using these metals or alloy materials.

  Furthermore, an organic semiconductor layer, a conductive layer formed of an organic conductive material, and a conductive layer formed of a metal element may be stacked.

  Next, as shown in FIG. 1C, a photosensitive resin 113 is applied over the substrate. As the photosensitive resin, a material negative photosensitive resin or positive photosensitive resin sensitive to ultraviolet light to infrared light is used.

  Typical examples of the coating method include a droplet discharge method, an inkjet method, a spin coating method, a roll coating method, a slot coating method, and a dip method.

  As the photosensitive resin, a resin material having photosensitivity such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin is used. In addition, organic materials exhibiting photosensitivity such as benzocyclobutene, parylene, flare, and polyimide can be used. A typical positive photosensitive resin includes a novolak resin and a photosensitive resin having a naphthoquinonediazide compound as a photosensitive agent. As a negative photosensitive resin, a photosensitive resin having a base resin, diphenylsilanediol, an acid generator, and the like. Resin. In this embodiment mode, a positive photosensitive resin is used.

  Next, the photosensitive resin 113 is exposed by being irradiated with a laser beam (hereinafter also referred to as laser light) 114 using a laser beam direct drawing apparatus.

  A laser beam direct writing apparatus will be described with reference to FIG. As shown in FIG. 39, a laser beam drawing apparatus 1001 includes a personal computer (hereinafter referred to as a PC) 1002 that executes various controls when irradiating a laser beam, a laser oscillator 1003 that outputs a laser beam, and a laser. A power source 1004 of an oscillator 1003, an optical system (ND filter) 1005 for attenuating the laser beam, an acousto-optic modulator (AOM) 1006 for modulating the intensity of the laser beam, and a laser beam An optical system 1007 composed of a lens for enlarging or reducing the cross section, a mirror for changing the optical path, etc., a substrate moving mechanism 1009 having an X stage and a Y stage, and control data output from the PC are digitally displayed. D / A converter 1010 for analog conversion, and D It includes a driver 1011 for controlling the acousto-optic modulator 1006 in accordance with an analog voltage outputted from the A converter, and a driver 1012 for outputting a driving signal for driving the substrate moving mechanism 1009.

As the laser oscillator 1003, a laser oscillator that can oscillate ultraviolet light, visible light, or infrared light can be used. As the laser oscillator, excimer laser oscillators such as KrF, ArF, KrF, XeCl, and Xe, gas laser oscillators such as He, He—Cd, Ar, He—Ne, and HF, YAG, GdVO ₄ , YVO ₄ , YLF, and YAlO Cr crystal such as _{3, Nd, Er, Ho,} Ce, Co, solid-state laser oscillator using a crystal doped with Ti or Tm, can be used GaN, GaAs, GaAlAs, a semiconductor laser oscillator of InGaAsP or the like. In the solid-state laser oscillator, it is preferable to apply the first to fifth harmonics of the fundamental wave.

  Next, a photosensitive resin exposure method using a laser beam direct writing apparatus will be described. When the substrate 1008 is mounted on the substrate moving mechanism 1009, the PC 1002 detects the position of the marker attached to the substrate by a camera (not shown). Next, the PC 1002 generates movement data for moving the substrate movement mechanism 1009 based on the detected marker position data and drawing pattern data input in advance. Thereafter, the PC 1002 controls the amount of light output from the acousto-optic modulator 1006 via the driver 1011, so that the laser beam output from the laser oscillator 1003 is attenuated by the optical system 1005 and then acousto-optic modulated. The light quantity is controlled by the device 1006 so as to obtain a predetermined light quantity. On the other hand, the laser beam output from the acousto-optic modulator 1006 is changed in optical path and beam shape by the optical system 1007 and condensed by a lens, and then the photosensitive resin applied on the substrate 108 is irradiated with the beam. The photosensitive resin is exposed to light. At this time, according to the movement data generated by the PC 1002, the movement of the substrate moving mechanism 1009 is controlled in the X direction and the Y direction. As a result, a predetermined position is irradiated with a laser beam, and the photosensitive resin is exposed.

  After that, the photosensitive resin is developed to form a second mask pattern 115 as shown in FIG. Here, since the positive type is used as the photosensitive resin, the resist in the region irradiated with the laser beam is removed, and the second semiconductor region is exposed. Note that a part of the energy of the laser beam is converted into heat by the resist and reacts a part of the resist, so that the exposure width is slightly larger than the width of the laser beam. In addition, since the shorter the wavelength of the laser light, the shorter the beam diameter can be collected, in order to form the second mask pattern having the fine width opening, the short wavelength laser beam is used. Irradiation is preferred.

  Further, the spot shape of the laser beam on the surface of the photosensitive resin is processed by an optical system so as to be a dot shape, a circle shape, an ellipse shape, a rectangle shape, or a linear shape (strictly, an elongated rectangle shape). Note that the spot shape may be circular, but a linear resist mask having a uniform width can be formed.

  The apparatus shown in FIG. 39 shows an example in which exposure is performed by irradiating a laser beam from the front side of the substrate. However, the optical system and the substrate moving mechanism are appropriately changed, and the laser beam is irradiated from the back side of the substrate. Alternatively, a laser beam drawing apparatus that performs exposure may be used.

Note that here, the laser beam is selectively irradiated by moving the substrate; however, the present invention is not limited to this, and the laser beam can be irradiated by scanning the laser beam in the XY direction. In this case, it is preferable to use a polygon mirror, a galvano mirror, or an acousto-optic deflector (AOD) for the optical system 1007.

  Next, the second semiconductor region 112 is etched using the second mask pattern as a mask, so that a source region and a drain region (also referred to as a contact layer) 116 are formed. Thereafter, the second mask pattern is removed by a process using a stripping solution or an ashing process using oxygen. Since the second mask pattern has an opening with a fine width, the etched width of the second semiconductor region is very small. As a result, the distance between the source region and the drain region is narrow. That is, a TFT having a small channel length can be formed without using a photomask.

  Note that in the case where the first semiconductor region 111 is formed of SAS, in addition to the structure in which the source region and the drain region cover the gate electrode as in this embodiment, the end portions of the source region and the drain region are formed. And a so-called self-aligned structure in which the end portions of the gate electrode coincide with each other, and a structure in which the source region and the drain region are formed at a certain distance without covering the gate electrode.

  Next, as illustrated in FIG. 1E, a second conductive layer 117 functioning as a source electrode and a drain electrode is formed over the source region and the drain region by discharging a conductive material. As the conductive material, a material obtained by dissolving or dispersing a material similar to the material used for the first conductive layer 102 in a solvent can be used. Here, Ag paste is selectively discharged, and drying and baking by laser beam irradiation as described above or heat treatment are performed as appropriate to form electrodes having a thickness of 600 to 800 nm.

  Note that in the TFT formed in this embodiment, the distance between the facing source region and the drain region is slightly different from the distance between the facing source electrode and the drain electrode, and the distance between the facing source region and the drain region is slightly different. Is small. The distance between the source region and the drain region is the channel length.

  Note that a conductive film is formed in advance by a droplet discharge method, a sputtering method, or the like, and a negative or positive photosensitive resin is formed by a droplet discharge method, followed by exposure by laser light irradiation and development. The source electrode and the drain electrode may be formed by forming a mask pattern and etching the conductive film.

  Next, a passivation film is preferably formed over the second conductive layer 117 functioning as a source electrode and a drain electrode. The passivation film is formed using a thin film formation method such as plasma CVD or sputtering, and silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, aluminum oxynitride, or aluminum oxide, diamond-like carbon (DLC), nitrogen-containing carbon (CN) and other insulating materials can be used.

  Through the above steps, a channel-etched TFT with a small channel length can be manufactured without using a photomask.

(Embodiment 2)
In this embodiment mode, a process for forming a channel-etched TFT as in Embodiment Mode 1 is described with reference to FIGS. In this embodiment mode, a manufacturing process of a source electrode and a drain electrode is different from that in Embodiment Mode 1.

    As shown in FIG. 2A, as in Embodiment Mode 1, a first conductive layer 102, a first insulating film 103, a first semiconductor region 111, and a second semiconductor region 112 are formed over a substrate 101. Form.

  Next, a second conductive film 201 is formed over the second semiconductor region 112 and the first insulating film 103. The second conductive film 201 can be formed using a material and a manufacturing method similar to those of the first conductive layer 102 in Embodiment 1.

  Next, a photosensitive resin 113 is applied onto the substrate by a droplet discharge method, and exposure is performed by irradiating the photosensitive resin 113 with a laser beam 114 as in the first embodiment. Thereafter, development is performed to form a first mask pattern 115 shown in FIG. Since the first mask pattern is formed by exposing the photosensitive resin by irradiating laser light, a mask pattern having an opening with a fine width can be formed.

  Next, the second conductive film 201 is etched using the first mask pattern 115 as a mask to form the source and drain electrodes 211.

  Next, as shown in FIG. 2C, the second semiconductor region 112 is etched using the first mask pattern 115 as a mask to form a third semiconductor region 221 that functions as a source region and a drain region. . Here, the second semiconductor region is etched using the first mask pattern. Instead, after removing the first mask pattern, the second semiconductor region is formed using the source and drain electrodes 211 as a mask. Region 112 can also be etched. Thereafter, it is preferable to form a passivation film.

    Through the above steps, a channel-etched TFT with a small channel length as shown in FIG. 2D can be manufactured without using a photomask. Note that in this TFT, one of the end portions of the source electrode and the drain electrode is coincident with one of the end portions of the source region and the drain region.

(Embodiment 3)
In this embodiment mode, a process for forming a channel etch type TFT having a small channel length by using a material for forming a liquid repellent surface is described with reference to FIGS. In this embodiment mode, a mask pattern is formed over the conductive second semiconductor film, and the second semiconductor film is etched using the mask pattern to form a source region and a drain region.

    As shown in FIG. 2A, after the first conductive layer 102, the first insulating film 103, and the first semiconductor film are formed over the substrate 101 as in Embodiment 1, Embodiment 1 is performed. A first semiconductor pattern 111 is formed, and the first semiconductor film is etched to form a first semiconductor region 111.

  Next, a second semiconductor film 301 is formed over the first semiconductor region and the first insulating film. The second semiconductor film 301 can be formed using a material and a method similar to those of the second semiconductor film 105 described in Embodiment 1.

  Next, a region 302 having a liquid repellent surface is formed over the second semiconductor film 301. The region having a liquid repellent surface is a region having a large surface contact angle with respect to the liquid. On this surface the liquid is repelled by a hemisphere. On the other hand, the region having the lyophilic surface is a region having a small surface contact angle with respect to the liquid. On this surface, the liquid spreads and spreads.

  For this reason, when two regions having different contact angles are in contact with each other, a region having a relatively high contact angle is a region having a lyophobic surface, and a region having a lower contact angle is a region having a lyophilic surface. When the solution is applied to these two regions, the solution spreads on the surface of the region having the lyophilic surface and is repelled at the interface with the region having the lyophobic surface.

  When the surface has irregularities, the contact angle is further increased in the region having the liquid repellent surface. That is, the liquid repellency is increased. On the other hand, the contact angle is further reduced in the region having the lyophilic surface. That is, lyophilicity is increased. For this reason, the layer which has a uniform edge part can be formed by apply | coating and baking the solution which has a composition on each surface which has an unevenness | corrugation.

Here, a solution having a liquid repellent surface is applied to form a region having the liquid repellent surface. As an example of the composition of the solution that forms the liquid repellent surface, a silane coupling agent represented by a chemical formula of R _n —Si—X _(4-n) (n = 1, 2, 3) is used. Here, R is a substance containing a relatively inert group such as an alkyl group. X consists of a hydrolyzable group that can be bonded by condensation with a hydroxyl group on the underlying surface or adsorbed water, such as halogen, methoxy group, ethoxy group, or acetoxy group.

Further, as a typical example of the silane coupling agent, by using a fluorine-based silane coupling agent (fluoroalkylsilane (FAS)) having a fluoroalkyl group in R, liquid repellency can be further improved. R of FAS has a structure represented by (CF ₃ ) (CF ₂ ) _x (CH ₂ ) _y (x: an integer of 0 or more and 10 or less, y: an integer of 0 or more and 4 or less), and a plurality of R Alternatively, when X is bonded to Si, R and X may all be the same or different. Typical FAS includes heptadefluorotetrahydrodecyltriethoxysilane, heptadecafluorotetrahydrodecyltrichlorosilane, tridecafluorotetrahydrooctyltrichlorosilane, trifluoropropyltrimethoxysilane, and the like.

  Solvents for the solution forming the water repellent surface include n-pentane, n-hexane, n-heptane, n-octane, n-decane, dicyclopentane, benzene, toluene, xylene, durene, indene, tetrahydronaphthalene, decahydro. A solvent that forms a liquid repellent surface, such as a hydrocarbon solvent such as naphthalene or squalane, or tetrahydrofuran is used.

  Further, as an example of a composition of a solution that forms a liquid repellent surface, a material having a fluorocarbon chain (fluorine resin) can be used. Examples of the fluorine resin include polytetrafluoroethylene (PTFE; tetrafluoroethylene resin), perfluoroalkoxyalkane (PFA; tetrafluoroethylene perfluoroalkyl vinyl ether copolymer resin), and perfluoroethylene propylene copolymer (PFEP; four fluorine). Ethylene-hexafluoropropylene copolymer resin), ethylene-tetrafluoroethylene copolymer (ETFE; tetrafluoroethylene-ethylene copolymer resin), polyvinylidene fluoride (PVDF; vinylidene fluoride resin), polychlorotrifluoroethylene (PCTFE; trifluoroethylene chloride resin), ethylene-chlorotrifluoroethylene copolymer (ECTFE; trifluoroethylene chloride-ethylene copolymer resin), polytetrafluoroethylene-perfluorodiode Sole copolymer (TFE / PDD), polyvinyl fluoride (PVF; a vinyl fluoride resin), or the like can be used.

  Subsequently, when the surface to which the solution forming the liquid repellent surface is attached is washed with ethanol, an extremely thin liquid repellent surface can be formed.

Further, an organic material that does not form a liquid repellent surface (that is, forms a lyophilic surface) as a mask pattern may be used to form a liquid repellent surface by subsequent treatment with CF ₄ plasma or the like. For example, a material in which a water-soluble resin such as polyvinyl alcohol (PVA) is mixed with a solvent such as H ₂ O can be used. Moreover, you may use combining PVA and another water-soluble resin. Furthermore, even when the mask pattern has a liquid repellent surface, the liquid repellency can be further improved by performing the plasma treatment or the like.

Alternatively, plasma treatment can be performed by preparing an electrode provided with a dielectric and generating plasma using air, oxygen, or nitrogen so that the dielectric is exposed to the plasma. In this case, the dielectric need not cover the entire electrode surface. By using a dielectric having fluorine such as Teflon (registered trademark) as the dielectric, CF ₂ bonds are formed on the surface to be formed, surface modification is performed, and liquid repellency is exhibited.

  Next, the laser beam 114 is irradiated to the material forming the liquid repellent surface. As the laser light, the one described in Embodiment 1 can be used as appropriate. Here, the region where the source region and the drain region are formed is irradiated with laser light. Substituents that exhibit liquid repellency of the material forming the liquid repellent surface, typically light having a wavelength that has a higher energy than the binding energy of a fluoroalkyl group or an alkyl group bonded to a fluoroalkyl group, typically Irradiation with laser light breaks the bond of substituents exhibiting liquid repellency. That is, the liquid repellency of the region irradiated with the laser light is lowered and lyophilic. In FIG. 3B, a region irradiated with laser light is a region 311 having a lyophilic surface, and a region not irradiated with laser light is a region 312 having a lyophobic surface.

  Next, as shown in FIG. 3C, a second mask pattern 321 is formed in a region having a lyophilic surface. At this time, in the region 312 having the liquid repellent surface, the mask pattern is not formed because the material of the second mask pattern is repelled. As the second mask pattern, a pattern similar to the first mask pattern 106 described in Embodiment Mode 1 can be formed. By irradiating a region having a liquid repellent surface with laser light to form a region having both lyophilic surfaces, a mask pattern can be formed without using a photomask. Since the irradiation region can be controlled by a laser beam scanning method, a mask pattern having a fine interval can be formed.

  Next, as illustrated in FIG. 3D, the second semiconductor film 301 is etched using the second mask pattern as a mask to form a second semiconductor region 331. As the etching method of the second semiconductor film 301, the etching method of the second semiconductor film 105 described in Embodiment 1 is applied as appropriate. In addition, by this step, the region 312 having the liquid repellent surface is also etched. Note that the second semiconductor region 331 functions as a source region and a drain region. Thereafter, the second mask pattern 321 is removed.

  Next, as illustrated in FIG. 3E, a conductive material is discharged so as to be in contact with the source region and the drain region, so that the source electrode and the drain electrode 341 are formed. Note that the source and drain electrodes 341 can be formed using a material and a manufacturing method similar to those of the second conductive layer 117 functioning as the source and drain electrodes described in Embodiment 1.

  Through the above steps, a channel-etched TFT with a small channel length as shown in FIG. 2D can be manufactured without using a photomask.

(Embodiment 4)
In this embodiment mode, a process for forming a channel protection type TFT using a material for forming a liquid repellent surface is described with reference to FIGS. In this embodiment mode, a mask pattern is formed over the first semiconductor film serving as a base, and a source region and a drain region are formed using the mask pattern. In addition, the non-source region and the drain region are irradiated with laser light to form a region having a lyophilic surface.

  As shown in FIG. 4A, after forming the first conductive layer 102, the first insulating film 103, and the first semiconductor film 104 over the substrate 101 as in Embodiment Mode 1, A mask pattern 401 is formed, and the first semiconductor film 104 is etched to form a first semiconductor region 411 as shown in FIG.

  Next, a material for forming a liquid repellent surface is applied over the first semiconductor region 411, so that the region 302 having the liquid repellent surface is formed. Next, laser light 114 is irradiated to part of the region 302 having a liquid repellent surface. Here, laser light is irradiated to the outer edge of a region where a source region and a drain region are formed later. As a result, a region having a lyophilic surface is formed in the region irradiated with the laser light. In FIG. 4C, a region irradiated with laser light is a region 412 having a lyophilic surface, and a region not irradiated with laser light is a region 413 having a lyophobic surface.

  Next, as shown in FIG. 4D, a second mask pattern 422 is formed on the lyophilic surface. In the second mask pattern 422, what is formed on the channel formation region functions as a channel protective film. For the second mask pattern, a material and a manufacturing method similar to those of the first mask pattern 401 can be used. Since the irradiation region can be controlled by a laser beam scanning method, a mask pattern (channel protective film) having a fine width can be formed.

Next, a conductive material is applied to a region surrounded by the second mask pattern 422 to form a second conductive layer 421. As a material of the second conductive layer, a conductive layer formed of an organic conductive material such as polyacetylene, polyaniline, PEDOT (poly-ethylene dithiophene), or PSS (poly-styrene sulfonate) can be formed. The second conductive layer functions as a source region and a drain region.

  As the second conductive layer, a metal or an alloy such as gold, platinum, chromium, palladium, aluminum, indium, molybdenum, or nickel can be used. It can be formed by a printing method, a roll coater method, or a droplet discharge method using a conductive paste using these metals or alloy materials.

  Next, as illustrated in FIG. 4E, a third conductive layer 431 functioning as a source electrode and a drain electrode is formed in a region in contact with the second conductive layer. In this case, the third conductive layer is preferably formed of a conductive material having low resistance. For the third conductive layer 431, a material and a manufacturing method similar to those of the second conductive layer 117 in Embodiment 1 can be used as appropriate. Note that in this embodiment mode, the second mask pattern 422 is not removed and the third conductive layer is formed; however, the present invention is not limited to this step, and the second mask pattern is removed as shown in Embodiment Mode 5. Thereafter, a third conductive layer can be formed.

  Through the above steps, a channel protective TFT with a small channel length can be formed without using a photomask.

(Embodiment 5)
In this embodiment mode, a process for forming a channel protection type TFT with a small channel length using a material for forming a liquid repellent surface is described with reference to FIGS. In this embodiment mode, a mask pattern is formed over the first semiconductor film serving as a base, and a source region and a drain region are formed using the mask pattern. In addition, in a layer formed using a material that forms a liquid-repellent surface, a portion having a lyophilic surface is formed by irradiating portions that will later become a source region and a drain region with laser light.

  As shown in FIG. 5A, as in Embodiment Mode 4, a first conductive layer 102, a first insulating film 103, and a first semiconductor region 411 are formed over a substrate 101, so that the first semiconductor A material 302 for forming a liquid repellent surface is applied on the region.

  Next, the material 302 for forming the liquid repellent surface is irradiated with laser light 114. Here, a region having a lyophilic surface is formed by irradiating a region to be a source region and a drain region with laser light. Since the irradiation region can be controlled by a laser beam scanning method, a mask pattern (channel protective film) having a fine width can be formed.

  Next, as illustrated in FIG. 5B, a conductive material is applied to a region having a lyophilic surface to form a second conductive layer (a source region and a drain region) 512. Note that a region 511 having a liquid repellent surface remains in a region not irradiated with laser light.

  Next, as illustrated in FIG. 5C, the region 511 having a liquid repellent surface is removed by ashing using oxygen, and then a third conductive layer 521 functioning as a source electrode and a drain electrode is formed.

  Through the above steps, a TFT with a small channel length can be formed without using a photomask.

(Embodiment 6)
In this embodiment mode, a manufacturing process of a forward staggered TFT having a small channel length is described with reference to FIGS. In this embodiment, a method for forming a source region and a drain region is described using Embodiment 3. However, the present invention is not limited to this process, and other embodiments can be applied as appropriate.

  As shown in FIG. 6A, a first insulating film 601 is formed over a substrate 101, and a first conductive layer 602 is formed thereover. The first conductive layer 602 functions as a source electrode and a drain electrode later. As this material and a manufacturing method, a material similar to that of the first conductive layer 102 in Embodiment 1 can be used as appropriate.

  Next, a first semiconductor film 603 having conductivity is formed over the substrate. As the first semiconductor film, a film similar to the second semiconductor film 105 described in Embodiment 1 is used as appropriate. Next, a material for forming a liquid repellent surface is applied over the first semiconductor film 603, so that the region 302 having the liquid repellent surface is formed. Thereafter, the laser beam 114 is irradiated to a part of the region having the liquid repellent surface. In this embodiment mode, a portion having a lyophilic surface is formed by irradiating a portion to be a source region and a drain region later with laser light. Note that a region 611 having a liquid repellent surface remains in the region not irradiated with the laser light, as shown in FIG. 6B. Next, a first mask pattern 612 is formed in a region irradiated with laser light and having a lyophilic surface. As the first mask pattern, a material similar to the first mask pattern 106 of Embodiment 1 can be used as appropriate. Since the irradiation region can be controlled by a laser beam scanning method, a mask pattern having a fine interval can be formed.

  Next, as illustrated in FIG. 6C, the first semiconductor film 603 is etched using the first mask pattern as a mask to form a first semiconductor region 621. The first semiconductor region functions as a source region and a drain region. Thereafter, the first mask pattern is removed.

  Next, as illustrated in FIG. 6D, a second semiconductor region 631, a second insulating film 632, and a second conductive layer 633 are formed. The second semiconductor region 631 functions as a channel formation region, the second insulating film 632 functions as a gate insulating film, and the second conductive layer 633 functions as a gate electrode.

  Next, a positive or negative photosensitive resin 113 is applied on the substrate, and then exposed to a laser beam 634 for exposure and development. Here, a positive photosensitive resin is used, and laser light is irradiated to a region where a subsequent contact hole is to be formed. As a result, as shown in FIG. 6E, a second mask pattern 641 can be formed.

  Next, using the second mask pattern 641 as a mask, the second insulating film 632 is etched to form a contact hole and expose a part of the first conductive layer 602. Thereafter, the second mask pattern 641 is removed.

  Next, as illustrated in FIG. 6F, a third conductive layer 651 connected to the first conductive layer 602 is formed in the contact hole. As the third conductive layer, a material similar to the second conductive layer 117 in Embodiment 1 can be used as appropriate.

  Through the above steps, a forward staggered TFT with a small channel length can be manufactured without using a photomask.

(Embodiment 7)
In this embodiment, a method for forming a contact hole, which is different from that in Embodiment 6, will be described with reference to FIGS.

  In accordance with Embodiment Mode 6, a forward stagger type TFT as shown in FIG. 8A is formed. Here, the first insulating film 601, the first conductive layer 602, the first semiconductor region 621, and the first semiconductor region are formed over the substrate 101 and between the source electrode and the drain electrode. A second semiconductor region 631, a second insulating film 632, and a second conductive layer 633.

  Next, as shown in FIG. 8B, a solution for forming a liquid repellent surface is discharged to a region where the first conductive layer 602 and the second insulating film 632 overlap with each other, and a first mask pattern 661 is formed. 662 are formed by a droplet discharge method.

  Next, a solution for forming the lyophilic surface is applied to form second mask patterns 663 to 665. Typical examples of lyophilic solutions include acrylic resin, polyimide resin, melamine resin, polyester resin, polycarbonate resin, phenol resin, epoxy resin, polyacetal, polyether, polyurethane, polyamide (nylon), furan resin, diallyl phthalate An organic resin such as a resin, siloxane, or polysilazane can be used. A solution using a polar solvent such as water, alcohol, ether, dimethylformamide, dimethylacetamide, dimethylsulfoxide, N-methylpyrrolidone, hexamethylphosphamide, chloroform, methylene chloride, or the like can also be used. As a method for applying the solution for forming the lyophilic surface, a droplet discharge method, an ink jet method, a spin coating method, a roll coating method, a slot coating method, a dip method, or the like can be applied.

  Since the first mask patterns 661 and 662 have a liquid repellent surface, the second mask patterns 663 to 665 are formed in the outer edge of the first mask pattern, that is, in the region where the first mask pattern is not formed. .

  Instead of the above process, after the solvent of the first mask patterns 661 and 662 is dried, a solution for forming the lyophilic surface may be applied to form the second mask pattern. Also in this case, since the first mask patterns 661 and 662 have a liquid-repellent surface, the second mask patterns 663 to 665 have no outer edge of the first mask pattern, that is, the first mask pattern is not formed. Formed in the region.

  Next, as shown in FIG. 8C, the first mask patterns 661 and 662 and the second insulating film 632 are etched using the second mask pattern as a mask, and part of the source electrode and the drain electrode is formed. Exposed. Here, the etched second insulating film 632 is denoted by 671.

  Next, as shown in FIG. 8D, third conductive films 681 and 682 are formed.

  Note that as shown in FIG. 8E, the third conductive films 691 and 692 can be formed using the second mask patterns 663 to 665 as an interlayer insulating film without being removed.

  Through the above steps, a contact hole can be formed without using a photomask.

(Embodiment 8)
In this embodiment mode, a structure of a TFT having a large W / L will be described with reference to FIGS.

  FIG. 7A is a top view of the inverted staggered TFT formed in Embodiment Mode 2. A semiconductor region 901, a source region and a drain region 902, and a source electrode and a drain electrode 903 are stacked over the gate electrode 900. ing.

  The opposing ends of the source electrode and the drain electrode are curved in a straight line. Here, the laser beam or the substrate is detoured at a right angle, that is, scanned in a zigzag shape at a right angle, and the source region and the drain region, or the source electrode and the drain electrode of the element are formed using the formed mask pattern. Is formed. For this reason, it is possible to form a channel forming region that is curved in a straight line, that is, has a right-angled zigzag shape. Therefore, even on a small semiconductor region, the channel length can be reduced and the channel width can be increased.

  FIG. 7B is a top view of the TFT similarly. Here, when forming a mask pattern for forming the source and drain regions 912 and the source and drain electrodes 913, the laser beam or the substrate is linearly bent at 90 degrees to less than 180 degrees, that is, 90 degrees. The zigzag scanning is performed at less than 180 degrees. For this reason, the channel formation region is linearly bent at 90 degrees or more and less than 180 degrees, that is, has a zigzag shape at 90 degrees or more and less than 180 degrees. Here, 910 indicates a gate electrode, and 911 indicates a semiconductor region.

  7C and 7D are similarly top views of the TFTs. Here, when forming a mask pattern for forming the source and drain regions 922 and 932 and the source and drain electrodes 923 and 933, the laser beam or the substrate is linearly bent at 0 degree or more and less than 90 degrees. That is, scanning is performed in a zigzag manner at 0 degree or more and less than 90 degrees. For this reason, the channel forming region is linearly bent at 0 degree or more and less than 90 degrees, that is, has a zigzag shape at 0 degree or more and less than 90 degrees. Here, 920 and 930 are gate electrodes, and 921 and 931 are semiconductor regions.

  Note that the channel formation region of the TFT illustrated in FIG. 7C is point-symmetric, and the channel formation region of the TFT illustrated in FIG. 7D is point-symmetric.

  FIG. 7E is a top view of the TFT similarly. Here, when forming a mask pattern for forming the source and drain regions 942 and the source and drain electrodes 943 by etching, scanning is performed while the laser beam is bent in an arc shape. For this reason, the channel forming region has a curved shape. Here, 940 indicates a gate electrode, and 941 indicates a semiconductor region.

  FIG. 7F is a top view of the TFT similarly. Here, when forming a mask pattern for forming the source and drain regions 952 and the source and drain electrodes 953 by etching, the laser beam or the substrate is scanned while being bent in a straight line and an arc shape. For this reason, the channel formation region has a shape that is curved in a straight line and an arc shape. Here, reference numeral 950 denotes a gate electrode, and reference numeral 951 denotes a semiconductor region.

  In addition to Embodiment 2, Embodiment 1 to Embodiment 7 can be applied as appropriate to this embodiment. In that case, the source and drain regions do not coincide with the end portions of the source and drain electrodes.

  Through the above steps, an element having a fine structure and an increased W / L can be formed without using a photomask. In this embodiment mode, since a source region and a drain region, or a source electrode and a drain electrode of an element are formed using a mask pattern formed by irradiation with a laser beam, a channel formation region having an arbitrary shape can be formed. it can. Therefore, an element with a fine structure and an increased W / L can be obtained while omitting a photolithography process, and thus a semiconductor device with high driving capability is manufactured at low cost and with high throughput and yield. be able to.

(Embodiment 9)
In this embodiment mode, a droplet discharge apparatus that can be used for pattern formation in the above embodiment mode will be described. In FIG. 24, a region 1930 where one panel is formed on the substrate 1900 is indicated by a chain line.

  FIG. 24 shows one mode of a droplet discharge device used for forming a pattern such as a wiring. The droplet discharge means 1905 has a head, and the head has a plurality of nozzles. In this embodiment, a case where three heads (1903a, 1903b, and 1903c) having ten nozzles are described will be described. However, the number of nozzles and the number of heads are set according to a processing area, a process, and the like. Can do.

  The head is connected to the control means 1907, and the control means controls the computer 1910 to draw a preset pattern. The drawing timing may be performed using, for example, the marker 1911 formed on the substrate 1900 fixed on the stage 1931 as a reference point. Further, the edge of the substrate 1900 may be used as a reference point. These reference points are detected by an imaging means 1904 such as a CCD, and converted into a digital signal by an image processing means 1909. The computer 1910 recognizes the digitally changed signal, generates a control signal, and sends it to the control means 1907. When drawing a pattern in this way, the distance between the pattern forming surface and the tip of the nozzle is 0.1 cm to 5 cm, preferably 0.1 cm to 2 cm, and more preferably about 0.1 cm. By shortening the interval in this way, droplet landing accuracy is improved.

  At this time, information on the pattern formed on the substrate 1900 is stored in the storage medium 1908. Based on this information, a control signal is sent to the control means 1907, and each head 1903a, 1903b, 1903c is individually controlled. be able to. That is, droplets having different materials can be discharged from the nozzles of the heads 1903a, 1903b, and 1903c. For example, the nozzles of the heads 1903a and 1903b can discharge droplets having an insulating film material, and the nozzles of the head 1903c can discharge droplets having a conductive film material.

  Furthermore, each nozzle of the head can be controlled individually. Since the nozzles can be individually controlled, droplets having different materials can be discharged from a specific nozzle. For example, the same head 1903a can be provided with a nozzle for discharging a droplet having a conductive film material and a nozzle for discharging a droplet having an insulating film material.

  In the case where a droplet discharge process is performed on a large area as in the step of forming an interlayer insulating film, droplets having an interlayer insulating film material may be discharged from all nozzles. Furthermore, it is preferable to discharge droplets having an interlayer insulating film material from all nozzles of a plurality of heads. As a result, throughput can be improved. Of course, in the interlayer insulating film forming step, a droplet having an interlayer insulating film material may be discharged from one nozzle, and a plurality of nozzles or a substrate may be scanned to perform a droplet discharging process on a large area.

  Then, the pattern can be formed on the large mother glass by zigzaging or reciprocating the head. At this time, the head and the substrate may be relatively scanned a plurality of times. When scanning the head with respect to the substrate, the head may be inclined obliquely with respect to the traveling direction.

  In the case where a plurality of panels are formed from a large mother glass, the width of the head is preferably about the same as the width of one panel. This is because a pattern can be formed in one scan of the region 1930 where one panel is formed, and high throughput can be expected.

  The width of the head may be smaller than the width of the panel. At this time, a plurality of small heads may be arranged in series so as to be approximately the same as the width of one panel. By arranging a plurality of small heads in series, it is possible to prevent the occurrence of head deflection, which is a concern as the head width increases. Of course, the pattern may be formed by scanning a narrow head a plurality of times.

  The step of discharging the solution droplets by such a droplet discharge method is preferably performed under reduced pressure. This is because the solvent of the composition evaporates and the steps of drying and baking the composition can be omitted before the solution is discharged and landed on the object to be processed. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. The step of dropping the composition may be performed in a nitrogen atmosphere or an organic gas atmosphere.

  As a droplet discharge method, a piezo method can be used. The piezo method is also used in inkjet printers because of its excellent droplet controllability and high degree of freedom in ink selection. There are two types of piezo methods: MLP (Multi Layer Piezo) type and MLChip (Multi Layer Ceramic Hyper Integrated Piezo Segments) type. Further, depending on the solvent of the composition, a droplet discharge method using a so-called thermal method in which a heating element generates heat to generate bubbles to push out the solution may be used.

(Embodiment 10)
In this embodiment mode, a manufacturing process of a gate electrode in a multi-gate TFT will be described with reference to FIGS. Note that in this embodiment, the second embodiment is referred to after the formation method of the gate insulating film, but the present invention is not limited to this, and the first to ninth embodiments can be used as appropriate.

  A first conductive layer 102 is formed over the substrate 101. Next, a photosensitive material 2101 is applied so as to cover the first conductive layer 102. Next, the photosensitive material 2101 is irradiated with the laser beam 114 to expose the photosensitive material 2101. Thereafter, development is performed to form a first mask pattern 2102 as shown in FIG. Here, since a positive photosensitive resin is used as a photosensitive material, a laser beam 114 is irradiated to a region to be etched later. The mask pattern has an opening in a region irradiated with laser light.

  Next, as shown in FIG. 40C, the first conductive layer 102 is etched using the first mask pattern 2102 to form the gate electrode 2103. Thereafter, the first mask pattern 2102 is removed and a gate wiring is formed. 42A and 42B are top views of the substrate at this time.

  As shown in FIG. 42A, the gate electrode 2103 is provided with an opening 2105. In addition, a gate wiring 2106 is connected to the gate electrode 2103.

  Since the gate electrode having the opening is connected at the end, even if the film thickness of the gate electrode is not uniform, the resistivity of the film is almost uniform, and variations in characteristics of TFTs to be formed later can be reduced. . Note that although two openings are provided in this embodiment mode, the number of openings may be one, or three or more openings may be provided. As the number of openings increases, the electric field at the drain end is further relaxed and the effect of reducing off-current is enhanced.

  In addition, since the first conductive film can be etched using the first mask pattern having an opening with a fine width, a TFT having a multi-gate structure can be formed without increasing the area of the TFT. . That is, a semiconductor device capable of high integration can be manufactured.

  Note that the gate electrode may be a comb-shaped gate electrode 2107 as illustrated in FIG.

    After that, as illustrated in FIG. 40D, the gate insulating film 103, the first semiconductor region 111, the second semiconductor region 2121, and the source and drain electrodes 211 are formed over the gate electrode 2103. Note that a multi-gate TFT can be formed by forming the source electrode and the drain electrode so as to sandwich the opening 2105 of the gate electrode 2103. In addition, conductive layers 2108 to 2111 are formed to cover the opening and part of the gate electrode disposed on the side thereof. The conductive layer can be formed simultaneously with the second semiconductor region, the source electrode, and the drain electrode.

  In the TFT having this structure, the electric field at the drain end is relaxed, and the effect of reducing off-current is enhanced. For this reason, when the TFT is used as a switching element of a liquid crystal display device, the contrast is improved. In addition, since a multi-gate TFT having a small occupied area can be formed, a highly integrated semiconductor device can be formed.

  Next, a step of forming a multi-gate TFT using a negative photosensitive resin will be described with reference to FIG.

    As shown in FIG. 41, a photosensitive material 2110 is applied over the first conductive layer 102, and then irradiated with a laser beam 114, developed, and developed, as shown in FIG. 41B. A mask pattern 2111 is formed. Here, since a negative photosensitive resin is used as the photosensitive material 2110, a region that will later become a gate electrode is irradiated with laser light. As a result, a mask pattern is formed in the region irradiated with the laser light.

  Next, as shown in FIG. 41C, the first conductive layer 102 is etched using the first mask pattern 2111 to form the gate electrode 2112. Thereafter, the first mask pattern is removed and a gate wiring is formed. 42C and 42D are top views of the substrate at this time.

  As shown in FIG. 42C, the gate electrode 2112 is provided with an opening 2105. In addition, a gate wiring 2106 is connected to the gate electrode 2112. This structure has the same effect as the gate electrode shown in FIG. In addition, since the first conductive film can be etched using the first mask pattern with a fine width, a multi-gate TFT can be formed without increasing the area of the TFT. That is, a semiconductor device capable of high integration can be manufactured.

  Note that the gate electrode may be a comb-shaped gate electrode 2117 as illustrated in FIG.

    After that, as shown in FIG. 41D, over the gate electrode 2112, the first insulating film 103 functioning as a gate insulating film, the first semiconductor region 111, the second semiconductor region 2121, the source electrode and the drain An electrode 211 is formed. Note that a multi-gate TFT can be formed by forming the source electrode and the drain electrode so as to sandwich the opening of the gate electrode 2112. In addition, conductive layers 2114 and 2115 are stacked to cover the opening and part of the gate electrode disposed on the side of the opening. The conductive layer can be formed simultaneously with the second semiconductor region, the source electrode, and the drain electrode.

  In the TFT having this structure, the electric field at the drain end is relaxed, and the effect of reducing off-current is enhanced. For this reason, when the TFT is used as a switching element of a liquid crystal display device, the contrast is improved. In addition, since the width of the gate electrode substantially matches the beam width of the laser light, a TFT having a gate electrode having a fine structure (that is, having a small channel length) can be manufactured, and the driving capability of the TFT is further increased. be able to.

  Next, a method for manufacturing an active matrix substrate and a display panel having the active matrix substrate will be described with reference to FIGS. In this embodiment, a liquid crystal display panel is used as the display panel. 17 to 19 schematically show the longitudinal cross-sectional structures of the pixel portion and the connection terminal portion, and the planar structures corresponding to AB and CD are shown in FIGS.

  As shown in FIG. 17A, the surface of the substrate 800 is oxidized at 400 degrees to form an insulating film 801 having a thickness of 100 nm. This insulating film functions as an etching stopper film for the conductive layer 802 to be formed later. Next, a first conductive layer 802 is formed over the insulating film 801, and first mask patterns 803 to 805 are formed over the first conductive layer by a droplet discharge method. As the substrate 800, an AN100 glass substrate manufactured by Asahi Glass Co., Ltd. is used, and as the first conductive layer 802, a tungsten film having a thickness of 100 nm is formed by a sputtering method using a tungsten target and an argon gas. For the first mask pattern, polyimide is discharged by a droplet discharge method, and is heated and baked at 200 degrees for 30 minutes. The first mask pattern is discharged onto a gate wiring layer, a gate electrode layer, and a connection conductive layer that are formed later.

  Next, as shown in FIG. 17B, part of the first conductive layer is etched using the first mask patterns 803 to 805 to form the gate wiring layer 811, the gate electrode layer 812, and the connection conductive layer. Layer 813 is formed. Thereafter, the first mask patterns 803 to 805 are stripped using a stripping solution. Note that FIG. 17B schematically shows a longitudinal cross-sectional structure, and a planar structure corresponding to AB and CD is shown in FIG.

Next, as illustrated in FIG. 17C, a gate insulating film 821 is formed by a plasma CVD method. As the gate insulating film 821, a silicon oxynitride film having a thickness of 110 nm is formed by a plasma CVD method using SiH ₄ and N ₂ O (flow rate ratio SiH ₄ : N ₂ O = 1: 200) in a chamber heated at 400 degrees. (H: 1.8%, N: 2.6%, O: 63.9%, Si: 31.7%) are formed.

  Next, a first semiconductor film 822 and an n-type second semiconductor film 823 are formed. As the first semiconductor film 822, an amorphous silicon film with a thickness of 150 nm is formed by a plasma CVD method. Next, after removing the oxide film on the surface of the amorphous silicon film, a semi-amorphous silicon film having a thickness of 50 nm is formed as the second semiconductor film 823 using silane gas and phosphine gas.

  Next, a second mask pattern 824 is formed over the second semiconductor film. The second mask pattern is formed by discharging polyimide onto the second semiconductor film by a droplet discharge method and heating at 200 ° C. for 30 minutes. The second mask pattern 824 is discharged onto a region where the first and second semiconductor regions are formed later.

Next, as illustrated in FIG. 17D, the first semiconductor film 822 and the second semiconductor film 823 are etched using the second mask pattern, respectively, so that the first semiconductor region 831 and the second semiconductor film 823 are etched. A semiconductor region 832 is formed. The first semiconductor film and the second semiconductor film are etched using a mixed gas having a flow rate ratio of CF ₄ : O ₂ = 10: 9. Thereafter, the second mask pattern 824 is peeled using a peeling solution. Note that a planar structure corresponding to the longitudinal sectional structures AB and CD after peeling off the second mask pattern in FIG. 17D is shown in FIG.

  Next, as shown in FIG. 17E, a third mask pattern 841 is formed. The third mask pattern discharges a solution that forms a liquid repellent surface in which a fluorine-based silane coupling agent is dissolved in a solvent in a region where the gate insulating film 821 and the connection conductive layer 813 overlap each other by a droplet discharge method. Note that the third mask pattern 841 is a protective film for forming a fourth mask pattern for forming a contact hole in a region where the subsequent drain electrode and the connection conductive layer 813 are connected.

  Next, a fourth mask pattern 842 is formed. The fourth mask pattern is a mask for forming the first contact hole, and is formed by discharging polyimide by a droplet discharge method and heating at 200 degrees for 30 minutes. At this time, since the third mask pattern 841 is lyophobic and the fourth mask pattern 842 is lyophilic, the fourth mask pattern 842 is not formed in the region where the third mask pattern is formed. Not formed.

As shown in FIG. 18A, the third mask pattern 841 is removed by oxygen ashing to expose a part of the gate insulating film. Next, the exposed gate insulating film is etched using the fourth mask pattern 842. The gate insulating film is etched using CHF ₃ to form a contact hole 851. Thereafter, the fourth mask pattern is peeled off by oxygen ashing and etching using a peeling solution.

  Next, as shown in FIG. 18B, a second conductive layer 861 is formed by a droplet discharge method. The second conductive layer becomes a later source wiring layer and drain wiring layer. Here, the second conductive layer 861 is formed so as to be connected to the second semiconductor region 832 and the connection conductive layer 813. The second conductive layer 861 is discharged by discharging a solution in which Ag (silver) particles are dispersed, heated at 100 ° C. for 30 minutes, and then heated at 230 ° C. for 1 hour in an atmosphere having an oxygen concentration of 10%. .

Next, a photosensitive resin 862 is applied on the substrate. Here, a positive photosensitive resin is applied by a spin coating method, dried, and calcined. Next, the photosensitive resin 862 is irradiated with a laser beam 863 emitted from an Nd; YVO ₄ laser, exposed, and then developed to form a fifth mask pattern 871 as shown in FIG. . Since the irradiation region can be controlled by a laser beam scanning method, a mask pattern having a fine interval can be formed.

Next, the second conductive layer 861 and the second semiconductor region 832 are etched using the fifth mask pattern, so that the third conductive layer (source wiring layer and drain wiring layer) 872 and the third semiconductor are etched. Regions (source and drain regions) 873 are formed. The second semiconductor region 832 is etched using a mixed gas having a flow rate ratio of CF ₄ : O ₂ = 10: 9. Since the fifth mask pattern has an opening with a fine width, the etched width of the second semiconductor region is very small, and as a result, the distance between the source region and the drain region is narrow.

  Thereafter, the fifth mask pattern 871 is peeled using a peeling solution. Note that the planar structure corresponding to the longitudinal sectional structures AB and CD after the fifth mask pattern of FIG. 18C is peeled is shown in FIG.

Next, as shown in FIG. 18D, a protective film 874 is formed. As the protective film, a silicon nitride film with a thickness of 100 nm is formed by a sputtering method using a silicon target and argon and nitrogen (flow ratio Ar: N ₂ = 1: 1) as a sputtering gas.

  Next, as shown in FIG. 18D, a sixth mask pattern 875 is formed in a region where the protective film 874 and the connection conductive layer 813 overlap, and a region where the gate wiring layer and the source wiring layer are connected to the connection terminal. After 876 is formed, an interlayer insulating film 877 is formed. The sixth mask pattern is a mask for forming an interlayer insulating film to be formed later. As a sixth mask pattern, a solution for forming a liquid repellent surface in which a fluorinated silane coupling agent is dissolved in a solvent is discharged by a droplet discharge method, and polyimide is discharged as an interlayer insulating film 877 by a droplet discharge method. Then, both the sixth mask patterns 875 and 876 and the interlayer insulating film 877 are baked by heating at 200 ° C. for 30 minutes and heating at 300 ° C. for 1 hour.

  As the material of the sixth mask pattern, in addition to heat-resistant organic resins such as polyimide, acrylic, polyamide, and siloxane, inorganic materials, low dielectric constant (low-k) materials, silicon oxide, silicon nitride, silicon oxynitride PSG (phosphorus glass), BPSG (phosphorus boron glass), an alumina film, or the like can be used.

Next, as shown in FIG. 18E, a sixth mask pattern 875 is formed using a mixed gas of CF ₄ , O ₂ , and He (flow rate ratio CF ₄ : O ₂ : He = 8: 12: 7). , 876 are etched, and then part of the protective film 874 and the gate insulating film 821 is etched to form a second contact hole. In this etching step, the protective film 874 and the gate insulating film 821 in a region where the gate wiring layer and the source wiring layer are connected to the connection terminal are also etched.

  Next, after forming a third conductive layer, a seventh mask pattern is formed. The third conductive layer is formed by depositing indium tin oxide (ITO) containing silicon oxide having a thickness of 110 nm by a sputtering method, and a polyimide serving as a seventh mask pattern is dropped into a region where a pixel electrode is formed later by a droplet discharge method. And then heated at 200 degrees for 30 minutes.

In this embodiment, the third conductive layer is formed of ITO containing silicon oxide in order to produce a transmissive liquid crystal display panel. Instead, indium tin oxide (ITO), zinc oxide (ZnO), A predetermined pattern may be formed using a composition containing indium zinc oxide (IZO), zinc oxide added with gallium (GZO), indium tin oxide containing silicon oxide, and the like, and the pixel electrode may be formed by baking. Further, when a reflective liquid crystal display panel is manufactured, metal particles such as Ag (silver), Au (gold), Cu (copper)), W (tungsten), and Al (aluminum) are mainly used. Compositions can be used.

  Next, the pixel electrode 878 is formed by etching the third conductive layer using the seventh mask pattern. In this etching step, the third conductive layer formed in the region where the gate wiring layer and the source wiring layer are connected to the connection terminal is also etched. Thereafter, the seventh mask pattern is stripped using a stripping solution. Note that FIG. 23 is a plan view corresponding to AB and CD in FIG.

  The pixel electrode 878 is connected to the connection conductive layer 813 in the second contact hole. Since the connection conductive layer 813 is connected to the drain wiring layer 872, the pixel electrode 878 and the drain wiring layer 872 are electrically connected. In this embodiment, the drain wiring layer 872 is made of silver (Ag), and the pixel electrode 878 is made of ITO containing silicon oxide. However, since these are not directly connected, the silver is not oxidized. The drain wiring layer and the pixel electrode can be electrically connected without increasing the contact resistance.

  As another method for forming the pixel electrode, a pixel electrode can be formed without an etching step by selectively dropping a solution containing a conductive material by a droplet discharge method. Further, the pixel electrode can be formed by discharging a solution having conductivity after forming a solution for forming the liquid repellent surface in a region where the pixel electrode is not formed later, using the mask pattern. In this case, the mask pattern can be removed by ashing using oxygen. Further, the mask pattern may be left without being removed.

Through the above steps, an active matrix substrate can be formed.

  Next, as illustrated in FIG. 19A, an insulating film is formed by a printing method or a spin coating method so as to cover the first pixel electrode 878, and an alignment film 881 is formed by rubbing. Note that the alignment film 881 can also be formed by oblique vapor deposition.

  Next, a closed loop sealant 882 is formed by a droplet discharge method in a peripheral region where the pixels are formed. A liquid crystal material is dropped inside the closed loop formed by the sealant 882 by a dispenser type (dropping type).

  Here, a step of dropping the liquid crystal material is shown with reference to FIG. FIG. 25A is a perspective view of a step of dropping a liquid crystal material by a dispenser 2701, and FIG. 25B is a cross-sectional view taken along a line AB in FIG.

  A liquid crystal material 2704 is dropped or discharged from the dispenser 2701 so as to cover the pixel portion 2703 surrounded by the sealant 2702. The dispenser 2701 may be moved, or the liquid crystal layer can be formed by fixing the dispenser 2701 and moving the substrate 2700. Alternatively, a plurality of dispensers 2701 may be installed to drop the liquid crystal material at a time.

  As shown in FIG. 25B, the liquid crystal material 2704 can be selectively dropped or discharged only in a region surrounded by the sealant 2702.

  Next, as shown in FIG. 19B, the counter substrate 887 provided with the alignment film 885 and the second pixel electrode (counter electrode) 886 is bonded to the substrate 800 in a vacuum, and ultraviolet curing is performed. Thus, a liquid crystal layer 888 filled with a liquid crystal material is formed.

  A filler may be mixed in the sealant 882, and a color filter, a shielding film (black matrix), or the like may be formed on the counter substrate 887. Further, as a method for forming the liquid crystal layer 888, a dip type (pumping type) in which a liquid crystal material is injected using a capillary phenomenon after the counter substrate is bonded can be used instead of the dispenser type (dropping type).

Further, after a sealant 882 is formed over the counter substrate 887 and a liquid crystal material is discharged to the region surrounded by the sealant 882 by the above method, the substrate having the pixel portion and the counter substrate 887 are attached. May be combined.

  Next, as shown in FIG. 19C, when an insulating film is formed on each end of the gate wiring layer 811 and the source wiring layer (not shown), the insulating film is removed and then anisotropically separated. A connection terminal (a connection terminal 892 connected to the gate wiring layer and a connection terminal connected to the source wiring layer are not shown) is attached to the conductive conductive layer 891. Furthermore, it is preferable that the connection portion between each wiring layer and the connection terminal is sealed with a sealing resin. With this structure, it is possible to prevent moisture from the cross section from entering the pixel portion and deteriorating.

  Through the above process, a liquid crystal display panel can be manufactured. Note that a protection circuit for preventing electrostatic breakdown, typically a diode or the like, may be provided between the connection terminal and the source wiring (gate wiring) or in the pixel portion. In this case, it is possible to prevent electrostatic breakdown by manufacturing in the same process as the above TFT and connecting the gate wiring layer of the pixel portion and the drain or source wiring layer of the diode.

  Note that any of Embodiment Modes 1 to 10 can be applied to this example.

  In this embodiment, a method for manufacturing a light-emitting display panel as a display panel will be described with reference to FIGS. 27 to 30 schematically show the longitudinal sectional structures of the pixel portion and the connection terminal portion, and FIGS. 31 to 34 show planar structures corresponding to AB and CD, respectively.

  As shown in FIG. 27A, as in Example 1, the surface of the substrate 2000 is oxidized at 400 degrees to form an insulating film 2001 having a thickness of 100 nm. Next, a first conductive layer is formed over the insulating film, and first mask patterns 2003 to 2006 are formed on the first conductive layer by a droplet discharge method. An AN100 glass substrate manufactured by Asahi Glass Co., Ltd. is used as the substrate 2000, and a tungsten film having a thickness of 100 nm is formed on the first conductive layer by a sputtering method. For the first mask pattern, polyimide is discharged by a droplet discharge method, and is heated and baked at 200 degrees for 30 minutes. The first mask pattern is discharged onto a gate wiring layer, a gate electrode layer, and a connection conductive layer that are formed later.

  Next, part of the first conductive layer is etched using the first mask patterns 2003 to 2006 to form the gate wiring layer 2011, the gate electrode layers 2012 and 2013, and the connection conductive layer 2014. Thereafter, the first mask patterns 2003 to 2006 are stripped using a stripping solution. FIG. 27A schematically shows a longitudinal sectional structure, and a planar structure corresponding to AB and CD is shown in FIG.

    Next, as shown in FIG. 27B, a gate insulating film 2015, a first semiconductor film 2016, and an n-type second semiconductor film 2017 are formed by plasma CVD as in Example 1. As the gate insulating film 2015, a silicon oxynitride film (H: 1.8%, N: 2.6%, O: 63.9%, Si: 31.7%) having a thickness of 110 nm is formed. An amorphous silicon film is formed as the first semiconductor film 2016, and a semi-amorphous silicon film with a thickness of 50 nm is formed as the second semiconductor film 2017.

  Next, as shown in FIG. 27B, second mask patterns 2018 and 2019 are formed over the second semiconductor film. The second mask pattern is formed by discharging polyimide onto the second semiconductor film by a droplet discharge method and heating at 200 ° C. for 30 minutes. The second mask pattern 2018 is discharged onto a region where the first to fourth semiconductor regions are formed later.

  Next, as illustrated in FIG. 27C, the first semiconductor film 2016 and the second semiconductor film 2017 are etched using the second mask patterns 2018 and 2019, respectively, so that the first semiconductor regions 2021 and 2021 are formed. 2022 and second semiconductor regions 2023 and 2024 are formed. Etching conditions for the first semiconductor film and the second semiconductor film are the same as those in the first embodiment. Thereafter, the second mask patterns 2018 and 2019 are stripped using a stripping solution. Note that a planar structure corresponding to the longitudinal sectional structures AB and CD after peeling off the second mask pattern of FIG. 27C is shown in FIG.

  Next, as shown in FIG. 28A, third mask patterns 2031 and 2032 are formed. The third mask pattern is a liquid repellent solution in which a fluorine-based silane coupling agent is dissolved in a solvent in a region where the gate insulating film 2015 and the gate electrode layer 2013 and the connection conductive layer 2014 and the gate insulating film 2105 overlap with each other by a droplet discharge method. The solution that forms the liquid surface is discharged. Next, a fourth mask pattern 2033 is formed. The fourth mask pattern is a mask for forming the first contact hole, and is formed by discharging polyimide by a droplet discharge method and heating at 200 degrees for 30 minutes. At this time, since the third mask patterns 2031 and 2032 are lyophobic and the fourth mask pattern 2033 is lyophilic, the fourth mask pattern is not formed in the region where the third mask pattern is formed. 2033 is not formed.

  As shown in FIG. 28B, the third mask patterns 2031 and 2032 are removed by oxygen ashing to expose a part of the gate insulating film. Next, the exposed gate insulating film is etched using the fourth mask pattern 2033 as in the first embodiment. Thereafter, the fourth mask pattern is peeled off by oxygen ashing and etching using a peeling solution.

  Next, second conductive layers 2041 and 2042 are formed by a droplet discharge method. The second conductive layer becomes a later source wiring layer and drain wiring layer. Here, the second conductive layer 2041 is formed so that the second semiconductor region 2023 and the gate electrode layer 2013 are connected to each other, and the second conductive layer 2042 is connected to the second semiconductor region 2024 and the connection conductive layer 2014. And to be connected.

Next, as shown in FIG. 28C, a photosensitive resin 2051 is applied over the substrate. Here, a positive photosensitive resin is applied by a spin coating method, dried, and calcined. Next, the photosensitive resin 2051 is irradiated with laser light 2052 and 2053 emitted from the Nd; YVO ₄ laser, exposed, and developed to form a fifth mask pattern 2061 as shown in FIG. Form.

  Next, using the fifth mask pattern, the second conductive layers 2041 and 2042 and the second semiconductor regions 2023 and 2024 are etched to form third conductive layers (source wiring layer and drain wiring layer) 2062. 2064 and third semiconductor regions (source and drain regions) 2065 to 2067 are formed in the same manner as in the first embodiment. Thereafter, the fifth mask pattern 2061 is peeled off using a peeling solution. Note that the planar structure corresponding to the longitudinal sectional structures AB and CD after peeling off the fifth mask pattern of FIG. 29A is shown in FIG.

Next, as shown in FIG. 29B, a protective film 2070 is formed in the same manner as in the first embodiment. After the sixth mask patterns 2071 and 2072 are formed in a region where the protective film 2070 and the connection conductive layer 2014 overlap, and a region where the gate wiring layer 2011 and the source wiring layer are connected to the connection terminal, an interlayer insulating film 2073 is formed. To do. As a sixth mask pattern, a solution for forming a liquid repellent surface in which a fluorinated silane coupling agent is dissolved in a solvent is discharged by a droplet discharge method, and a siloxane-based material is started as a interlayer insulating film by a droplet discharge method. Inorganic siloxanes containing Si-O-Si bonds among the compounds formed of silicon, oxygen, and hydrogen, and organic siloxane-based insulation in which hydrogen bonded to silicon is replaced by organic groups such as methyl and phenyl After the material is discharged, both the sixth mask patterns 2071 and 2072 and the interlayer insulating film 2073 are baked by heating at 200 ° C. for 30 minutes and heating at 300 ° C. for 1 hour.

  Next, after etching the sixth mask patterns 2071 and 2072 as in the first embodiment, the protective film 2070 and a part of the gate insulating film 2015 are etched to form second contact holes. In this etching step, the protective film 2070 and the gate insulating film 2015 in a region where the gate wiring layer and the source wiring layer are connected to the connection terminal are also etched.

  Next, as shown in FIG. 29C, a third conductive layer connected to the connection conductive layer 2014 is formed, and then a seventh mask pattern is formed. As in the first embodiment, the third conductive layer is formed of indium tin oxide (ITO) containing silicon oxide with a thickness of 110 nm and etched into a desired shape to form the pixel electrode 2081. In this etching step, the third conductive layer formed in a region where the gate wiring layer and the source wiring layer are connected to the connection terminal may be etched.

  As another method for forming the pixel electrode, a pixel electrode can be formed without an etching step by selectively dropping a solution containing a conductive material by a droplet discharge method. Further, the pixel electrode can be formed by discharging a solution having conductivity after forming a solution for forming the liquid repellent surface in a region where the pixel electrode is not formed later, using the mask pattern. In this case, the mask pattern can be removed by ashing using oxygen. Further, the mask pattern may be left without being removed.

Instead of this, indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), zinc oxide added with gallium (GZO), and indium tin oxide containing silicon oxide are used as the material of the pixel electrode. May be.

In this embodiment, the pixel electrode is formed of a light-transmitting conductive film for a structure in which emitted light is emitted to the substrate 2000 side, that is, a transmissive light-emitting display panel. In the case of manufacturing a reflection type light emitting display panel, a metal such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum), etc. It is possible to use a composition mainly composed of these particles. In this case, the sixth mask pattern can be formed of an insulating film containing a color pigment, a resist, or the like. In this case, since the sixth mask pattern functions as a light shielding film, the contrast of a display device to be formed later is improved.

  Thereafter, the seventh mask pattern is stripped using a stripping solution. Note that FIG. 34 shows a plan view corresponding to AB and CD in FIG.

  The pixel electrode 2081 is connected to the connection conductive layer 2014 in the second contact hole. Since the connection conductive layer 2014 is connected to the drain wiring layer 2064, the pixel electrode 2081 and the drain wiring layer 2064 are electrically connected. In this embodiment, the drain wiring layer 2064 is made of silver (Ag), and the pixel electrode 2081 is made of ITO containing silicon oxide. However, since these are not directly connected, the silver is not oxidized. The drain wiring layer and the pixel electrode can be electrically connected without increasing the contact resistance.

  Through the above steps, an active matrix substrate having the switching TFT 2082 and the driving TFT 2083 can be formed.

  Next, a protective layer of silicon nitride or silicon nitride oxide and an insulator layer 2091 are formed over the entire surface. Next, after forming an insulating layer over the entire surface of the insulating layer 2091 by a spin coating method or a dipping method, an opening is formed by etching, as shown in FIG. This etching is performed at the same time as the protective layer under the insulator layer 2091 so that the first pixel electrode 2081 is exposed. Further, if the insulator layer 2091 is formed by a droplet discharge method, etching is not necessarily required.

  The insulator layer 2091 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the first pixel electrode 2081. This insulator layer 2091 is formed of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, or other inorganic insulating materials, or acrylic acid, methacrylic acid and derivatives thereof, or polyimide. Inorganic siloxanes containing Si—O—Si bonds among silicon, oxygen, and hydrogen compounds formed from aromatic polyamides, heat-resistant polymers such as polybenzimidazole, or siloxane-based materials as starting materials It can be formed of an organic siloxane insulating material in which hydrogen bonded to is substituted with an organic group such as methyl or phenyl. When the insulating layer 2091 is formed using a photosensitive or non-photosensitive material such as acrylic or polyimide, the side surface has a shape in which the radius of curvature continuously changes, and the upper thin film is formed without being cut off. preferable.

  Next, after a layer 2092 containing a light-emitting substance is formed by an evaporation method, a spin coating method, an inkjet method, or the like, a second pixel electrode 2093 is formed, whereby the light-emitting element 2090 is formed. The light emitting element 2090 has a structure connected to the driving TFT 2083. Thereafter, a protective laminate is formed to seal the light emitting element 2090. The protective laminate includes a laminate of a first inorganic insulating film, a stress relaxation film, and a second inorganic insulating film.

  Note that before the layer 2092 containing a light-emitting substance is formed, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulator layer 2091 or on the surface thereof. Further, heat treatment is performed at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and the layer 2092 containing a luminescent material is formed by vacuum deposition or droplet discharge under reduced pressure without being exposed to the air as it is. Is preferred.

  Further, the surface treatment may be performed by exposing the surface of the first pixel electrode 2081 to oxygen plasma or irradiating ultraviolet light.

  The layer 2092 containing a light-emitting substance is formed using a charge injecting and transporting substance containing an organic compound or an inorganic compound and a light-emitting material. One or a plurality of layers selected from a compound and a high molecular weight organic compound may be included and combined with an inorganic compound having electron injection / transport properties or hole injection / transport properties.

Among the charge injecting and transporting substances, substances having a particularly high electron transporting property include, for example, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (4-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) (4-phenylphenolato) aluminum (abbreviation: BAlq), quinoline skeleton or benzoquinoline Examples thereof include metal complexes having a skeleton.

  As a substance having a high hole-transport property, for example, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD) or 4,4′-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: Aromatic amine systems such as TDATA), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) (ie, benzene ring— Compound having a nitrogen bond).

Among the charge injecting and transporting materials, materials having a particularly high electron injecting property include alkali metals or alkaline earths such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF ₂ ) and the like. A compound of a similar metal. In addition, a mixture of a substance having a high electron transport property such as Alq ₃ and an alkaline earth metal such as magnesium (Mg) may be used.

Among the charge injection / transport materials, examples of the material having a high hole injection property include molybdenum oxide (MoO _x ), vanadium oxide (VO _x ), ruthenium oxide (RuO _x ), and tungsten oxide (WO _x ). And metal oxides such as manganese oxide (MnO _x ). In addition, other examples include phthalocyanine compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPC).

  The light emitting layer may be configured to perform color display by forming light emitting layers having different emission wavelength bands for each pixel. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, by providing a filter (colored layer) that transmits light in the emission wavelength band on the light emission side of the pixel, the color purity is improved and the pixel portion is mirrored (reflected). Prevention can be achieved. By providing the filter (colored layer), it is possible to omit a circularly polarized plate that has been considered necessary in the past, and it is possible to eliminate the loss of light emitted from the light emitting layer. Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

There are various materials for the light emitting material forming the light emitting layer. As a low molecular weight organic light-emitting material, 4- (dicyanomethylene) 2-methyl-6- [2- (1,1,7,7-tetramethyljulolidin-9-yl) ethenyl] -4H-pyran (abbreviation: DCJT), 9,10-diphenylanthracene (abbreviation: DPA), perifuranthene, 2,5-dicyano-1,4-bis [2- (10-methoxy-1,1,7,7-tetramethyljulolidine-9) -Yl) ethenyl] benzene, N, N′-dimethylquinacridone (abbreviation: DMQd), coumarin 6, coumarin 545T, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), 9,9′-bianthryl, 9,10 -Diphenylanthracene (abbreviation: DPA), 9,10-di (2-naphthyl) anthracene (abbreviation: DNA), and the like can be used. Other substances may also be used.

  On the other hand, the high molecular organic light emitting material has higher physical strength and higher device durability than the low molecular organic light emitting material. In addition, since the film can be formed by coating, the device can be manufactured relatively easily. The structure of the light emitting element using the polymer organic light emitting material is basically the same as that when the low molecular weight organic light emitting material is used, and is a layer / anode containing a cathode / light emitting substance. However, when forming a layer containing a light emitting material using a high molecular weight organic light emitting material, it is difficult to form a layered structure as in the case of using a low molecular weight organic light emitting material, and in many cases two layers are formed. It becomes a structure. Specifically, the structure is cathode / light-emitting layer / hole transport layer / anode.

  Since the light emission color is determined by the material for forming the light emitting layer, a light emitting element which emits desired light can be formed by selecting these materials. Examples of the polymer light emitting material that can be used for forming the light emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

  Examples of polyparaphenylene vinylene-based light-emitting materials include poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′-ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like Can be mentioned. Examples of the polyparaphenylene-based light emitting material include polyparaphenylene [PPP] derivatives, poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], and poly (2,5-dihexoxy-1). , 4-phenylene). Examples of the polythiophene-based light-emitting material include polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], Poly (3-cyclohexyl-4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POP], poly [3- ( 4-octylphenyl) -2,2bithiophene] [PTOPT] and the like. Examples of the polyfluorene-based light-emitting material include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, a solution dissolved in water together with an acceptor material is applied by spin coating or the like. Further, since the acceptor material is insoluble in an organic solvent, the acceptor material can be stacked with the above-described light-emitting material. Examples of the hole-transporting polymer organic light-emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. It is done.

  The light emitting layer can be configured to emit monochromatic or white light. In the case of using a white light emitting material, color display can be made possible by providing a filter (colored layer) that transmits light of a specific wavelength on the light emission side of the pixel.

To form a light emitting layer that emits white light, for example, Alq _3, Alq ₃ partially doped with Nile red that is a red light emitting pigment, p-EtTAZ, TPD (aromatic diamine) are sequentially stacked by a vapor deposition method . Moreover, when forming a light emitting layer with the apply | coating method using a spin coat method, after apply | coating, it is preferable to bake by vacuum heating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) acting as a hole injection layer is applied and fired on the entire surface, and then the emission center dye (1, 1, 4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile red, coumarin 6 and the like) A doped polyvinyl carbazole (PVK) solution may be applied to the entire surface and baked to form a film that functions as a light emitting layer.

  The light emitting layer can also be formed as a single layer, and an electron transporting 1,3,4-oxadiazole derivative (PBD) may be dispersed in hole transporting polyvinyl carbazole (PVK). Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red). In addition to the light-emitting element that can emit white light as shown here, a light-emitting element that can obtain red light emission, green light emission, or blue light emission can be manufactured by appropriately selecting the material of the light-emitting layer.

  In addition to the singlet excited light emitting material, a triplet excited light emitting material containing a metal complex or the like may be used for the light emitting layer. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited luminescent material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when a triplet excitation light-emitting material is applied to a red pixel, the amount of current flowing through the light-emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using a metal complex as a dopant, and metal complexes having a third transition series element platinum as the central metal and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  The substances forming the layer containing the light-emitting substance listed above are examples, such as a hole injecting and transporting layer, a hole transporting layer, an electron injecting and transporting layer, an electron transporting layer, a light emitting layer, an electron blocking layer, and a hole blocking layer. A light-emitting element can be formed by appropriately stacking functional layers. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, it is possible to provide a modification with an electrode for this purpose or a dispersed light-emitting material. Can be permitted without departing from the spirit of the present invention.

  A light-emitting element formed using the above materials emits light by being forward-biased. A pixel of a display device formed using a light-emitting element can be driven by a simple matrix method or an active matrix method. In any case, each pixel emits light by applying a forward bias at a specific timing, but the pixel is in a non-light emitting state for a certain period. By applying a reverse bias during this non-light emitting time, the reliability of the light emitting element can be improved. The light emitting element is in a degradation mode in which the light emission intensity decreases under a constant driving condition or in a degradation mode in which the non-light emitting area is enlarged in the pixel and the luminance is apparently lowered. The progress can be slowed and the reliability of the light emitting device can be improved.

  Next, as illustrated in FIG. 30B, a sealant 2094 is formed, and the substrate 2000 is sealed with a sealing substrate 2095. After that, the end of each of the gate wiring layer 2011 and the source wiring layer (not shown) is connected to the connection terminal (the connection terminal 2096 connected to the gate wiring layer, the source wiring layer) via the anisotropic conductive layer 2098. A connection terminal is not shown.) Furthermore, it is preferable to seal the connection portion between each wiring layer and the connection terminal with a sealing resin 2097. With this structure, moisture from the cross section can be prevented from entering and deteriorating the light emitting element. Through the above steps, a light-emitting display panel can be formed.

  Through the above process, a light-emitting display panel can be manufactured. Note that a protective circuit for preventing electrostatic breakdown, typically a diode or the like, may be provided between the connection terminal and the source wiring layer (gate wiring layer) or in the pixel portion. In this case, electrostatic breakdown can be prevented by manufacturing the same process as the above TFT and connecting the gate wiring layer of the pixel portion and the drain wiring layer or source wiring layer of the diode.

  Note that any of Embodiment Modes 1 to 10 can be applied to this example. In addition, although a method for manufacturing a liquid crystal display panel and a light-emitting display panel has been shown as the display panel, the present invention is not limited to this, and is not limited to this, but a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel) ), FED (Field Emission Display; field emission display), electrophoretic display device (electronic paper), and other active display panels.

  A mode of a light-emitting element applicable in the above embodiment will be described with reference to FIGS.

  FIG. 36A illustrates an example in which the first pixel electrode 11 is formed using a light-transmitting oxide conductive material. The first pixel electrode 11 is formed using an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. Yes. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 is formed of a first electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or MgAg and a second electrode layer 34 formed of a metal material such as aluminum. A pixel having this structure can emit light from the first pixel electrode 11 side as indicated by an arrow in the drawing.

  FIG. 36B shows an example in which light is emitted from the second pixel electrode 17, and the first pixel electrode 11 is made of a metal such as aluminum or titanium, or nitrogen at a concentration less than the stoichiometric composition ratio with the metal. And a second electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF and a fourth electrode layer 34 formed of a metal material such as aluminum. By setting the layer to a thickness of 100 nm or less and allowing light to pass therethrough, light can be emitted from the second pixel electrode 17.

  Note that in the light-emitting element having the structure of FIG. 36A or FIG. 36B, when light is emitted from both directions, that is, from the first pixel electrode and the second pixel electrode, the first pixel electrode 11 is used. In addition, a conductive film having a light-transmitting property and a high work function is used, and a conductive film having a light-transmitting property and a low work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 is formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%, and the second pixel electrode 17 is formed of LiF having a thickness of 100 nm or less. Alternatively, the third electrode layer 33 containing an alkali metal or alkaline earth metal such as CaF or the like and the fourth electrode layer 34 formed of a metal material such as aluminum may be used.

  FIG. 36C illustrates an example in which light is emitted from the first pixel electrode 11, and the layer 16 containing a light-emitting substance is formed as an electron transport layer or an electron injection layer 43, a light emitting layer 42, a hole injection layer or a hole. The structure which laminated | stacked the order of the transport layer 41 is shown. The second pixel electrode 17 includes a second electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic% from the side of the layer 16 containing a light emitting substance, a metal such as aluminum or titanium, Alternatively, the first electrode layer 35 is formed using a metal material containing nitrogen at a concentration equal to or less than the stoichiometric composition ratio to the metal. The first pixel electrode 11 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF and a fourth electrode layer 34 formed of a metal material such as aluminum. By setting the layer to a thickness of 100 nm or less and allowing light to pass therethrough, light can be emitted from the first pixel electrode 11.

  FIG. 36D shows an example in which light is emitted from the second pixel electrode 17, and a layer containing a light-emitting substance is an electron transport layer or electron injection layer 43, a light emitting layer 42, a hole injection layer or hole transport. A configuration in which the layers 41 are stacked in this order is shown. The first pixel electrode 11 has a structure similar to that in FIG. 36C, and is formed to be thick enough to reflect light emitted from the layer 16 containing a light-emitting substance. The second pixel electrode 17 is made of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. In this structure, the hole injection layer or the hole transport layer 41 is formed of an inorganic metal oxide (typically molybdenum oxide or vanadium oxide) to be introduced when the second electrode layer 32 is formed. As a result, the hole injection property is improved and the driving voltage can be lowered.

  Note that in the light-emitting element having the structure of FIG. 36C or FIG. 36D, when light is emitted in both directions, that is, from the first pixel electrode and the second pixel electrode, the first pixel electrode 11 is used. In addition, a conductive film having a light-transmitting property and a small work function is used, and a conductive film having a light-transmitting property and a large work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF having a thickness of 100 nm or less and a metal material such as aluminum. And the second pixel electrode 17 may be formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%.

  A pixel circuit of the light-emitting display panel described in the above embodiment and an operation configuration thereof will be described with reference to FIGS.

  In the pixel shown in FIG. 37A, a signal line 710 and power supply lines 711 and 712 are arranged in the column direction, and a scanning line 714 is arranged in the row direction. In addition, a switching TFT 701, a driving TFT 703, a current control TFT 704, a capacitor 702, and a light emitting element 705 are provided.

  The pixel shown in FIG. 37C is different from the pixel shown in FIG. 37A except that the gate electrode of the TFT 703 is connected to the power supply line 712 arranged in the row direction. is there. That is, both pixels shown in FIGS. 37A and 37C show the same equivalent circuit diagram. However, in the case where the power supply line 712 is arranged in the column direction (FIG. 37A) and in the case where the power supply line 712 is arranged in the row direction (FIG. 37C), each power supply line has a different layer. It is formed of a conductive film. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 703 is connected, and FIGS. 37A and 37C are shown separately to show that the layers for manufacturing these are different.

  As a feature of the pixel shown in FIGS. 37A and 37C, TFTs 703 and 704 are connected in series in the pixel. The channel length L (703), the channel width W (703) of the TFT 703, and the channel length L of the TFT 704 (704) and the channel width W (704) may be set so as to satisfy L (703) / W (703): L (704) / W (704) = 5 to 6000: 1.

  Note that the TFT 703 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 705, and the TFT 704 has a role of operating in a linear region and controls supply of current to the light emitting element 705. Both TFTs preferably have the same conductivity type in terms of manufacturing process. In this embodiment, the TFTs are formed as n-channel TFTs. The TFT 703 may be a depletion type TFT as well as an enhancement type. In the present invention having the above structure, since the TFT 704 operates in a linear region, a slight change in Vgs of the TFT 704 does not affect the current value of the light emitting element 705. That is, the current value of the light emitting element 705 can be determined by the TFT 703 operating in the saturation region. With the above structure, it is possible to provide a display device in which luminance unevenness of a light-emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In the pixels shown in FIGS. 37A to 37D, a TFT 701 controls input of a video signal to the pixel. When the TFT 701 is turned on, a video signal is input into the pixel. Then, the voltage of the video signal is held in the capacitor 702. Note that FIGS. 37A and 37C illustrate a structure in which the capacitor 702 is provided; however, the present invention is not limited thereto, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 702 is not necessarily provided.

  The pixel shown in FIG. 37B has the same pixel structure as that shown in FIG. 37A except that a TFT 706 and a scanning line 715 are added. Similarly, the pixel illustrated in FIG. 37D has the same pixel structure as that illustrated in FIG. 37C except that a TFT 706 and a scanning line 715 are added.

  The TFT 706 is controlled to be turned on or off by a newly arranged scanning line 715. When the TFT 706 is turned on, the charge held in the capacitor 702 is discharged, and the TFT 704 is turned off. That is, the arrangement of the TFT 706 can forcibly create a state in which no current flows through the light emitting element 705. Therefore, the TFT 706 can be called an erasing TFT. Therefore, the configurations in FIGS. 37B and 37D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

  In the pixel shown in FIG. 37E, a signal line 710, a power supply line 711 in the column direction, and a scanning line 714 in the row direction are arranged. In addition, a switching TFT 701, a driving TFT 703, a capacitor 702, and a light-emitting element 705 are provided. The pixel shown in FIG. 37F has the same pixel structure as that shown in FIG. 37E except that a TFT 706 and a scanning line 715 are added. Note that the duty ratio can also be improved in the structure in FIG.

  In particular, when a thin film transistor including an amorphous semiconductor or the like is formed as in the above embodiment mode, it is preferable to increase the area occupied by the semiconductor film of the driving TFT. Therefore, in consideration of the aperture ratio, FIG. 37E or FIG. 37F with a small number of TFTs is preferably used.

  Such an active matrix light-emitting device is considered to be advantageous because it can be driven at a low voltage because a TFT is provided in each pixel when the pixel density is increased. On the other hand, a passive matrix light-emitting device in which a TFT is provided for each column can be formed. A passive matrix light-emitting device has a high aperture ratio because a TFT is not provided for each pixel.

  In the display device of the present invention, the screen display driving method is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the display device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

  Furthermore, in a display device in which a video signal is digital, there are a video signal input to a pixel having a constant voltage (CV) and a constant current (CC). A video signal having a constant voltage (CV) includes a constant voltage (CVCV) applied to the light emitting element and a constant current (CVCC) applied to the light emitting element. In addition, the video signal having a constant current (CC) includes a constant voltage (CCCV) applied to the light emitting element and a constant current (CCCC) applied to the light emitting element.

  As described above, various pixel circuits can be employed.

  In this embodiment, mounting of a driver circuit (a signal line driver circuit 1402 and scan line driver circuits 1403a and 1403b) on the display panel described in the above embodiment will be described with reference to FIGS.

As shown in FIG. 9A, a signal line driver circuit 1402 and scan line driver circuits 1403a and 1403b are mounted around the pixel portion 1401. In FIG. 9A, an IC chip 1405 is mounted on a substrate 1400 by a COG method as the signal line driver circuit 1402, the scan line driver circuits 1403a and 1403b, and the like. Then, an IC chip and an external circuit are connected via an FPC (flexible printed circuit) 1406.

9B, in the case where a TFT is formed using a SAS or a crystalline semiconductor, the pixel portion 1401, scanning line driver circuits 1403a and 1403b, and the like are formed over the substrate 1400 so that the signal line driver circuit 1402 is formed. May be separately mounted as an IC chip. In FIG. 9B, an IC chip 1405 is mounted on a substrate 1400 as a signal line driver circuit 1402 by a COG method. Then, the IC chip and an external circuit are connected through the FPC 1406.

Further, as shown in FIG. 9C, the signal line driver circuit 1402 and the like may be mounted by the TAB method instead of the COG method. Then, the IC chip and an external circuit are connected through the FPC 1406. In FIG. 9C, the signal line driver circuit is mounted by the TAB method, but the scan line driver circuit may be mounted by the TAB method.

When the IC chip is mounted by the TAB method, a pixel portion can be provided larger than the substrate, and a narrow frame can be achieved.

The IC chip is formed using a silicon wafer, but an IC (hereinafter referred to as a driver IC) in which an IC is formed on a glass substrate may be provided instead of the IC chip. Since an IC chip is taken out from a circular silicon wafer, the shape of the base substrate is limited. On the other hand, the driver IC has a mother substrate made of glass and has no restriction in shape, so that productivity can be improved. Therefore, the shape of the driver IC can be set freely. For example, when the length of the long side of the driver IC is 15 to 80 mm, the required number can be reduced as compared with the case where the IC chip is mounted. As a result, the number of connection terminals can be reduced, and the manufacturing yield can be improved.

  The driver IC can be formed using a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiation with continuous wave laser light. A semiconductor film obtained by irradiation with continuous wave laser light has few crystal defects and large crystal grains. As a result, a transistor having such a semiconductor film has favorable mobility and response speed, can be driven at high speed, and is suitable for a driver IC.

In this embodiment, a mounting method of the driver circuit (the signal line driver circuit 1402 and the scan line driver circuits 1403a and 1403b) on the display panel described in the above embodiment is described with reference to FIGS. As this mounting method, a connection method using an anisotropic conductive material, a wire bonding method, or the like may be employed, and an example thereof will be described with reference to FIG. Note that in this embodiment, an example in which a driver IC is used for the signal line driver circuit 1402 and the scanning line driver circuits 1403a and 1403b is shown. An IC chip can be appropriately used instead of the driver IC.

  FIG. 10A shows an example in which a driver IC 1703 is mounted on an active matrix substrate 1701 using an anisotropic conductive material. On the active matrix substrate 1701, wirings (not shown) such as source wirings and gate wirings and electrode pads 1702a and 1702b which are extraction electrodes of the wirings are formed.

  Connection terminals 1704a and 1704b are provided on the surface of the driver IC 1703, and a protective insulating film 1705 is formed in the periphery thereof.

On the active matrix substrate 1701, a driver IC 1703 is fixed with an anisotropic conductive adhesive 1706, and the connection terminals 1704a and 1704b and the electrode pads 1702a and 1702b are electrically conductive contained in the anisotropic conductive adhesive 1706, respectively. The conductive particles 1707 are electrically connected. The anisotropic conductive adhesive 1706 is an adhesive resin in which conductive particles (having a particle size of about several to several hundred μm) are dispersed and contained, and examples thereof include an epoxy resin and a phenol resin. In addition, the conductive particles (having a particle size of about several to several hundreds of μm) are formed of one element selected from gold, silver, copper, palladium, or platinum, or alloy particles of a plurality of elements. Moreover, the particle | grains which have the multilayer structure of these elements may be sufficient. Furthermore, the particle | grains by which the resin particle was coated with one element selected from gold, silver, copper, palladium, or platinum, or an alloy of a plurality of elements may be used.

  Moreover, you may transfer and use the anisotropic conductive film formed in the film form on the base film instead of an anisotropic conductive adhesive. In the anisotropic conductive film, conductive particles similar to the anisotropic conductive adhesive are dispersed. By making the size and density of the conductive particles 1707 mixed in the anisotropic conductive adhesive 1706 suitable, the driver IC can be mounted on the active matrix substrate in such a form. This mounting method is suitable for the mounting method of the driver IC shown in FIGS. 9A and 9B.

  FIG. 10B shows an example of a mounting method using the shrinkage force of an organic resin. Buffer layers 1711a and 1711b are formed of Ta, Ti, or the like on the surface of connection terminals 1704a and 1704b of a driver IC 1703, and electroless is formed thereon. About 20 μm of Au is formed by plating or the like to form bumps 1712a and 1712b. A photo-curing insulating resin 1713 is interposed between the driver IC 1703 and the active matrix substrate 1701, and can be mounted by photo-curing. This mounting method is suitable for the mounting method of the driver IC shown in FIGS. 9A and 9B.

  Further, as shown in FIG. 10C, a driver IC 1703 is fixed to an active matrix substrate 1701 with an adhesive 1721, and connection terminals 1704a and 1704b of the CPU and electrode pads 1702a on the active matrix substrate are connected by wires 1722a and 1722b. 1702b may be connected. Then, it is sealed with an organic resin 1723. This mounting method is suitable for the mounting method of the driver IC shown in FIGS. 9A and 9B.

  In addition, as illustrated in FIG. 10D, a driver IC 1703 may be provided through a wiring 1732 over an FPC (Flexible Printed Circuit) 1731 and an anisotropic conductive adhesive 1706 containing conductive particles 1708. This configuration is very effective when used for an electronic device with a limited housing size such as a portable terminal. This mounting method is suitable for the mounting method of the driver IC in FIG.

The method for mounting the driver IC is not particularly limited, and a known COG method, wire bonding method, TAB method, or reflow processing using solder bumps can be used. When performing reflow processing, the substrate used for the driver IC or active matrix substrate is a plastic with high heat resistance, typically a polyimide substrate, an HT substrate (manufactured by Nippon Steel Chemical Co., Ltd.), norbornene with a polar group. It is preferable to use ARTON made of resin (manufactured by JSR) or the like.

  In the light-emitting display panel described in Example 5, the semiconductor layer is formed using SAS, so that a driver circuit on the scanning line side is formed over the substrate 1400 as illustrated in FIGS. 9B and 9C. The drive circuit in this case will be described.

FIG. 14 shows a block diagram of a scanning line side driving circuit constituted by an n-channel TFT using SAS that can obtain a field effect mobility of 1 to 15 cm ² / V · sec.

  In FIG. 14, a block denoted by 1500 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. Pixels are connected to the ends of the buffer circuits 1501 and 1502.

  FIG. 15 shows a specific configuration of the pulse output circuit 1500, and the n-channel TFTs 3601 to 3613 constitute the circuit. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

  A specific structure of the buffer circuit 1501 is shown in FIG. Similarly, the buffer circuit includes n-channel TFTs 3620 to 3635. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 to 1800 μm.

  In this embodiment, a display module will be described. Here, a liquid crystal module is shown as an example of a display module with reference to FIG.

  An active matrix substrate 1601 and a counter substrate 1602 are fixed to each other with a sealant 1600, and a pixel portion 1603 and a liquid crystal layer 1604 are provided therebetween to form a display region.

  The colored layer 1605 is necessary when performing color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. Polarizers 1606 and 1607 are disposed outside the active matrix substrate 1601 and the counter substrate 1602. In addition, a protective film 1616 is formed on the surface of the polarizing plate 1606 to reduce external impact.

  A wiring board 1610 is connected to a connection terminal 1608 provided on the active matrix substrate 1601 through an FPC 1609. A pixel driving circuit (IC chip, driver IC, or the like) 1611 is provided in the FPC or connection wiring, and an external circuit 1612 such as a control circuit or a power supply circuit is incorporated in the wiring substrate 1610.

  The cold cathode tube 1613, the reflecting plate 1614, and the optical film 1615 are backlight units, which serve as light sources and project light onto the liquid crystal display panel. A liquid crystal panel, a light source, a wiring board, an FPC, and the like are held and protected by a bezel 1617.

  Note that any of Embodiment Modes 1 to 10 can be applied to this example.

  In this embodiment, a cross-sectional view of a light-emitting display module is shown as an example of a display module with reference to FIG.

  FIG. 35A shows a cross section of a light-emitting display module in which an active matrix substrate 1201 and a counter substrate 1202 are fixed to each other with a sealant 1200, and a pixel portion 1203 is provided between them to display a display region. Forming.

  A space 1204 is formed between the counter substrate 1202 and the pixel portion 1203. The space can be filled with an inert gas such as nitrogen gas, or a light-transmitting resin having a highly water-absorbing material can be formed to further prevent moisture and oxygen from entering. Further, a resin having translucency and high water absorption may be formed. Even when light from the light-emitting element is emitted to the second substrate side with the light-transmitting resin, the resin can be formed without reducing transmittance.

  In order to increase the contrast, at least the pixel portion of the module may be provided with a polarizing plate or a circular polarizing plate (a polarizing plate, a 1 / 4λ plate and a 1 / 2λ plate). In the case where the display is recognized from the counter substrate 1202 side, a ¼λ plate, a ½λ plate 1205, and a polarizing plate 1206 are preferably provided in order from the counter substrate 1202. Further, an antireflection film may be provided on the polarizing plate.

  In the case where the display is recognized from both the counter substrate 1202 and the active matrix substrate 1201, similarly, a 1 / 4λ plate, a 1 / 2λ plate, and a polarizing plate may be provided on the surface of the active matrix substrate.

  A wiring board 1210 is connected to a connection terminal 1208 provided on the active matrix substrate 1201 through an FPC 1209. A pixel driving circuit (IC chip, driver IC, etc.) 1211 is provided in the FPC or connection wiring, and an external circuit 1212 such as a control circuit or a power supply circuit is incorporated in the wiring substrate 1210.

  As shown in FIG. 35B, a colored layer 1207 can be provided between the pixel portion 1203 and the polarizing plate or between the pixel portion and the circularly polarizing plate. In this case, a full color display can be performed by providing a light emitting element capable of emitting white light in the pixel portion and separately providing a colored layer showing RGB. Further, full color display can be performed by providing a light emitting element capable of emitting blue light in the pixel portion and separately providing a color conversion layer or the like. In each pixel portion, a light-emitting element that emits red, green, and blue light can be formed, and a colored layer can be used. Such a display module has high color purity of each RBG and enables high-definition display.

  FIG. 35C shows a case where the active matrix substrate and the light-emitting element are sealed using a protective film 1221 such as a film or a resin without using the counter substrate, unlike FIG. A protective film 1221 is provided to cover the second pixel electrode of the pixel portion 1203. As the protective film 1221, an organic material such as an epoxy resin, a urethane resin, or a silicone resin can be used. The protective film 12221 may be formed by dropping a polymer material by a droplet discharge method. In this embodiment, the epoxy resin is discharged using a dispenser and dried. Further, a counter substrate may be provided over the protective film. Other structures are similar to those in FIG.

  When sealing is performed without using the counter substrate in this manner, the weight, size, and thickness of the display device can be improved.

  In the module of this embodiment, the wiring board 1210 is mounted using the FPC 1209, but the configuration is not necessarily limited thereto. The pixel drive circuit 1211 and the external circuit 1212 may be directly mounted on the substrate using a COG (Chip on Glass) method.

  Note that any of Embodiment Modes 1 to 10 can be applied to this example. Moreover, although the example of the liquid crystal display module and the light emission display module was shown as a display module, it is not restricted to this, DMD (Digital Micromirror Device; Digital micromirror device), PDP (Plasma Display Panel; Plasma display panel), The present invention can be appropriately applied to a display module such as a field emission display (FED) or an electrophoretic display device (electronic paper).

  In this embodiment, the desiccant for the display panel shown in the above embodiment will be described with reference to FIGS.

  38A is a surface view of the display panel, FIG. 38B is a cross-sectional view taken along the line AB of FIG. 38A, and FIG. 38C is a CD of FIG. 38A. FIG.

  As shown in FIG. 38A, the active matrix substrate 1800 and the counter substrate 1801 are sealed with a sealant 1802. A pixel region is provided between the active matrix substrate 1800 and the counter substrate 1812. In the pixel region, a pixel 1807 is formed in a region where the source wiring 1805 and the gate wiring 1806 intersect. A desiccant 1804 is provided between the pixel region and the sealant 1802. In the pixel region, a desiccant 1814 is provided over the gate wiring 1806 or the source wiring 1805. Although the desiccant 1814 is provided over the gate wiring here, it can be provided over the gate wiring and the source wiring.

As the desiccant 1804, it is preferable to use a substance that adsorbs water (H ₂ O) by chemical adsorption such as an alkaline earth metal oxide such as calcium oxide (CaO) or barium oxide (BaO). However, the present invention is not limited to this, and a substance that adsorbs water by physical adsorption such as zeolite or silica gel may be used.

  Further, the desiccant can be fixed to the substrate in a state where the desiccant is contained as a granular substance in a highly moisture-permeable resin. Here, examples of highly moisture-permeable resins include acrylic resins such as ester acrylate, ether acrylate, ester urethane acrylate, ether urethane acrylate, butadiene urethane acrylate, special urethane acrylate, epoxy acrylate, amino resin acrylate, and acrylic resin acrylate. Can be used. In addition, bisphenol A type liquid resin, bisphenol A type solid resin, bromine-containing epoxy resin, bisphenol F type resin, bisphenol AD type resin, phenol type resin, cresol type resin, novolac type resin, cyclic aliphatic epoxy resin, epibis type Epoxy resins such as epoxy resins, glycidyl ester resins, glycidylamine resins, heterocyclic epoxy resins, and modified epoxy resins can be used. Further, other substances may be used. Further, for example, an inorganic material such as siloxane may be used.

  Further, as the substance having water absorption, a material obtained by solidifying a composition in which molecules capable of adsorbing water by chemical adsorption are mixed in an organic solvent can be used.

  Note that as the above-described highly moisture-permeable resin or inorganic material, it is preferable to select a material having higher moisture permeability than the material used as the sealing material.

  In the light emitting device of the present invention as described above, water that has entered the light emitting device from the outside can be absorbed before the water reaches the region where the light emitting element is formed. As a result, deterioration of an element provided in the pixel due to water, typically a light emitting element, can be suppressed.

  As shown in FIG. 38B, the desiccant 1804 is provided between the sealant 1802 and the pixel region 1803 in the periphery of the display panel. Further, by providing a concave portion in the counter substrate 1801 or the active matrix substrate 1800 and providing a desiccant 1804 there, the display panel can be thinned.

  As shown in FIG. 38C, in the pixel 1807, a semiconductor region 1811 which is part of a semiconductor element that drives the display element, a gate wiring 1806, a source wiring 1805, and a pixel electrode 1812 are formed. . In the pixel portion of the display panel, the desiccant 1814 is provided in a region overlapping with the gate wiring 1806 in the counter substrate. Since the width of the gate wiring is 2 to 4 times that of the source wiring, by providing the desiccant 1814 over the gate wiring 1806 which is a non-display region, the aperture ratio is not lowered and the display element can be formed. Intrusion of moisture and deterioration resulting therefrom can be suppressed. In addition, the display panel can be thinned by providing a recess in the counter substrate and providing a desiccant there.

  According to the present invention, a circuit in which a semiconductor element with a fine structure is highly integrated, typically a signal line driver circuit, a controller, a CPU, a converter for a sound processing circuit, a power supply circuit, a transmission / reception circuit, a memory, an amplifier for a sound processing circuit, etc. The semiconductor device can be formed. In addition, a system-on-chip that is monolithically equipped with circuits that constitute a single system (functional circuit) such as an MPU (microcomputer), memory, and I / O interface, enabling high speed, high reliability, and low power consumption. Can be formed.

  Various electronic devices can be manufactured by incorporating the semiconductor device described in any of the above embodiments into a housing. Electronic devices include television devices, video cameras, digital cameras, goggles-type displays (head-mounted displays), navigation systems, sound playback devices (car audio, audio components, etc.), notebook-type personal computers, game machines, and portable information terminals (Mobile computer, mobile phone, portable game machine, electronic book, or the like), an image playback apparatus (specifically, a digital versatile disc (DVD)) provided with a recording medium, and can display the image A device provided with a display). Here, as representative examples of these electronic devices, a television device and its block diagram are shown in FIGS. 11 and 12, respectively, and a digital camera is shown in FIG.

  FIG. 11 is a diagram illustrating a general configuration of a television apparatus that receives an analog television broadcast. In FIG. 11, radio waves for television broadcasting received by the antenna 1101 are input to the tuner 1102. The tuner 1102 generates and outputs an intermediate frequency (IF) signal by mixing the high-frequency television signal input from the antenna 1101 with a signal having a local oscillation frequency controlled according to the desired reception frequency.

  The IF signal output from the tuner 1102 is amplified to a required voltage by an intermediate frequency amplifier (IF amplifier) 1103, and then detected by the video detection circuit 1104 and detected by the audio detection circuit 1105. The video signal output from the video detection circuit 1104 is separated into a luminance signal and a color signal by the video processing circuit 1106 and further subjected to predetermined video signal processing to become a video signal, which is the semiconductor device of the present invention. Display devices, typically liquid crystal display devices, light-emitting display devices, DMDs (Digital Micromirror Devices), PDPs (Plasma Display Panels), FEDs (Field Emission Displays), electric emissions displays The image is output to an image output unit 1108 such as an electrophoretic display device (electronic paper). Note that a liquid crystal display device using a liquid crystal display device as a display device is a liquid crystal television device, and a display device using a light emitting display device is an EL television device. The same applies when other display devices are used.

  The signal output from the sound detection circuit 1105 is subjected to processing such as FM demodulation by the sound system processing circuit 1107 to become a sound signal, is appropriately amplified, and is output to the sound system output unit 1109 such as a speaker.

  Note that the television apparatus using the present invention is not limited to a terrestrial broadcast such as a VHF band or a UHF band, a cable broadcast, or an analog broadcast such as a BS broadcast, but also a terrestrial digital broadcast, a cable digital broadcast, Or it may correspond to BS digital broadcasting.

  FIG. 12 is a perspective view of the television device as viewed from the front, and includes a housing 1151, a display portion 1152, a speaker portion 1153, an operation portion 1154, a video input terminal 1155, and the like. Moreover, it has a structure as shown in FIG.

  The display unit 1152 is an example of the video system output unit 1108 in FIG. 11, and displays video here.

  The speaker unit 1153 is an example of the audio system output unit 1109 in FIG. 11, and outputs audio here.

  The operation unit 1154 is provided with a power switch, a volume switch, a channel selection switch, a tuner switch, a selection switch, and the like. By pressing the button, the power of the television apparatus is turned on / off, video selection, audio adjustment, And selecting a tuner. Although not shown, the above selection can also be performed by a remote controller type operation unit.

  The video input terminal 1155 is a terminal for inputting a video signal from the outside such as a VTR, a DVD, or a game machine to the television apparatus.

  When the television apparatus shown in the present embodiment is a wall-mounted television apparatus, a wall-hanging portion is provided on the back surface of the main body.

  By using the display device which is an example of the semiconductor device of the present invention for the display portion of the television device, the television device can be manufactured with low cost and high throughput and yield. Further, by using the semiconductor device of the present invention for the CPU that controls the video detection circuit, the video processing circuit, the audio detection circuit, and the audio processing circuit of the television device, the television device can be manufactured at low cost and with high throughput and yield. Can be produced. For this reason, it can be applied to various uses, particularly as a display medium with a large area, such as a wall-mounted television device, an information display board in a railway station or airport, and an advertisement display board in a street.

  13A and 13B are diagrams illustrating an example of a digital camera. FIG. 13A is a perspective view seen from the front side of the digital camera, and FIG. 13B is a perspective view seen from the rear side. 13A, the digital camera is provided with a release button 1301, a main switch 1302, a finder window 1303, a flash 1304, a lens 1305, a lens barrel 1306, and a housing 1307.

  In FIG. 13B, a viewfinder eyepiece window 1311, a monitor 1312, and operation buttons 1313 are provided.

  When the release button 1301 is pressed down to a half position, the focus adjustment mechanism and the exposure adjustment mechanism are operated, and when the release button 1301 is pressed down to the lowest position, the shutter is opened.

  A main switch 1302 switches on / off the power of the digital camera when pressed or rotated.

  The viewfinder window 1303 is disposed on the front of the lens 1305 on the front surface of the digital camera, and is a device for confirming the shooting range and focus position from the viewfinder eyepiece window 1311 shown in FIG.

  The flash 1304 is arranged at the upper front of the digital camera, and emits auxiliary light simultaneously with the release button being pressed to open the shutter when the subject brightness is low.

  The lens 1305 is disposed in front of the digital camera. The lens includes a focusing lens, a zoom lens, and the like, and constitutes a photographing optical system together with a shutter and a diaphragm (not shown). In addition, an imaging element such as a CCD (Charge Coupled Device) is provided behind the lens.

  The lens barrel 1306 moves the lens position in order to focus the focusing lens, the zoom lens, and the like. During photographing, the lens 1305 is moved forward to move the lens 1305 forward. In addition, when carrying, the lens 1305 is moved down to be compact. In this embodiment, the structure is such that the subject can be zoomed by extending the lens barrel. However, the present invention is not limited to this structure, and the configuration of the imaging optical system in the housing 1307 is not limited thereto. It is also possible to use a digital camera that can perform zoom shooting without extending the camera.

  The viewfinder eyepiece window 1311 is provided on the upper rear surface of the digital camera, and is a window provided for eye contact when confirming a shooting range and a focus position.

  The operation buttons 1313 are various function buttons provided on the rear surface of the digital camera, and include a setup button, a menu button, a display button, a function button, a selection button, and the like.

By using a display device which is an embodiment of the semiconductor device of the present invention for a monitor, a digital camera can be manufactured at low cost and with high throughput and yield. In addition, a CPU that receives operation inputs from various function buttons, a main switch, a release button, and the like, a circuit that performs an automatic focus operation and an automatic focus adjustment operation, a drive control for strobe light emission, and a timing for controlling a CCD drive A control circuit, an image pickup circuit that generates an image signal from a signal photoelectrically converted by an image pickup device such as a CCD, an A / D conversion circuit that converts an image signal generated by the image pickup circuit into a digital signal, and writing image data into a memory In addition, by using the semiconductor device of the present invention for a CPU or the like that controls each circuit such as a memory interface that reads image data, a digital camera can be manufactured at low cost and with high throughput and yield.

8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. FIG. 10 is a front view illustrating a structure of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. FIG. 6 is a top view illustrating a method for mounting a driver circuit of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a method for mounting a driver circuit of a display device according to the present invention. FIG. 11 is a block diagram illustrating a structure of an electronic device. 10A and 10B each illustrate an example of an electronic device. 10A and 10B each illustrate an example of an electronic device. FIG. 6 is a diagram showing a circuit configuration when a scanning line side driving circuit is formed of TFTs in the liquid crystal display panel according to the present invention. FIG. 6 is a diagram (shift register circuit) illustrating a circuit configuration in the case where a scanning line side driving circuit is formed using TFTs in a liquid crystal display panel according to the present invention. FIG. 4 is a diagram (buffer circuit) illustrating a circuit configuration when a scanning line side driving circuit is formed of TFTs in the liquid crystal display panel according to the present invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 2A and 2B illustrate a structure of a droplet discharge device that can be applied to the present invention. 4A and 4B illustrate a liquid crystal dropping method that can be applied to the present invention. FIG. 6 illustrates a structure of a liquid crystal display module according to the present invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention. FIG. 6 illustrates a structure of a light-emitting display module according to the present invention. 4A and 4B each illustrate a mode of a light-emitting element that can be applied to the present invention. FIG. 10 is a cross-sectional view illustrating a structure of a pixel that can be used in the light-emitting display panel of the present invention. FIG. 14 is a cross-sectional view illustrating a structure of a light-emitting display panel of the present invention. The schematic diagram explaining the laser direct drawing apparatus which concerns on this invention. 8A and 8B are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the invention. FIG. 6 is a surface view illustrating a structure of a semiconductor device according to the invention. 8A to 8D are top views illustrating a manufacturing process of a semiconductor device according to the present invention.

Claims (46)

A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode and a drain electrode;
The gate electrode, the semiconductor region, the source electrode, or the drain electrode is formed by a droplet discharge method,
A distance between the source region and the drain region is from 0.1 μm to 10 μm.   2. The semiconductor device according to claim 1, wherein one end of the source region and the drain region facing each other is bent at a certain distance.   3. The semiconductor device according to claim 2, wherein one end of the source region and the drain region facing each other is curved in a straight line.   3. The semiconductor device according to claim 2, wherein one end of the source region and the drain region facing each other is curved.   3. The semiconductor device according to claim 2, wherein opposite ends of the source region and the drain region are curved in a straight line shape and a curved shape. A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode and a drain electrode;
The gate electrode, the semiconductor region, the source electrode, or the drain electrode is formed by a droplet discharge method,
A distance between the source electrode and the drain electrode is from 0.1 μm to 10 μm.   The semiconductor device according to claim 6, wherein the opposing ends of the source electrode and the drain electrode are bent at a predetermined distance.   8. The semiconductor device according to claim 7, wherein opposite ends of the source electrode and the drain electrode are curved in a straight line.   8. The semiconductor device according to claim 7, wherein opposite ends of the source electrode and the drain electrode are curved in a curved shape.   8. The semiconductor device according to claim 7, wherein one end of the source electrode and the drain electrode facing each other is curved in a linear shape and a curved shape.   Forming a first conductive layer in contact with the semiconductor region; forming an insulating layer on the first conductive layer by a coating method; irradiating a part of the insulating layer with a laser beam to form a mask pattern; A method for manufacturing a semiconductor device, wherein the first conductive layer is formed by etching using a mask pattern as a mask.   12. The method for manufacturing a semiconductor device according to claim 11, wherein the divided first conductive layer is a source region and a drain region.   The method for manufacturing a semiconductor device according to claim 12, wherein a second conductive layer is formed over the divided first conductive layer by a droplet discharge method.   12. The method for manufacturing a semiconductor device according to claim 11, wherein the first conductive layer is formed by a droplet discharge method.   15. The method for manufacturing a semiconductor device according to claim 14, wherein the divided first conductive layer is a source electrode and a drain electrode.   Forming a first conductive layer in contact with the semiconductor region; forming a second conductive layer on the first conductive layer; forming an insulating layer on the second conductive layer by a coating method; A mask pattern is formed by irradiating a part of the substrate with the mask pattern, and etching is performed using the mask pattern as a mask to form the divided first conductive layer and second conductive layer. Manufacturing method.   17. The semiconductor device according to claim 16, wherein the divided first conductive layer is a source region and a drain region, and the divided second conductive layer is a source electrode and a drain electrode. Manufacturing method.   The method for manufacturing a semiconductor device according to claim 1, wherein the insulating layer is formed using a photosensitive resin. A conductive semiconductor layer is formed on the conductive layer, a photosensitive resin layer is formed on the conductive semiconductor region by a coating method, the photosensitive resin layer is exposed to a laser beam and developed to form a first layer. Forming a mask pattern of
A method for manufacturing a semiconductor device, wherein the semiconductor region exhibiting conductivity is separated using the first mask pattern as a mask. A semiconductor region exhibiting conductivity is formed on the semiconductor region, a photosensitive resin layer is formed on the semiconductor region exhibiting conductivity by a coating method, the photosensitive resin layer is exposed with a laser beam and developed to form a first Forming a mask pattern of
A method for manufacturing a semiconductor device, wherein the semiconductor region exhibiting conductivity is separated using the first mask pattern as a mask. A conductive semiconductor region is formed on the semiconductor region, a conductive film is formed on the conductive semiconductor region, a photosensitive resin layer is formed on the conductive film by a coating method, and the photosensitive resin layer is formed. Is exposed to a laser beam and developed to form a first mask pattern,
A method for manufacturing a semiconductor device, comprising: separating the conductive film using the first mask pattern as a mask; and then isolating the semiconductor region exhibiting conductivity.   22. The method for manufacturing a semiconductor device according to claim 19, wherein the separated semiconductor regions having conductivity are a source region and a drain region.   A semiconductor region is formed on the insulating film, a region having a liquid repellent surface is formed on the semiconductor region by a coating method, and a part of the region having the liquid repellent surface is irradiated with laser light to have a lyophilic surface. A method for manufacturing a semiconductor device, comprising forming a region and forming a semiconductor region exhibiting conductivity over a region having the lyophilic surface.   A first semiconductor region is formed on the first insulating film, a semiconductor film exhibiting conductivity is formed on the first semiconductor region, and a first liquid repellent surface is formed on the semiconductor film exhibiting conductivity. Forming a region having a lyophilic surface by irradiating a part of the region having the first liquid repellent surface with a laser beam, and forming a region having a second liquid repellent surface; A second insulating film is formed in the lyophilic region, and the second insulating film is used to etch the region having the second lyophobic surface and the conductive semiconductor film to form a second A method for manufacturing a semiconductor device, comprising forming a semiconductor region and forming a conductive layer in contact with the second semiconductor region.   A semiconductor region is formed on the first insulating film, a region having a first liquid repellent surface is formed on the semiconductor region by a coating method, and a laser beam is formed on a part of the region having the first liquid repellent surface. To form a region having a lyophilic surface and a region having a second lyophobic surface, forming a second insulating film in the lyophilic region, and then forming the second lyophobic surface. A method for manufacturing a semiconductor device is characterized in that a region having conductivity is removed to form a semiconductor region exhibiting conductivity, and a conductive layer in contact with the semiconductor region exhibiting conductivity is formed. 26. The coating method according to claim 11, wherein the coating method is a droplet discharge method, an inkjet method, a spin coating method, a roll coating method, a slot coating method, or a dip method. A method for manufacturing a semiconductor device. A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, a drain electrode, and a pixel electrode connected to the drain electrode;
The gate electrode, the semiconductor region, the source electrode, the drain electrode, or the pixel electrode is formed by a droplet discharge method,
A liquid crystal television set including a display device, wherein a distance between the source region and the drain region is 0.1 μm or more and 10 μm or less.   28. The liquid crystal television set comprising a display device according to claim 27, wherein one end of the source region and the drain region facing each other is deviated by a predetermined distance.   29. The liquid crystal television set comprising a display device according to claim 28, wherein one end of the source region and the drain region facing each other is curved in a straight line.   29. The liquid crystal television set comprising a display device according to claim 28, wherein one end of the source region and the drain region facing each other is curved in a curved shape.   29. The liquid crystal television set comprising a display device according to claim 28, wherein one end of the source region and the drain region facing each other is curved in a straight line shape and a curved line shape. A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, a drain electrode, and a pixel electrode connected to the drain electrode;
The gate electrode, the semiconductor region, the source electrode, the drain electrode, or the pixel electrode is formed by a droplet discharge method,
A liquid crystal television set including a display device, wherein a distance between the source electrode and the drain electrode is 0.1 μm or more and 10 μm or less.   33. The liquid crystal television set comprising a display device according to claim 32, wherein one end of the source electrode and the drain electrode facing each other is bent at a certain distance.   34. The liquid crystal television set comprising a display device according to claim 33, wherein one end of the source electrode and the drain electrode facing each other is curved in a straight line.   34. The liquid crystal television set comprising a display device according to claim 33, wherein one end of the source electrode and the drain electrode facing each other is curved in a curved shape.   34. The liquid crystal television device according to claim 33, wherein one end of the source electrode and the drain electrode facing each other is curved in a straight line shape and a curved shape. A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, a drain electrode, and a pixel electrode connected to the drain electrode;
The gate electrode, the semiconductor region, the source electrode, the drain electrode, or the pixel electrode is formed by a droplet discharge method,
An EL television device including a display device, wherein a distance between the source region and the drain region is 0.1 μm or more and 10 μm or less.   38. The EL television device including a display device according to claim 37, wherein one end of the source region and the drain region facing each other is deviated by a predetermined distance.   39. The EL television device including the display device according to claim 38, wherein one end of the source region and the drain region facing each other is curved in a straight line.   39. The EL television device including a display device according to claim 38, wherein one end of the source region and the drain region facing each other is curved in a curved shape.   38. The EL television device including a display device according to claim 37, wherein one end of the source region and the drain region facing each other is curved in a straight line shape and a curved shape. A gate electrode, a gate insulating film, a semiconductor region, a source region, a drain region, a source electrode, a drain electrode, and a pixel electrode connected to the drain electrode;
The gate electrode, the semiconductor region, the source electrode, the drain electrode, or the pixel electrode is formed by a droplet discharge method,
An EL television device including a display device, wherein a distance between the source electrode and the drain electrode is 0.1 μm or more and 10 μm or less.   44. The EL television device including a display device according to claim 42, wherein one end of the source electrode and the drain electrode facing each other is deviated by a predetermined distance.   44. The EL television device including a display device according to claim 43, wherein one end of the source electrode and the drain electrode facing each other is curved in a straight line.   44. The EL television device including the display device according to claim 43, wherein one end of the source electrode and the drain electrode facing each other is curved in a curved shape. 44. The EL television device including the display device according to claim 43, wherein one end of the source electrode and the drain electrode facing each other is curved in a straight line shape and a curved shape.

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