JP4877871B2 - Display device manufacturing method, liquid crystal television, and EL television - Google Patents

Description

  The present invention relates to a display device having a pixel electrode formed by a droplet discharge method typified by an inkjet method and a method for manufacturing the display device.

  2. Description of the Related Art Conventionally, a so-called active matrix driving type display panel constituted by a semiconductor element typified by a thin film transistor (hereinafter also referred to as “TFT”) on a glass substrate has an exposure process (hereinafter referred to as a photolithography process) using a photomask. It is manufactured by etching various thin films after patterning.

In the photolithography process, a resist is applied to the entire surface of the substrate and prebaked, and then irradiated with ultraviolet rays or the like through a photomask, and a resist pattern is formed by development. Thereafter, a thin film (a film formed of a semiconductor material, an insulator material, or a conductor material) existing in a portion to be a film pattern using the resist pattern as a mask pattern is removed by etching, so that a semiconductor region, an electrode, a wiring A film pattern such as is formed to form a semiconductor element.

Patent Document 1 discloses a technique for forming a film on a semiconductor wafer using an apparatus capable of continuously discharging a resist from a nozzle in a thin line shape in order to reduce a loss of raw materials required for film formation. .
JP 2000-188251 A

  However, in the process of forming a film pattern using a conventional photolithography process, a resist, which is a raw material for a mask pattern, is applied onto a substrate by using a spin coating method, so that most of the resist material is wasted, There is a problem that the number of steps for forming the mask pattern is large and the throughput is lowered.

  In addition, it is difficult for an exposure apparatus used in the photolithography process to perform exposure processing on a large area substrate at a time. For this reason, in the method for manufacturing an active matrix substrate of a display device using a large-area substrate, a plurality of exposure times are required, and there is a problem in that the yield is lowered due to inconsistency with adjacent patterns. .

  The present invention has been made in view of such a situation, and provides a method for manufacturing a display device with a small number of steps and high yield.

  The present invention forms a first mask pattern with low wettability on the conductive layer, forms a second mask pattern with high wettability on the conductive layer using the first mask pattern as a mask, The gist is to form a mask pattern for removing the mask pattern and etching the conductive layer.

  The first mask pattern has low wettability and is easy to play the composition. On the other hand, the second mask pattern has high wettability and the composition that becomes the material of the second mask pattern spreads and spreads. Since the composition serving as the material of the second mask pattern is repelled on the surface of the first mask pattern, the second mask pattern can be formed in a self-aligning manner.

  As a method of forming the first mask pattern having low paintability, a method of exposing fluorine plasma to the insulating layer can be mentioned. As a method for generating fluorine plasma, there are a method for generating plasma in an atmosphere of fluorine or fluoride, a method for generating plasma using an electrode having a dielectric material having a fluorine resin, and the like.

  As a method of forming the first mask pattern with low wettability, a material with low wettability can be applied to a predetermined place. Examples of the material having low wettability include compounds having a fluorocarbon chain.

  The difference in contact angle between the first mask pattern and the second mask pattern is 30 degrees, preferably 40 degrees or more. As a result, the material of the second mask pattern is repelled on the surface of the first mask pattern, and each mask pattern can be formed in a self-aligning manner.

  The second mask pattern is preferably used as a mask for forming a pixel electrode.

  According to another aspect of the present invention, a first mask pattern with low wettability is formed on the first conductive layer, and the second high wettability is formed on the first conductive layer using the first mask pattern as a mask. After forming the mask pattern, the first mask pattern is removed, and the first conductive layer is etched using the second mask pattern as a mask to form a pixel electrode. is there.

  According to another embodiment of the present invention, a conductive film is formed over an insulating surface, a first mask pattern is formed over the conductive film, the second mask is formed on the conductive film and on the outer edge of the first mask pattern. A display device manufacturing method is characterized in that a mask pattern is formed, a first mask pattern is removed to expose a part of a conductive film, an exposed portion is removed, and a pixel electrode is formed.

  In another embodiment of the present invention, a conductive film is formed over an insulating surface, a first mask pattern is formed over the conductive film, and the region on the conductive film surface is formed with the first mask pattern. A display is characterized in that a second mask pattern is formed in a region excluding, a part of the conductive film is exposed by removing the first mask pattern, and then the exposed portion is removed to form a pixel electrode. It is a manufacturing method of an apparatus.

  In one embodiment of the present invention, a conductive film is formed over an insulating surface, a first mask pattern is formed over the conductive film, and the first mask pattern is not formed over the conductive film surface. A method for manufacturing a display device, comprising: forming a second mask pattern; removing the first mask pattern to expose a part of the conductive film; and removing the exposed portion to form a pixel electrode. It is.

  In one embodiment of the present invention, a conductive film is formed over an insulating surface, a first mask pattern is formed over the conductive film, and a second mask is formed on the conductive film surface and on the outer edge of the first mask pattern. Forming a mask pattern, removing the first mask pattern, and then removing a part of the conductive film using the second mask pattern as a mask to form a pixel electrode. It is.

  In another embodiment of the present invention, a conductive film is formed over an insulating surface, a first film pattern is formed over the conductive film, and the first film pattern is formed over the conductive film surface. Forming a pixel electrode by forming a second film pattern in a region excluding the first film pattern, removing the first film pattern, and then removing a part of the conductive film using the second film pattern as a mask. This is a method for manufacturing a display device.

  In one embodiment of the present invention, a conductive film is formed over an insulating surface, a first film pattern is formed over the conductive film, and the first film pattern is not formed over the conductive film surface. A pixel electrode is formed by forming a second film pattern, removing the first film pattern, and then removing a part of the conductive film using the second film pattern as a mask. This is a manufacturing method.

  Typically, the first film pattern can be formed with a small number of steps by using a droplet discharge method, an inkjet method, a printing method, or the like as a method for forming the first film pattern.

  The second film pattern is formed using a coating method. Typically, a droplet discharge method, an inkjet method, a printing method, a spin coating method, a roll coating method, a slot coating method, a dip method, or the like can be used.

Note that the droplet discharge method is a method in which a prepared composition is discharged from a nozzle in accordance with an electric signal to form a minute droplet and adhere to a predetermined position.

  The pixel driving element of the display device of the present invention includes a top gate TFT or a bottom gate TFT. Each TFT is a staggered TFT or a coplanar TFT.

  In the present invention, typical examples of the display device include a liquid crystal display device, a light emitting display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), an FED (Field Emission Display; field). Display devices such as an emission display) and an electrophoretic display device (electronic paper).

  In the present invention, the display device also refers to a device using a display element, that is, an image display device. In addition, a module in which a connector, for example, a flexible printed circuit (FPC), a TAB (Tape Automated Bonding) tape or a TCP (Tape Carrier Package), is attached to the display panel, a printed wiring board at the end of the TAB tape or TCP The display device also includes a module in which an IC (integrated circuit) or a CPU is directly mounted on a display element or a display element by a COG (Chip On Glass) method.

  Furthermore, the present invention is a liquid crystal television or an EL television constituted by the display device.

  As in the present invention, the first mask pattern formed using a material with low wettability by a droplet discharge method, an ink jet method, a printing method, or the like is used as a mask, and the second mask pattern is formed using a material with high wettability. By forming the second mask pattern, the second mask pattern can be formed in a self-aligned manner without using a photomask. For this reason, a mask pattern can be formed on a large-area substrate without using a plurality of exposure times by forming a mask pattern using materials having different wettability. In addition, when a large-area substrate is used, mismatching between adjacent patterns does not occur, so that the yield can be improved.

  In addition, by forming the second mask pattern on the conductive layer and etching the conductive layer, a pixel electrode or a display device including the pixel electrode can be formed with high yield.

Furthermore, by changing the relative position of the nozzle, which is the discharge port of the droplet containing the material of the first mask pattern, and the substrate, and discharging the droplet to a predetermined location, the first mask pattern is It can be formed using a droplet discharge method. Further, the thickness and thickness of the pattern to be formed can be adjusted by the relative relationship of the nozzle diameter, the droplet discharge amount, and the moving speed between the nozzle and the substrate on which the discharge is formed. For this reason, since a mask pattern can be accurately discharged and formed at a desired location even on a large-area substrate with one side exceeding 1-2 m, a display device can be manufactured with a small number of steps and a high yield. Is possible. Cost reduction is also possible.

  Further, a liquid crystal television and a EL television having a display device formed by the above manufacturing process can be manufactured at low cost and with high throughput and yield.

  The best mode for carrying out the invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention should not be construed as being limited to the description of the embodiment modes. In the drawings, common portions are denoted by the same reference numerals, and detailed description thereof is omitted.

(Embodiment 1)
In this embodiment, after forming a first mask pattern formed using a material with low wettability over the conductive film, a second mask pattern formed using a material with high wettability is formed, A step of forming a mask pattern for forming a pixel electrode by removing the mask pattern 1 and a step of forming a pixel electrode will be described with reference to FIG.

  As shown in FIG. 1A, a first conductive layer 1002 is formed over a substrate 1001. The first conductive layer is formed using a conductive material that can function as a pixel electrode.

  As a typical example of the substrate 1001, a glass substrate, a quartz substrate, a substrate formed of an insulating material such as alumina, a plastic substrate having heat resistance that can withstand a processing temperature in a later process, a silicon wafer, a metal plate, or the like can be used. . In this case, diffusion of impurities and the like from the substrate side, such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), is prevented. It is desirable to form an insulating film for this purpose. In addition, a substrate in which an insulating film such as silicon oxide or silicon nitride is formed on the surface of a metal such as stainless steel or a semiconductor substrate can also be used. When a glass substrate is used as the substrate 1001, a large area substrate such as 320 mm × 400 mm, 370 mm × 470 mm, 550 mm × 650 mm, 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm is used. be able to. Here, a glass substrate is used as the substrate 1001.

  Note that when a plastic substrate is used as the substrate 1001, it is preferable to use a substrate having a relatively high glass transition point such as PC (polycarbonate), PES (polyethylene sulfone), PET (polyethylene terephthalate), or PEN (polyethylene naphthalate).

As a typical material of the first conductive layer 1002, there is a light-transmitting conductive film or a reflective conductive film. As a material for the light-transmitting conductive film, indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), zinc oxide added with gallium (GZO), indium tin oxide containing silicon oxide, or the like Is mentioned. In addition, as a material for the conductive film having reflectivity, a metal such as aluminum (Al), titanium (Ti), silver (Ag), and tantalum (Ta), or a concentration less than the stoichiometric composition ratio with the metal is used. Examples thereof include a metal material containing nitrogen, or titanium nitride (TiN), tantalum nitride (TaN) which is a nitride of the metal, or aluminum containing 1 to 20% nickel.

  As a method for forming the conductive film 1002, a sputtering method, an evaporation method, a CVD method, a coating method, or the like is used as appropriate.

  Next, as illustrated in FIG. 1B, a first mask pattern 1003 is formed over the first conductive layer 1002. The first mask pattern functions as a mask for forming a second mask pattern (a film functioning as a mask for etching the conductive layer) to be formed later. For this reason, it is preferable that paintability is low. That is, it is preferable that the second mask pattern to be formed later is easily played on the surface of the first mask pattern.

In this embodiment mode, as a method for forming the first mask pattern 1003, an insulating layer having high paintability is formed in a predetermined place, and fluorine plasma is exposed to the surface. Alternatively, plasma treatment can be performed by preparing an electrode provided with a dielectric and generating plasma so that the dielectric is exposed to plasma using air, oxygen, or nitrogen. In this case, the dielectric need not cover the entire electrode surface. A fluororesin can be used as the dielectric. When a fluororesin is used, surface modification is performed by forming CF ₂ bonds on the surface of the insulating layer, and paintability is reduced.

As a material for the insulating layer, a material in which a water-soluble resin such as polyvinyl alcohol (PVA) is mixed with a solvent such as H ₂ O can be used. Moreover, you may use combining PVA and another water-soluble resin. In addition, organic resins such as acrylic resin, polyimide resin, melamine resin, polyester resin, polycarbonate resin, phenol resin, epoxy resin, polyacetal, polyether, polyurethane, polyamide (nylon), furan resin, diallyl phthalate resin, etc. may be used. it can.

  Examples of the method for producing the insulating layer include printing methods represented by screen (stencil printing), offset (lithographic printing) printing, relief printing, gravure printing (intaglio printing), and a droplet discharge method. Can be formed in the region.

  When the insulating layer is formed by the droplet discharge method, the nozzle diameter used for the droplet discharge means is set to 0.1 to 50 μm (preferably 0.6 to 26 μm), and the composition is discharged from the nozzle. The discharge amount of the object is set to 0.00001 pl to 50 pl (preferably 0.0001 to 10 pl). This discharge amount increases in proportion to the size of the nozzle diameter. In addition, the distance between the object to be processed and the nozzle discharge port is preferably as close as possible in order to drop it at a desired location, and is preferably set to about 0.1 to 2 cm.

  Next, as shown in FIG. 1C, a second mask pattern 1004 is formed over the first conductive layer 1002 and in a region where the first mask pattern 1003 is not formed. The second mask pattern is formed using a material having higher wettability than the first mask pattern.

  Here, FIG. 27 is used to show the relationship between a low-paintability region and a high-paintability region. The region with low smearability (here, the first mask pattern 1003) is a region where the liquid contact angle θ1 is large on the surface, as shown in FIG. On this surface the liquid is repelled by a hemisphere. On the other hand, the region with high wettability (here, the second mask pattern 1004) is a region where the liquid contact angle θ2 is small on the surface. On this surface, the liquid spreads and spreads.

  For this reason, when two regions having different contact angles are in contact with each other, a region having a relatively small contact angle is a region having high paintability, and a region having a larger contact angle is a region having low paintability. When the composition is applied on the two regions, the composition spreads on the surface of the highly wettable region and repels at the interface with the low wettable region.

  The difference between the contact angle θ1 of the low wettability region and the contact angle θ2 of the high wettability region is 30 degrees, preferably 40 degrees or more. As a result, the material of the highly wettable area is repelled on the surface of the low wettable area, and each mask pattern can be formed in a self-aligning manner. For this reason, among the enumerated methods and materials for forming the first mask pattern 1003, a region formed of a material having a small contact angle when the difference between the contact angles is 30 degrees, preferably 40 degrees or more. Is a region with high wettability, and a region formed of a material with a large contact angle is a region with low wettability. Similarly, among the materials listed as the second mask pattern 1004 from now on, when the difference in contact angle between each other is 30 degrees, preferably 40 degrees or more, the region formed of the material having a small contact angle is painted. A region formed of a material having a large contact angle is a region with low wettability.

  In addition, when the surface has an unevenness | corrugation, a contact angle increases further in the area | region where paintability is low. That is, paintability is further reduced. On the other hand, the contact angle is further lowered in the region where the paintability is high. That is, paintability is further improved. For this reason, it is possible to form a layer having uniform end portions by applying a low wettability material and a high wettability material on each surface having unevenness and baking.

  As the second mask pattern 1004, acrylic resin, polyimide resin, melamine resin, polyester resin, polycarbonate resin, phenol resin, epoxy resin, polyacetal, polyether, polyurethane, polyamide (nylon), furan resin, diallyl phthalate resin, novolak Resins, silicon resins, organic resins such as resist, siloxane polymers, and polysilazanes can be used. In addition, materials with high wettability such as compositions using polar solvents such as water, alcohol, ether, dimethylformamide, dimethylacetamide, dimethylsulfoxide, N-methylpyrrolidone, hexamethylphosphamide, chloroform, methylene chloride are used. Can be formed. As a forming method, a coating method can be used. Typically, a droplet discharge method, an inkjet method, a spin coating method, a roll coating method, a slot coating method, a printing method, or the like is appropriately used. Note that by using a droplet discharge method, a material can be selectively discharged, so that the second mask pattern can be formed in a predetermined region.

  Next, as shown in FIG. 1D, the first mask pattern 1003 is removed, and a part 1005 of the first conductive layer 1002 is exposed. As a method for removing the first mask pattern 1003, oxygen ashing, a wet etching method, or the like can be used as appropriate.

  Next, as shown in FIG. 1E, the first conductive layer 1002 is etched using the second mask pattern 1004 as a mask to form a second conductive layer 1006 having a desired shape.

  Next, as shown in FIG. 1F, the second conductive layer 1006 is exposed by removing the second mask pattern 1004 by a known method such as dry etching or wet etching. The second conductive layer 1006 can be used as a pixel electrode.

  Through the above steps, a conductive layer and a pixel electrode having a desired shape can be formed without using a photolithography step. In addition, a matrix substrate of a passive matrix display device can be formed.

(Embodiment 2)
In this embodiment, the first mask pattern is formed using a material having low wettability using a compound having a fluorine carbon chain, and then the second mask pattern is formed using material having high wettability. A process of forming a mask pattern for forming a pixel electrode and a process of forming a pixel electrode will be described with reference to FIG.

  As shown in FIG. 2A, a first conductive layer 1002 is formed over a substrate 1001 as in Embodiment Mode 1.

Next, as shown in FIG. 2B, the first mask pattern 10 is formed on the first conductive layer 1002.
11 is formed. In the present embodiment, a mask pattern with low wettability is formed as the first mask pattern. As a material of the first mask pattern 1011, a coating method represented by screen (stencil printing), offset (lithographic printing) printing, letterpress printing, gravure printing (intaglio printing) and the like, and a droplet discharge method or the like can be applied. Form by applying low material. As an example of a material composition having low wettability, a silane coupling agent represented by a chemical formula of Rn—Si—X _(4-n) (n = 1, 2, 3) is used. Here, R is a relatively inert group such as an alkyl group. X is composed of a hydroxyl group on the base surface or a hydrolyzable group capable of binding to adsorbed water. Representative examples of X include halogen, methoxy group, ethoxy group, acetoxy group and the like.

Moreover, as a typical example of a silane coupling agent, the wettability can be further reduced by using a fluorine silane coupling agent (fluoroalkylsilane (FAS)) having a fluorine carbon chain (fluoroalkyl group) in R. . R of FAS has a structure represented by (CF ₃ ) (CF ₂ ) _x (CH ₂ ) _y (x: an integer of 0 or more and 10 or less, y: an integer of 0 or more and 4 or less), and a plurality of R Alternatively, when X is bonded to Si, R and X may all be the same or different. Typical FAS includes fluoroalkylsilanes such as heptadecafluorotetrahydrodecyltriethoxysilane, heptadecafluorotetrahydrodecyltrichlorosilane, tridecafluorotetrahydrooctyltrichlorosilane, and trifluoropropyltrimethoxysilane.

  As a solvent for a composition having low wettability, n-pentane, n-hexane, n-heptane, n-octane, n-decane, dicyclopentane, benzene, toluene, xylene, durene, indene, tetrahydronaphthalene, decahydronaphthalene , A hydrocarbon solvent such as squalane or tetrahydrofuran is used.

  In addition, as an example of a composition having low wettability, a material having a fluorocarbon chain (fluororesin) can be used. As fluororesin, polytetrafluoroethylene (PTFE; tetrafluoroethylene resin), perfluoroalkoxyalkane (PFA; tetrafluoroethylene perfluoroalkyl vinyl ether copolymer resin), perfluoroethylene propylene copolymer (PFEP; tetrafluoride). Ethylene-hexafluoropropylene copolymer resin), ethylene-tetrafluoroethylene copolymer (ETFE; tetrafluoroethylene-ethylene copolymer resin), polyvinylidene fluoride (PVDF; vinylidene fluoride resin), polychlorotrifluoroethylene ( PCTFE; trifluorochloroethylene resin), ethylene-chlorotrifluoroethylene copolymer (ECTFE; trifluoroethylene chloride-ethylene copolymer resin), polytetrafluoroethylene-perfluorodioxide Rukoporima (TFE / PDD), polyvinyl fluoride (PVF; a vinyl fluoride resin), or the like can be used.

  Subsequently, when the surface to which the composition having low wettability is attached is cleaned with ethanol, the first mask pattern having a very thin film thickness and low wettability can be formed.

  Next, as shown in FIG. 2C, a second mask pattern 1012 is formed over the first conductive layer 1002 and in a region where the first mask pattern 1011 is not formed. As a material and a manufacturing method of the second mask pattern, the same materials as those of the second mask pattern 1004 of Embodiment 1 can be used as appropriate.

  Next, as shown in FIG. 2D, the first mask pattern 1011 is removed in the same manner as in Embodiment Mode 1, and a part 1013 of the first conductive layer 1002 is exposed.

  Next, as shown in FIG. 2E, the first conductive layer 1002 is etched using the second mask pattern 1012 as a mask in the same manner as in the first embodiment, so that a second shape having a desired shape is obtained. A conductive layer 1014 is formed.

  Next, as shown in FIG. 2F, the second conductive layer 1014 is exposed by removing the second mask pattern 1012. The second conductive layer 1014 can be used as a pixel electrode.

  Through the above steps, a conductive layer and a pixel electrode having a desired shape can be formed without using a photolithography step. In addition, a matrix substrate of a passive matrix display device can be formed.

(Embodiment 3)
In this embodiment, a method for manufacturing an active matrix substrate of a display device will be described with reference to FIGS. In this embodiment mode, description will be made using a bottom-gate channel etch TFT as a pixel driving element. Note that the second conductive layer 301 is formed using Embodiment 1, but the present invention is not limited to this, and Embodiment 2 can be used.

  As shown in FIG. 3A, a first conductive layer 1002 is formed over a substrate 1001. Next, after the first mask pattern 1003 is formed by the same process as that in Embodiment Mode 1, the second mask pattern 1004 is formed.

  Next, as shown in FIG. 3B, the first mask pattern 1003 is removed to expose a part of the first conductive layer, and then the first conductive layer is etched to form a pixel electrode. A functioning second conductive layer 301 is formed. Thereafter, the second mask pattern 1004 is removed.

  Next, as illustrated in FIG. 3C, a third conductive layer 302 functioning as a gate electrode is formed over the substrate 1001. As the material of the third conductive layer 302, a conductive material is used, such as a droplet discharge method, a printing method, an electroplating method, a PVD method (Physical Vapor Deposition), a CVD method (Chemical Vapor Deposition), a vapor deposition method, or the like. It is formed by a manufacturing method. Note that when a PVD method (Physical Vapor Deposition), a CVD method (Chemical Vapor Deposition), a vapor deposition method, or the like is used, a conductive layer is formed by the above film formation method, and then etched into a desired shape to form a third conductive layer. Layer 302 is formed.

As the material of the third conductive layer 302, Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, Ba Or indium tin oxide (ITO) used as a transparent conductive film, zinc oxide (ZnO), indium zinc oxide (IZO), zinc oxide added with gallium (GZO), indium tin oxide containing silicon oxide, Organic indium, organic tin, titanium nitride, or the like is used as appropriate. Moreover, you may laminate | stack the conductive layer which consists of these materials.

  In the case where the second conductive layer is formed by a droplet discharge method, a composition in which a conductor is dissolved or dispersed in a solvent is used as the composition discharged from the discharge port. As the conductor, a metal of the above conductive material, silver halide fine particles, or the like, or dispersible nanoparticles can be used.

  In addition, it is preferable to use what dissolved or disperse | distributed the material of either gold | metal | money, silver, and copper in the solvent considering the specific resistance value as the composition discharged from a discharge outlet. More preferably, low resistance and inexpensive silver or copper may be used. However, when copper is used, a barrier film may be provided as a countermeasure against impurities. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone may be used.

  Here, an insulating or conductive substance containing nitrogen such as silicon nitride, silicon oxynitride, aluminum nitride, titanium nitride, or tantalum nitride is preferably used as a barrier film in the case of using copper as a wiring. It may be formed by a discharge method.

  The viscosity of the composition used for the droplet discharge method is preferably 5 to 20 mPa · s, which is to prevent the drying from occurring and to smoothly discharge the composition from the discharge port. . The surface tension is preferably 40 mN / m or less. Note that the viscosity of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, ZnO, IZO, GZO, indium tin oxide containing silicon oxide, organic indium, organic tin, or the like is dissolved or dispersed in a solvent is 5 to 20 mPa · s, or silver is dissolved in the solvent. The viscosity of the dispersed composition is 5 to 20 mPa · s, and the viscosity of the composition in which gold is dissolved or dispersed in a solvent is 10 to 20 mPa · s.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.5 to 10 μm. However, when formed by the gas evaporation method, the nanoparticles protected with the dispersant are as fine as about 7 nm. When the nanoparticles are covered with a coating agent, the nanoparticles are aggregated in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  The step of discharging the composition may be performed under reduced pressure. This is because the solvent of the composition volatilizes before the composition is discharged and landed on the object to be processed, and the subsequent drying and firing steps can be omitted or shortened. After discharging the composition, one or both of drying and baking processes are performed by laser light irradiation, rapid thermal annealing, a heating furnace, or the like under normal pressure or reduced pressure depending on the material of the composition. The drying and firing steps are both heat treatment steps. For example, the drying is performed at 100 degrees for 3 minutes, and the firing is performed at 200 to 350 degrees for 15 minutes to 120 minutes. Time is different. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is 100 to 800 degrees (preferably 200 to 350 degrees). And By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the resin of the composition is cured and contracted to accelerate the fusion and fusion of the conductors. This step is performed in an oxygen atmosphere, a nitrogen atmosphere, or an air atmosphere. In particular, it is preferable to perform in an oxygen atmosphere in which the solvent of the composition is easily removed. However, a binder formed of an organic substance remains in the conductive layer depending on the heating temperature, atmosphere, and time.

  In this embodiment mode, the third conductive layer 302 is formed by selectively discharging a composition in which silver particles of several nm are dispersed (hereinafter referred to as “Ag paste”), drying and firing, and then using silver as a main component. A conductive layer is formed. Note that the third conductive layer is formed by irregularly overlapping fine particles, which are conductors, three-dimensionally. For this reason, the surface has fine unevenness. In addition, since the plurality of fine particles are fired and the particle diameter of the particles is increased depending on the heating temperature and the heating time of the third conductive layer 302, the surface of the third conductive layer 302 has a large difference in height.

  Next, a first insulating layer 303 which functions as a gate insulating film, a first semiconductor film 304, and a conductive second semiconductor film 305 are formed over the second conductive layer 301 and the third conductive layer 302. To do. The first insulating layer 303 is formed using a single layer or a stacked structure of an insulating film containing silicon nitride, silicon oxide, or other silicon by a thin film formation method such as a plasma CVD method or a sputtering method. The first insulating layer preferably has a stacked structure of a silicon nitride film (silicon nitride oxide film), a silicon oxide film, and a silicon nitride film (silicon nitride oxide film) from the side in contact with the gate electrode. In this structure, since the gate electrode is in contact with the silicon nitride film, deterioration due to oxidation can be prevented.

  In addition, the first insulating layer 303 is formed using a coating method typified by a droplet discharge method, an inkjet method, a spin coating method, a roll coating method, a slot coating method, a sol-gel method, or a dip method, and has an insulating property. It can be formed using an object. Typical examples of the insulating composition include a composition in which fine particles of inorganic oxide are dispersed, polyimide, polyamide, polyester, acrylic, PSG (phosphorus glass), BPSG (phosphorus boron glass), silicate SOG (Spin on Glass), alkoxysilicate SOG, polysilazane SOG, siloxane polymer, and the like can be used as appropriate.

  As the first semiconductor film 304, an amorphous semiconductor, a semi-amorphous semiconductor in which an amorphous state and a crystalline state are mixed (also referred to as SAS), and crystal grains of 0.5 nm to 20 nm are formed in the amorphous semiconductor. A film having any state selected from a microcrystalline semiconductor and a crystalline semiconductor that can be observed is formed. In particular, a microcrystalline state in which grains of 0.5 nm to 20 nm can be observed is called a so-called microcrystal (μc). In any case, a semiconductor film having a film thickness of 10 to 60 nm mainly containing silicon, silicon-germanium (SiGe), or the like can be used.

The SAS is a semiconductor having an intermediate structure between an amorphous structure and a crystal structure (including single crystal and polycrystal) and having a third state that is stable in terms of free energy. It also contains a crystalline region with short-range order and lattice distortion. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wave number side than 520 cm ^−1. ing. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. As a termination of dangling bonds, SAS contains 1 atomic% or more of hydrogen or halogen.

SAS can be obtained by glow discharge decomposition of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. By forming a silicide gas diluted with hydrogen or fluorine, or hydrogen or fluorine and one or more kinds of rare gas elements selected from helium, argon, krypton, and neon, the formation of SAS is facilitated. be able to. At this time, it is preferable to dilute the silicide gas so that the dilution rate is in the range of 10 to 1000 times. Further, the SAS can be formed by using Si ₂ H ₆ and GeF ₄ and diluting with helium gas. The reaction generation of the coating by glow discharge decomposition is preferably performed under reduced pressure, and the pressure may be in the range of about 0.1 Pa to 133 Pa. The power for forming the glow discharge may be high frequency power of 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or less, and a substrate heating temperature of 100 to 250 ° C. is recommended.

The crystalline semiconductor film can be formed by crystallizing an amorphous semiconductor film or SAS by heating or laser irradiation. Alternatively, a crystalline semiconductor film may be directly formed. In this case, the crystalline semiconductor film can be directly formed using heat or plasma using a fluorine gas such as GeF ₄ or F ₂ and a silane gas such as SiH ₄ or Si ₂ H ₆ .

  The second semiconductor film 305 has conductivity. In the case of forming an n-channel TFT, a Group 15 element, typically phosphorus or arsenic is added. In the case of forming a p-channel TFT, an element belonging to Group 13, typically boron, is added. The second semiconductor film is formed by a plasma CVD method in which a gas containing a group 13 or group 15 element such as boron, phosphorus, or arsenic is added to a silicide gas. In addition, after forming the semiconductor film, a composition containing an element belonging to Group 13 or 15 can be applied over the semiconductor film and irradiated with a laser beam to form a conductive second semiconductor film. As the laser beam, a laser beam emitted from a known pulsed laser or continuous wave laser is appropriately used.

  Next, a third mask pattern 306 is formed over the second semiconductor film 305. The third mask pattern is preferably formed using a heat-resistant polymer material, and droplets of a polymer having an aromatic ring or a heterocyclic ring in the main chain and containing at least a highly polar heteroatom group in the aliphatic portion are used. It is preferable to form by discharging. Typical examples of such a polymer substance include polyimide and polybenzimidazole. In the case of using polyimide, a composition containing polyimide can be discharged from the discharge port onto the second semiconductor film 305 and baked at 200 ° C. for 30 minutes.

  Next, the second semiconductor film 305 is etched using the third mask pattern 306 to form a first semiconductor region (also referred to as a source region, a drain region, or a contact layer) 311 illustrated in FIG. To do. Thereafter, the third mask pattern is removed.

The first semiconductor film uses chlorine gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., fluorine gas typified by CF ₄ , SF ₆ , NF ₃ , CHF _3, etc., or O ₂ . Can be etched.

  Next, a fourth mask pattern 312 is formed over the first semiconductor region 311 and the first semiconductor film 304 therebetween. The fourth mask pattern can be formed using the same material as the third mask pattern.

  Next, using the fourth mask pattern 312 as a mask, the first semiconductor film 304 is etched to form a second semiconductor region (channel formation region) 313 illustrated in FIG. The etching conditions for the first semiconductor film can be applied to the etching conditions for the second semiconductor film. Thereafter, the fourth mask pattern is removed by a treatment using a stripping solution or an ashing treatment using oxygen.

  Note that the second semiconductor region 313 can be formed using an organic semiconductor material by a printing method, a droplet discharge method, or the like. In this case, the number of processes can be reduced because the etching process is not necessary. The organic semiconductor material used in the present invention is preferably a π-electron conjugated polymer material whose skeleton is composed of conjugated double bonds. Typically, a soluble polymer material such as polythiophene, poly (3-alkylthiophene), a polythiophene derivative, or pentacene can be used.

  In addition, as an organic semiconductor material that can be used in the present invention, there is a material that can form a second semiconductor region by processing after forming a soluble precursor. Note that examples of the organic semiconductor material formed using such a precursor include polythienylene vinylene, poly (2,5-thienylene vinylene), polyacetylene, a polyacetylene derivative, and polyarylene vinylene.

  When converting the precursor into an organic semiconductor, a reaction catalyst such as hydrogen chloride gas may be added in addition to the heat treatment. Typical solvents for dissolving these soluble organic semiconductor materials include toluene, xylene, chlorobenzene, dichlorobenzene, anisole, chloroform, dichloromethane, γ-butyllactone, butyl cellosolve, cyclohexane, NMP (N-methyl-2-pyrrolidone). ), Cyclohexanone, 2-butanone, dioxane, dimethylformamide (DMF), THF (tetrahydrofuran), or the like can be applied.

  Note that in the case where an organic semiconductor is used for the second semiconductor region 313, an organic conductive material such as polyacetylene, polyaniline, PEDOT (poly-ethylenoxythiophene), or PSS (poly-styrene sulfonate) is used instead of the first semiconductor region 311. A conductive layer formed by the step can be formed.

  Further, a conductive layer formed using a metal element can be used instead of the first semiconductor region 311. In this case, since many organic semiconductor materials are p-type semiconductors that transport holes as carriers, it is desirable to use a metal having a high work function in order to make ohmic contact with the semiconductor layer.

  Specifically, metals or alloys such as gold, platinum, chromium, palladium, aluminum, indium, molybdenum, and nickel are desirable. It can be formed by a printing method or a droplet discharge method using a conductive paste using these metals or alloys.

  Furthermore, a second semiconductor region formed of an organic semiconductor material, a conductive layer formed of an organic conductive material, and a conductive layer formed of a metal element may be stacked.

  Note that in the case where the second semiconductor region is formed of SAS, in addition to the structure in which the source region and the drain region cover the gate electrode as in the present embodiment, the end portions of the source region and the drain region A so-called self-aligned structure in which the end portions of the gate electrodes coincide can be obtained. Furthermore, a structure in which the source region and the drain region are formed at a certain distance without covering the gate electrode can be employed. In this structure, off-state current can be reduced, so that contrast can be improved when the TFT is used as a switching element of a display device. Furthermore, a TFT having a so-called multi-gate structure in which the second semiconductor region covers a plurality of gate electrodes may be used. Also in this case, the off current can be reduced.

  Next, an opening 321 as shown in FIG. As a method for forming the opening, a known photolithography process, an etching method using a mask pattern formed by a droplet discharge method, or the like is appropriately used. Here, as shown in FIG. 3E, a fifth mask pattern 314 is formed in a part of a region where the second conductive layer 301 and the first insulating layer 303 overlap, and the fifth mask pattern A sixth mask pattern 315 is formed on the outer edge of the. The fifth mask pattern is formed in a region where an opening is to be formed later. As the fifth mask pattern, a material similar to the first mask pattern is appropriately used to form a material with low wettability in a predetermined region. The sixth mask pattern is formed by discharging a highly wettable material using the same method as the second mask pattern. Next, the fifth mask pattern is removed to expose part of the first insulating layer 303. Next, by using the sixth mask pattern, the exposed region of the first insulating layer 303 is removed to expose a part of the second conductive layer 301 as shown in FIG. An opening 321 is formed.

  Next, fourth conductive layers 322 and 323 functioning as a source electrode and a drain electrode are formed over the first semiconductor region 311 using a conductive material. At this time, one of the fourth conductive layers (the fourth conductive layer 323 in FIG. 3E) and the first conductive layer are connected to each other at the opening portion 321. The fourth conductive layer can be formed using a material and a formation method similar to those of the third conductive layer. Here, a composition Ag paste in which silver particles of several nm are dispersed by a droplet discharge method is selectively discharged and dried to form fourth conductive layers 322 and 323.

  Next, a passivation film is preferably formed over the fourth conductive layers 322 and 323. The passivation film is formed using a thin film formation method such as plasma CVD or sputtering, and silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, aluminum oxynitride, or aluminum oxide, diamond-like carbon (DLC), nitrogen-containing carbon (CN) and other insulating materials can be used.

  Through the above steps, an active matrix substrate of a display device can be manufactured with high yield.

(Embodiment 4)
In this embodiment, a method for manufacturing an active matrix substrate of a display device will be described with reference to FIGS. In this embodiment mode, description is made using a channel protection type TFT having a bottom gate as a pixel driving element. Note that the second conductive layer 301 is formed using Embodiment 1, but the present invention is not limited to this, and Embodiment 2 can be used.

  As shown in FIGS. 4A and 4B, a second conductive layer 301 functioning as a pixel electrode is formed over the substrate 1001 by a process similar to that of Embodiment Mode 3. Thereafter, the second mask pattern 1004 is removed.

  Next, as illustrated in FIG. 4C, as in Embodiment 3, after the third conductive layer 302 functioning as a gate electrode is formed over the substrate 1001, the second conductive layer 301 and the third conductive layer 301 are formed. A first insulating layer 303 and a first semiconductor film 304 functioning as a gate insulating film are formed over the conductive layer 302. Next, a protective film 401 is formed over the first semiconductor film 304 and in a region overlapping with the third conductive layer 302. As a formation method and a material of the protective film 401, a material similar to the third mask pattern 306 described in Embodiment 3 can be used.

  Next, a second semiconductor film (a semiconductor film having conductivity) 405 is formed. Note that the second semiconductor film 405 can be formed using a material and a manufacturing method similar to those of the second semiconductor film 305 in Embodiment 3. Next, a third mask pattern 406 is formed. The third mask pattern 406 is formed using the same material and formation method as the third mask pattern 306 of Embodiment Mode 3.

  Next, as shown in FIG. 4D, the first semiconductor film 411 and the second semiconductor area 413 are etched using the third mask pattern as shown in FIG. Form. Thereafter, the third mask pattern is removed. Next, an opening 321 is formed as in the third embodiment.

  Next, as illustrated in FIG. 4E, a fourth conductive layer 422 functioning as a source electrode and a drain electrode is formed over the first semiconductor region 411 and the opening 321 by using a conductive material. Next, using the fourth conductive layer 422 as a mask, the exposed portion of the first semiconductor region 411 is etched and divided to form a source region and a drain region 412. Through this step, the protective film 401 is exposed.

  Note that the method for forming the source region and the drain region is not limited to this embodiment mode, and the manufacturing process of the first semiconductor region described in Embodiment Mode 3 may be used. In addition, the formation process of the source region and the drain region of this embodiment may be applied to Embodiment 3.

  Through the above steps, an active matrix substrate of a display device can be manufactured with high yield.

(Embodiment 5)
In this embodiment mode, a method for manufacturing an active matrix substrate of a display device using a top-gate forward staggered TFT will be described with reference to FIGS. Note that the second conductive layer 301 is formed using Embodiment 1, but the present invention is not limited to this, and Embodiment 2 can be used.

  As shown in FIGS. 5A and 5B, a second conductive layer 301 functioning as a pixel electrode is formed over the substrate 1001 by a process similar to that in Embodiment 3. Thereafter, the second mask pattern 1004 is removed.

  Next, as illustrated in FIG. 5C, third conductive layers 501 and 502 functioning as a source electrode and a drain electrode are formed over the substrate 1001. As this material and a manufacturing method, a material similar to that of the third conductive layer 302 in Embodiment 3 can be used as appropriate. Note that one of the third conductive layers is formed so as to be connected to the second conductive layer 301. Here, the third conductive layer 502 and the second conductive layer 301 are connected.

  Next, conductive first semiconductor regions 503 and 504 are formed over the third conductive layer. For the first semiconductor regions 503 and 504, a material and a manufacturing method similar to those of the first semiconductor region 311 in Embodiment 3 are used as appropriate. Here, the first semiconductor region is formed by discharging an organic conductive material to a predetermined place by a droplet discharge method. Note that the first semiconductor region functions as a source region and a drain region.

  Next, a second semiconductor region 505 is formed.

  Next, as illustrated in FIG. 5D, a first insulating layer 506 and a fourth conductive layer 507 are formed. Since the first insulating layer 506 functions as a gate insulating film, the first insulating layer 506 is formed using a material and a formation process similar to those of the first insulating layer 303 in Embodiment 3. In addition, since the fourth conductive layer 507 functions as a gate electrode, the fourth conductive layer 507 is formed using a material and a method similar to those of the third conductive layer 302 in Embodiment 3.

  Through the above steps, an active matrix substrate of a display device can be manufactured with high yield.

(Embodiment 6)
A method for manufacturing an active matrix substrate of a display device using the top gate coplanar TFT of the present invention will be described with reference to FIGS. Note that the third conductive layer 615 is formed using Embodiment Mode 1; however, the present invention is not limited to this, and Embodiment Mode 2 can be used.

  As shown in FIG. 6A, a first insulating layer 601 is formed over a substrate 1001. The first insulating layer 601 functions as a blocking film for preventing impurities from the substrate from diffusing into a semiconductor region to be formed later. Therefore, a base film made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed as the first insulating layer 601. The base film is formed as a single layer film or a structure in which two or more layers are stacked.

  Next, a semiconductor region 602 is formed over the first insulating layer 601. In the semiconductor region, a semiconductor film having an amorphous structure is formed by a known means (sputtering method, LPCVD method, plasma CVD method, etc.), and then a known crystallization process (laser emitted from a pulsed laser) A crystalline semiconductor film obtained by performing laser crystallization using light, thermal crystallization, thermal crystallization using a metal catalyst such as nickel), or the SAS described in Embodiment 3, AS or the like is patterned by a photolithography process and etched.

As a laser crystallization method, a continuous wave laser may be used. In this case, in order to obtain a crystal having a large grain size when crystallizing the amorphous semiconductor film, a solid-state laser capable of continuous oscillation is used and the second to fourth harmonics of the fundamental wave are applied. Is preferred. Typically, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) may be applied. In the case of using a continuous wave laser, laser light emitted from a continuous wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a non-linear optical element. There is also a method of emitting harmonics by putting a YVO ₄ crystal and a nonlinear optical element in a resonator. Then, it is preferably formed into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and irradiated to the object to be processed. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation may be performed by moving the semiconductor film relative to the laser light at a speed of about 10 to 200 cm / s. The semiconductor region is formed to a thickness of 25 to 150 nm (preferably 30 to 80 nm). There is no limitation on the material of the crystalline semiconductor film, but it may be formed of silicon, germanium, a silicon-germanium (SiGe) alloy, or the like.

  Alternatively, the organic semiconductor materials listed for the material of the second semiconductor region 313 in Embodiment 3 may be used.

  Next, a second insulating layer 603 functioning as a gate insulating film is formed over the semiconductor region 602 and the first insulating layer 601. The second insulating layer 603 can be formed using a material and a manufacturing method similar to those of the first insulating layer 303 described in Embodiment 3.

  Next, a first conductive layer 604 functioning as a gate electrode is formed. The first conductive layer is formed using a material similar to that of the third conductive layer 302 described in Embodiment 3. As a manufacturing method, in addition to the steps shown in Embodiment Mode 3, an ICP etching apparatus may be used to form a conductive layer having a tapered end portion (tapered portion). The angle of the tapered portion (taper angle) is defined as the angle formed by the substrate surface (horizontal plane) and the inclined portion of the tapered portion. The taper angle of the conductive layer can be in the range of 5 to 45 degrees by appropriately selecting the etching conditions.

  Next, as shown in FIG. 6B, an impurity is added to the semiconductor region 602 using the first conductive layer 604 as a mask. Next, after an insulating film containing hydrogen is formed, the impurity element added to the semiconductor region is activated by heating at 400 to 550 ° C., and the semiconductor region is hydrogenated to form the impurity region (the source region and the source region). Drain regions) 611 and 612 are formed. Note that a GRTA method, an LRTA method, or a laser annealing method can be used as the activation or hydrogenation step instead of the heat treatment. In addition, when the semiconductor film is crystallized using a metal element that promotes crystallization, typically nickel, gettering can be performed simultaneously with activation.

  Note that although a single-gate TFT is shown in this embodiment mode, the present invention is not limited to this, and a multi-gate TFT may be used. Although a self-aligned TFT is shown, a TFT having a lightly doped drain (LDD) structure or a GOLD (Gate-drain Overlapped LDD) structure can be used. In the LDD structure, a region to which an impurity element is added at a low concentration is provided between a channel formation region and a source region or a drain region formed by adding an impurity element at a high concentration. It is called. A TFT having this structure can reduce an off-current value. The GOLD structure is a structure in which an LDD region is disposed so as to overlap with a gate electrode through a gate insulating film, and has an effect of relaxing an electric field near the drain and preventing deterioration due to hot carrier injection.

Next, a second insulating layer 613 is formed over the substrate. Examples of the material for the second insulating layer include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride and other inorganic insulating materials, acrylic acid, methacrylic acid and derivatives thereof, or polyimide ( Si-O among compounds composed of silicon, oxygen, and hydrogen formed from a heat-resistant polymer such as polyimide, aromatic polyamide, polybenzimidazole, or a siloxane polymer material typified by silica glass. -Inorganic siloxane polymers containing -Si bonds, alkylsiloxane polymers, alkylsilsesquioxane polymers, hydrogenated silsesquioxane polymers, hydrogen bonded to silicon represented by hydrogenated alkylsilsesquioxane polymers It is possible to use an insulating material of an organic siloxane polymer substituted by an organic group such as Le. As a forming method, a known method such as a CVD method, a coating method, or a printing method is used. Note that the surface of the second insulating layer can be planarized by a coating method typified by a spin coating method, a roll coating method, or a slot coating method, and a subsequent pixel electrode is formed. It is suitable for the process of forming the mask. Here, the second insulating layer 613 is formed by a coating method.

  Next, as illustrated in FIG. 6C, the second conductive layer 614 is formed over the second insulating layer 613. The second conductive layer 614 is formed using a material and a method similar to those of the first conductive layer 1002 described in Embodiment 1. Next, the first mask pattern 1003 is formed over the second conductive layer 614 using a material having low wettability, and then the second mask pattern 1004 is formed. Next, after the first mask pattern is removed to expose part of the second conductive layer 614, the second conductive layer 614 is etched using the second mask pattern, so that FIG. A third conductive layer 615 as shown in FIG. Next, part of the second insulating layer 613 and the first insulating layer 603 is removed by a photolithography process and an etching process, and part of the impurity regions 611 and 612 in the semiconductor region is exposed, so that openings are formed. 621 and 622 are formed.

  Next, as illustrated in FIG. 6E, fourth conductive layers 623 and 624 are formed in the openings. The fourth conductive layers 623 and 624 function as a source electrode and a drain electrode. One of the fourth conductive layers is connected to a third conductive layer 615 that functions as a pixel electrode.

  Through the above steps, an active matrix substrate of a display device can be manufactured with high yield.

(Embodiment 7)
In this embodiment mode, a droplet discharge apparatus that can be used for mask pattern formation in the above embodiment mode will be described. In FIG. 9, a region where one panel 1930 is formed on the substrate 1900 is indicated by a dotted line.

  FIG. 9 shows one mode of a droplet discharge device used for forming a pattern such as a wiring. The droplet discharge means 1905 has a head, and the head has a plurality of nozzles. In this embodiment, a case where three heads (1903a, 1903b, and 1903c) having ten nozzles are described will be described. However, the number of nozzles and the number of heads are set according to a processing area, a process, and the like. Can do.

The head is connected to the control means 1907, and the control means controls the computer 1910 to draw a preset pattern. The drawing timing may be performed using, for example, the marker 1911 formed on the substrate 1900 fixed on the stage 1931 as a reference point. Further, the edge of the substrate 1900 may be used as a reference point. These reference points are detected by an imaging means 1904 such as a CCD, and converted into a digital signal by an image processing means 1909. The computer 1910 recognizes the digitally changed signal, generates a control signal, and sends it to the control means 1907. When drawing a pattern in this way, the distance between the pattern forming surface and the tip of the nozzle is 0.1 to 5 cm, preferably 0.1 to 2 cm, and more preferably about 0.1 cm. By shortening the interval in this way, droplet landing accuracy is improved.

  At this time, information on the pattern formed on the substrate 1900 is stored in the storage medium 1908. Based on this information, a control signal is sent to the control means 1907, and each head 1903a, 1903b, 1903c is individually controlled. be able to. That is, droplets having different materials can be discharged from the nozzles of the heads 1903a, 1903b, and 1903c. For example, the nozzles of the heads 1903a and 1903b can discharge droplets having an insulating film material, and the nozzles of the head 1903c can discharge droplets having a conductive film material.

  Furthermore, each nozzle of the head can be individually controlled. Since the nozzles can be individually controlled, different compositions can be discharged from a specific nozzle. For example, a nozzle that discharges a composition having a conductive film material and a nozzle that discharges a composition having an insulating film material can be provided in the same head 1903a.

The nozzle is connected to a tank filled with the composition.

  In the case where a droplet discharge process is performed on a large area as in the step of forming an interlayer insulating film, a composition having an interlayer insulating film material is preferably discharged from all nozzles. Further, a composition having an interlayer insulating film material may be discharged from all nozzles of a plurality of heads. As a result, throughput can be improved. Needless to say, in the interlayer insulating film forming step, a droplet discharge treatment may be performed on a large area by discharging a composition having an interlayer insulating film material from one nozzle and performing a plurality of scans.

  Then, the pattern can be formed on the large mother glass by zigzaging or reciprocating the head. At this time, the head and the substrate may be relatively scanned a plurality of times. When scanning the head with respect to the substrate, the head may be inclined obliquely with respect to the traveling direction.

  In the case where a plurality of panels are formed from a large mother glass, the width of the head is preferably about the same as the width of one panel. This is because a pattern can be formed in one scan with respect to a region where one panel 1930 is formed, and high throughput can be expected.

  Further, the width of the head may be smaller than the width of the panel. At this time, a plurality of small heads may be arranged in series so as to be approximately the same as the width of one panel. By arranging a plurality of small heads in series, it is possible to prevent the occurrence of head deflection, which is a concern as the head width increases. Of course, the pattern may be formed by scanning a narrow head a plurality of times.

  The step of discharging the composition by such a droplet discharge method is preferably performed under reduced pressure. This is because the solvent of the composition evaporates and the steps of drying and firing the composition can be omitted before the composition is discharged and landed on the object to be processed. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. The step of dropping the composition may be performed in a nitrogen atmosphere or an organic gas atmosphere.

  A piezo method can be used as a droplet discharge method. The piezo method is also used in inkjet printers because of its excellent droplet controllability and high degree of freedom in ink selection. The piezo method includes a vendor type (typically MLP (Multi Layer Piezo) type), a piston type (typically MLChip (Multi Layer Ceramic Hyper Integrated Segments) type), a sidewall type, and a roof. There is a wall type. Further, depending on the solvent of the solution, a droplet discharge method using a thermal method in which the heating element generates heat to generate bubbles to push out the solution may be used.

  Here, a step of forming a conductive layer functioning as a pixel electrode using Embodiment Mode 1 will be described with reference to FIGS.

  As shown in FIG. 1A, a first conductive layer 1002 was formed over a glass substrate 1001 by a sputtering method. Here, ITO containing silicon oxide was formed as the first conductive layer.

Next, as shown in FIG. 1B, water-soluble polyvinyl alcohol (PVA) was discharged into a region between the pixel electrodes by a droplet discharge method. Thereafter, CF ₄ plasma was exposed to PVA to form a first mask pattern 1003 having low paintability.

  Next, as shown in FIG. 1C, a resist mainly composed of polyimide is applied by a droplet discharge method, and calcined at 50 to 150 degrees to form a second mask pattern 1004 having high wettability. did.

  Next, as shown in FIG. 1D, the substrate surface was washed with pure water, and the first mask pattern 1003 was removed. A top view at this time is shown in FIG. FIG. 7A is a diagram in which the upper surface of the substrate is photographed using an optical microscope, and FIG. 7B is a schematic diagram of FIG. 7A. It can be seen that the first mask pattern PVA is removed and the second mask pattern 701 is provided on the first conductive layer 702.

  Next, after the second mask pattern is fully baked at 160 to 250 degrees, a part of the first conductive layer is etched using the second mask pattern, so that the second conductive functioning as a pixel electrode is obtained. Layer 1006 was formed.

  Here, a step of forming a conductive layer functioning as a pixel electrode using Embodiment Mode 2 will be described with reference to FIGS.

  As shown in FIG. 2A, a first conductive layer 1002 was formed over a glass substrate 1001 by a sputtering method. Here, the first conductive layer was formed using ITO containing silicon oxide.

  Next, as shown in FIG. 2B, a fluorine silane coupling agent was discharged by a droplet discharge method into a region between the pixel electrodes. Thereafter, baking was performed at 50 to 150 degrees to fix the fluorine silane coupling agent to form a first mask pattern 1011 having low paintability.

  Next, as shown in FIG. 2C, a resist mainly composed of polyimide is applied by a droplet discharge method, and is baked at 160 to 250 degrees to form a second mask pattern 1012 having high wettability. .

  Next, as shown in FIG. 2D, the first mask pattern was removed by ashing using oxygen. A top view at this time is shown in FIG. FIG. 8A is a diagram in which the top surface of the substrate is photographed using an optical microscope, and FIG. 8B is a schematic diagram of FIG. 8A. It can be seen that the fluorine silane coupling agent which is the first mask pattern is removed, and the second mask pattern 711 is provided on the first conductive layer 712.

  Next, part of the first conductive layer was etched using the second mask pattern to form a second conductive layer 1014 functioning as a pixel electrode.

  Next, a method for manufacturing an active matrix substrate and a display panel having the active matrix substrate will be described with reference to FIGS. In this embodiment, a liquid crystal display panel is used as the display panel. FIG. 14 is a plan view of the active matrix substrate. FIGS. 10 to 13 schematically show longitudinal sectional structures corresponding to AB of the connection terminal portion and CD of the pixel portion. In this example, the second conductive layer is formed using Embodiment Mode 2, but the present invention is not limited to this, and Embodiment Mode 1 can be used.

  As shown in FIG. 10A, the surface of the substrate 800 is oxidized at 400 degrees to form an insulating film 801 having a thickness of 100 nm. This insulating film functions as an etching stopper film for a conductive film to be formed later. Next, a first conductive film is formed over the insulating film 801. Here, an AN100 glass substrate manufactured by Asahi Glass Co., Ltd. is used as the substrate 800, and indium tin oxide (ITO) containing silicon oxide with a thickness of 110 nm is formed as the first conductive layer 802 by a sputtering method.

  Next, a first mask pattern 803 is formed by a droplet discharge method. Next, a second mask pattern 804 is formed by a droplet discharge method. For the first mask pattern 803, a material with low wettability, here a composition in which a fluorine silane coupling agent is dissolved in an alcohol solvent, is discharged by a droplet discharge method. The second mask pattern 804 is formed by discharging polyimide by a droplet discharge method, heating and baking at 200 degrees for 30 minutes.

  Next, as shown in FIG. 10B, after the first mask pattern 803 is removed by ashing using oxygen, the first conductive layer 802 not covered with the second mask pattern 804 is etched. To remove. Next, the second mask pattern 804 is removed, and a second conductive layer 805 is formed.

  Next, as illustrated in FIG. 10C, a third conductive layer 806 is formed. As the material of the third conductive layer, Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Zr, Ba or other metals, or It forms using this metal nitride. The third conductive layer 806 is preferably formed using a conductive material that does not easily form an oxide in contact with the second conductive layer. As a method for forming the third conductive layer, a CVD method, a sputtering method, a vapor deposition method, or the like is appropriately used. Here, a tungsten film is formed as the third conductive layer 806 by a sputtering method.

  Next, as shown in FIG. 10D, third mask patterns 807 to 809 are formed. The third mask patterns 807 to 809 are discharged onto a gate wiring layer, a gate electrode layer, and a connection conductive layer that are formed later.

  Next, part of the third conductive layer 806 is etched using the third mask pattern, so that the gate wiring layer 811, the gate electrode layer 812, and the connection conductive layer 813 are formed. Thereafter, the third mask pattern is stripped using a stripping solution. Here, the third mask pattern is formed using polyimide as a third mask pattern by a droplet discharge method.

Next, as illustrated in FIG. 11A, a gate insulating film 814 is formed by a plasma CVD method. As the gate insulating film 814, a silicon oxynitride film having a thickness of 110 nm is formed by a plasma CVD method using SiH ₄ and N ₂ O (flow rate ratio SiH ₄ : N ₂ O = 1: 200) in a chamber heated at 400 ° C. (H: 1.8%, N: 2.6%, O: 63.9%, Si: 31.7%) are formed.

  Next, a first semiconductor film 815 and an n-type second semiconductor film 816 are formed. As the first semiconductor film 815, an amorphous silicon film with a thickness of 150 nm is formed by a plasma CVD method. Next, after removing the oxide film on the surface of the amorphous silicon film, a semi-amorphous silicon film having a thickness of 50 nm is formed as the second semiconductor film 816 using silane gas and phosphine gas.

  Next, fourth mask patterns 817 and 818 are formed over the second semiconductor film. Here, polyimide is discharged onto the second semiconductor film by a droplet discharge method, and heated at 200 degrees for 30 minutes to form a fourth mask pattern. The fourth mask patterns 817 and 818 are discharged onto a region where a first semiconductor region is formed later.

Next, as shown in FIG. 11B, the second semiconductor film 816 is etched using the fourth mask pattern to form first semiconductor regions (source and drain regions, contact layers) 821 and 822. Form. The second semiconductor film is etched using a mixed gas having a flow rate ratio of CF ₄ : O ₂ = 10: 9. Thereafter, the fourth mask patterns 817 and 818 are peeled using a peeling solution.

Next, a fifth mask pattern 823 is formed to cover the first semiconductor regions 821 and 822 and the first semiconductor film 815 formed therebetween. The fifth mask pattern is formed by the same material and method as the fourth mask pattern. The first semiconductor film 815 is etched using the fifth mask pattern to form a second semiconductor region 831 as shown in FIG. 11C and a part of the gate insulating film 814 is exposed. After the first semiconductor film is etched using a mixed gas having a flow rate ratio of CF ₄ : O ₂ = 10: 9, ashing using oxygen is performed. Thereafter, the fifth mask pattern 823 is peeled using a peeling solution.

  Next, as shown in FIG. 12A, a sixth mask pattern 832 is formed. The sixth mask pattern discharges a composition with low wettability to a region where the gate insulating film 814 and the connection conductive layer 813 overlap with each other and a connection terminal portion by a droplet discharge method. Here, a composition in which a fluorine silane coupling agent is dissolved in an alcohol solvent is used as the composition having low wettability. The sixth mask pattern 832 is a protective film for forming a seventh mask pattern used for forming a contact hole in a region where the drain electrode and the connection conductive layer 813 are connected later. The seventh mask pattern is also a protective film for exposing the conductive layer of the connection terminal portion.

  Next, a seventh mask pattern 833 is formed. The seventh mask pattern is a mask for forming the first contact hole, and is formed by discharging polyimide by a droplet discharge method and heating at 200 degrees for 30 minutes. At this time, since the sixth mask pattern 832 is formed of a material with low wettability and the seventh mask pattern 833 is formed of a material with high wettability, a region where the sixth mask pattern is formed In this case, the seventh mask pattern 833 is not formed.

Next, the sixth mask pattern 832 is removed by oxygen ashing to expose a part of the gate insulating film 814. Next, part of the exposed gate insulating film is etched using the seventh mask pattern 833. Here, the gate insulating film is etched using CHF ₃ . Thereafter, the seventh mask pattern is peeled off by oxygen ashing and etching using a peeling solution.

  Next, as shown in FIG. 12B, fourth conductive layers 841 and 842 are formed by a droplet discharge method. The fourth conductive layers 841 and 842 become a later source wiring layer and drain wiring layer. Here, the fourth conductive layer 841 is formed so as to be connected to the first semiconductor region 821, and the fourth conductive layer 842 is formed so as to be connected to the first semiconductor region 822 and the connection conductive layer 813. . Here, the fourth conductive layers 841 and 842 are ejected from a composition in which Ag (silver) particles are dispersed, heated at 100 ° C. for 30 minutes, dried, and then at 230 ° C. in an atmosphere having an oxygen concentration of 10%. Bake by heating for hours.

  The second conductive layer 805 is connected to the connection conductive layer 813. Since the connection conductive layer 813 is connected to the fourth conductive layer 842, the second conductive layer 805 and the fourth conductive layer 842 are electrically connected. In this embodiment, the fourth conductive layer 842 is formed of silver (Ag), and the second conductive layer 805 is formed of ITO containing silicon oxide, but these are not directly connected. Silver is not oxidized, and the second conductive layer 805 and the fourth conductive layer 842 can be electrically connected without increasing contact resistance.

  Through the above steps, an active matrix substrate can be formed. In addition, since the planar structure corresponding to the longitudinal cross-section structures AB and CD of FIG. 12 (B) is shown in FIG. 14, it refers simultaneously.

Next, as illustrated in FIG. 12C, a protective film 843 is formed. As the protective film, a silicon nitride film with a thickness of 100 nm is formed by a sputtering method using a silicon target and argon and nitrogen (flow ratio Ar: N ₂ = 1: 1) as a sputtering gas.

  Next, an insulating film is formed by a printing method or a spin coating method so as to cover the protective film 843, and an alignment film 872 is formed by rubbing. Note that the alignment film 872 can also be formed by oblique evaporation.

Next, as illustrated in FIG. 13A, a closed-loop sealant 873 is formed in a region around the pixel portion by a droplet discharge method. A liquid crystal material is dropped inside the closed loop formed by the sealant 873 by a dispenser type (dropping type).

  Here, a step of dropping the liquid crystal material is shown with reference to FIG. FIG. 15A is a perspective view of a step of dropping a liquid crystal material by a dispenser 2701, and FIG. 15B is a cross-sectional view taken along line AB of FIG. 15A.

  A liquid crystal material 2704 is dropped or discharged from the dispenser 2701 so as to cover the pixel portion 2703 surrounded by the sealant 2702. The dispenser 2701 may be moved, or the liquid crystal layer can be formed by fixing the dispenser 2701 and moving the substrate 2700. Alternatively, a plurality of dispensers 2701 may be provided, and a liquid crystal material may be dropped on a plurality of pixel portions at the same time.

  As shown in FIG. 15B, the liquid crystal material 2704 can be selectively discharged only to a region surrounded by the sealant 2702.

  Next, as shown in FIG. 13A, in a vacuum, the counter substrate 881 provided with the alignment film 883 and the second pixel electrode (counter electrode) 882 is bonded to the active matrix substrate, and ultraviolet curing is performed. A liquid crystal layer 884 filled with a liquid crystal material is formed.

  The sealant 873 may be mixed with a filler, and the counter substrate 881 may be formed with a color filter, a shielding film (black matrix), or the like. Further, as a method for forming the liquid crystal layer 884, a dip type (pumping type) in which a liquid crystal material is injected using a capillary phenomenon after the counter substrate is bonded can be used instead of the dispenser type (dropping type).

Although the liquid crystal material is dropped on the pixel portion here, the substrate having the pixel portion may be attached after the liquid crystal material is dropped on the counter substrate side.

  Next, as shown in FIG. 13B, in the case where an insulating film is formed on each end of the gate wiring layer 811 and the source wiring layer (not shown), the conductive film is removed after removing the insulating film. An FPC (FPC 886 connected to the gate wiring layer and connection terminals connected to the source wiring layer are not shown) is attached via 885. Furthermore, it is preferable that the connection portion between each wiring layer and the connection terminal is sealed with a sealing resin. With this structure, it is possible to prevent moisture from the cross section from entering the pixel portion and deteriorating. Through the above process, a liquid crystal display panel can be formed.

  Through the above process, a liquid crystal display panel can be manufactured. Note that a protection circuit for preventing electrostatic breakdown, typically a diode or the like, may be provided between the FPC and the source wiring (gate wiring) or in the pixel portion. In this case, it is possible to prevent electrostatic breakdown by manufacturing in the same process as the above TFT and connecting the gate wiring layer of the pixel portion and the drain or source wiring layer of the diode.

  Note that any of Embodiment Modes 1 to 7 can be applied to this example.

  In this embodiment, a method for manufacturing a light-emitting display panel as a display panel will be described with reference to FIGS. The planar structure of the pixel portion is shown in FIG. 19, and FIGS. 17 and 18 schematically show the longitudinal sectional structures corresponding to AB and CD of the pixel portion in FIG. In this example, the first conductive layer is formed using the second embodiment, but the present invention is not limited to this, and the first embodiment can be used.

  As shown in FIG. 17A, a first insulating layer 2002 is formed with a thickness of 100 to 1000 nm over a substrate 2001. Here, the first insulating layer is formed by stacking a silicon oxide film with a thickness of 100 nm using a plasma CVD method and a silicon oxide film with a thickness of 480 nm using a low pressure thermal CVD method.

  Next, an amorphous semiconductor film is formed with a thickness of 10 to 100 nm. Here, an amorphous silicon film with a thickness of 50 nm is formed by using a low pressure thermal CVD method. Next, this amorphous semiconductor film is crystallized. In this embodiment, the amorphous silicon film is irradiated with laser light to form a crystalline silicon film. Next, unnecessary portions of the crystalline silicon film are removed, and semiconductor regions 2003 and 2004 are formed. Next, a second insulating layer 2005 which functions as a gate insulating film is formed. Here, a silicon oxide film is formed as the second insulating layer 2005 by a CVD method.

Next, a channel doping process in which a p-type or n-type impurity element is added at a low concentration in a region to be a channel region of the TFT is performed over the entire surface or selectively. This channel doping process is a process for controlling the TFT threshold voltage. Here, boron is added by an ion doping method in which diborane (B ₂ H ₆ ) is plasma-excited without mass separation. Of course, an ion implantation method that performs mass separation may be used.

  Next, a first conductive layer is formed, and patterning and etching are performed to form second conductive layers 2006 to 2008 that function as gate electrodes, and a second conductive layer 2009 that functions as a capacitor wiring. Here, a sputtering method is used as the second conductive layers 2006 to 2009, and a conductive film formed by stacking a TaN film and a W film is formed.

Next, phosphorus is added to the semiconductor region in a self-aligning manner using the second conductive layers 2006 to 2009 as a mask, so that the low concentration impurity regions 2010a, 2011a, 2011b, 2012a, 2013a, 2013b, and 2014a and the high concentration impurity region 2010 are added. 2014 is formed. The concentration of phosphorus in the low concentration impurity region is 1 × 10 ^{16 to} 5 × 10 ¹⁸ atoms / cm ³ (typically 3 × 10 ^{17 to} 3 × 10 ¹⁸ atoms / cm ³ ). The concentration is adjusted to 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ (typically 2 × 10 ^{20 to} 5 × 10 ²⁰ atoms / cm ³ ). Note that, of the semiconductor regions 2003 and 2004, a region overlapping with the second conductive layers 2006 to 2008 is a channel formation region.

  Next, a third insulating layer 2015 that covers the second conductive layers 2006 to 2009 is formed. Here, an insulating film containing hydrogen is formed. Thereafter, the impurity element added to the semiconductor region is activated and the semiconductor region is hydrogenated. Here, a silicon nitride oxide film (SiNO film) obtained by a PCVD method is used as the insulating film containing hydrogen.

  Next, an opening reaching the semiconductor region is formed, and then a third conductive layer is formed. As the third conductive layer, a source wiring 2021, a first connection wiring 2022, a power supply line 2023, and a second connection wiring 2024 are formed. In this embodiment, a Ti film, an aluminum film containing 1 to 20% nickel, and a laminated film having a three-layer structure in which a Ti film is continuously formed by sputtering are formed, and then etched into a desired shape. A third conductive layer is formed.

  Next, as illustrated in FIG. 17B, a fourth insulating layer 2031 is formed. As the fourth insulating layer, an insulating layer that can be planarized is preferable. Insulating layers that can be planarized include inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, etc.), photosensitive or non-photosensitive organic materials (polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene). Is formed by coating. Moreover, it can also be set as these laminated structures. In addition, as other films used for the planarization film, an insulating film made of a SiOx film containing an alkyl group obtained by a coating method, for example, an inorganic siloxane polymer represented by silica glass, an alkylsiloxane polymer, an alkylsilsesquioxane polymer An insulating film formed using an organosiloxane polymer typified by hydrogenated silsesquioxane polymer, hydrogenated alkylsilsesquioxane polymer, or the like can be used. Examples of the siloxane polymer include PSB-K1 and PSB-K31, which are Toray-made coating insulating film materials, and ZRS-5PH, which is a catalytic conversion coating insulating film material. Here, an acrylic resin film is formed. Note that as the fourth insulating layer, an organic material obtained by dissolving or dispersing a material that absorbs visible light, such as a black pigment or a dye, is used, so that the stray light absorption of a light-emitting element to be formed later can be reduced. It is absorbed by the layer, and the contrast of each pixel can be improved.

  Next, an opening is provided in the fourth insulating layer by known photolithography and etching in the fourth insulating layer, and a part of the semiconductor region 2004 (high concentration impurity region) is exposed. Next, a fourth conductive layer 2032 is formed. The fourth conductive layer 2032 is formed by stacking a reflective conductive film and a transparent conductive film. Here, an aluminum film containing 1 to 20% nickel and ITO containing silicon oxide are stacked by a sputtering method. Note that aluminum containing 1 to 20% nickel is preferable because it does not corrode even in contact with ITO which is an oxide.

  Next, a first mask pattern 2033 is formed by a droplet discharge method. Next, a second mask pattern 2034 is formed by a droplet discharge method. The first mask pattern 2033 is formed by discharging a material with low wettability, here a composition in which a fluorine silane coupling agent is dissolved in an alcohol solvent by a droplet discharge method. The second mask pattern 2034 is formed by discharging polyimide by a droplet discharge method, heating and baking at 200 degrees 30 minutes.

  Next, as shown in FIG. 18A, after the first mask pattern 2033 is removed by ashing using oxygen, the fourth conductive layer 2032 not covered with the second mask pattern 2034 is etched. To remove. Next, the second mask pattern 2034 is removed, and a fifth conductive layer 2035 is formed. The fifth conductive layer 2035 functions as a first pixel electrode.

  Next, a fifth insulating layer 2041 serving as a partition wall (also referred to as a bank, a barrier, or a bank) is formed so as to cover an end portion of the fifth conductive layer 2035. The fifth insulating layer is made of a photosensitive or non-photosensitive organic material (polyimide, acrylic, polyamide, polyimide amide, resist or benzocyclobutene), or an SOG film (for example, an SiOx film containing an alkyl group). Used in the range of 8 μm to 1 μm. The fifth insulating layer 2041 is preferably formed using a photosensitive material because the side surface has a shape in which the radius of curvature continuously changes and the upper thin film is formed without being cut off.

  Alternatively, the fifth insulating layer 2041 may be an insulating material that dissolves or disperses a material that absorbs visible light, such as a dye or a black pigment, in the organic material, and has a light shielding property. For example, a material such as COLOR MOSAIC CK (trade name) manufactured by Fuji Film Olin is used. In this case, since the fifth insulating layer functions as a black matrix, it can absorb stray light from a light-emitting element to be formed later. As a result, the contrast of each element is improved. Further, by providing the fourth insulating layer 2031 using an insulator having a light-blocking property, a total light-blocking effect with the fifth insulating layer 2041 can be obtained.

  Next, a layer 2042 containing a light-emitting substance is formed over the surface of the fifth conductive layer 2035 and the end portion of the fifth insulating layer 2041 by an evaporation method, a coating method, a droplet discharge method, or the like. After that, a sixth conductive layer 2043 functioning as a second pixel electrode is formed over the layer 2042 containing a light-emitting substance. Here, ITO containing silicon oxide is formed by a sputtering method. As a result, a light-emitting element can be formed using the fifth conductive layer 2035, the layer 2042 containing a light-emitting substance, and the sixth conductive layer 2043. The materials of the conductive layer and the layer containing a light-emitting substance that constitute the light-emitting element are appropriately selected, and the thicknesses of the layers are also adjusted.

  Note that before the layer 2042 containing a light-emitting substance is formed, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in or on the surface of the fifth insulating layer 2041. Further, heat treatment is performed at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and the layer 2042 containing a light-emitting substance is formed by a vacuum evaporation method or a droplet discharge method under reduced pressure without being exposed to the air as it is. Is preferred.

  The layer 2042 containing a light-emitting substance is formed of a charge injecting and transporting substance containing an organic compound or an inorganic compound and a light-emitting material, and is based on the number of molecules thereof. One or a plurality of layers selected from organic compounds may be included and combined with an inorganic compound having electron injection / transport properties or hole injection / transport properties.

Among the charge injecting and transporting materials, materials having a particularly high electron transporting property include, for example, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (5-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), quinoline skeleton or benzoquinoline Examples thereof include metal complexes having a skeleton.

As a substance having a high hole-transport property, for example, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD) or 4,4′-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: Aromatic amines (ie, benzene ring-nitrogen) such as TDATA), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) And a compound having a bond of

Among the charge injecting and transporting materials, materials having particularly high electron injecting properties include alkali metals or alkaline earths such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF ₂ ) and the like. Metal compounds can be mentioned. In addition, a mixture of a substance having a high electron transport property such as Alq ₃ and an alkaline earth metal such as magnesium (Mg) may be used.

Among the charge injecting and transporting materials, materials having a high hole injecting property include, for example, molybdenum oxide (MoO _x ), vanadium oxide (VO _x ), ruthenium oxide (RuO _x ), and tungsten oxide (WO _x ). And metal oxides such as manganese oxide (MnO _x ). In addition, phthalocyanine compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPc) can be given.

  The light emitting layer may be configured to perform color display by forming light emitting layers having different emission wavelength bands for each pixel. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, by providing a filter (colored layer) that transmits light in the emission wavelength band on the light emission side of the pixel, the color purity is improved and the pixel portion is mirrored (reflected). Prevention can be achieved. By providing a filter (colored layer) on the light emission side of the pixel, it is possible to omit a circularly polarized plate, which has been considered necessary in the past, and to eliminate the loss of light emitted from the light emitting layer. . Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

There are various materials for the light emitting material forming the light emitting layer. As a low-molecular organic light-emitting material, 4- (dicyanomethylene) 2-methyl-6- [2- (1,1,7,7-tetramethyljulolidin-9-yl) ethenyl] -4H-pyran (abbreviation: DCJT) ), 4-dicyanomethylene-2-t-butyl-6- [2- (1,1,7,7-tetramethyljulolidin-9-yl) ethenyl)]-4H-pyran (abbreviation: DCJTB), perifuranthene 2,5-dicyano-1,4-bis [2- (10-methoxy-1,1,7,7-tetramethyljulolidin-9-yl) ethenyl] benzene, N, N′-dimethylquinacridone (abbreviation) : DMQd), coumarin 6, coumarin 545T, tris (8-quinolinolato) aluminum (abbreviation: Alq _3), 9,9'-bianthryl, 9,10-diphenyl anthracene (abbreviation: DPA And 9,10-di (2-naphthyl) anthracene (abbreviation: DNA), or the like can be used. Other substances may also be used.

  On the other hand, the high molecular organic light emitting material has higher physical strength than the low molecular weight, and the durability of the device is high. In addition, since a film can be formed by a coating method, the device can be manufactured relatively easily. The structure of the light-emitting element using the high-molecular organic light-emitting material is basically the same as that when the low-molecular organic light-emitting material is used. However, when forming a layer containing a light-emitting substance using a polymer organic light-emitting material, it is difficult to form a laminated structure as in the case of using a low-molecular organic light-emitting material. Become. Specifically, the structure is a cathode, a light emitting layer, a hole transport layer, and an anode.

  Since the light emission color is determined by the material for forming the light emitting layer, a light emitting element exhibiting desired light emission can be formed by selecting these materials. Examples of the polymer light-emitting material that can be used for forming the light-emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

  Examples of the polyparaphenylene vinylene light-emitting material include poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2 ′ -Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like. The polyparaphenylene light-emitting material includes polyparaphenylene [PPP] derivatives, poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4- Phenylene) and the like. Polythiophene light-emitting materials include polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3- Cyclohexyl-4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) ) -2,2 bithiophene] [PTOPT] and the like. Examples of the polyfluorene light-emitting material include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  Note that when a hole-transporting polymer organic light-emitting material is sandwiched and formed between the anode and the light-emitting polymer organic light-emitting material, the hole injection property from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting material. Examples of the hole-transporting polymer organic light-emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like.

  The light emitting layer can be configured to emit monochromatic or white light. In the case of using a white light emitting material, color display can be made possible by providing a filter (colored layer) that transmits light of a specific wavelength on the light emission side of the pixel.

To form a light emitting layer that emits white light, for example, Alq _3, Alq ₃ partially doped with Nile red that is a red light emitting pigment, p-EtTAZ, TPD (aromatic diamine) are sequentially stacked by a vapor deposition method Thus, white can be obtained. Moreover, when forming a light emitting layer by the apply | coating method using spin coating, after apply | coating, it is preferable to bake by vacuum heating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) that acts as a hole injection layer is applied and baked on the entire surface, and then a luminescent center dye (1, 1,4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile Red, Coumarin 6 Etc.) may be applied and fired on the entire surface.

  The light emitting layer can also be formed as a single layer, and an electron transporting 1,3,4-oxadiazole derivative (PBD) may be dispersed in hole transporting polyvinyl carbazole (PVK). Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red). In addition to the light-emitting element that can emit white light as shown here, a light-emitting element that can obtain red light emission, green light emission, or blue light emission can be manufactured by appropriately selecting the material of the light-emitting layer.

  Furthermore, a triplet excitation material containing a metal complex or the like may be used for the light emitting layer in addition to a singlet excitation light emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, A light-emitting pixel is formed using a singlet excitation light-emitting material. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when a triplet excitation material is applied to a red pixel, the amount of current flowing through the light-emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using metal complexes as dopants, and metal complexes having platinum as the central metal of the third transition sequence element and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  The substances forming the layer containing the light-emitting substance listed above are examples, such as a hole injecting and transporting layer, a hole transporting layer, an electron injecting and transporting layer, an electron transporting layer, a light emitting layer, an electron blocking layer, and a hole blocking layer. A light-emitting element can be formed by appropriately stacking functional layers. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, it is possible to provide a modification with an electrode for this purpose or a dispersed light-emitting material. Can be permitted without departing from the spirit of the present invention.

  A light-emitting element formed using the above materials emits light by being forward-biased. A pixel of a display device formed using a light-emitting element can be driven by a simple matrix method or an active matrix method. In any case, each pixel emits light by applying a forward bias at a specific timing, but is in a non-light emitting state for a certain period. By applying a reverse bias during this non-light emitting time, the reliability of the light emitting element can be improved. The light emitting element has a degradation mode in which the light emission intensity decreases under a constant driving condition and a degradation mode in which the non-light emitting area is enlarged in the pixel and the luminance is apparently decreased. However, alternating current that applies a bias in the forward and reverse directions. By performing a typical drive, the progress of deterioration can be slowed and the reliability of the light emitting device can be improved.

  Next, a transparent protective layer 2044 that covers the light-emitting element and prevents moisture from entering is formed. As the transparent protective layer 2044, a silicon nitride film, a silicon oxide film, a silicon oxynitride film (SiNO film (composition ratio N> O) or SiON film (composition ratio N <O)) obtained by sputtering or CVD, carbon A thin film (for example, a DLC film or a CN film) whose main component is can be used.

  Through the above process, a light-emitting display panel can be manufactured. Note that a protective circuit for preventing electrostatic breakdown, typically a diode or the like, may be provided between the connection terminal and the source wiring layer (gate wiring layer) or in the pixel portion. In this case, electrostatic breakdown can be prevented by manufacturing the TFT in the same process as the above-described TFT and connecting the gate wiring layer of the pixel portion and the drain wiring layer or source wiring layer of the diode.

  Note that any of Embodiment Modes 1 to 7 can be applied to this example. In addition, the liquid crystal display panel and the light emitting display panel have been described as examples in the third and fourth embodiments as the display panel, but the present invention is not limited to this, and DMD (Digital Micromirror Device) The present invention can be appropriately applied to an active display panel such as a plasma display panel (PDP), a field emission display (FED), or an electrophoretic display device (electronic paper).

  A mode of a light-emitting element applicable in the above embodiment will be described with reference to FIGS.

  FIG. 20A shows an example in which the first pixel electrode 11 is formed of a light-transmitting oxide conductive material. The first pixel electrode 11 is formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. Yes. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 is formed of a first electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or MgAg and a second electrode layer 34 formed of a metal material such as aluminum. A pixel having this structure can emit light from the first pixel electrode 11 side as indicated by an arrow in the drawing.

  FIG. 20B shows an example in which light is emitted from the second pixel electrode 17, and the first pixel electrode 11 is made of a metal such as aluminum or titanium, or nitrogen at a concentration less than the stoichiometric composition ratio with the metal. And a second electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. A layer 16 containing a light emitting material in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second pixel electrode 17 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF and a fourth electrode layer 34 formed of a metal material such as aluminum. By setting the layer to a thickness of 100 nm or less and allowing light to pass therethrough, light can be emitted from the second pixel electrode 17.

  FIG. 20E illustrates an example in which light is emitted from both directions, that is, the first pixel electrode and the second pixel electrode, and the first pixel electrode 11 has a light-transmitting property and has a high work function. A film is used, and a conductive film having translucency and a low work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 is formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%, and the second pixel electrode 17 is formed of LiF having a thickness of 100 nm or less. Alternatively, the third electrode layer 33 containing an alkali metal or alkaline earth metal such as CaF or the like and the fourth electrode layer 34 formed of a metal material such as aluminum may be used.

  FIG. 20C shows an example in which light is emitted from the first pixel electrode 11, and a layer containing a light-emitting substance is an electron transport layer or electron injection layer 43, a light emitting layer 42, a hole injection layer or hole transport. A configuration in which the layers 41 are stacked in this order is shown. The second pixel electrode 17 includes a second electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic% from the side of the layer 16 containing a light emitting substance, a metal such as aluminum or titanium, Alternatively, the first electrode layer 35 is formed using a metal material containing nitrogen at a concentration equal to or less than the stoichiometric composition ratio to the metal. The first pixel electrode 11 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF and a fourth electrode layer 34 formed of a metal material such as aluminum. By setting the layer to a thickness of 100 nm or less and allowing light to pass therethrough, light can be emitted from the first pixel electrode 11.

  FIG. 20D shows an example in which light is emitted from the second pixel electrode 17, and the layer 16 containing a light-emitting substance is formed as an electron transport layer or an electron injection layer 43, a light emitting layer 42, a hole injection layer or a hole. The structure which laminated | stacked the order of the transport layer 41 is shown. The first pixel electrode 11 has the same structure as that in FIG. 20A, and is formed to have a thickness enough to reflect light emitted from the layer 16 containing a light-emitting substance. The second pixel electrode 17 is made of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. In this structure, by forming the hole injection layer 41 with an inorganic metal oxide (typically molybdenum oxide or vanadium oxide), oxygen introduced when forming the second pixel electrode layer 17 is reduced. By being supplied, the hole injection property is improved and the driving voltage can be lowered.

  FIG. 20F illustrates an example in which light is emitted from both directions, that is, the first pixel electrode and the second pixel electrode, and the first pixel electrode 11 has a light-transmitting property and has a small work function. A film is used, and a conductive film having translucency and a large work function is used for the second pixel electrode 17. Typically, the first pixel electrode 11 is formed of a third electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF having a thickness of 100 nm or less and a metal material such as aluminum. And the second pixel electrode 17 may be formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%.

  An equivalent circuit diagram of a pixel of the light-emitting display panel described in the above embodiment and an operation configuration thereof will be described with reference to FIGS. There are two types of operation configurations of the light-emitting display panel, in which a video signal input to a pixel is defined by voltage and a current is defined by current in a display device in which a video signal is digital. There are two types of video signals defined by voltage, one having a constant voltage applied to the light emitting element (CVCV) and one having a constant current applied to the light emitting element (CVCC). In addition, a video signal is defined by current, there are a constant voltage applied to the light emitting element (CCCV) and a constant current applied to the light emitting element (CCCC). In this embodiment, a pixel that performs a CVCV operation will be described with reference to FIGS. A pixel that performs the CVCC operation will be described with reference to FIGS.

  In the pixel shown in FIGS. 21A and 21B, a signal line 3710 and a power supply line 3711 are arranged in the column direction, and a scanning line 3714 is arranged in the row direction. In addition, the pixel includes a switching TFT 3701, a driving TFT 3703, a capacitor element 3702, and a light emitting element 3705.

  Note that the switching TFT 3701 and the driving TFT 3703 operate in a linear region when turned on. The driving TFT 3703 has a role of controlling whether or not a voltage is applied to the light emitting element 3705. Both TFTs preferably have the same conductivity type in terms of manufacturing process. In this embodiment, the TFTs are formed as p-channel TFTs. The driving TFT 3703 may be a depletion type TFT as well as an enhancement type. The ratio (W / L) of the channel width W to the channel length L (W / L) of the driving TFT 3703 is preferably 1 to 1000 depending on the mobility of the TFT. The larger the W / L, the better the electrical characteristics of the TFT.

  In the pixels shown in FIGS. 21A and 21B, the switching TFT 3701 controls input of a video signal to the pixel. When the switching TFT 3701 is turned on, the video signal is input into the pixel. Then, the voltage of the video signal is held in the capacitor 3702.

  In FIG. 21A, when the power supply line 3711 is Vss and the counter electrode of the light emitting element 3705 is Vdd, that is, in FIGS. 20C and 20D, the counter electrode of the light emitting element is an anode, and the driving TFT 3703 The electrode connected to is a cathode. In this case, luminance unevenness due to characteristic variations of the driving TFT 3703 can be suppressed.

  In FIG. 21A, when the power supply line 3711 is Vdd and the counter electrode of the light emitting element 3705 is Vss, that is, in FIGS. 20A and 20B, the counter electrode of the light emitting element is a cathode, and the driving TFT 3703 The electrode connected to is the anode. In this case, when a video signal having a voltage higher than Vdd is input to the signal line 3710, the voltage of the video signal is held in the capacitor 3702, and the driving TFT 3703 operates in a linear region. It is possible to improve.

  The pixel shown in FIG. 21B has the same pixel structure as that shown in FIG. 21A except that a TFT 3706 and a scanning line 3715 are added.

  The TFT 3706 is controlled to be turned on or off by a newly arranged scanning line 3715. When the TFT 3706 is turned on, the charge held in the capacitor 3702 is discharged, and the TFT 3703 is turned off. That is, the arrangement of the TFT 3706 can forcibly create a state in which no current flows through the light emitting element 3705. Therefore, the TFT 3706 can be called an erasing TFT. Accordingly, the structure in FIG. 21B can improve the light emission duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. Is possible.

  In the pixel having the above operation configuration, the current value of the light-emitting element 3705 can be determined by the driving TFT 3703 that operates in a linear region. With the above structure, variation in TFT characteristics can be suppressed, and luminance unevenness of a light-emitting element due to variation in TFT characteristics can be improved, so that a display device with improved image quality can be provided.

  Next, a pixel that performs the CVCC operation will be described with reference to FIGS. In the pixel illustrated in FIG. 21C, a power supply line 3712 and a current control TFT 3704 are provided in the pixel configuration illustrated in FIG.

  The pixel shown in FIG. 21E is the same as the pixel shown in FIG. 21C except that the gate electrode of the driving TFT 3703 is connected to the power supply line 3712 arranged in the row direction. It is a configuration. That is, both pixels shown in FIGS. 21C and 21E show the same equivalent circuit diagram. However, in the case where the power supply line 3712 is arranged in the column direction (FIG. 21C) and in the case where the power supply line 3712 is arranged in the row direction (FIG. 21E), each power supply line has a different layer. It is formed of a conductive film. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 3703 is connected, and FIGS. 21C and 21E are shown separately to show that the layers for producing these are different.

  Note that the switching TFT 3701 operates in a linear region, and the driving TFT 3703 operates in a saturation region. The driving TFT 3703 has a role of controlling a current value flowing through the light emitting element 3705, and the current controlling TFT 3704 has a role of operating in a saturation region and controlling supply of current to the light emitting element 3705.

  The pixels shown in FIGS. 21D and 21F are the same as those shown in FIGS. 21C and 21E except that an erasing TFT 3706 and a scanning line 3715 are added. The pixel configuration is the same as that shown in E).

Note that the CVCC operation can be performed even in the pixels shown in FIGS. In addition, in the pixel having the operation configuration shown in FIGS. 21C to 21F, Vdd and Vss are changed as appropriate depending on the direction in which the current of the light-emitting element flows, as in FIGS. 21A and 21B. Is possible.

  In the pixel having the above structure, since the current control TFT 3704 operates in a linear region, a slight change in Vgs of the current control TFT 3704 does not affect the current value of the light emitting element 3705. That is, the current value of the light emitting element 3705 can be determined by the driving TFT 3703 operating in the saturation region. With the above structure, it is possible to provide a display device in which luminance unevenness of a light-emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In particular, in the case of forming a thin film transistor having an amorphous semiconductor or the like, it is preferable to increase the area of the semiconductor film of the driving TFT because the variation of the TFT can be reduced. Therefore, the pixel shown in FIGS. 21A and 21B can increase the aperture ratio because the number of TFTs is small.

  Note that although a structure including the capacitor 3702 is shown, the present invention is not limited to this, and the capacitor 3702 is not provided in the case where the capacity for holding a video signal can be covered by a gate capacitor or the like. May be.

  In addition, when the semiconductor region of the thin film transistor is formed using an amorphous semiconductor film, a threshold value is likely to shift. Therefore, it is preferable to provide a circuit for correcting the threshold value in or around the pixel.

  Such an active matrix light-emitting device is considered to be advantageous because it can be driven at a low voltage because a TFT is provided in each pixel when the pixel density is increased. On the other hand, a passive matrix light-emitting device in which a TFT is provided for each column can be formed. A passive matrix light-emitting device has a high aperture ratio because a TFT is not provided for each pixel.

  In the display device of the present invention, the screen display driving method is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the display device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

  As described above, various pixel circuits can be employed.

  In this embodiment, mounting of a driver circuit on the display panel described in the above embodiment will be described with reference to FIGS.

  As shown in FIG. 23A, a signal line driver circuit 1402 and scan line driver circuits 1403a and 1403b are mounted around the pixel portion 1401. In FIG. 23A, as a signal line driver circuit 1402 and scan line driver circuits 1403a and 1403b, a mounting method using a known anisotropic conductive adhesive and anisotropic conductive film, a COG method, wire bonding, and the like. The IC chip 1405 is mounted on the substrate 1400 by a method, a reflow process using a solder bump, or the like. Here, the COG method is used. Then, an IC chip and an external circuit are connected via an FPC (flexible printed circuit) 1406.

  As shown in FIG. 23B, in the case where a TFT is formed using a SAS or a crystalline semiconductor, the pixel portion 1401 and the scan line driver circuits 1403a and 1403b are integrally formed over the substrate, and the signal line driver circuit 1402 and the like are formed. May be separately mounted as an IC chip. In FIG. 23B, an IC chip 1405 is mounted on a substrate 1400 as a signal line driver circuit 1402 by a COG method. Then, the IC chip and an external circuit are connected through the FPC 1406.

  Further, as shown in FIG. 23C, the signal line driver circuit 1402 and the like may be mounted by a TAB method instead of the COG method. Then, the IC chip and an external circuit are connected through the FPC 1406. In FIG. 23C, the signal line driver circuit is mounted by a TAB method; however, the scan line driver circuit may be mounted by a TAB method.

  When the IC chip is mounted by the TAB method, a pixel portion can be provided larger than the substrate, and a narrow frame can be achieved.

  The IC chip is formed using a silicon wafer, but an IC (hereinafter referred to as a driver IC) in which a circuit is formed on a glass substrate may be provided instead of the IC chip. Since an IC chip is taken out from a circular silicon wafer, the shape of the base substrate is limited. On the other hand, the driver IC has a mother substrate made of glass and has no restriction in shape, so that productivity can be improved. Therefore, the shape of the driver IC can be set freely. For example, when the length of the long side of the driver IC is 15 to 80 mm, the required number can be reduced as compared with the case where the IC chip is mounted. As a result, the number of connection terminals can be reduced, and the manufacturing yield can be improved.

  The driver IC can be formed using a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiation with continuous wave laser light. A semiconductor film obtained by irradiation with continuous wave laser light has few crystal defects and large crystal grains. As a result, a transistor having such a semiconductor film has favorable mobility and response speed, can be driven at high speed, and is suitable for a driver IC.

  In this embodiment, a display module will be described. Here, a liquid crystal module is shown as an example of a display module with reference to FIG.

  An active matrix substrate 1601 and a counter substrate 1602 are fixed to each other with a sealant 1600, and a pixel portion 1603 and a liquid crystal layer 1604 are provided therebetween to form a display region.

  The colored layer 1605 is necessary when performing color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. Polarizers 1606 and 1607 are disposed outside the active matrix substrate 1601 and the counter substrate 1602. In addition, a protective film 1616 is formed on the surface of the polarizing plate 1606 to reduce external impact.

  A wiring board 1610 is connected to a connection terminal 1608 provided on the active matrix substrate 1601 through an FPC 1609. A pixel driving circuit (IC chip, driver IC, or the like) 1611 is provided in the FPC or connection wiring, and an external circuit 1612 such as a control circuit or a power supply circuit is incorporated in the wiring substrate 1610.

  The cold cathode tube 1613, the reflecting plate 1614, and the optical film 1615 are backlight units, which serve as light sources and project light onto the liquid crystal display panel. A liquid crystal panel, a light source, a wiring board, an FPC, and the like are held and protected by a bezel 1617.

  Note that any of Embodiment Modes 1 to 7 can be applied to this example.

  In this embodiment, as an example of a display module, the appearance of a light-emitting display module will be described with reference to FIG. FIG. 22A is a top view of a panel in which a space between the first substrate and the second substrate is sealed with the first sealant 1205 and the second sealant, and FIG. Corresponds to a cross-sectional view taken along the line AA ′ of FIG.

  In FIG. 22A, 1201 indicated by a dotted line is a signal line (source line) driver circuit, 1202 is a pixel portion, and 1203 is a scanning line (gate line) driver circuit. In this embodiment, the signal line driver circuit 1201, the pixel portion 1202, and the scanning line driver circuit 1203 are in a region sealed with a first sealant and a second sealant. As the first sealing material, it is preferable to use a highly viscous epoxy resin containing a filler. As the second sealing material, it is preferable to use an epoxy resin having a low viscosity. In addition, the first sealing material 1205 and the second sealing material are desirably materials that do not transmit moisture and oxygen as much as possible.

Further, a desiccant may be provided between the pixel portion 1202 and the first sealant 1205. Further, in the pixel portion, a desiccant may be provided on the scan line or the signal line. As the desiccant, it is preferable to use a substance that adsorbs water (H ₂ O) by chemical adsorption such as an oxide of an alkaline earth metal such as calcium oxide (CaO) or barium oxide (BaO). However, the present invention is not limited to this, and a substance that adsorbs water by physical adsorption such as zeolite or silica gel may be used.

  In addition, the resin can be fixed to the second substrate 1204 in a state where a highly moisture-permeable resin contains a granular material of a desiccant. Here, examples of the highly moisture-permeable resin include acrylic resins such as ester acrylate, ether acrylate, ester urethane acrylate, ether urethane acrylate, butadiene urethane acrylate, special urethane acrylate, epoxy acrylate, amino resin acrylate, and acrylic resin acrylate. Can be used. In addition, bisphenol A type liquid resin, bisphenol A type solid resin, bromine-containing epoxy resin, bisphenol F type resin, bisphenol AD type resin, phenol type resin, cresol type resin, novolac type resin, cyclic aliphatic epoxy resin, epibis type Epoxy resins such as epoxy resins, glycidyl ester resins, glycidylamine resins, heterocyclic epoxy resins, and modified epoxy resins can be used. Further, other substances may be used. Further, for example, inorganic substances such as siloxane polymer, polyimide, PSG (phosphorus glass), BPSG (phosphorus boron glass), and the like may be used.

  By providing the desiccant in a region that overlaps the scanning line, and fixing it to the second substrate in a state where the particulate material of the desiccant is included in a highly permeable resin, the aperture ratio is not reduced. In addition, it is possible to suppress the intrusion of moisture into the display element and the deterioration caused thereby.

  Note that reference numeral 1210 denotes a connection wiring for transmitting signals input to the signal line driver circuit 1201 and the scanning line driver circuit 1203, from an FPC (flexible printed wiring) 1209 serving as an external input terminal via the connection wiring. Receive video and clock signals.

  Next, a cross-sectional structure is described with reference to FIG. A driver circuit and a pixel portion 1202 are formed over the first substrate 1200, and includes a plurality of semiconductor elements typified by TFTs. A signal line driver circuit 1201 is shown as the driver circuit. Note that the signal line driver circuit 1201 is formed of a CMOS circuit in which an n-channel TFT 1221 and a p-channel TFT 1222 are combined.

  In this embodiment, a signal line driver circuit, a scanning line driver circuit, and a TFT of a pixel portion are formed on the same substrate. For this reason, the volume of the light emitting display device can be reduced.

  The pixel portion 1202 is formed of a plurality of pixels including a switching TFT 1211, a driving TFT 1212, and a first pixel electrode (anode) 1213 made of a reflective conductive film electrically connected to the drain thereof. .

  Further, the interlayer insulating film 1220 of these TFTs 1211, 1212, 1221 and 1222 can be formed using a material similar to that of the second insulating layer 613 in Embodiment 6.

  In addition, insulators (called banks, partition walls, barriers, banks, or the like) 1214 are formed at both ends of the first pixel electrode (anode) 1213. In order to improve the coverage (coverage) of the film formed over the insulator 1214, a curved surface having a curvature is formed at the upper end portion or the lower end portion of the insulator 1214. Alternatively, the insulator 1214 may be covered with a protective film (planarization layer) made of an aluminum nitride film, an aluminum nitride oxide film, a thin film containing carbon as its main component, or a silicon nitride film. In addition, as the insulator 1214, stray light from a light-emitting element to be formed later can be absorbed by using an organic material in which a material that absorbs visible light, such as a black pigment or a dye, is dissolved or dispersed. As a result, the contrast of each element is improved. Further, by providing the interlayer insulating film 1220 also with a light-shielding insulator, a total light-shielding effect with the insulator 1214 can be obtained.

  Further, an organic compound material is deposited on the first pixel electrode (anode) 1213 to selectively form a layer 1215 containing a light-emitting substance.

  For the layer 1215 containing a light-emitting substance, the structure shown in Example 5 can be used as appropriate.

  In this manner, a light-emitting element 1217 including the first pixel electrode (anode) 1213, the layer 1215 containing a light-emitting substance, and the second pixel electrode (cathode) 1216 is formed. The light-emitting element 1217 emits light toward the second substrate 1204 side.

  In addition, a protective stack 1218 is formed in order to seal the light emitting element 1217. The protective laminate includes a laminate of a first inorganic insulating film, a stress relaxation film, and a second inorganic insulating film. Next, the protective laminate 1218 and the second substrate 1204 are bonded with the first sealant 1205 and the second sealant 1206. In addition, it is preferable to dripping the 2nd sealing agent using the apparatus which dripping a sealing agent like the apparatus which dripping the liquid crystal shown in FIG. The sealant is dropped or discharged from the dispenser to apply the sealant onto the active matrix substrate, and then the second substrate and the active matrix substrate are bonded together in a vacuum and then cured by ultraviolet curing. it can.

  Note that a polarizing plate 1225 is fixed to the surface of the second substrate 1204, and a 1 / 2λ or ¼λ or both retardation plate 1229 and an antireflection film 1226 are provided on the surface of the polarizing plate 1225. . Further, in order from the second substrate 1204, a retardation plate 1229 and a polarizing plate 1225 of ½λ, ¼λ, or both may be sequentially provided. By providing the retardation plate and the polarizing plate, it is possible to prevent external light from being reflected by the pixel electrode. Note that the first pixel electrode 1213 and the second pixel electrode 1216 are formed using a light-transmitting or semi-transmitting conductive film, and the interlayer insulating film 1220 absorbs visible light or absorbs visible light. When an organic material formed by dissolving or dispersing the material is used, external light is not reflected by each pixel electrode. Therefore, a retardation plate and a polarizing plate may not be used.

  The connection wiring 1208 and the FPC 1209 are electrically connected by an anisotropic conductive film or an anisotropic conductive resin 1227. Furthermore, it is preferable that the connection portion between each wiring layer and the connection terminal is sealed with a sealing resin. With this structure, moisture from the cross section can be prevented from entering and deteriorating the light emitting element.

  Note that a space filled with an inert gas such as nitrogen gas may be provided between the second substrate 1204 and the protective stack 1218. It is possible to enhance prevention of moisture and oxygen from entering.

A colored layer can be provided between the pixel portion 1202 and the polarizing plate 1225. In this case, a full-color display can be performed by providing a light-emitting element capable of white light emission in the pixel portion and separately providing a second substrate 1204 with a colored layer indicating RGB. Further, full color display can be performed by providing a light emitting element capable of emitting blue light in the pixel portion and separately providing a color conversion layer or the like. Further, each pixel portion, a light-emitting element that emits red, green, and blue light can be formed, and a colored layer can be used for the second substrate 1204. Such a display module has high color purity of each RBG and enables high-definition display.

  Alternatively, the light-emitting display module may be formed using one of the first substrate 1200 and the second substrate 1204, or a substrate such as a film or resin. When sealing is performed without using the counter substrate in this manner, the weight, size, and thickness of the display device can be improved.

  Note that any of Embodiment Modes 1 to 7 can be applied to this example. Moreover, although the example of the liquid crystal display module and the light emission display module was shown as a display module, it is not restricted to this, DMD (Digital Micromirror Device; Digital micromirror device), PDP (Plasma Display Panel; Plasma display panel), The present invention can be appropriately applied to a display module such as a field emission display (FED) or an electrophoretic display device (electronic paper).

  Various electronic devices can be manufactured by incorporating the display device described in the above embodiment into a housing. Electronic devices include television devices, cameras such as video cameras and digital cameras, goggles type displays (head mounted displays), navigation systems, sound playback devices (car audio, audio components, etc.), notebook personal computers, game machines, Play back a recording medium such as a portable information terminal (mobile computer, mobile phone, portable game machine or electronic book), an image playback device (specifically, Digital Versatile Disc (DVD)) equipped with a recording medium, A device having a display capable of displaying). Here, as representative examples of these electronic devices, a television device and its block diagram are shown in FIGS. 24 and 25, respectively, and a digital camera is shown in FIG.

  FIG. 24 is a diagram illustrating a general configuration of a television apparatus that receives an analog television broadcast. In FIG. 24, radio waves for television broadcasting received by the antenna 1101 are input to the tuner 1102. The tuner 1102 generates and outputs an intermediate frequency (IF) signal by mixing the high-frequency television signal input from the antenna 1101 with a signal having a local oscillation frequency controlled according to the desired reception frequency.

  The IF signal extracted by the tuner 1102 is amplified to a necessary voltage by an intermediate frequency amplifier (IF amplifier) 1103, and then detected by the image detection circuit 1104 and detected by the audio detection circuit 1105. The video signal output from the video detection circuit 1104 is separated into a luminance signal and a color signal by a video processing circuit 1106, and further subjected to predetermined video signal processing to become a video signal. The liquid crystal display device, the light emitting display device, DMD (Digital Micromirror Device), PDP (Plasma Display Panel), FED (Field Emission Display), electrophoretic display device (electronic) Output to a video output unit 1108 such as paper. Note that a display device using a liquid crystal display device is a liquid crystal television, and a display device using a light emitting display device is an EL (Electro Luminescence) television. The same applies when other display devices are used.

  The signal output from the sound detection circuit 1105 is subjected to processing such as FM demodulation by the sound processing circuit 1107 to become a sound signal, is appropriately amplified, and is output to the sound output unit 1109 such as a speaker.

  Note that the television apparatus using the present invention is not limited to a terrestrial broadcast such as a VHF band or a UHF band, a cable broadcast, or an analog broadcast such as a BS broadcast, but also a terrestrial digital broadcast, a cable digital broadcast, Or it may correspond to BS digital broadcasting.

  FIG. 25 is a perspective view of the television device as viewed from the front, and includes a housing 1151, a display portion 1152, a speaker portion 1153, an operation portion 1154, a video input terminal 1155, and the like. Moreover, it has a structure as shown in FIG.

  The display unit 1152 is an example of the video output unit 1108 of FIG. 24, and displays video here.

  The speaker unit 1153 is an example of the audio output unit of FIG. 24, and outputs audio here.

  The operation unit 1154 is provided with a power switch, a volume switch, a channel selection switch, a tuner switch, a selection switch, and the like. By pressing the button, the power of the television apparatus is turned on / off, video selection, audio adjustment, And selecting a tuner. Although not shown, the above selection can also be performed by a remote controller type operation unit.

  The video input terminal 1155 is a terminal for inputting a video signal from the outside such as a VTR, a DVD, or a game machine to the television apparatus.

In the case where the television device shown in this embodiment is a wall-mounted television device, a wall-hanging portion is provided on the back of the main body.

By using the display device of the present invention for the display portion of a television device, the display device can be manufactured at low cost with high throughput and yield. Therefore, a display medium having a particularly large area, such as a wall-mounted television device, an information display board at a railway station or airport, or an advertisement display board in a street, can be manufactured at low cost.

  26A and 26B are diagrams illustrating an example of a digital camera. FIG. 26A is a perspective view seen from the front side of the digital camera, and FIG. 26B is a perspective view seen from the rear side. In FIG. 26A, the digital camera includes a release button 1301, a main switch 1302, a finder window 1303, a flash 1304, a lens 1305, a lens barrel 1306, and a housing 1307.

  In FIG. 26B, a viewfinder eyepiece window 1311, a monitor 1312, and operation buttons 1313 are provided.

  When the release button 1301 is pressed down to a half position, the focus adjustment mechanism and the exposure adjustment mechanism are operated, and when the release button 1301 is pressed down to the lowest position, the shutter is opened.

  A main switch 1302 switches on / off the power of the digital camera when pressed or rotated.

  The viewfinder window 1303 is arranged on the front of the lens 1305 on the front surface of the digital camera, and is a device for confirming the shooting range and focus position from the viewfinder eyepiece window 1311 shown in FIG.

  The flash 1304 is arranged at the upper front of the digital camera, and emits auxiliary light simultaneously with the release button being pressed to open the shutter when the subject brightness is low.

The lens 1305 is disposed in front of the digital camera. The lens is composed of a focusing lens, a zoom lens, and the like, and constitutes a photographing optical system together with a shutter and a diaphragm (not shown). In addition, an imaging element such as a CCD (Charge Coupled Device) is provided behind the lens.

The lens barrel 1306 moves the lens position in order to focus the focusing lens, the zoom lens, and the like. During photographing, the lens 1305 is moved forward to move the lens 1305 forward. Further, when carrying, the lens 1305 is retracted to make it compact. In this embodiment, the structure is such that the subject can be zoomed by extending the lens barrel. However, the present invention is not limited to this structure. It is also possible to use a digital camera that can perform zoom shooting without extending the camera.

  The viewfinder eyepiece window 1311 is provided on the upper rear surface of the digital camera, and is a window provided for eye contact when confirming a shooting range and a focus position.

  The operation buttons 1313 are various function buttons provided on the rear surface of the digital camera, and include a setup button, a menu button, a display button, a function button, a selection button, and the like.

  By using the display device of the present invention for a monitor, a digital camera can be manufactured at low cost with high throughput and high yield.

Sectional drawing explaining the manufacturing process of the pixel electrode which concerns on this invention. Sectional drawing explaining the manufacturing process of the pixel electrode which concerns on this invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a top view illustrating a mask pattern for forming a pixel electrode according to the present invention. FIG. 6 is a top view illustrating a mask pattern for forming a pixel electrode according to the present invention. The figure explaining the droplet discharge device which can apply this invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 10 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate placement of a display device according to the present invention. 4A and 4B are top views illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. 4A and 4B illustrate a liquid crystal dropping method that can be applied to the present invention. FIG. 6 illustrates a structure of a liquid crystal display module according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. 4A and 4B are top views illustrating a manufacturing process of an active matrix substrate of a display device according to the present invention. FIG. 14 is a cross-sectional view illustrating a structure of a light-emitting element that can be used in the light-emitting display panel of the present invention. FIG. 6 illustrates an equivalent circuit of a pixel applicable to the present invention. FIG. 6 illustrates a structure of a light-emitting display module according to the present invention. FIG. 6 is a top view illustrating a method for mounting a driver circuit of a display device according to the present invention. FIG. 9 is a block diagram illustrating a structure of an electronic device. 6A and 6B illustrate examples of electronic devices. 6A and 6B illustrate examples of electronic devices. The figure explaining the contact angle of the area | region with low paintability and the area | region with high paintability.

Claims (9)

A conductive film is formed on the insulating surface;
A first film pattern is formed on the conductive film by a droplet discharge method, an inkjet method, or a printing method,
Forming a second film pattern on the conductive film and in a region excluding the region where the first film pattern is formed;
Removing the first film pattern to expose a portion of the conductive film, removing a portion of the exposed conductive film to form a pixel electrode;
A method for manufacturing a display device, wherein the wettability of the material of the second film pattern with respect to the conductive film is higher than the wettability of the material of the second film pattern with respect to the material of the first film pattern. . A conductive film is formed on the insulating surface;
A first film pattern is formed on the conductive film by a droplet discharge method, an inkjet method, or a printing method,
Forming a second film pattern on the conductive film and in a region where the first film pattern is not formed;
Removing the first film pattern to expose a portion of the conductive film, removing a portion of the exposed conductive film to form a pixel electrode;
A method for manufacturing a display device, wherein the wettability of the material of the second film pattern with respect to the conductive film is higher than the wettability of the material of the second film pattern with respect to the material of the first film pattern. . A conductive film is formed on the insulating surface;
A first film pattern is formed on the conductive film by a droplet discharge method, an inkjet method, or a printing method,
Forming a second film pattern on the conductive film and in a region excluding the region where the first film pattern is formed;
After removing the first film pattern, a part of the conductive film is removed using the second film pattern as a mask to form a pixel electrode,
A method for manufacturing a display device, wherein the wettability of the material of the second film pattern with respect to the conductive film is higher than the wettability of the material of the second film pattern with respect to the material of the first film pattern. . A conductive film is formed on the insulating surface;
A first film pattern is formed on the conductive film by a droplet discharge method, an inkjet method, or a printing method,
Forming a second film pattern on the conductive film and in a region where the first film pattern is not formed;
After removing the first film pattern, a part of the conductive film is removed using the second film pattern as a mask to form a pixel electrode,
A method for manufacturing a display device, wherein the wettability of the material of the second film pattern with respect to the conductive film is higher than the wettability of the material of the second film pattern with respect to the material of the first film pattern. .   5. The display device according to claim 1, wherein the first film pattern is formed by exposing a surface of the insulating layer to fluorine plasma after forming the insulating layer. Manufacturing method.   5. The method for manufacturing a display device according to claim 1, wherein the first film pattern is formed of a compound having an alkyl group or a fluorocarbon chain.   7. The thin film transistor including a gate electrode, a gate insulating film, a semiconductor film, and a source electrode or a drain electrode connected to the pixel electrode is formed after the pixel electrode is formed. A method for manufacturing a display device.   A liquid crystal television having a display device manufactured according to any one of claims 1 to 7.   An EL television having a display device manufactured according to any one of claims 1 to 7.

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