JP2005229230A - Packet transmitter-receiver and packet identification method used therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transmitter-receiver capable of receiving only desired packets by distinguishing two or more received isochronous packets having the same channel number from each other for a period when a sender node ID is not confirmed after bus reset. <P>SOLUTION: A node for receiving the isochronous packet confirms a rom_crc_value in a configuration ROM 15 of a transmission node before starting packet reception. The transmission node inserts the rom_crc_value of its own node to the isochronous packet going to be transmitted and transmits the resulting packet. The reception node confirms whether or not the rom_crc_value having already been stored in an identification information storage section 16 is coincident with the rom_crc_value in the received isochronous packet to identify an isochronous packet of the same channel from other nodes caused by the bus reset or the like even when receiving the isochronous packet of the same channel from the other nodes. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a packet transmitting / receiving apparatus and a packet identification method used therefor, and more particularly to a method for identifying an isochronous packet to be received on a bus in which an isochronous packet of the same channel exists.

  The performance of computers is accelerating year by year, and peripheral devices such as storage devices are becoming more sophisticated. Conventionally, home appliances and computer products have been clearly distinguished, but in recent years, computer home appliances and home appliance digitalization have progressed, and an environment in which both can coexist is necessary.

  Under such circumstances, a high-speed serial bus (hereinafter referred to as an IEEE 1394 bus) standardized by IEEE (The Institute of Electrical and Engineering Engineers) 1394 is exemplified as an interface that can realize high-speed and large-capacity data transfer. (For example, refer nonpatent literature 1).

  A major feature of the IEEE 1394 bus is that a new node can be added to or removed from the IEEE 1394 bus network without turning off the power. IEEE 1394 employs 64-bit fixed addressing according to the IEEE 1212 standard.

  An IEEE 1394 address map is shown in FIG. In FIG. 7, the upper 16 bits of the address map indicate NODE_ID (identification information) 401. The NODE_ID 401 is further divided into a BUS_ID 402 of upper 10 bits and a PHY (Physical) _ID 403 of lower 6 bits.

  The BUS_ID 401 can designate “0” to “1023”, but “1023” indicates the local bus 404 (a bus directly connected to the node that is the data transfer source). PHY_ID 403 can specify “0” to “63”, but “63” indicates broadcast 405 (data addressed to all nodes connected in the bus).

  Therefore, in IEEE 1394, the number of buses is “1023”, and “63” nodes can be connected to each bus, for a total of 64449 units. The address space allocated to each node is the remaining 48 bits (256 terabytes). Memory space 408 from “0” to “FFFF_DFFF_FFFF (hexadecimal)”, private space 407 from “FFFF_EFF_FFFF (hexadecimal)” to “FFFF_F000_0000 (hexadecimal)” to “FFFF_FFFF_FFFF” (Hexadecimal) "is assigned a register space 406.

  The IEEE 1394 registers are defined by the style adopted by the CSR (Control and Status Registers) architecture standardized by IEEE 1212. The CSR includes a register space from “000 — 0000 (hexadecimal)” to “000 — 01FF (hexadecimal)” by a CSR core and a basic register space 409.

  Subsequently, “000 — 0200 (hexadecimal)” to “000 — 03FF (hexadecimal)” are reserved for bus-dependent usage 410. Further, the space after “000 — 0800 (hexadecimal)” is reserved as a space 412 for node-dependent resources in the initial unit.

  A node corresponding to a transaction must mount information indicating the characteristics and functions of the node in a configuration ROM (Read Only Memory) space 411.

  A general configuration ROM format is shown in FIG. In IEEE 1394, the first five quadlets (1 quadlet = 4 bytes) are defined to be in this format. Moreover, after the 6th quadlet, it changes according to the function which comprises the apparatus.

  Among these, rom_crc_value 502 indicates a CRC (Cyclic Redundancy Check) value of data from “FFFF_F000 — 0400 address” to an address indicated by crc_length 501. In IEEE 1212, the entire configuration ROM is protected by crc_length_ Recommended.

  The node_vender_ID 503, the chip_ID_hi 504, and the chip_ID_lo 505 are collectively called EUI (Extended Unique Identifier) -64Bit, and there are no two devices that match this field. Therefore, devices having the same function and having the same configuration ROM in other fields also have a different EUI-64, so that rom_crc_value 502 basically does not match.

  On the IEEE 1394 bus, a process for transferring a packet is called a subaction, and there are roughly two types as shown below. One is called an isochronous subaction, and has a function of transferring packets at regular intervals, which is also a feature of the IEEE1394 bus. In this subaction, the channel is used to transfer to the entire bus rather than to a specific node.

  The main application of the isochronous subaction is transfer of video and audio between digital AV devices as defined in IEC (International Electrotechnical Commission) 61883.

  The other is an asynchronous transfer method called an asynchronous subaction. Asynchronous subactions, unlike isochronous subactions, cannot transfer data at regular intervals. The header information of several bytes and the actual data are transferred to the designated node, and the node that has received the data always returns an acknowledge packet (Acknowledge Packet).

  However, in the case of a subaction that does not require a recognition packet such as a broadcast with a transfer destination PHY_ID of 63 or an asynchronous stream packet (Asynchronous Stream Packet) defined by IEEE 1394a-2000, which is an extension standard of IEEE 1394-1995, Does not return a recognition packet.

  A node that wishes to transmit an isochronous packet accesses a CHANNELS_AVAILABLE register in an IRM (Isochronous Resource Manager) to secure a channel number, and also accesses a BANDWIDTH_AVAILABLE register to secure a band, thereby isolating a packet on the IEEE1394 bus for the first time. Can be sent. Hereinafter, the channel and the band are collectively referred to as an isochronous resource.

  When a new node is connected to the IEEE 1394 bus or when a node is removed from the bus, bus initialization called bus reset is performed, all node IDs on the bus are newly allocated, and the IRM is determined. After the bus reset occurs, a node that continues to transmit isochronous packets must execute access for securing the isochronous resource again after the IRM is determined.

  However, the node that sent the isochronous packet before the bus reset occurred uses the isochronous resource secured before the bus reset for 1 second after the bus reset occurred, even before securing the new isochronous resource. It is allowed to continue sending isochronous packets.

  FIG. 9 shows an isochronous packet format defined by IEEE 1394 and IEC61883. In IEEE1394, the format of the isochronous packet 310 has a packet header 301, a header CRC 311, a data payload 312, and a data CRC 313. Further, IEC61883 stipulates that the first two quadlets (8 bytes) of the data payload 312 is a CIP (Common Isochronous Packet) header 304.

  The packet header 301 includes a channel field 314 indicating the above channel number, and a node receiving the packet looks at the channel field 314 and determines a packet to be received. Further, the CIP header 304 includes an SID field 315 indicating the node ID (node number) of the transmission source. A node receiving a packet defined by IEC61883 looks at the SID field 315 to receive The node ID of the node that is transmitting the packet can be specified.

JP-A-11-308255 "IEEE Standard for a High Performance Serial Bus" (IEEE 1394)

  In the conventional packet recognition method described above, for example, when isochronous packets flow with the same channel number on two different IEEE 1394 buses, a bus reset occurs when these buses are connected, and then the IRM is determined. Until the channel and bandwidth are secured, two isochronous packets with the same channel number are transferred on the same bus. In this case, the node that has received the isochronous packet before the bus reset has no means for determining which packet on the same channel may be received.

  Further, in the conventional packet recognition method, there is a high possibility that the node ID of the transmission source is also changed due to the initialization accompanying the bus reset, so that it cannot be determined from the SID field 515 in the CIP header 504. There is.

  Therefore, an object of the present invention is to solve the above-mentioned problems, and when two or more isochronous packets having the same channel number are received after the bus reset and the transmission source node ID is not fixed. It is an object of the present invention to provide a packet transmitting / receiving apparatus capable of distinguishing them and receiving only desired packets and a packet identification method used therefor.

  The packet transmission / reception apparatus according to the present invention is a packet transmission / reception apparatus including a transmission / reception function of isochronous packets that are transferred to the entire bus at regular intervals. Means for storing identification information are provided.

  The packet identification method according to the present invention is a packet identification method of a packet transmission / reception device including a transmission / reception function of isochronous packets that are transferred to the entire bus at regular intervals, and is transmitted to the packet transmission / reception device side during transmission of the isochronous packet. A step of storing identification information of a transmission source that does not change by a bus reset is included in the packet.

  That is, according to the packet identification method of the present invention, the individual information of the transmission source that does not change by the bus reset is stored in the isochronous packet, so that the node receiving the packet transmits it from the other node and the isochronous packet to be received. It is characterized in that a mechanism capable of distinguishing from another isochronous packet on the same channel is provided. Here, an isochronous packet is a packet that is transferred at regular intervals, and is a packet that is not transferred to a specific node but is transferred to the entire bus using a channel.

  In the packet identification method of the present invention, the transmitting node inserts its own rom_crc_value in the isochronous packet, and the receiving node confirms the field. Therefore, even if there are two isochronous packets having a channel that has been received until after the bus reset, it is possible to continuously receive the packet that has been received before.

  The present invention is configured and operated as described below, so that after a bus reset, two or more isochronous packets having the same channel number are received during a period when the source node ID is not fixed. Can also distinguish between them and receive only desired packets.

  Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a transmission / reception apparatus according to an embodiment of the present invention. FIG. 1 shows a configuration example of a device equipped with a transmission circuit and a reception circuit equipped with an isochronous packet identification function as an embodiment of the present invention.

  That is, the transmission / reception apparatus according to an embodiment of the present invention includes a link layer 1, a CPU (central processing unit) 2, an AV codec (Codec) 3, and a physical layer (PHY: Physical) 4. Yes.

  The link layer 1 includes a host I / F (interface) 11, an application (AP) I / F 12, an asynchronous packet controller 13, a CSR (Control and Status Registers) 14, a configuration ( A ROM (Read Only Memory) (hereinafter referred to as a configuration ROM) 15, an identification information storage unit (Source ROM_CRC_VALUE) 16, a packet conversion unit (Packetizer) 17, a transmission data buffer (Tx Data Buffer) 18, A reception filter (Rx Filter) 19, a reception data buffer (Rx Data Buffer) 20, and Nkukoa is constructed from (Link Core) 21 Metropolitan.

  The host I / F 11 has an interface for transmitting / receiving data to / from the CPU 2 and operates when performing transmission / reception of asynchronous packets from the firmware (hereinafter referred to as F / W) and setting of the CSR 14, the configuration ROM 15, and the like. The application I / F 12 includes a block that uses data such as AV codec 3 that transmits and receives stream data isochronously, and a block that passes digital data and other necessary signals.

  The asynchronous packet controller 13 is a block that performs transmission / reception of asynchronous packets, receives information necessary for that purpose from each block, and reflects the result in each block. The CSR 14 is a block having registers accessible from the IEEE 1394 bus, such as the CSR core 409 and the Serial Bus Dependent 410 shown in FIG.

  The configuration ROM 15 is a block for mounting information indicating the characteristics and functions of the node. The general configuration ROM 15 has a format as shown in FIG. 8 as described above. In IEEE 1394, the first five quadlets (1 quadlet = 4 bytes) are defined to be in this format. Moreover, after the 6th quadlet, it changes according to the function which comprises the apparatus.

  The identification information storage unit 16 is a block necessary for receiving an isochronous packet, and is a block for storing rom_crc_value read from the transmission source node of the isochronous packet to be received. Here, an isochronous packet is a packet that is transferred at regular intervals, and is a packet that is not transferred to a specific node but is transferred to the entire bus using a channel.

  In addition, as described above, rom_crc_value indicates a CRC (Cyclic Redundancy Check) value of data from “FFFF_F000_0400” to the address indicated by crc_length. In IEEE1212, the entire configuration ROM 15 is set to crc_length. It is recommended to protect.

  The packet conversion unit 17 is a block that inserts the CIP (Common Isochronous Packet) header 304 and the packet header 301 shown in FIG. 9 into the stream data to be transmitted, and the rom_crc_value of the own node, and shapes the stream data into an isochronous packet format.

  The transmission data buffer 18 is a block having a FIFO (First In First Out) type buffer for storing data received from the application I / F 12 in an isochronous packet.

  The reception filter 19 compares the packet header, the CIP header, and the rom_crc_value from the received isochronous packet, receives the packet if it should be received, and discards the packet if it is not the packet to be received. It is a block.

  The reception data buffer 20 is a block that stores data received through the reception filter 19 and passes it to the application I / F 12. The link core 21 has an interface with the physical layer 4 and is a block for managing transactions.

  The CPU 2 performs device management such as transmission / reception of asynchronous packets and initialization of each block such as CSR. If it is IEC61883, it actually transmits / receives AV commands and manages plug connections. The AV codec 3 is a block that encodes video and audio to generate data to be transmitted, and decodes data received from the application I / F 12 to generate video data and audio data.

  The physical layer 4 is hardware (hereinafter referred to as H / W) of the IEEE 1394 physical layer. The IEEE 1394 bus 100 is a bus to which another node (not shown) is connected at the connection destination, and an asynchronous packet or an asynchronous packet actually flows.

  Next, an asynchronous packet transmission circuit will be described. When an asynchronous resource is secured from the IRM (Isochronous Resource Manager), the node that transmits the asynchronous packet inserts a packet header or CIP header into the resource information acquired by the packet conversion unit 17 or the data to be transmitted. Insert rom_crc_value from ROM 15 to generate an asynchronous packet, and transmit the asynchronous packet. This operation is the same for all the asynchronous packets to be transmitted.

  Next, an asynchronous packet receiving circuit will be described. When the source of the packet to be received is determined by the plug connection or the like, the node that receives the asynchronous packet first transmits an asynchronous packet called Read Request for Data Quadlet to read rom_crc_value of the transmitting node.

  FIG. 2 is a diagram showing a format of an asynchronous packet called Read Request for Data Quadlet. In FIG. 2, destination_ID 101 indicating the node ID (identification information) of the other party that transmits the packet is the node ID of the node that transmits the isochronous packet in this case.

  The transaction label (tl) 102 is an arbitrary label attached to the transaction. A retry code (rt) 103 is a field indicating the type of retry defined in IEEE1394. The transaction code (tcode) 104 indicates the type of packet, and Read Request for Data Quadlet is (0100). The priority (pri) 105 is not particularly used in the cable environment.

  In this case, source_ID 106 indicating the node ID of the packet transmission source is the node ID that receives the isochronous packet. The destination_offset 107 indicates an offset address of the transmission destination, and “FFFF_F000 — 0400 (hexadecimal)” is entered when reading the rom_crc_value. The header_CRC 108 contains a CRC value of data from the destination_ID 106 to the destination_offset 107.

  The node that has received the above-described Read Request for Data Quadlet-format asynchronous packet, that is, the node that transmits the isochronous packet, responds with an asynchronous packet called Read Response for Data Quadlet.

  FIG. 3 is a diagram showing the format of an asynchronous packet called Read Response for Data Quadlet. In FIG. 3, destination_ID 201 is the node ID of the node that receives the isochronous packet in this case.

  The transaction label (tl) 202 is the same as the transaction label (tl) 102 shown in FIG. 2, but this field in the Response packet inserts the transaction label (tl) 102 in the previously received Request packet. The retry code (rt) 203 and the priority (pri) 205 are the same as the retry code (rt) 103 and the priority (pri) 105 shown in FIG.

  The transaction code (tcode) 204 is (0110) of Read Response for Data Quadlet. In this case, the source_ID 206 is the node ID of the node that transmits isochronous. The rcode 207 indicating the response code inserts “0000” indicating the response_complete if there is an error in the previously received Request packet, and if it is normally completed.

  “reserved 208” is a reserved area, and “000 — 0000 — 0000 (hexadecimal)” is inserted. The quadlet_data 209 inserts the data in the destination_offset 107 specified in the previously received request packet. In this case, since “FFFF_F000 — 0400 address” is obtained in the previous packet, the address 0 of the configuration ROM 15, that is, one quadlet data from info_length 501 to rom_crc_value 502 shown in FIG.

  The receiving node acquires rom_crc_value from the asynchronous packet transmitting node by transmitting and receiving the asynchronous packet described above, and stores it in the identification information storage unit 16.

  With respect to the received asynchronous packets, the rom_crc_value is held in the identification information storage unit 16 in addition to the identification of the packet header and the CIP header every time an asynchronous packet is received according to the processing operation shown in FIG. By comparing with the value (Source rom_crc_value), it becomes possible to identify the packet more reliably.

  FIG. 4 is a flowchart showing the identification process of the asynchronous packet according to one embodiment of the present invention. With reference to FIG. 1 to FIG. 4, the identification process of the asynchronous packet according to the embodiment of the present invention will be described.

  When a plug is connected in the link layer 1 (step S1 in FIG. 4) and an isochronous packet is received (step S2 in FIG. 4), it is checked whether or not rom_crc_value has been acquired (step S3 in FIG. 4).

  If rom_crc_value has been acquired, the link layer 1 checks whether rom_crc_value matches the value held in the identification information storage unit 16 (step S4 in FIG. 4).

  When the rom_crc_value matches the value held in the identification information storage unit 16 if the header of the packet is OK (step S5 in FIG. 4), the link layer 1 stores the received packet in the reception data buffer 20 (FIG. 4). Step S6).

  Further, the link layer 1 discards the received packet if rom_crc_value does not match the value held in the identification information storage unit 16 or if the header of the packet is not OK (step S5 in FIG. 4) (FIG. 4). Step S7).

  On the other hand, rom_crc_value does not change unless the bus reset occurs and the contents of the configuration ROM 15 change as a result of adding or deleting the function of the transmission node of the asynchronous packet. Therefore, once rom_crc_value is acquired, the plug is removed. The value held in the identification information storage unit 16 is valid until the reception of the asynchronous packet is stopped due to disconnection or the like. Therefore, it is possible to identify an asynchronous packet of the same channel that could not be identified by the prior art by using this function.

  FIG. 5 is a diagram illustrating an example in which rom_crc_value is stored in an asynchronous packet according to an embodiment of the present invention. In FIG. 5, in this storage example, the rom_crc_value 303 is inserted outside the CIP header 304 because the CIP header 304 has almost no area reserved for expansion.

  In such a case, the packet size increases by one quadlet with respect to the format defined in IEC61883, so it is necessary to declare in advance that rom_crc_value 303 is inserted between the transmitting and receiving nodes by an AVC command or the like.

  FIG. 6 is a diagram showing another example in which rom_crc_value is stored in an asynchronous packet in the embodiment of the present invention. In FIG. 6, in this storage example, it is assumed that the data is inserted into a format defined by IEC61883-4 (MPEG2-TS data transmission). However, as in this case, the reserve area has 16 bits or more. In some cases, it is possible to connect to a device that does not support this function by inserting rom_crc_value 303 therein. If a part of rom_crc_value 303 is used, it is possible to insert into a reserve area of 16 bits or less.

  In this way, in this embodiment, by inserting rom_crc_value in the asynchronous packet, the receiving node receives only the packet having the same field in addition to the channel, so that other packets of the same channel can be safely transmitted. The effect that it can filter is acquired.

  The present invention is not limited to the above-described embodiments, and it is obvious that the embodiments can be appropriately changed within the scope of the technical idea of the present invention.

It is a block diagram which shows the structure of the transmission / reception apparatus by one Example of this invention. It is a figure which shows the format of the asynchronous packet called Read Request for Data Quadlet. It is a figure which shows the format of the asynchronous packet called Read Response for Data Quadlet. It is a flowchart which shows the identification process of the asynchronous packet by one Example of this invention. It is a figure which shows the example which stored rom_crc_value in the asynchronous packet in one Example of this invention. It is a figure which shows the other example which stored rom_crc_value in the asynchronous packet in one Example of this invention. It is a figure which shows the address map of IEEE1394. It is a figure which shows the format of Configuration ROM. It is a figure which shows the format of the asynchronous packet prescribed | regulated by IEEE1394 and IEC61883.

Explanation of symbols

1 Link layer 2 CPU
3 AV codec 4 Physical layer 11 Host I / F
12 Application I / F
13 Asynchronous packet controller 14 CSR
15 Configuration ROM
16 Identification Information Storage Unit 17 Packet Conversion Unit 18 Transmission Data Buffer 19 Reception Filter 20 Reception Data Buffer 21 Link Core

Claims (8)

  A packet transmission / reception device including a transmission / reception function of isochronous packets transferred to the entire bus at regular intervals, and having means for storing identification information of a transmission source that does not change by a bus reset in the packet when transmitting the isochronous packets A packet transmitting / receiving apparatus. Including a configuration storage medium for storing at least information indicating the characteristics and functions of the own node;
The means for storing the identification information of the transmission source stores the identification information in the configuration storage medium in a predetermined area inside the isochronous packet, and packetizes it by adding a header of a predetermined protocol. The packet transmitting / receiving apparatus according to claim 1.   An identification information storage area that holds identification information of a transmission source in advance when the isochronous packet is received, an identification information extracted from a predetermined area inside the packet when the isochronous packet is received, and an identification held in the identification information storage area 3. The packet transmitting / receiving apparatus according to claim 1, further comprising means for confirming the transmission source by comparing with information.   The packet transmitting / receiving apparatus according to any one of claims 1 to 3, wherein the identification information is at least part of rom_crc_value indicating a CRC (Cyclic Redundancy Check) value of data in a predetermined area set in advance. .   A packet identification method for a packet transmission / reception device including a transmission / reception function of isochronous packets that are transferred to the entire bus at regular intervals, and the packet transmission / reception device side does not change due to a bus reset during transmission of the isochronous packet. A packet identification method comprising a step of storing identification information of a transmission source. A configuration storage medium for storing at least information indicating the characteristics and functions of the own node is included in the packet transmitting / receiving apparatus,
The step of storing the identification information of the transmission source stores the identification information in the configuration storage medium in a predetermined area inside the isochronous packet, and adds a header of a predetermined protocol to packetize the packet. The packet identification method according to claim 5. The packet transmitting / receiving apparatus includes an identification information storage area that holds identification information of a transmission source in advance when receiving the isochronous packet,
The step of confirming the transmission source by comparing the identification information extracted from a predetermined area inside the packet with the packet transmission / reception apparatus side and the identification information held in the identification information storage area when the isochronous packet is received. The packet identification method according to claim 5 or 6, further comprising: 8. The packet identification method according to claim 5, wherein the identification information is at least part of rom_crc_value indicating a CRC (Cyclic Redundancy Check) value of data in a predetermined area set in advance. .

Images