JP2005223848A - Contour emphasis circuit and contour emphasis method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a video signal in which a pre-shoot component or an overshoot component is suppressed by aperture correction and further, sharpness of a rising waveform is sufficiently improved. <P>SOLUTION: There are provided delay means 31, 32 for producing a signal D1 resulting from delaying an input signal D0 just for a predetermined time and a signal D2 resulting from delaying this signal D1 just for this predetermined time; arithmetic means 33-35 for producing a sum component of (D1-D0) and (D1-D2) from the input signal D0, the signal D1 and the signal D2; extraction means 36, 37 for extracting only a signal of a positive polarity and a signal of a negative polarity, respectively from this sum component; second delay means 38, 39 for delaying this signal of the negative polarity just for approximately a double of the predetermined time; an addition means 40 for adding the signal of the positive polarity and the signal of the negative polarity delayed by the second delay means 38, 39; a gain control means 41 for controlling a gain of an output signal of the addition means 40; and a second addition means 42 for superimposing an output signal of the gain control means 41 on the signal D2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a contour emphasizing circuit and a contour emphasizing method for increasing the sharpness of an image, and more particularly to a device capable of suppressing preshoot and overshoot.

  In a video signal processing apparatus for a television receiver, generally, processing for increasing the sharpness of an image to be displayed is performed.

  As a process unique to displaying an image on a CRT, there is a process called velocity modulation (VM). This is because, for example, the second derivative component of the video signal is obtained, and the velocity of the electron beam scanning the cathode ray tube is modulated by this differential component, for example, the rising portion of the video signal (the contour portion where the image changes from black to white). Immediately before (), the scanning speed is increased to make the image blacker, and immediately after this rising portion, the scanning speed is decreased to make the image whiter.

  However, this speed modulation cannot be used for fixed pixel type display elements such as LCD (Liquid Crystal Display) and PDP (Plasma Display Panel). As a more general process applicable to a fixed pixel type display element, there is a process called aperture correction. In this method, a video signal is delayed to create a contour correction (aperture correction) signal, and this contour correction signal is superimposed on the original video signal (see, for example, Non-Patent Document 1).

  FIG. 9 shows a conventional configuration example of a circuit (contour emphasis circuit) that performs this aperture correction. The contour emphasis circuit includes delay elements 51 and 52, inverter amplifiers 53 and 54, adders 55 and 57, and an amplifier 56. Each of the delay elements 51 and 52 has a delay time of one pixel.

  The video signal D0 input to the contour emphasis circuit from the input terminal 201 is delayed by one pixel by the delay element 51 and further delayed by one pixel by the delay element 52. The input signal D0 is multiplied by a coefficient -1/2 by the inverter amplifier 53, and the output signal D2 of the delay element 52 is multiplied by the coefficient -1/2 by the inverter amplifier 54.

Then, the output signal D1 of the delay element 51, the output signal -D0 / 2 of the inverter amplifier 53, and the output signal -D2 / 2 of the inverter amplifier 54 are added by the adder 55, whereby the following equation [1] is obtained. Thus, the contour correction signal AP which is a high frequency component of the video signal is obtained.
[Equation 1]
AP = (D1-D0) / 2 + (D1-D2) / 2
= D1-D0 / 2-D2 / 2 [1]

  The contour correction signal AP is gain-controlled by being multiplied by a coefficient k (for example, a value between 0.0 and 1.3) by the amplifier 56 and then added to the output signal D1 of the delay element 51 by the adder 57. Is added. In this way, the video signal D1 + AP × k subjected to the contour enhancement process is obtained, and the video signal D1 + AP × k is output from the output terminal 202 of the contour enhancement circuit.

  FIG. 10 is a waveform diagram illustrating an example of contour enhancement of the input signal D0 by the contour enhancement circuit of FIG. 9 (the numerical values of amplitude and time on the vertical axis and horizontal axis are normalized values, respectively). As shown in FIG. 10A, it is assumed that a video signal D0 having a rising waveform in the shape of a 2T pulse is input to this contour emphasizing circuit. The 2T pulse is a signal obtained by squaring the sine function and making the pulse width the reciprocal of the band of the video signal (for example, about 240 nanoseconds which is the reciprocal of the bandwidth 4.2 MHz for the luminance signal of the NTSC signal). Since the spectrum component at the time of Fourier transform falls within the bandwidth of the video signal, it is known as the most suitable signal for measuring the bandwidth characteristics of the video signal.

  As shown in FIG. 10A, a signal D1 obtained by delaying the input signal D0 by one fraction and a signal D2 obtained by delaying the input signal D0 by two pixels are generated from the input signal D0.

  FIG. 10B shows a difference (D1−D0) between the input signal D0 and the signal D1, and a difference (D1−D2) between the signal D2 and the signal D1. The difference (D1-D0) is a high frequency component corresponding to the preshoot component at the rising portion of the input signal D0. The difference (D1−D2) is a high frequency component corresponding to an overshoot component at the rising portion of the input signal D0.

  Therefore, by obtaining the sum component of the difference (D1-D0) and the difference (D1-D2), as shown in FIG. 10B, the contour correction signal AP of the above equation [1] is obtained ( In an actual circuit, this sum component is obtained by adding D1, -D0 / 2, and -D2 / 2 as shown in FIG. 9 in order to reduce the number of operations.)

The contour correction signal AP is gain-controlled by multiplying by the coefficient k, and is superimposed on the signal D1, thereby making the rising waveform steep and before the rising waveform as shown in FIG. A signal D1 + AP × k in which a preshoot component and an overshoot component are added to the edge portion and the rear edge portion, respectively, is obtained.
Japan Broadcasting Corporation, “Technology Textbook (Part 1)”, 1st edition, April 1989, Japan Broadcasting Publishing Association, p. 156

  However, in the contour emphasis circuit shown in FIG. 9, as shown in FIG. 10C, if the rising waveform is made steep to increase the sharpness of the image, the preshoot component and the overshoot component become large. It becomes too much and the image quality deteriorates on the contrary. On the other hand, when trying to suppress the preshoot component and the overshoot component, the sharpness of the rising waveform does not change much from the original video signal, so that the sharpness of the image cannot be increased.

  In view of the above-described points, the present invention has been made in order to obtain a video signal in which the preshoot component and the overshoot component are suppressed by aperture correction and the steepness of the rising waveform is sufficiently increased. Is.

  In order to solve this problem, the edge emphasis circuit according to the present invention generates a signal D1 obtained by delaying the input signal D0 by a predetermined time and a delay means for generating a signal D2 obtained by delaying the signal D1 by this predetermined time. And arithmetic means for generating a sum component of (D1-D0) and (D1-D2) from the input signal D0, signal D1, and signal D2, and a positive polarity signal, negative polarity from the sum component Extraction means for respectively extracting only the first signal, second delay means for delaying the negative polarity signal by approximately twice the predetermined time, the positive polarity signal and the second delay. Adding means for adding the negative polarity signal delayed by the means, gain control means for controlling the gain of the output signal of the adding means, and second signal for superimposing the output signal of the gain control means on the signal D2 And adding means That.

  In this contour emphasis circuit, (D1-D0) and (D1-) are obtained from an input signal D0, a signal D1 obtained by delaying the input signal D0 by a predetermined time, and a signal D2 obtained by delaying the signal D1 by this predetermined time. A sum component with D2) is generated. Then, only a positive polarity signal and a negative polarity signal are extracted from the sum component, and the negative polarity signal is delayed by approximately twice the predetermined time.

  Then, an edge correction signal is obtained by adding the two signals with the positive polarity signal and the delayed negative polarity signal as an overshoot component and a preshoot component, respectively.

  By superimposing the contour correction signal on the signal D2 with the gain controlled, a video signal in which the preshoot component and the overshoot component are appropriately suppressed and the steepness of the rising waveform is sufficiently increased can be obtained.

  In this contour emphasis circuit, as an example, a delay unit that generates a signal D3 obtained by delaying the signal D2 by the predetermined time, a signal D1, a signal D3, and an output signal of the second addition unit are provided. It is preferable to further comprise median selection means for selecting a median signal.

  As a result, the leading edge portion and trailing edge portion (portions where preshoot components and overshoot components exist) of the rising waveform in the output signal of the second adding means are respectively converted into signals D3 and D1 by the median value selecting means. In this case, the preshoot component and the overshoot component can be completely suppressed.

  Next, the contour emphasizing method according to the present invention includes a first step of generating a signal D1 obtained by delaying the input signal D0 by a predetermined time, and a signal D2 obtained by delaying the signal D1 by the predetermined time, A second step of generating a sum component of (D1-D0) and (D1-D2) from the input signal D0, signal D1, and signal D2, and a positive polarity signal, a negative polarity signal from the sum component A third step of extracting only the signal, delaying the negative polarity signal by a time approximately twice the predetermined time, and adding the delayed signal to the positive polarity signal; and the third step And a fourth step of superimposing the summed output on the signal D2 after controlling the gain.

  According to this contour emphasizing method, the preshoot component and the overshoot component are appropriately suppressed and the steepness of the rising waveform of the video signal is sufficiently suppressed in the same manner as described for the contour emphasizing circuit according to the present invention. Can be increased.

  In this contour emphasizing method, as an example, among the steps of generating the signal D3 obtained by delaying the signal D2 by this predetermined time, the signal D1, the signal D3, and the signal superimposed in the fourth step Preferably, the method further comprises selecting a median signal. As a result, the preshoot component and the overshoot component can be completely suppressed.

  According to the present invention, the preshoot component and the overshoot component can be moderately suppressed, and the sharpness of the rising waveform of the video signal can be sufficiently increased, so that the sharpness of the image is increased without degrading the image quality. The effect that it can be obtained.

  Furthermore, an effect that the preshoot component and the overshoot component can be completely suppressed is also obtained.

  Hereinafter, an example in which the present invention is applied to a video signal processing apparatus for a television receiver will be specifically described with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of a video signal processing apparatus for a television receiver to which the present invention is applied. The composite video signal CVBS received by the antenna 1 and demodulated / tuned by the front end unit 2 is converted into an 8-bit digital signal by the A / D converter 3 and then the Y / C separation / chroma by the decoder 4. It is decoded and separated into component signals _YC B _{C R.}

The digital component signal YC _B C _R is a scan converter 5, is converted into a timing and resolution of the signal corresponding to the PDP (Plasma Display Panel) 8 which is a display element, supplied to the Y color difference RGB processing section 6 Then, video signal processing is performed and matrix conversion is performed into RGB signals.

  The RGB signal output from the Y color difference RGB processing unit 6 is subjected to processing such as subfield conversion by the panel driver 7 and supplied to the PDP 8.

FIG. 2 is a block diagram illustrating a configuration of the Y color difference RGB processing unit 6. Digital component signal inputted to the Y color difference RGB processing unit 6, the luminance signal Y and color difference is converted into a _YC B _{C R} in the case of the luminance signal Y and the color difference signals _C B _{C R} the separation (RGB signals in the matrix circuit 11 Signal C _B C _R ).

  The luminance signal Y is subjected to contrast and sharpness processing by a contrast processing circuit 12 and a sharpness processing circuit 13. The color difference signal CBCR is subjected to color level (saturation) adjustment processing and hue processing by a saturation processing circuit 14 and a hue processing circuit 15, respectively.

The luminance signal Y and the color difference signal C _B C _R subjected to these processes are converted into RGB signals by the matrix circuit 16, then subjected to gamma correction processing by the gamma correction circuit 17, and white balance by the white balance circuit 18. The processed color is output from the Y color difference RGB processing unit 6.

  FIG. 3 is a block diagram showing a configuration of the sharpness processing circuit 13 of FIG. The sharpness processing circuit 13 is provided with a horizontal direction contour enhancement circuit 21 and a vertical direction contour enhancement circuit 22. The luminance signal Y input to the sharpness processing circuit 13 is subjected to horizontal edge enhancement processing by the horizontal direction edge enhancement circuit 21 and then subjected to vertical edge enhancement processing by the vertical direction edge enhancement circuit 22.

  The horizontal outline emphasis circuit 21 and the vertical outline emphasis circuit 22 have the same configuration except for the length of the delay time of the delay element. FIG. 4 is a block diagram showing the configuration of the horizontal direction outline emphasis circuit 21 as a representative. The horizontal outline emphasis circuit 21 is provided with delay elements 31, 32, 38, 39, inverter amplifiers 33, 34, adders 35, 40, 42, limiters 36, 37, and an amplifier 41. . The delay elements 31, 32, 38, and 39 are each configured by connecting eight latch circuits driven by a pixel clock in parallel, and delay the video signal by one pixel time (the vertical contour emphasizing circuit 22). On the other hand, this delay time is one horizontal line).

  A luminance signal (in this case, represented as an input signal D0) input from the input terminal 101 to the horizontal contour emphasis circuit 21 is delayed by one pixel by the delay element 31 and further delayed by one pixel by the delay element 32. Further, the input signal D0 is multiplied by the coefficient -1/2 by the inverter amplifier 33, and the output signal D2 of the delay element 32 is multiplied by the coefficient -1/2 by the inverter amplifier 34.

  Then, the adder 35 adds the output signal D1 of the delay element 31, the output signal -D0 / 2 of the inverter amplifier 33, and the output signal -D2 / 2 of the inverter amplifier 34, whereby the input signal D0 and the signal D1 are (D1-D0) / 2 + (D1-D2) / 2 = D1-D0 / 2-D2 which is the sum component of the difference (D1-D0) of the signal and the difference (D1-D2) between the signal D2 and the signal D1 / 2 is required. This sum component itself is the same as the contour correction signal AP obtained by the above-described conventional contour enhancement circuit (FIG. 9).

  This sum component is sent to the limiter 36 and the limiter 37. The limiter 36 is a circuit that determines the polarity of an input signal and selects only a signal having a positive polarity. The limiter 37 is a circuit that determines the polarity of an input signal and selects only a signal having a negative polarity.

  Note that the limiter 36 and the limiter 37 not only output only a positive polarity signal and a negative polarity signal, but also the absolute value of the amplitude level of the input signal as shown in FIG. You may use the circuit of the characteristic which does not output a certain part (part of the lower predetermined number of bits among 8 bits). Thereby, the limiter 36 and the limiter 37 can also be used as a circuit for performing a coring process (a process for preventing a minute noise component from being emphasized).

  In FIG. 4, the output signal of the limiter 37 is delayed by one pixel by the delay element 38 and further delayed by one pixel by the delay element 39. Then, the output signal APp of the limiter 36 and the output signal APm2 of the delay element 39 are added by the adder 40, whereby the contour emphasis signal AP 'is obtained.

  The contour correction signal AP ′ is gain-controlled by being multiplied by a coefficient k (for example, a value between 0.0 and 1.3) by the amplifier 41, and is added to the output signal D2 of the delay element 32 by the adder. Superimposed. In this way, the signal D2 + AP ′ × k subjected to the contour enhancement processing is obtained, and this signal D2 + AP ′ × k is output from the output terminal 102 of the horizontal direction contour enhancement circuit 21.

  FIG. 6 is a waveform diagram illustrating the contour enhancement of the input signal D0 by the horizontal contour enhancement circuit 21 (the values of amplitude and time on the vertical and horizontal axes are normalized values, respectively). As shown in FIG. 6A, it is assumed that a signal D0 having a 2T pulse rising waveform is input to the contour enhancement circuit in the horizontal direction contour enhancement circuit 21. As described above, the 2T pulse squares the sine function, and the pulse width is the reciprocal of the bandwidth of the video signal (for example, about 240 nanoseconds which is the reciprocal of the bandwidth 4.2 MHz for the luminance signal of the NTSC signal). This signal is known as the most suitable signal for measuring the band characteristics of the video signal.

  By delaying the input signal D0 by one pixel at each of the delay elements 31 and 32, as shown in FIG. 6A, the signal D1 obtained by delaying the input signal D0 by one pixel and the input signal D0 by two. A signal D2 delayed by a pixel is generated.

  Then, after the sum component of the difference (D1-D0) between the input signal D0 and the signal D1 and the difference (D1-D2) between the signal D2 and the signal D1 is obtained, as shown in FIG. Thus, a signal APp having a positive polarity in the sum component and a signal APm2 obtained by delaying a signal having a negative polarity in the sum component by two pixels are obtained.

  The signals APp and APm2 are new overshoots obtained by processing the differences (D1-D2) and (D1-D0) which are the overshoot component and the preshoot component in the conventional contour emphasis circuit (FIG. 9). Component, preshoot component. Therefore, by adding the signal APp and the signal APm2, as shown in FIG. 6B, a new contour correction signal AP '= APp + APm2 is obtained. (In FIG. 6B, for the sake of illustration, the signals APp and APm2 are drawn while being shifted up and down with respect to the contour correction signal AP '.)

  Then, the contour correction signal AP ′ is superposed on the signal D2 by controlling the gain by multiplying by the coefficient k, so that the rising waveform becomes steep and rises as shown in FIG. 6C. A signal D2 + AP ′ × k with a preshoot component and an overshoot component added to the leading and trailing edges of the part is obtained.

  The reason why the contour correction signal AP ′ is superimposed on the signal D2 delayed by one pixel rather than the signal D1 in this way is that the output signal of the limiter 36 is temporally one pixel ahead. If the output signal of the limiter 37 can be delayed by one pixel while being advanced, the signal D1 may be superimposed on the signal D1, but the output signal cannot be advanced in time. Instead, the limiter 37 is used instead. This is because the output signal is delayed by 2 pixels (the contour correction signal AP ′ is delayed by 1 pixel as a whole).

  In the example of FIG. 6 (c), the signal D2 + AP ′ × k has a rising waveform with a steepness so that the bandwidth of the luminance signal is approximately doubled, and the preshoot component and the overshoot component are moderately suppressed. (Only about 20% of the signal waveform is added). Therefore, the sharpness of the image can be increased without degrading the image quality.

  Next, an example of a change in the configuration of the horizontal direction contour emphasizing circuit 21 and the vertical direction contour emphasizing circuit 22 in FIG. FIG. 7 is a block diagram showing a modified example of the configuration of the horizontal direction outline emphasizing circuit 21, and the same reference numerals are given to portions common to FIG. 4. In this example, a delay element 43 and a median filter (median filter) 44 are provided in addition to the components shown in FIG.

  The output signal D2 of the delay element 32 is further delayed by one pixel by the delay element 43. Then, the output signal D 1 of the delay element 31, the output signal D 3 of the delay element 43, and the output signal D 2 + AP ′ × k of the adder 42 are sent to the median filter 44. The median filter 44 selects the median signal of the three signals. Then, this median signal is output from the output terminal 102 of the horizontal contour emphasizing circuit 21.

  FIG. 8 is a waveform diagram showing the outline enhancement of the input signal D0 by the horizontal outline enhancement circuit 21 according to this modified example in correspondence with FIG. 6 (the numerical values of the amplitude and time on the vertical and horizontal axes are , Each normalized value). As shown in FIG. 8A, in addition to the signals D1 and D2 obtained by delaying the input signal D0 by one pixel and two pixels, a signal D3 obtained by delaying the input signal D0 by three pixels is generated.

  Then, the signal D1, the signal D3, and the signal D2 + AP ′ × k as shown in FIG. 8B are sent to the median filter 44. Note that the signal D3 is generated in this modification because the signal D2 + AP ′ × k is delayed by two pixels from the input signal D0. This is because a signal obtained by delaying the input signal D0 by three pixels is required in addition to the signal D1 obtained by delaying the input signal D0 by one pixel.

  As shown in FIG. 8 (b), at the leading edge portion of the rising waveform of the signal D2 + AP ′ × k, the signal D3 is a median signal among the signals D1, D3, and D2 + AP ′ × k. is there. Therefore, at the leading edge portion, as shown in FIG. 8C, the signal D3 is selected by the median filter 44, so that a signal containing no preshoot component is output from the horizontal direction contour emphasizing circuit 21. .

  In the central portion of the rising waveform of the signal D2 + AP ′ × k, among these three signals, the signal D2 + AP ′ × k is a median signal. Accordingly, in this central portion, as shown in FIG. 8C, the signal D2 + AP ′ × k is selected by the median filter 44, so that the signal with the increased steepness of the rising waveform is displayed in the horizontal direction edge emphasis circuit 21. Is output from.

  In the trailing edge portion of the rising waveform of the signal D2 + AP ′ × k, the signal D1 is a median signal among these three signals. Therefore, at this trailing edge portion, as shown in FIG. 8C, the signal D1 is selected by the median filter 44, and therefore a signal containing no overshoot component is output from the horizontal direction contour emphasizing circuit 21. .

  In this way, in this modified example, the steepness of the rising waveform can be increased to about twice the input signal D0, and the preshoot component and the overshoot component can be completely suppressed.

  In the above example, the delay time of each delay element 31, 32, 38, 39, 43 is set to one pixel time. However, the present invention is not limited to this, and the delay time of these delay elements may be set to a time slightly shifted from the time for one pixel.

  In the above example, the sharpness processing circuit 13 is provided with a horizontal direction contour emphasizing circuit 21 and a vertical direction contour emphasizing circuit 22. However, as another example, only the horizontal direction edge enhancement circuit 21 may be provided in the sharpness processing circuit 13.

  In the above example, a signal digitally converted by the A / D converter 3 of FIG. 1 is input to the horizontal direction contour emphasizing circuit 21 and the vertical direction contour emphasizing circuit 22. However, the present invention is not limited to this, and an analog signal may be input to the horizontal outline emphasis circuit 21 or the vertical outline emphasis circuit 22. In that case, for example, each delay element in FIGS. 4 and 6 is configured by a delay line having a delay time of one pixel, or the limiters 36 and 37 in FIGS. 4 and 6 are configured by a rectifier circuit. What should I do?

  In the above example, the present invention is applied to a video signal processing apparatus for a television receiver using a PDP as a display element. However, the present invention is not limited to this, and the present invention may be applied to a video signal processing device for a television receiver using a display element (for example, LCD) other than a PDP, and further to a video signal processing device for a video camera. .

It is a block diagram which shows the whole structure of the video signal processing apparatus for television receivers which applied this invention. It is a block diagram which shows the structure of the Y color difference RGB process part of FIG. FIG. 3 is a block diagram illustrating a configuration of a sharpness processing circuit in FIG. 2. It is a block diagram which shows the structure of the horizontal direction outline emphasis circuit of FIG. It is a figure which shows the example of a change of the input / output characteristic of the limiter of FIG. FIG. 5 is a waveform diagram illustrating an example of contour enhancement of an input signal by the horizontal contour enhancement circuit of FIG. 4. It is a block diagram which shows the example of a change of a structure of the horizontal direction outline emphasis circuit of FIG. FIG. 8 is a waveform diagram illustrating the outline enhancement of an input signal by the horizontal outline enhancement circuit of FIG. 7. It is a block diagram which shows the structural example of the conventional outline emphasis circuit. FIG. 10 is a waveform diagram illustrating a state of contour enhancement of an input signal by the contour enhancement circuit of FIG. 9.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Antenna 2 Front end part 3 A / D converter 4 Decoder 5 Scan converter 6 Y color difference RGB processing part 7 Panel driver 8 PDP
13 Sharpness Processing Circuit 21 Horizontal Edge Enhancement Circuit 22 Vertical Edge Enhancement Circuit 31 Delay Element 32 Delay Element 33 Inverter Amplifier 34 Inverter Amplifier 35 Adder 36 Limiter 37 Limiter 38 Delay Element 39 Delay Element 40 Adder 41 Amplifier 42 Adder 43 Delay element 44 Median filter

Claims (4)

Delay means for generating a signal D1 obtained by delaying the input signal D0 by a predetermined time, and a signal D2 obtained by delaying the signal D1 by the predetermined time;
Arithmetic means for generating a sum component of (D1-D0) and (D1-D2) from the input signal D0, the signal D1, and the signal D2,
Extraction means for extracting only positive polarity signals and negative polarity signals from the sum component;
Second delay means for delaying the negative polarity signal by a time approximately twice the predetermined time;
Adding means for adding the positive polarity signal and the negative polarity signal delayed by the second delay means;
Gain control means for controlling the gain of the output signal of the adding means;
A contour emphasizing circuit comprising: a second adding unit that superimposes the output signal of the gain control unit on the signal D2. In the outline emphasis circuit according to claim 1,
Delay means for generating a signal D3 obtained by delaying the signal D2 by the predetermined time;
The contour emphasizing circuit further comprising median value selection means for selecting a median value signal among the signal D1, the signal D3, and the output signal of the second addition means. A first step of generating a signal D1 obtained by delaying the input signal D0 by a predetermined time and a signal D2 obtained by delaying the signal D1 by the predetermined time;
A second step of generating a sum component of (D1-D0) and (D1-D2) from the input signal D0, the signal D1, and the signal D2,
Only the positive polarity signal and the negative polarity signal are extracted from the sum component, respectively, and the negative polarity signal is delayed by about twice the predetermined time, and then the positive polarity signal is delayed. A third step of adding to the signal;
And a fourth step of superimposing the added output in the third step on the signal D2 after controlling the gain. In the outline emphasis method according to claim 3,
Generating a signal D3 obtained by delaying the signal D2 by the predetermined time;
The contour emphasizing method further comprising: selecting a signal having a median value among the signal D1, the signal D3, and the signal superimposed in the fourth step.

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