JP2001285672A - Contour correction device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a contour correction device that can conduct optimum contour correction for both an edge part of a high contrast of a video signal and a part with high definition having a small contrast. SOLUTION: An edge component detection circuit 4 detects an edge component of an input video signal and supplies an edge level to a correction coefficient generating circuit 5. The correction coefficient generating circuit 5 generates a correction coefficient corresponding to the edge level, that is, the contrast and supplies it to a contour correction circuit 2. The contour correction circuit 2 corrects the contour of the input video signal and provides an output of the result from an output terminal 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contour correcting device for sharpening a contour of a video signal displayed on an image display device such as a television receiver or a display device.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing a conventional contour correction device. In FIG. 6, an input video signal is input from an input terminal 1 and supplied to an adder 90 and an HPF (high pass filter) 91. The HPF 91 extracts a high frequency signal component from the input video signal and supplies it to the multiplier 92. The multiplier 92 multiplies the high frequency signal component by a correction coefficient input from the input terminal 6 and supplies the output to the adder 90. The adder 90 adds the high frequency signal component supplied from the multiplier 92 to the input video signal, obtains an output video signal whose contour has been corrected, and outputs it from the output terminal 7. The correction amount of the contour correction is controlled by the value of the correction coefficient.

Generally, the high frequency signal component of a video (image) includes an edge component of a portion having a large contrast, a portion having a small contrast but a high definition, and the like. For example, the outline of a building, a window frame or a crosspiece, a branch portion of a dead tree against the sky, and the like are edge components (contour portions) having a large contrast. A lawn portion in a landscape image and a faint pattern on a wall of a building are examples of a portion having a small contrast but a high definition. In the conventional example of the contour correction device shown in FIG. 6, the contour is uniformly emphasized regardless of the contrast.

[0004]

Generally, in a portion where the contrast is relatively small and the definition is high, when the contour is emphasized, the texture is further increased and the high definition is greatly improved. However, in the conventional contour correction device shown in FIG. 6, if the optimum contour correction is performed in a portion having a small contrast but a high definition, the correction becomes excessively large in a portion having a high contrast. There was a problem that the image was very unsightly due to jagged portions.

Conversely, if the amount of correction in a portion having a large contrast is optimized, the amount of correction will be insufficient in a portion having a small contrast, resulting in an image having insufficient definition. SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and optimal contour correction can be performed on both an edge portion of a high-contrast portion of a video signal and a low-contrast but high-definition portion. An object of the present invention is to provide a contour correction device.

[0006]

In order to achieve the above object, in an outline correction device for correcting the outline of an input video signal, a center of a pixel of interest in the input video signal is shifted from a region of at least 5 pixels to a center. An upper limit detecting means for detecting a pixel having a level higher than a level as an upper limit value; a lower limit detecting means for detecting a pixel having a level lower than a central level as a lower limit value in an area of at least 5 pixels or more around the target pixel; High-frequency component generation means for generating a high-frequency signal component for the pixel of interest; high-frequency component addition means for multiplying the high-frequency signal component by a correction coefficient to add the high-frequency component to the pixel of interest; Amplitude limiting means for limiting the signal level of the output of the means between the upper limit value and the lower limit value; and an edge component in the input video signal. An edge component detection means for detecting,
And a correction coefficient generation unit configured to generate the correction coefficient according to the value of the edge component.

[0007]

FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, an input video signal is input from an input terminal 1 and supplied to an input terminal 3 of a contour correction circuit 2 and an edge component detection circuit 4. The edge component detection circuit 4 detects an edge component of the input video signal, and supplies edge level information to a correction coefficient generation circuit 5. The correction coefficient generation circuit 5 generates a correction coefficient according to the edge level value and supplies the correction coefficient to the input terminal 6 of the contour correction circuit 2. The contour correction circuit 2 performs contour correction on the input video signal in accordance with the correction coefficient supplied from the correction coefficient generation circuit 5,
Output from the output terminal 7.

FIG. 3 is a detailed block diagram of the contour correction circuit 2 in FIG. In FIG. 3, an input video signal input from an input terminal 3 is sequentially input to D flip-flops 22 to 25, which are one-clock delay elements, and is delayed by one clock. The input video signal input from the input terminal 3 is also input to an upper limit detection circuit 26, a lower limit detection circuit 27, and an HPF (high pass filter) 28. The outputs of the D flip-flops 22 to 25 are respectively upper limit detection circuits 26,
It is input to the lower limit detection circuit 27 and the HPF 28. The signal B1 delayed by two clocks with respect to the input signal output from the D flip-flop 23 is the signal shown in FIG. 4A, and the signal B1 is input to the adder 30. This signal B1 is set as a target pixel.

The upper limit detection circuit 26 detects not the pixel of the maximum level but the pixel of the second highest level from the five input pixels centering on the signal B1 as the target pixel,
The signal B3 shown in FIG. Note that the upper limit detection circuit 26 detects a pixel having a level higher than the central level, excluding the pixel at the maximum level, among the input pixels. In the configuration of FIG. 3, the upper limit detection circuit 26 detects five pixels. Therefore, the pixel is necessarily the second largest pixel. This signal B3 is input to a MIN (minimum value detection circuit) 32.

The lower limit detection circuit 27 is not a pixel having the minimum level than the five input pixels centered on the signal B1, and is
A pixel having the second lowest level is detected, and a signal B4 shown in FIG. This signal B4 is input to MAX (maximum value detection circuit) 31. The lower limit detection circuit 27
Is to detect pixels at a level lower than the central level, excluding the pixels at the minimum level, among the input pixels,
In the configuration of FIG. 3, since the detection is performed from five pixels, the pixel is necessarily the second-lowest level pixel.

The HPF 28 has a tap gain of (−1/4, −1, 5/2, −1, − ／) as an example.
It is a tap filter. The HPF 28 generates a high frequency signal component at the edge portion of the signal B1 from the input five pixels centered on the signal B1. And input terminal 6
Assuming that the correction coefficient supplied from is, for example, 2,
The output of F28 is input to the multiplier 29 and doubled to be a signal B2 shown in FIG. This signal B2 is input to the adder 30. The adder 30 receives the input signal B
1 and the signal B2 are added, and a signal B5 shown in FIG. The signal B5 is a signal obtained by adding a high frequency signal component to the signal B1. The signal B5 is input to the maximum value detection circuit 31.

The maximum value detection circuit 31 outputs a signal B4 and a signal B
5 and the larger one is selected, and the signal B shown in FIG.
6 is output. The undershoot portion in the signal B5 is removed by the maximum value detection circuit 31. The signal B6 is input to the minimum value detection circuit 32. The minimum value detection circuit 32 selects the smaller one of the signals B3 and B6 and outputs a signal B7 shown in FIG. The minimum value detection circuit 32 removes an overshoot portion in the signal B6. The maximum value detection circuit 31 and the minimum value detection circuit 32 transmit the signal B5 to the upper limit detection circuit 2
It can be seen that the circuit operates as amplitude limiting means for limiting the amplitude between the upper limit value by the reference numeral 6 and the lower limit value by the lower limit detection circuit 27.

By the above operation, the signal B7 becomes the signal B1
The inclination near the center of the inclination is doubled as compared with, and the edge becomes steep, so that the contour is corrected without adding a shoot component. The signal B7 is output from the output terminal 7. Note that the slope near the center of the slope of the signal B7 is
It can be set freely according to the value of the correction coefficient supplied from the input terminal 6. As described above, since the pixels at the upper limit level and the pixels at the lower limit level are detected from the area of five pixels centering on the target pixel in the video signal, the contour correction operation is performed as shown in FIG. In FIG.
Although the area has five pixels, it is needless to say that the maximum level pixel and the minimum level pixel may be detected from the area of six or more pixels.

FIG. 5 shows a two-dimensional extension of the contour correction circuit shown in FIG. In FIG. 5, an input video signal input from an input terminal 3 includes delay elements 51 to 5 for one horizontal period.
4 and sequentially delayed by one horizontal period. The input video signal input from the input terminal 3 is sequentially input to D flip-flops 55 to 58, which are one-clock delay elements, and is delayed by one clock. Delay elements 51-54
The output digital signals are D flip-flops 59 to 62, which are also one-clock delay elements, respectively.
63 to 66, 67 to 70, 71 to 74
Delayed by one clock.

An input video signal input from the input terminal 3 is supplied to an upper limit detection circuit 75, a lower limit detection circuit 76, a two-dimensional HP
It is also input to F (two-dimensional high-pass filter) 77. Outputs of the D flip-flops 55 to 74 are input to an upper limit detection circuit 75, a lower limit detection circuit 76, and a two-dimensional HPF 77, respectively. As described above, the upper limit detection circuit 75, the lower limit detection circuit 76, and the two-dimensional HPF 77 have the D flip-flop 64
5 pixels in the horizontal direction around the signal B1 output from
A signal of a total of 25 pixels of 5 pixels in the vertical direction is input. The signal B1 is input to the adder 79.

The upper limit detection circuit 75 ranks the input 25 pixels centered on the signal B1 as the target pixel from 1 to 25 in ascending (or descending) order of level, and from the 25 pixels to the maximum. For example, a pixel at the fourth largest level from the maximum level is detected instead of the pixel at the level, and the signal B3 is output. This signal B3 is input to a MIN (minimum value detection circuit) 81. Note that the upper limit detection circuit 75
Among the input pixels, pixels of a level higher than the center level are detected except for the pixel of the maximum level.

More preferably, the upper limit detection circuit 75
The minimum level to the maximum level of the input pixel are divided into three parts, a small level part, an intermediate level part, and a large level part, and a pixel of the large level part excluding the pixel of the maximum level is detected. Therefore, in the configuration of FIG. 5, the pixel of the second largest level, the pixel of the third largest level, or the pixel of the fifth largest level may be used. What level of the pixel is detected by the upper limit detection circuit 75 may be selected in accordance with the relationship between the noise removal effect and the contour correction effect.

The lower limit detection circuit 76 ranks the input 25 pixels centered on the signal B1 from 1 to 25 in ascending order of the level (or in descending order of magnitude). Instead, a pixel at the fourth lowest level from the minimum level is detected and a signal B4 is output.
This signal B4 is input to MAX (maximum value detection circuit) 80. In addition, the lower limit detection circuit 76 outputs,
Except for the pixel at the minimum level, a pixel at a level lower than the central level is detected.

More preferably, the lower limit detection circuit 76
The minimum to maximum levels of the input pixels are divided into three equal parts: a small level part, an intermediate level part, and a large level part, and the pixels of the small level parts excluding the minimum level pixel are detected. Therefore, in the configuration of FIG. 5, the pixel may be the second lowest level pixel, the third lowest level pixel, or the fifth lowest level pixel. What level of pixel is detected by the lower limit detection circuit 76 may be selected in accordance with the relationship between the noise removal effect and the contour correction effect. In the above description, the upper limit detection circuit 75 detects a pixel that is not the maximum level pixel from the 25 pixels. However, the maximum level pixel may be used if the noise resistance is reduced. Of course. Similarly, it goes without saying that the lower limit detection circuit 76 may also be a pixel of the minimum level.

The two-dimensional HPF 77 sets the tap gain as follows, for example. -1/256 -4/256 -6/256 -4/256 -1/256 -4/256 -16/256 -24/256 -16/256 -4/256 -6/256 -24/256 220 / 256 -24/256 -6/256 -4/256 -16/256 -24/256 -16/256 -4/256 -1/256 -4/256 -6/256 -4/256 -1/256 here Is a filter with 25 taps, and the tap gain is symmetric with respect to the center.

The two-dimensional HPF 77 generates a high frequency signal component at the edge of the signal B1 from the input 25 pixels centered on the signal B1. If the correction coefficient supplied from the input terminal 6 is 2, for example, the two-dimensional HPF
The output of 77 is input to a multiplier 78 and doubled to obtain a signal B2. This signal B2 is input to the adder 79. The adder 79 adds the input signals B1 and B2 and outputs a signal B5. This signal B5 is the signal B
1 is a signal in which a high frequency signal component is added. The signal B5 is input to a MAX (maximum value detection circuit) 80.

The maximum value detection circuit 80 outputs the signal B4 and the signal B
5, the larger one is selected, and a signal B6 is output. The undershoot portion in the signal B5 is removed by the maximum value detection circuit 80. The signal B6 is input to the minimum value detection circuit 81. The minimum value detection circuit 81 outputs the signal B
3 and the signal B6, the smaller one is selected, and the signal B7 is output. The minimum value detection circuit 81 removes an overshoot portion in the signal B6. Note that the maximum value detection circuit 80 and the minimum value detection circuit 81 output the signal B5
Is determined by an upper limit value detection circuit 75 and a lower limit detection circuit 76.
It can be seen that the apparatus operates as amplitude limiting means for limiting the amplitude between the lower limit value and the lower limit value.

By the above operation, the signal B7 becomes the signal B1
The inclination near the center of the inclination becomes steeper than that of the above, and the contour is corrected without adding a shoot component. The signal B7 is output from the output terminal 7. Note that the inclination near the center of the inclination of the signal B7 can be freely set by the value of the correction coefficient supplied from the input terminal 6. In FIG. 5, an upper limit detection circuit 75 detects a pixel of a level higher than the central level except for a pixel of a maximum level among input pixels, and a lower limit detection circuit 76 detects a pixel of a minimum level of the input pixels. Since a pixel at a level smaller than the central level is detected except for the pixel, even if noise is mixed in the input signal, the noise does not increase. Therefore, it is possible to provide a contour correction device having excellent noise resistance.

In FIG. 5 described above, the area of the two-dimensional HPF 77 for generating the high frequency signal is 25 taps in the horizontal direction 5 and the vertical direction 5, and the area by the upper limit detection circuit 75 and the lower limit detection circuit 76 is also in the horizontal direction. 5, 25 in the vertical direction 5
Although both regions are set to be the same as pixels, it is not always necessary to make them the same. For example, two-dimensional HPF77
To the 25 taps in the horizontal direction 5 and the vertical direction 5, and the upper limit detection circuit 75 and the lower limit detection circuit 76 to the horizontal direction 5, the vertical direction 3
Good contour correction is possible even with 15 pixels.

In FIG. 1, the edge component detection circuit 4
The edge level of the input video signal is, for example, a horizontal edge detection filter H1 and a vertical edge detection filter H2 shown below.
To detect. H1 is as follows. 1/4 1/2 1/4 0 00 -1/4 -1/2 -1/4 Similarly, H2 is as follows. -1/4 0 1/4 -1/2 0 1/2 -1/4 0 1/4 Since the values of H1 and H2 are positive or negative, they are converted to absolute values.

As shown in FIG. 3, when the contour correction circuit 2 performs one-dimensional processing in the horizontal direction, it detects a vertical edge. Therefore, the edge level value E is given by E = | H2 |
Becomes Further, as shown in FIG. 5, in the case of two dimensions of horizontal and vertical, E = | H1 | + | H2 |. Where | |
Represents an absolute value. The edge level value E is a value according to the level of the edge of the image. The edge level value E is supplied from the edge component detection circuit 4 to the correction coefficient generation circuit 5.

FIG. 2 is a characteristic diagram for explaining the operation of the correction coefficient generation circuit 5. As shown in FIG. 2, when the edge level value E is equal to or less than e1, the correction coefficient value is g2.
When the edge level value E is equal to or more than e2, the correction coefficient value is g1. When the edge level value E is between e1 and e2, the correction coefficient value is a value obtained by linearly interpolating between g2 and g1.

When the contrast of the input video signal is large, the detected edge level value E becomes large and the correction coefficient value becomes small, so that the contour correction amount becomes small.
On the other hand, when the contrast of the input video signal is small,
Since the detected edge level value E decreases and the correction coefficient value increases, the contour correction amount increases. The values of the edge level values e1 and e2 and the correction coefficient values g1 and g2 are set so as to provide an optimal amount of contour correction in various images from different images. According to the present invention, as described above, an optimum contour correction amount can be set for a case where the contrast is large and a case where the contrast is small, so that the conventional problem can be solved. Further, in the case of the present invention in which the contour is corrected without overshoot or undershoot, the effect is very large.

[0029]

The contour correcting apparatus according to the present invention is extremely excellent in that optimum contour correction can be performed on both the edge portion of the high contrast portion of the video signal and the low contrast but high definition portion. effective.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a characteristic diagram for explaining an operation of a correction coefficient generation circuit 5 in FIG.

FIG. 3 is a detailed block diagram of an outline correction circuit 2 in FIG. 1;

FIG. 4 is a waveform chart for explaining the operation of FIG. 3;

FIG. 5 is a detailed block diagram of an outline correction circuit 2 in FIG. 1;

FIG. 6 is a block diagram showing a conventional example.

[Explanation of symbols]

 1, 3, 6 input terminal 2 contour correction circuit 4 edge component detection circuit 5 correction coefficient generation circuit (correction coefficient generation means) 7 output terminal 22 to 25, 55 to 74 D flip-flop 28 HPF (high-pass filter) (high-frequency component Generating means) 29,78 multiplier 30,79 adder (high-frequency component adding means) 31,80 MAX (maximum value detecting circuit) (amplitude limiting means) 32,81 MIN (minimum value detecting circuit) (amplitude limiting means) 26,75 Upper limit detection circuit (upper limit detection means) 27,76 Lower limit detection circuit (lower limit detection means) 77 Two-dimensional HPF (high frequency component generation means)

Claims (1)

[Claims] 1. An outline correction apparatus for correcting an outline of an input video signal, wherein an upper limit is detected as an upper limit value of a pixel having a level higher than a central level from an area of at least 5 pixels or more around a target pixel in the input video signal. Detecting means; lower limit detecting means for detecting, as a lower limit, a pixel having a level smaller than a central level from an area of at least 5 pixels or more around the pixel of interest; and a high band for generating a high frequency signal component for the pixel of interest. A component generating unit, a high-frequency component adding unit that multiplies the high-frequency component by a correction coefficient, and adds the high-frequency component to the pixel of interest. Amplitude limiting means for limiting the amplitude to a lower limit, edge component detecting means for detecting an edge component in the input video signal, A correction coefficient generation unit configured to generate the correction coefficient according to the value of the component.