JP2005223668A - Soft judging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize efficient soft judgment by a soft judging apparatus having a soft decision arbitration value setting function 31 which establishes arbitration values used for the soft decision of received data by which error correction coding is performed, and a soft decision function 32 which performs the soft decision of the received data using the arbitration values. <P>SOLUTION: The soft decision arbitration value setting function 31 detects the maximum value of the level of the received data in every communication frame by receiving data level maximum detection means, averages the maximum value concerned by predetermined equalization system about a plurality of communication frames by a receiving data level maximum averaging means, and establishes the values of the larger one as arbitration values among the values and predetermined threshold as a result of the arbitration values setting means doing division of the maximum by the mean rate. With soft decision function part 32, as a result of soft decision result data formation means doing division of the received data with the arbitration values, the data of predetermined work length of high order are formed as the data of the soft decision result about the values. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a soft decision device that performs soft decision on received data that has been subjected to error correction coding, and more particularly to a technique that realizes efficient soft decision.

For example, a communication apparatus having a codec circuit that uses an error correction code such as a convolutional code has been implemented. Various studies have been made on soft decision and decoding (see, for example, Patent Documents 1 to 3).
FIG. 10 shows a configuration example of a communication device having a codec decoding circuit.
FIG. 11 shows a configuration example of the modem 121 and the codec decoding unit 122 used in the communication apparatus as shown in FIG.
FIG. 12 shows a configuration example of the soft decision unit 141 provided in the codec decoding unit 122 as shown in FIG.

JP 2001-7711 A Japanese Patent Laid-Open No. 8-8989 JP-A-10-150372

However, for example, the codec circuit having the configuration shown in FIG. 12 may not be able to accurately decode as a result of the occurrence of overflow or underflow in the internal operation during the decoding process by the codec decoding unit 122. For this reason, the characteristics are deteriorated (for example, it is less than the decoding result in the hard decision) or the like, and there is a problem in the stability of the operation. The root cause of this problem is that the soft decision threshold (adjustment value) was calculated based on the average power of the input signal, so that a signal with a power exceeding the average value was entered or the signal power fluctuated. In this state, the soft decision output becomes an inappropriate value for the number of operation bits of the codec 122.
That is, the case where the soft decision output becomes an inappropriate value with respect to the number of arithmetic bits of the codec 122 indicates a case where overflow or underflow occurs or a case where the number of effective bits is small. For example, when an overflow or underflow occurs, a normal operation result cannot be expected as is the case with ordinary numerical operations. In the decoding circuit, it is indirect in that the decoding is performed by the traceback process based on the operation result, but it is affected by the overflow or underflow, and the decoding result cannot be obtained as expected. As a result, a phenomenon of deterioration of characteristics that a coding gain cannot be obtained occurs. Further, for example, when the number of effective bits is small, the characteristics are deteriorated. Thus, although correct data can be output by correcting the transmission error by correcting the error with the error correction code, erroneous data is output due to overflow or underflow. Will occur.

Further, in the conventional codec circuit, it is considered necessary to adjust the soft decision threshold (adjustment value) according to, for example, the coding rate. However, conventionally, the same soft decision result is obtained for all the coding rates. Therefore, there is a problem that it is difficult to obtain an optimum soft decision result. The reason that the same soft decision result is obtained for all coding rates is that the deterioration of the characteristics is permitted and the input signal in consideration of the operation word length in the decoding unit 142 is used.
In the conventional codec circuit, correction is performed using processing parameters such as coding rate, but the soft decision threshold (adjustment value) is calculated based on the average power of demodulated data in a single radio frame. For this reason, when the decoding target section (TTI) is not equal to the radio frame, uniform weighting may not be performed due to fluctuations in the received power level within the TTI seen in a fading environment, and the influence of the characteristic Deterioration occurs, which greatly affects the line quality.

Further, the conventional codec circuit has a problem that the configuration of the conventional soft decision circuit is complicated and the circuit scale is large. Therefore, specifically, for example, when the soft decision circuit is realized by hardware, it is very expensive and hinders price reduction. For example, soft decision processing corresponding to the soft decision circuit, for example, When software is implemented with software, the amount of processing increases due to the complexity of the processing, which is realized by an expensive and high-speed DSP (Digital Signal Processor), which hinders price reduction. .
The present invention has been made in view of such a conventional situation, and provides a soft decision device capable of realizing an efficient soft decision when performing soft decision on received data subjected to error correction coding. For the purpose.

In order to achieve the above object, in the soft decision device according to the present invention, an adjustment value used for soft decision of the received data subjected to error correction coding by the soft decision adjustment value setting function unit is set as follows. The received data is softly determined by using the adjustment value set by the soft decision adjustment value setting function unit by the determination function unit.
That is, in the soft decision adjustment value setting function unit, the received data level maximum value detecting means detects the maximum value of the received data level for each communication frame, and the received data level maximum value averaging means is the received data level maximum value detecting means. The maximum value detected by the means is averaged by a predetermined averaging method for a plurality of communication frames, and the maximum value detected by the adjustment value setting means by the reception data level maximum value detection means is obtained by the reception data level maximum value averaging means. The larger one of the result value (that is, (maximum value / average value)) divided by the average value obtained and a predetermined threshold value is set as the adjustment value. Further, when these two values are equal, the adjustment value setting means sets one of the values (the same value as the other value) as the adjustment value.
Further, in the soft decision function unit, the soft decision result data generating means is higher in the result value (that is, (received data / adjustment value)) obtained by dividing the received data by the adjustment value set by the soft decision adjustment value setting function unit. Data of a predetermined word length is generated as soft decision result data.
Therefore, an efficient soft decision can be realized when performing a soft decision on received data subjected to error correction coding.
The above-described operation such as “division” may or may not be actually performed, for example, and processing similar to the processing based on such a calculation result is substantially performed. Just do it.

Here, various types of error correction codes may be used.
Various data may be used as data to be subjected to soft decision.
Various communication frames may be used.
Various levels of received data may be used. For example, the level of the absolute value of the amplitude of the received data can be used.
In addition, various numbers may be used as the number of the plurality of communication frames in the case where the maximum value of the received data level is averaged.
In addition, as a predetermined averaging method when averaging the maximum value of the received data level, various methods may be used. For example, a weighted average method or a simple average method Etc. can be used.
Various values may be used as the predetermined threshold value used by the adjustment value setting means. For example, a limit value (for example, a maximum value) that does not cause an overflow of calculation in the decoding process of received data. Alternatively, a value having a margin compared to such a limit value (for example, a value smaller than the maximum value when the maximum value is the limit value) can be used.
In addition, various word lengths may be used as the upper predetermined word length used by the soft decision result data generation means. For example, for bit data, the word length for the upper predetermined number of bits is used. be able to.

  As described above, according to the soft decision device of the present invention, the soft decision adjustment value setting function unit sets an adjustment value used for soft decision of received data that has been error correction encoded, and the soft decision function unit performs soft decision. When softly determining the received data using the adjustment value set by the adjustment value setting function unit, the soft decision adjustment value setting function unit detects the maximum value of the received data level for each communication frame, and the maximum value Is averaged by a predetermined averaging method for a plurality of communication frames, and a larger value between a result value obtained by dividing the maximum value by the averaged value and a predetermined threshold value is set as an adjustment value. The decision function unit generates data having a predetermined upper word length as the soft decision result data for the result value obtained by dividing the received data by the adjustment value. When decoding the data, efficient soft decision can be performed, it is possible to perform efficient decoding processing.

Embodiments according to the present invention will be described with reference to the drawings.
FIG. 1 shows a configuration example of a modem 1 and codec decoding unit 2 of a codec circuit provided in a communication apparatus according to an embodiment of the present invention.
The modem 1 of this example includes a demodulator 11 and a modulator 12.
The codec decoding unit 2 of this example includes a soft decision unit 21, a decoding unit 22, and an encoding unit 23.
Here, the operation performed by the demodulation unit 11 provided in the modem 1, the encoding unit 23 provided in the codec decoding unit 2, and the modulation side (transmission side) performed by the modulation unit 12 provided in the modem 1. The operation is the same as that in the configuration shown in FIG. 11, for example.
As an operation on the demodulation side (reception side), the received signal is detected and demodulated by the demodulation unit 11 and output to the soft decision unit 21 as demodulated data. The number of output data at this time is specified by the number of received data. The soft decision unit 21 performs a soft decision using the input demodulated data, and outputs the result to the decoding unit 22 as a soft decision output. The number of output data at this time is specified by the number of received data. The decoding unit 22 performs a decoding process at a coding rate specified by the coding rate, and outputs the result as decoded data. The number of output data at this time is designated by the number of decoded data.
Note that 1200, 400, and 1/3 are used as specific examples of the number of transmission data, the number of encoded data, and the coding rate (transmission), respectively. Further, 1200, 400, and 1/3 are used as specific examples of the number of received data, the number of decoded data, and the coding rate (reception), respectively.

The soft decision unit 21 according to the first embodiment of the present invention will be described.
In FIG. 2, the structural example of the soft decision part 21 of this example is shown.
The soft decision unit 21 of this example includes an adjustment value calculation circuit 31 and a soft decision circuit 32.
Here, the adjustment value calculation circuit 31 and the soft decision circuit 32 have the demodulated data output from the demodulator 11, the information on the number of received data output from the controller, and the number of decoded data output from the controller. Information and coding rate (reception) information, symbol timing information (symbol timing) and frame timing information (frame timing) obtained based on the received signal are input.
The adjustment value calculation circuit 31 calculates the adjustment value using the demodulated data generated from the received signal, the number of received data, the number of decoded data, the coding rate (reception), the symbol timing, and the frame timing, and performs soft decision Output to the circuit 32.
The soft decision circuit 32 adjusts the word length of the input demodulated data based on the adjustment value input from the adjustment value calculation circuit 31, and outputs the result as soft decision data.
Here, the symbol timing and the frame timing are used to generate a calculation timing.

FIG. 3 shows a configuration example of the adjustment value calculation circuit 31.
The adjustment value calculation circuit 31 of this example includes a maximum amplitude detection unit 41, an averaging unit 42, an evaluation adjustment unit 43, and a flip-flop 44 for output timing adjustment.
Here, demodulated data is input to the maximum amplitude detection unit 41, information on the number of decoded data is input to the maximum amplitude detection unit 41 and the evaluation adjustment unit 43, and information on the coding rate (reception) is input to the evaluation adjustment unit 43. The symbol timing information is input to the maximum amplitude detection unit 41, and the frame timing information is input to the maximum amplitude detection unit 41, the averaging unit 42, the evaluation adjustment unit 43, and the flip-flop 44.

FIG. 4 shows a configuration example of the maximum amplitude detection unit 41.
The maximum amplitude detection unit 41 of this example includes an absolute value calculator 51, a comparator 52, and a latch buffer 53.
The maximum amplitude detector 41 of this example detects the maximum value of the amplitude of the demodulated data in one radio frame for the demodulated data output from the demodulator 11.
Specifically, the demodulated data is converted into amplitude by the absolute value calculator 51 and output to the comparator 52 and the latch buffer 53. The comparator 52 compares the maximum amplitude value latched by the latch buffer 53 having the initialization function with the output from the absolute value calculator 51, and as a result of the comparison, the output from the absolute value calculator 51 If the value is larger, the output from the absolute value calculator 51 is latched by the latch buffer 53 to obtain the maximum amplitude value at that time. The process of such a procedure is repeated for the number of demodulated data corresponding to one radio frame, and the maximum amplitude value (maximum amplitude value) in the demodulated data is obtained. The initialization timing of the latch buffer 53 is the timing of the falling edge of the frame timing signal (in the case of active low), and the initial value is “0”.
Thus, the maximum amplitude detector 41 of this example detects the maximum absolute value of the symbol value of the demodulated data as the maximum amplitude for each frame.

FIG. 5 shows a configuration example of the averaging unit 42.
The averaging unit 42 of this example includes two multipliers 61 and 64, an adder 62, and a latch buffer 63.
The averaging unit 42 in this example averages the maximum amplitude value for each frame detected by the maximum amplitude detecting unit 41. In this example, an exponential weighting method is used as the averaging method.
Specifically, the multiplier 61 multiplies the maximum amplitude value for each frame detected by the maximum amplitude detector 41 and the weighting coefficient α. The multiplier 64 multiplies the average value one sample before stored in the latch buffer 63 by a weighting coefficient (1-α). The operation results (multiplication results) from these two multipliers 61 and 64 are added by an adder 62. The output (addition result) from the adder 62 is latched by the latch buffer 63 and output as an average value. A frame timing signal is used as an input clock for the latch buffer 63. As an example of the weighting coefficient α, a mode in which the weighting coefficient for the maximum amplitude value detected in the current frame is 0.9 and the weighting coefficient for the average value is 0.1 can be used.
Thus, the averaging unit 42 of this example performs weighted averaging of the maximum value detected by the maximum amplitude detecting unit 41 for a plurality of frames.

FIG. 6 shows a configuration example of the evaluation adjustment unit 43.
The evaluation adjustment unit 43 of this example includes an inverse calculator 71, a multiplier 72, a comparator 73, and a changeover switch 74.
The evaluation adjustment unit 43 of this example outputs an adjustment value based on the maximum amplitude value detected by the maximum amplitude detection unit 41 and the average value (maximum amplitude average value) of the maximum amplitude value acquired by the averaging unit 42. To do.
Specifically, the reciprocal calculator 71 calculates the reciprocal of the maximum amplitude average value, and the multiplier 72 multiplies the reciprocal value by the maximum amplitude value (not averaged). The value of the multiplication result is set as the maximum output data estimated value in the current frame. The comparator 73 compares the multiplication result value output from the multiplier 72 with a predetermined allowable amplitude value, and if the allowable amplitude value is larger than the multiplication result value, the changeover switch 74 supplies the allowable amplitude. While the changeover switch 74 is controlled so that the value is output as the adjustment value, when the allowable amplitude value is smaller than the multiplication result value, the multiplication result value is output from the changeover switch 74 as the adjustment value. The changeover switch 74 is controlled.

In this way, the evaluation adjustment unit 43 calculates {(maximum absolute value of symbol values in each frame) / (average value obtained by the averaging unit 42)} by the multiplier 72, and the calculation result If Z is Z, the comparator 73 compares Z with the allowable amplitude value, and if the result is (Z> allowable amplitude value), the value of Z is output from the changeover switch 74 as an adjustment value. On the other hand, if (Z <allowable amplitude value), the changeover switch 74 outputs the allowable amplitude value as an adjustment value.
Here, as the allowable amplitude value, for example, an upper limit value (maximum value) that does not overflow in the decoding unit 22 is used. Specifically, a decoder capable of M-bit operation is used {2 ^{(M− 1)} / (number of received data)}. As an example, when the operation word length M is 32 (that is, M = 32) and the number of received data is 1200, the allowable amplitude value is 1789570.

The flip-flop 44 shown in FIG. 3 adjusts the timing of the adjustment value (adjusted adjustment value using the allowable amplitude value) output from the changeover switch 74 of the evaluation adjustment unit 43 and then adjusts the timing to the soft decision circuit 32. Output as later adjustment value. At the same time, the flip-flop 44 outputs the adjusted value after the timing adjustment to the averaging unit 42, and the averaging unit 42 averages the subsequent frames. That is, when an allowable amplitude value is selected as the adjustment value, the adjustment value is regarded as {maximum amplitude value / (maximum amplitude average value output from the averaging unit 42)}, and the averaging unit In 42, control is performed so that the result obtained by multiplying the corrected maximum amplitude average value by the weighting coefficient (1-α) is output to the adder 62.
Thus, the flip-flop 44 of this example latches and outputs the adjustment value for each frame.
Further, as described above, when the allowable amplitude value is adopted by the evaluation adjustment unit 43, a value corresponding to the adjustment value output from the flip-flop 44 is input to the multiplier 64 of the averaging unit 42. The weighted coefficient (1-α) is multiplied and output to the adder 62. Such feedback processing may be performed or may not be performed, for example.
As another configuration example, the evaluation adjustment unit 43 compares the maximum amplitude average value output from the averaging unit 42 with the maximum amplitude value in the current frame, and has already evaluated the larger value. It is also possible to use a configuration that outputs as a value (adjusted adjusted value).

FIG. 7 shows a configuration example of the soft decision circuit 32.
The soft decision circuit 32 of this example includes an inverse number operation unit 81, two flip-flops 82 and 85, a multiplier 83, and a selector 84.
The reciprocal calculation unit 81 uses the adjustment value output from the adjustment value calculation circuit 31 to calculate a reciprocal value of the adjustment value and outputs it to the flip-flop 82. The flip-flop 82 latches the inverse value for each frame and outputs the latched value to the multiplication unit 83. Multiplier 83 multiplies the demodulated data and the output from flip-flop 82 and outputs the multiplication result to selector 84. The selector 84 outputs the upper N bits of the output from the multiplication unit 83 to the flip-flop 85. The flip-flop 85 latches the output from the selector 84 for each symbol. The output from the flip-flop 85 is output from the soft decision circuit 32 as an output value (soft decision output) as a result of the soft decision. A specific example of the output data word length N used in the selector 84 is 8.
Here, the reason why the upper N bits are output by the output data word length N is that the word length can be reduced and the circuit scale can be reduced when it is created by hardware (H / W). This is because, when created by software (for example, DSP), improvement in processing efficiency is expected due to reduction in word length, and it is a countermeasure against overflow in the decoding unit 22 common to hardware and software. .
Thus, the flip-flop 82 of this example outputs (1 / adjustment value) for each frame. The multiplier 83 of this example outputs (demodulated data / adjustment value). The selector 84 in this example outputs data for the upper N bits of (demodulated data / adjustment value). The flip-flop 85 of this example latches the output from the selector 84 for each symbol and outputs it as soft decision data.

A soft decision unit according to the second embodiment of the present invention will be described.
FIG. 8 shows a configuration example of the soft decision unit 21 of this example.
The soft decision unit 21 of this example includes an adjustment value calculation circuit 91, an adjustment value evaluation / correction circuit 92, and a soft decision circuit 93.
Here, the demodulated data output from the demodulation unit 11 and the information on the number of received data output from the control unit are input to the adjustment value calculation circuit 91 and the soft decision circuit 93, and the information on the number of decoded data output from the control unit And coding rate (reception) information is input to the adjustment value evaluation / modification unit 92 and the soft decision circuit 93, and symbol timing information (frame timing) and frame timing information (frame timing) obtained based on the received signal are adjusted. The value is input to the value calculation circuit 91, the adjustment value evaluation correction unit 92, and the soft decision circuit 93.

FIG. 9 shows a configuration example of the adjustment value calculation circuit 91.
The adjustment value calculation circuit 91 of this example includes a maximum amplitude detection unit 101, an averaging unit 102, and a flip-flop 103.
Here, the operations of the maximum amplitude detection unit 101, the averaging unit 102, and the flip-flop 103 are, for example, the maximum amplitude detection unit 41, the averaging unit 42, and the flip-flop 44 shown in FIG. It is the same as the operation of.
The adjustment value calculation circuit 91 of this example calculates the adjustment value using the demodulated data generated from the received signal, the information on the number of received data, the information on the number of decoded data, and the information on the coding rate. Frame timing and symbol timing are used to generate the adjustment value calculation timing. The calculated adjustment value is output to the adjustment value evaluation and correction circuit 92 together with the detected maximum amplitude value of the current frame. The adjustment value is a maximum amplitude average value.
The adjustment value evaluation / correction circuit 93 compares the maximum amplitude data estimated value calculated from the maximum amplitude detection value with the adjustment value, selects the larger value, and uses the selected value as the adjustment value after correction. Output to the soft decision circuit 93.
The soft decision circuit 93 has the same configuration as the soft decision circuit 32 shown in FIGS. 5 and 7, for example, and adjusts the word length of the demodulated data based on the corrected adjustment value to obtain soft decision data. Output.
In the configuration of this example, for example, the adjustment value calculation circuit 91 and the adjustment value evaluation / correction circuit 92 can perform the same processing as the adjustment value calculation circuit 31 shown in FIG. 2 in two parts. In this case, the adjustment value evaluation / correction circuit 92 performs the same processing as the evaluation adjustment unit 43 shown in FIG. 3, for example.

As shown in the above embodiment, the codec decoding unit 2 of the communication apparatus according to the embodiment of the present invention, for example, has a function of detecting the maximum value of amplitude from the demodulated data input for each decoded frame ( Maximum amplitude detectors 41, 101), a function for averaging the detected maximum amplitude value over a plurality of frames (averaging units 42, 102), and an output (average value) from the averaging function Is used to adjust the amplitude of the demodulated data by multiplying the function (evaluation adjustment unit 43, adjustment value evaluation correction circuit 92) for calculating the adjustment value in the soft decision circuits 32 and 93 and the reciprocal of the adjustment value. In the decoding circuit and decoding system having the soft decision function unit (soft decision unit 21) including the function (soft decision circuits 32 and 93) for normalizing the demodulated data with the average value of the maximum values, the following configuration is provided. It was.
That is, the softness in the current frame obtained by multiplying the maximum value of the amplitude in the current frame by the reciprocal of the adjustment value from the adjustment function (evaluation adjustment unit 43, adjustment value evaluation correction circuit 92). The maximum output data from the decision function unit (soft decision unit 21) is compared with the allowable maximum value of the output value from the soft decision function unit (soft decision unit 21), and the adjustment value is changed according to the comparison result. Realize what you do.

In the decoding circuit and the decoding method according to the embodiment of the present invention, for example, the soft decision function in the current frame from the output value from the adjustment value calculation function (adjustment value calculation circuit 31) and the maximum amplitude absolute value in the current frame. It has a function (adjustment value calculation circuit 31) that calculates the maximum output value and evaluates the adjustment value by comparing the soft decision function maximum output value and the allowable maximum value (allowable amplitude value). It has a function of calculating the adjustment value again based on the evaluation result of the evaluation function.
In the decoding circuit and the decoding method according to the embodiment of the present invention, for example, the soft decision function in the current frame from the output value from the adjustment value calculation function (adjustment value calculation circuit 91) and the maximum amplitude absolute value in the current frame. It has a function (adjustment value evaluation correction circuit 92) for calculating an adjustment value by calculating a maximum output value and comparing the soft decision function maximum output value with an allowable maximum value. A function (adjustment value evaluation and correction circuit 92) for adjusting the adjustment value again based on the evaluation result is provided.

Therefore, in the adjustment value calculation circuits 31 and 91 according to the embodiment of the present invention, the adjustment value is evaluated and adjusted by the comparison function of the evaluation adjustment unit 43 or the adjustment value evaluation correction circuit 92, for example, in the current frame. Even when the power distribution of the demodulated data is large, the adjustment value is corrected by replacing it with the maximum amplitude value in the current frame, and the decoding unit 22 resulting from the high output level from the soft decision unit 21 In addition, since the adjustment value is calculated based on the average value in a plurality of frames, the fluctuation of the output level from the soft decision section 21 in the decoding target section (TTI) is reduced. Is possible. As shown in FIGS. 8 and 9, for example, in the configuration shown in FIG. 3, the adjustment value when the evaluation adjustment unit 43 is corrected is not fed back to the averaging unit 42. Is possible.
Thus, in the decoding circuit and the decoding method according to the embodiment of the present invention, for example, when the maximum output data estimated value is compared with the allowable maximum value, and the maximum output data estimated value is smaller, the allowable maximum When the value is replaced with the maximum output data estimated value and output as an adjustment value, there is a possibility of overflow in the decoding unit 22 due to fluctuations in the received power level, which is used in the soft decision circuits 32 and 93. By changing the adjustment value, it is possible to prevent the error correction effect from being deteriorated due to the large dispersion of the received power in the decoding target section (TTI) and the accompanying line quality from being lowered.

In the embodiment of the present invention shown in FIGS. 1 to 7, a soft decision device is configured by the function of the soft decision unit 21, and the soft decision adjustment value setting function unit is constituted by the function of the adjustment value calculation circuit 31. The soft decision function part is comprised by the function of the soft decision circuit 32. Further, in the adjustment value calculation circuit 31, the received data level maximum value detecting means is configured by the function of the maximum amplitude detecting unit 41, and the received data level maximum value averaging means is configured by the function of the averaging unit 42. The adjustment value setting means is configured by the function of the evaluation adjustment unit 43. Further, in the soft decision circuit 32, soft decision result data generating means is configured by the functions of the processing units 81 to 85 shown in FIG.
Further, in another embodiment of the present invention shown in FIGS. 8 and 9, a function unit for setting an adjustment value used for soft decision is configured by the functions of the adjustment value calculation circuit 91 and the adjustment value evaluation / correction circuit 92. The soft decision circuit 93 has a function to make a soft decision.

The background of the technology related to the present invention will be described below. Note that the matters described here are not necessarily limited to the conventional technology.
FIG. 10 shows a configuration example of a communication device having a codec decoding circuit.
The communication apparatus of this example includes a control unit 111, a codec decoding unit 112, and a modem (MODEM) 113.
An example of the transmission process performed by the communication apparatus of this example is shown.
That is, on the transmission side, data to be transmitted (transmission data) is input to the control unit 111, selection is performed by the control unit 111 with respect to the transmission data, and then only data to be output to the codec decoding unit 112 is stored. The data is output from the control unit 111 to the codec decoding unit 112. Here, as the selection by the control unit 111, for example, an operation for removing a control signal used in the detection unit is performed, and as the control signal, for example, wideband code division multiple access (W-CDMA: Wideband-Code) is performed. Examples include pilot symbols and transmission power control (TPC: Transmit Power Control) bits in a division multiple access (Communication) communication system.

Also, control information (code decoding unit control information) necessary for processing the transmission data is output from the control unit 111 to the code decoding unit 112. The codec 112 performs encoding processing of transmission data sent from the controller 111 in accordance with the codec control information input from the controller 111. Here, specific examples of the encoding process include an encoding process using a convolutional code and an encoding process using a turbo code.
Further, the data (encoded data) encoded by the codec 112 is output to the modem 113. Control information (MODEM control information) is output from the control unit 111 to the modem 113. The modem 113 modulates the encoded data according to the MODEM control information input from the control unit 111, and outputs the modulated data (modulated data) to the communication path. Here, as a specific example of the modulation method, a method according to the W-CDMA communication method can be given.

An example of the reception process performed by the communication apparatus of this example is shown.
That is, on the receiving side, the received signal from the communication path is demodulated by the modem 113. The modem 113 demodulates the received signal in accordance with the MODEM control information from the control unit 111 to generate data (demodulated data) of the demodulated received signal. Here, as a specific example of the demodulation method, there is a RAKE reception method according to the W-CDMA communication method.
The codec decoding unit 112 decodes the demodulated data according to the codec control information input from the control unit 111. Here, typical examples of means for decoding a convolutional code include decoding means using a Viterbi decoding method and decoding means using a turbo decoding method.
The decoded data obtained by the codec decoding unit 112 is output to the control unit 111. The control unit 111 frames the decoded data, generates reception data, and outputs it.

FIG. 11 shows a configuration example of the modem 121 and the codec decoding unit 122 used in the communication apparatus as described above.
The modem 121 generally includes a demodulation unit 131 and a modulation unit 132.
The codec decoding unit 122 includes a soft decision unit 141, a decoding unit 142, and an encoding unit 143.
An example of processing on the transmission side is shown.
That is, the encoding unit 143 encodes the input transmission data by the number of encoded data specified by the codec control information at the coding rate specified by the codec control information, The encoded data is output to modulation section 132. Here, the number of encoded data corresponds to, for example, either the number of bits before encoding or the number of bits after encoding.
Modulator 132 modulates the encoded data and outputs the modulated data as a transmission signal. As the number of processing data at this time, the number of bits designated by the number of transmission data designated by the MODEM control information is used.
As specific examples of the number of transmission data, the number of encoded data, and the coding rate (transmission), values of 1200, 400, and 1/3 are used, respectively.

An example of processing on the receiving side is shown.
That is, the demodulator 131 detects and demodulates the received signal, and the demodulated data obtained thereby is output to the soft decision unit 141. As the number of output data at this time, the number of bits designated by the number of received data designated by the MODEM control information is used.
The soft decision unit 141 performs a soft decision using, for example, a circuit as shown in FIG. 12, and outputs the result of the soft decision to the decoding unit 142 as a soft decision output. As the number of output data at this time, the number of bits designated by the number of received data specified by the codec control information is used.
The decoding unit 142 performs decoding processing at a coding rate specified by the codec control information based on the soft decision output input from the soft decision unit 141, and uses the decoding result as decoded data. Output. As the number of output data at this time, the number of bits designated by the number of decoded data designated by the codec control information is used.
Note that 1200, 400, and 1/3 are used as specific examples of the number of received data, the number of decoded data, and the coding rate (reception), respectively.

FIG. 12 shows a configuration example of the soft decision unit 141.
The soft decision unit 141 of this example includes an adjustment value calculation processing unit 151 and a soft decision processing unit 152.
The adjustment value calculation processing unit 151 stores a flip-flop 161 that latches demodulated data at symbol timing, an absolute value circuit 162 that acquires the amplitude of the signal latched by the flip-flop 161, and the value of the weighting coefficient α. A buffer memory 163, a buffer memory 167 that stores the value of the weighting coefficient (1-α), two multipliers 164, 168, an adder 165, and a flip-flop 166 for performing weighted weighting for each symbol, The flip-flop 169 latches the result of the weighted averaging.

The soft decision processing unit 152 includes (n-1) multipliers J1 to Jn-1, (n-1) comparators C1 to Cn-1, and (n-1) flip-flops F1 to F1. Fn-1, n buffer memories B1 to Bn, (n-1) inverters I1 to In-1, (n-1) AND gates A1 to An-1, and n switches SW1 to SWn and a flip-flop 170 are included. Here, n is plural.
Also, in the soft decision unit 141 shown in the figure, demodulated data is input to the flip-flop 161 and each of the comparators C1 to Cn-1, and symbol timing information (symbol timing) is input to each of the flip-flops 161, 166, F1 to F1. Fn-1 and 170 are input, and frame timing information (frame timing) is input to the flip-flop 169.

An example of processing performed by the adjustment value calculation processing unit 151 is shown.
The flip-flop 161 latches the demodulated data at symbol timing, and the absolute value circuit 162 acquires the amplitude of the signal latched by the flip-flop 161.
Multiplier 164 multiplies weighting coefficient α from buffer memory 163 by the output from absolute value circuit 162, and outputs the multiplication result to adder 165. The adder 165 adds the output signals from the two multipliers 164 and 168 and outputs the addition result to the flip-flop 169. The flip-flop 166 latches the output from the adder 165 for each symbol, and outputs the latched result to the multiplier 168 and the flip-flop 169. Multiplier 168 multiplies the weighting coefficient (1-α) from buffer memory 167 by the output signal from flip-flop 166 and outputs the multiplication result to adder 165. The flip-flop 169 latches the output from the flip-flop 166 for each frame, and outputs the latched result to the soft decision processing unit 152 as a threshold value (adjustment value) for soft decision.

An example of processing performed by the soft decision processing unit 152 is shown.
In this example, a soft decision processing unit 152 that performs n-value soft decision is shown.
The soft decision processing unit 152 generates comparison data based on the threshold value input from the adjustment value calculation processing unit 151, and performs a soft decision on the demodulated data by comparing the comparison data with the demodulated data.
In the first processing system, the multiplier J1 multiplies the threshold value by the coefficient N1, and outputs the multiplication result to the comparator C1. The comparator C1 compares the demodulated data with the output value from the multiplier J1, and outputs a signal indicating the comparison result to the flip-flop F1. The flip-flop F1 latches the output from the comparator C1 for each symbol, outputs the latched result as a control signal to the switch SW1, and simultaneously outputs the latched result to the inverter I1. In the switch SW1, the switch is turned on / off according to the output from the flip-flop F1, and when it is on, the value a1 stored in the buffer memory B1 is output to the flip-flop 170.

In the second processing system, the multiplier J2 multiplies the threshold by the coefficient N2 and outputs the multiplication result to the comparator C2. The comparator C2 compares the demodulated data with the output from the multiplier J2, and outputs a signal indicating the comparison result to the flip-flop F2. The flip-flop F2 latches the output from the comparator C2 for each symbol, and outputs the latched result to the AND gate A1 and the inverter I2. The AND gate A1 takes the logical product of the output from the inverter I1 and the output signal from the flip-flop F2, and outputs the result to the switch SW2 as a control signal. The switch SW2 switches the switch on and off according to the output from the AND gate A1, and outputs the value a2 stored in the buffer memory B2 to the flip-flop 170 when it is on.
The same processing as that of the first processing system and the second processing system described above is also performed in the third and subsequent processing systems.
In the (n-1) -th processing system, the multiplier Jn-1 multiplies the threshold by the coefficient Nn-1, and outputs the multiplication result to the comparator Cn-1. The comparator Cn-1 compares the demodulated data with the output from the multiplier Jn-1, and outputs a signal indicating the comparison result to the flip-flop Fn-1. The flip-flop Fn-1 latches the output from the comparator Cn-1 for each symbol, and outputs the latched result to the AND gate An-2 and the inverter In-1. In the AND gate An-2, the logical product of the (N-2) outputs from the (n-2) inverters I1 to In-2 and the output signal from the flip-flop Fn-1 is obtained and the result is obtained. The control signal is output to the switch SWn-1. In the switch SWn-1, the switch is turned on / off according to the output from the AND gate An-2. When the switch SWn-1 is on, the value an-1 stored in the buffer memory Bn-1 is output to the flip-flop 170.

The AND gate An-1 takes a logical product of (n-1) outputs from the (n-1) inverters I1 to In-1, and outputs the result to the switch SWn as a control signal. In the switch SWn, the switch is turned on / off according to the output from the AND gate An-1, and when it is on, the value an stored in the buffer memory Bn is output to the flip-flop 170.
The outputs of the n switches SW1 to SWn described above are wired-ORed and input to the flip-flop 170. The flip-flop 170 latches the input signal for each symbol and outputs the latched result as a soft decision output.
Here, as a specific example of the output from each of the comparators C1 to Cn-1, the received signal (demodulated data) is compared with the output from the multipliers J1 to Jn-1 among the input signals. In such a case, a configuration is used in which a “1” value signal for turning on each of the switches SW1 to SWn−1 is output. In such a configuration, only one of the n switches SW1 to SWn is turned on, and any one of the n values a1 to an is output as a soft decision result of the demodulated data. Is done.

As a specific numerical example, when 8-level soft decision is performed, for example, N1 = 1/2, N2 = 1/4, N3 as coefficients input to the multipliers J1 to Jn-1. = 1/8, N4 = 1/16, N5 = -1/16, N6 = -1/8, N7 = -1/4, and values stored in the buffer memories B1 to Bn are as follows: For example, a1 = 7, a2 = 6, a3 = 5, a4 = 4, a5 = 3, a6 = 2, a7 = 1, a8 = 0 are used. In this case, as a condition for turning on each of the switches SW1 to SWn, for example, the switch SW1 has an output from the comparator C1, that is, (output from the adjustment value calculation processing unit 151 × N1 < The switch SW2 is turned on when the output from the comparator C2 is a "1" value and the output from the comparator C1 is a "0" value (that is, from the adjustment value calculation processing unit 151). ON × N2 <demodulation data <output from adjustment value calculation processing unit 151 × N1),..., And switch SWn outputs “0” from all the comparators C1 to Cn−1. Value, that is, a condition that turns on when (demodulation data <output from adjustment value calculation processing unit 151 × Nn−1) is used, and when each of the switches SW1 to SWn is on, respectively. Correspondence Value a1~an is controlled to be output.
Other specific numerical examples in the case where 8-level soft decision is performed include, for example, α = 0.001, 1−α = 0.999, N1 = 4096, N2 = 2048, N3 = 1024, N4. = 0, N5 = −1024, N6 = −2048, N7 = −4096, a1 = 0, a2 = 1, a3 = 2, a4 = 3, a5 = 4, a6 = 5, a7 = 6, a8 = 7, etc. Can also be used.

Here, the configurations of the communication device, the soft decision device, the decoding circuit, and the like according to the present invention are not necessarily limited to those described above, and various configurations may be used. The present invention can also be provided as, for example, a method or method for executing the processing according to the present invention, a program for realizing such a method or method, or a recording medium for recording the program. It is also possible to provide various devices and systems.
The application field of the present invention is not necessarily limited to the above-described fields, and the present invention can be applied to various fields. For example, the same technique as that of the present invention can be applied to various devices other than the communication device and various data other than data communicated by the communication device.
Further, as various processes performed in the communication device, soft decision device, decoding circuit, etc. according to the present invention, for example, in hardware resources including a processor, a memory, etc., the control is stored in a ROM (Read Only Memory). A configuration controlled by executing a program may be used, and for example, each functional unit for executing the processing may be configured as an independent hardware circuit.
Further, the present invention can also be grasped as a computer-readable recording medium such as a floppy (registered trademark) disk or a CD (Compact Disc) -ROM storing the above control program, or the program (itself). The processing according to the present invention can be performed by inputting a program from the recording medium to a computer and causing the processor to execute the program.

It is a figure which shows the structural example of the modem which concerns on the Example of this invention, and a codec decoding part. It is a figure which shows the structural example of the soft decision part which concerns on 1st Example of this invention. It is a figure which shows the structural example of the adjustment value calculation circuit which concerns on 1st Example of this invention. It is a figure which shows the structural example of the maximum amplitude detection part which concerns on 1st Example of this invention. It is a figure which shows the structural example of the averaging part which concerns on 1st Example of this invention. It is a figure which shows the structural example of the evaluation adjustment part which concerns on 1st Example of this invention. It is a figure which shows the structural example of the soft decision circuit which concerns on 1st Example of this invention. It is a figure which shows the structural example of the soft decision part which concerns on 2nd Example of this invention. It is a figure which shows the structural example of the adjustment value calculation circuit which concerns on 2nd Example of this invention. It is a figure which shows the structural example of a communication apparatus. It is a figure which shows the structural example of a modem and a codec decoding part. It is a figure which shows the structural example of a soft decision part.

Explanation of symbols

  1, 113, 121... Modem, 2, 112, 122 .. codec decoding unit, 11, 131... Demodulation unit, 12, 132... Modulation unit, 21, 141. Decoding unit 23, 143... Encoding unit 31, 91.. Adjustment value calculation circuit 32.. Soft decision circuit 41, 101 ... Maximum amplitude detection unit 42, 102 ... Averaging unit 43 Evaluation adjustment unit 44, 82, 85, 103, 161, 166, 169, 170, F1 to Fn-1 Flip-flop 51, Absolute value calculator 52, 73, C1 to Cn-1 Comparator, 53, 63, 167 ..Latch buffer, 61, 64, 72, 83, 164, 168, J1-Jn-1 .multiplier, 62, 165 ..Adder, 71 ..Reciprocal calculator, 74 .. Changeover switch, 81 .. Reverse Number calculation unit, 84, selector, 92, adjustment value evaluation and correction circuit, 93, soft decision circuit, 111, control unit, 162, absolute value circuit, 163, B1-Bn, buffer memory, I1- In-1 inverter, A1 to An-1, AND gate, SW1 to SWn-1, switch,

Claims (1)

Soft decision adjustment value setting function unit for setting an adjustment value used for soft decision of error correction encoded received data, and soft decision of the received data using the adjustment value set by the soft decision adjustment value setting function unit In a soft decision device having a soft decision function unit,
The soft decision adjustment value setting function unit includes a received data level maximum value detecting unit that detects a maximum value of the level of received data for each communication frame;
Received data level maximum value averaging means for averaging the maximum value detected by the received data level maximum value detecting means with a predetermined averaging method for a plurality of communication frames;
The larger one of the result value obtained by dividing the maximum value detected by the reception data level maximum value detection means by the average value obtained by the reception data level maximum value averaging means and a predetermined threshold value is set as the adjustment value. Adjustment value setting means,
The soft decision function unit generates soft decision result data that generates data of a predetermined upper word length as soft decision result data for a result value obtained by dividing the received data by the adjustment value set by the soft decision adjustment value setting function unit. With means,
A soft decision device characterized by that.

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