JP2005222104A - Nonvolatile memory-integrated microcomputer provided with abnormal operation suppressing circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nonvolatile memory-integrated microcomputer provided with a circuit for suppressing an abnormal operation of the microcomputer in a state that a program is unwritten to a nonvolatile memory. <P>SOLUTION: The abnormal operation suppressing circuit 10 compares a check sum value of an output of the nonvolatile memory 100 determined by a check sum calculation circuit 11 with a check sum value of the nonvolatile memory 10 in an unwritten state, which is stored in an unwritten check sum value register 12 by a comparator 13, and outputs a reset signal from a reset signal generation circuit 14 to a CPU 200 when the values are matched with each other. In response to this, the CPU 200 lays the nonvolatile microcomputer 1 in a reset state. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a microcomputer with a built-in nonvolatile memory, and more particularly to a microcomputer with a built-in nonvolatile memory provided with a circuit that suppresses an abnormal operation when the nonvolatile memory is not written.

  Generally, a microcomputer loads a program in a built-in ROM, and a CPU reads the program from the ROM in a certain order and executes it.

  However, when the order of programs executed for an unexpected cause is out of order or affected by noise, the microcomputer enters a so-called runaway state and performs an abnormal operation. Therefore, the microcomputer is provided with means for detecting the runaway state, and one of them is a watch dog timer (see, for example, Patent Document 1).

An abnormal operation of the microcomputer can be stopped by interrupting the CPU with a runaway detection signal output from the means for detecting such a runaway state.
JP 2001-109645 A (page 4, FIG. 1)

  By the way, in recent years, the number of non-volatile memories such as an EPROM (Erasable Programmable ROM), an OTPROM (One Time Programmable ROM), and a flash memory that can write data at the user's hand is increasing as a ROM containing a program. doing. By using such a non-volatile memory, the user can write a program at any time, so that it is possible to improve the development efficiency of the program and shorten the development period of a product equipped with a microcomputer.

  However, when using such a non-volatile memory as a ROM containing a program, sometimes a microcomputer that has not been written to the non-volatile memory is mounted on the board, and the microcomputer is operated by mistake. It may end up. In this case, since the unwritten data is continuously read from the nonvolatile memory after the operation of the microcomputer is started, the microcomputer does not operate normally and enters a so-called runaway state. Therefore, the means for detecting the runaway state such as the watchdog timer described above functions and outputs a runaway detection signal.

  However, since the monitoring period of the watchdog timer is generally set to a certain long time, it takes a considerable time until the runaway detection signal is output after the runaway state occurs. In the meantime, the microcomputer continued to run away, adversely affecting the peripheral circuits connected to the microcomputer, and in the worst case, there was a problem that the device on which the microcomputer was mounted could be broken.

  Accordingly, an object of the present invention is to provide a microcomputer with a built-in nonvolatile memory having an abnormal operation suppression circuit that can reduce the influence on peripheral circuits even if the microcomputer is operated without writing a program to the built-in nonvolatile memory. It is to provide.

  According to one aspect of the present invention, there is provided a microcomputer with a built-in nonvolatile memory comprising a CPU and a nonvolatile memory into which a program executed by the CPU can be written, wherein a checksum value of output data of the nonvolatile memory is obtained. A checksum calculation circuit for calculating, an unwritten checksum value register for storing a checksum value when the nonvolatile memory is unwritten, an output value of the checksum calculation circuit, and an unwritten checksum value register A non-volatile memory having an abnormal operation suppression circuit, comprising: a comparison circuit for comparing values; and a circuit for outputting a signal for suppressing an operation executed by the CPU based on a coincidence output signal of the comparison circuit A built-in microcomputer is provided.

  According to the present invention, it is possible to detect that the program to the non-volatile memory incorporated in the microcomputer is not written in a short time after turning on the power to the microcomputer, and it is possible to prevent the microcomputer from performing an abnormal operation. It is possible to reduce the influence on the peripheral circuits.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram of a microcomputer with a built-in nonvolatile memory including an abnormal operation suppression circuit according to a first embodiment of the present invention.

  The nonvolatile memory built-in microcomputer 1 includes a nonvolatile memory 100 and a CPU 200. Normally, a program is written in advance in the nonvolatile memory 100 by the user, and the program data is output to the CPU 200 in the order specified by the address signal from the CPU 200. CPU 200 interprets an instruction written in a program output from nonvolatile memory 100, and performs an operation according to the instruction.

  Furthermore, the nonvolatile memory built-in microcomputer 1 includes an abnormal operation suppression circuit 10 that detects that the nonvolatile memory 100 is not yet written and outputs a reset signal to the CPU 200.

  The abnormal operation suppression circuit 10 stores a checksum calculation circuit 11 that calculates a checksum value of output data of the nonvolatile memory 100, and a checksum value obtained when the nonvolatile memory 100 that has been obtained in advance is unwritten. The unwritten checksum value register 12, the comparator 13 that compares the output value of the checksum calculation circuit 11 and the value of the unwritten checksum value register 12, the output value of the checksum calculation circuit 11 and the unwritten checksum value register It has a reset signal generation circuit 14 that receives a coincidence output signal output from the comparator 13 when the values of 12 coincide, and outputs a reset signal to the CPU.

  The coincidence output signal output from the comparator 13 is output as an unwritten detection signal to the outside of the microcomputer 1 with built-in nonvolatile memory in order to notify the user that the nonvolatile memory 100 is in an unwritten state. .

  When a reset signal is input from the abnormal operation suppression circuit 10, the CPU 200 performs a reset operation for setting the microcomputer 1 with built-in nonvolatile memory to a reset state.

  Next, an operation in which the abnormal operation suppression circuit 10 according to the present exemplary embodiment suppresses the abnormal operation of the microcomputer 1 with built-in nonvolatile memory due to the unwritten state of the nonvolatile memory 100 will be described with reference to the operation flowchart of FIG. .

  When the power is turned on (step S1), the CPU 200 starts the initial setting of the nonvolatile memory built-in microcomputer 1 (step S2). At this time, first, the CPU 200 sequentially gives addresses to the nonvolatile memory 100 from address 0 and reads all data in the nonvolatile memory 100 (step S3).

  The checksum calculation circuit 11 calculates a checksum value for all data read from the nonvolatile memory 100 (step S4). When the calculation of the checksum value is completed, the calculated value is compared by the comparator 13 with the checksum value when the nonvolatile memory 100 stored in the unwritten checksum value register 12 is not yet written (step S5).

  When the value calculated by the checksum calculation circuit 11 matches the value of the unwritten checksum value register 12 (YES in step S6), the comparator 13 outputs a match signal. That the coincidence signal is output from the comparator 13 means that the nonvolatile memory 100 is in an unwritten state. Therefore, in order to notify the user that the nonvolatile memory 100 is in an unwritten state, the coincidence signal from the comparator 13 is output to the outside of the nonvolatile memory built-in microcomputer 1 as an unwritten detection signal (step S7).

  When the value calculated by the checksum calculation circuit 11 and the value in the unwritten checksum value register 12 do not match, it means that the nonvolatile memory 100 is not yet written, and the routine proceeds to a normal initial setting operation (step NO in S6).

  When the coincidence signal is output from the comparator 13, the reset signal generation circuit 14 generates a reset signal to the CPU 200 (step S8).

  When a reset signal is output from the reset signal generation circuit 14, the CPU 200 sets the microcomputer 1 with built-in nonvolatile memory to a reset state (step S9).

  Thereafter, when the user turns off the power in response to the notification by the unwritten detection signal output from the comparator 13 to the outside, the microcomputer 1 with built-in nonvolatile memory ends the operation (step S10).

  According to such a present embodiment, at the beginning of the initial setting operation after turning on the power to the microcomputer, it is checked whether the program to the built-in nonvolatile memory is unwritten, and the program to the nonvolatile memory is not yet written. When writing, a reset signal to the CPU is generated to set the microcomputer to a reset state. Thereby, it can suppress that a microcomputer performs abnormal operation | movement.

  In addition, since the unwritten detection signal is output to the outside of the microcomputer, the user can know that the nonvolatile memory is not written, and can take appropriate measures such as turning off the power of the microcomputer.

  FIG. 3 is a block diagram of a microcomputer with a built-in nonvolatile memory including an abnormal operation inhibiting circuit according to the second embodiment of the present invention. The abnormal operation suppression circuit of this embodiment is obtained by replacing the reset signal generation circuit of the abnormal operation suppression circuit of the first embodiment shown in FIG. 1 with a stop signal generation circuit, and other circuits are the first embodiment. Same as example. Therefore, in FIG. 3, the same blocks as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted here.

  The microcomputer 2 with built-in nonvolatile memory according to this embodiment includes a nonvolatile memory 100, a CPU 200, and an abnormal operation suppression circuit 20.

  The abnormal operation suppression circuit 20 in this embodiment includes a checksum calculation circuit 11, an unwritten checksum value register 12, and a comparator 13 that compares the output of the checksum calculation circuit 11 and the value of the unwritten checksum value register 12. And a stop signal generation circuit 24 that receives the coincidence output signal output from the comparator 13 and outputs a stop signal to the CPU 200.

  When the stop signal is input from the abnormal operation suppression circuit 20, the CPU 200 stops the oscillation of the clock of the microcomputer 2 with built-in nonvolatile memory and enters a stop mode in which the output of the input / output port is held at high impedance.

  Next, an operation in which the abnormal operation suppression circuit 20 according to the present exemplary embodiment suppresses the abnormal operation of the microcomputer 2 with built-in nonvolatile memory due to the unwritten state of the nonvolatile memory 100 will be described with reference to the operation flowchart of FIG. . However, since the operation in this flow is basically the same as the operation flow of the first embodiment shown in FIG. 2, the same step numbers as in FIG. Detailed description thereof is omitted here.

  The operation from step S1 to step S7 shown in FIG. 4 is the same as the flow from step S1 to step S7 in the first embodiment shown in FIG. That is, when the microcomputer 200 with built-in nonvolatile memory is turned on, the output of the nonvolatile memory 100 and the value of the unwritten checksum value register 12 are compared, and when both values match, a coincidence signal is output from the comparator 13. Is done.

  When the coincidence signal is output from the comparator 13, the stop signal generation circuit 24 generates a stop signal to the CPU 200 (step S18).

  When the stop signal is output from the stop signal generation circuit 24, the CPU 200 sets the microcomputer 2 with built-in nonvolatile memory to the stop state (step S19).

  Thereafter, the user turns off the power in response to the notification by the unwritten detection signal output from the comparator 13 to the outside, and the microcomputer 2 with a built-in memory ends the operation (step S10).

  According to the present embodiment, at the beginning of the initial setting operation after turning on the power to the microcomputer, it is checked whether the program to the built-in nonvolatile memory is unwritten, and the program to the nonvolatile memory is not yet written. When writing, a stop signal to the CPU is generated and the microcomputer is set to a stop state. Thereby, the output of the input / output port of the microcomputer becomes a high impedance state, and it is possible to prevent the signal level from being in a conflict state with the output of the peripheral circuit connected to the input / output port.

  Also in this embodiment, since an unwritten detection signal is output to the outside of the microcomputer, the user can know that the nonvolatile memory has not been written, and take appropriate measures such as turning off the microcomputer. be able to.

1 is a block diagram of a microcomputer with a built-in nonvolatile memory including an abnormal operation suppression circuit according to Embodiment 1 of the present invention. The flowchart which shows the flow of the operation | movement which suppresses the abnormal operation of the microcomputer with a built-in nonvolatile memory provided with the abnormal operation suppression circuit which concerns on Example 1 of this invention. The block diagram of the microcomputer with a built-in nonvolatile memory provided with the abnormal operation suppression circuit which concerns on Example 2 of this invention. The flowchart which shows the flow of the operation | movement which suppresses the abnormal operation of the microcomputer with a built-in nonvolatile memory provided with the abnormal operation suppression circuit which concerns on Example 2 of this invention.

Explanation of symbols

1, 2 Non-volatile memory built-in microcomputers 10 and 20 Abnormal operation suppression circuit 11 Checksum calculation circuit 12 Unwritten checksum value register 13 Comparator 14 Reset signal generation circuit 24 Stop signal generation circuit 100 Nonvolatile memory 200 CPU

Claims (4)

A microcomputer with built-in nonvolatile memory comprising a CPU and a nonvolatile memory into which a program executed by the CPU can be written,
A checksum calculation circuit for calculating a checksum value of output data of the nonvolatile memory;
An unwritten checksum value register for storing a checksum value when the nonvolatile memory is unwritten;
A comparison circuit that compares the output value of the checksum calculation circuit with the value of the unwritten checksum value register;
A microcomputer with a built-in nonvolatile memory, comprising: an abnormal operation inhibiting circuit, comprising: a circuit that outputs a signal that inhibits an operation performed by the CPU based on a coincidence output signal of the comparison circuit.   A microcomputer with a built-in nonvolatile memory comprising an abnormal operation suppression circuit, wherein the signal for suppressing the operation executed by the CPU is a reset signal input to the CPU.   A microcomputer with a built-in nonvolatile memory comprising an abnormal operation suppression circuit, wherein a signal for suppressing an operation executed by the CPU is a stop signal input to the CPU.   4. The coincidence output signal of the comparison circuit is output to the outside as an unwritten detection signal indicating that the nonvolatile memory is detected to be unwritten. Microcomputer with built-in non-volatile memory equipped with an abnormal operation suppression circuit.

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