JP2005217576A5 - - Google Patents

Download PDF

Info

Publication number
JP2005217576A5
JP2005217576A5 JP2004019449A JP2004019449A JP2005217576A5 JP 2005217576 A5 JP2005217576 A5 JP 2005217576A5 JP 2004019449 A JP2004019449 A JP 2004019449A JP 2004019449 A JP2004019449 A JP 2004019449A JP 2005217576 A5 JP2005217576 A5 JP 2005217576A5
Authority
JP
Japan
Prior art keywords
transistor
signal
signal input
collector
input transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2004019449A
Other languages
Japanese (ja)
Other versions
JP2005217576A (en
JP4416523B2 (en
Filing date
Publication date
Application filed filed Critical
Priority to JP2004019449A priority Critical patent/JP4416523B2/en
Priority claimed from JP2004019449A external-priority patent/JP4416523B2/en
Publication of JP2005217576A publication Critical patent/JP2005217576A/en
Publication of JP2005217576A5 publication Critical patent/JP2005217576A5/ja
Application granted granted Critical
Publication of JP4416523B2 publication Critical patent/JP4416523B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Claims (6)

差動対を構成する第1の信号入力トランジスタ及び第2の信号入力トランジスタ並びに差動対を構成する第3の信号入力トランジスタ及び第4の信号入力トランジスタを有し電圧信号である入力信号とその相補信号を電流信号に変換する電圧−電流変換部と、前記電圧−電流変換部から出力される電流信号を用いて互いに位相が90ー異なるふたつの信号を生成するラッチ部と備えた分周器において、
前記電圧−電流変換部が、
前記第1の信号入力トランジスタにダーリントン接続されるとともに前記入力信号の相補信号をベースに入力する第5のトランジスタと、
前記第2の信号入力トランジスタにダーリントン接続されるとともに前記入力信号をベースに入力する第6のトランジスタと、
前記第3の信号入力トランジスタにダーリントン接続されるとともに前記入力信号をベースに入力する第7のトランジスタと、
前記第4の信号入力トランジスタにダーリントン接続されるとともに前記入力信号の相補信号をベースに入力する第8のトランジスタと
を備えることを特徴とする分周器
An input signal which is a voltage signal having a first signal input transistor and a second signal input transistor constituting a differential pair, and a third signal input transistor and a fourth signal input transistor constituting a differential pair, and voltage for converting the complementary signal into a current signal - a current converter, the voltage - frequency divider phase with each other by using the current signal output from the current conversion unit is provided with a latch unit for generating a 90 over two different signals In
The voltage-current converter is
A fifth transistor that is Darlington connected to the first signal input transistor and that inputs a complementary signal of the input signal as a base;
A sixth transistor that is Darlington connected to the second signal input transistor and that inputs the input signal as a base;
A seventh transistor that is Darlington connected to the third signal input transistor and that inputs the input signal as a base;
Divider, characterized in that it comprises an eighth transistor for inputting a complementary signal of the input signal to the base while being Darlington-connected to said fourth signal input transistors.
前記第1の信号入力トランジスタのコレクタと前記第6のトランジスタのコレクタとが共通接続され、前記第2の信号入力トランジスタのコレクタと前記第5のトランジスタのコレクタとが共通接続され、前記第3の信号入力トランジスタのコレクタと前記第8のトランジスタのコレクタとが共通接続され、前記第4の信号入力トランジスタのコレクタと前記第7のトランジスタのコレクタとが共通接続される請求項1に記載の分周器The collector of the first signal input transistor and the collector of the sixth transistor are commonly connected, the collector of the second signal input transistor and the collector of the fifth transistor are commonly connected, and the third transistor The frequency divider according to claim 1, wherein a collector of the signal input transistor and a collector of the eighth transistor are commonly connected, and a collector of the fourth signal input transistor and a collector of the seventh transistor are commonly connected. Vessel . 前記第5のトランジスタのコレクタ、前記第6のトランジスタのコレクタ、前記第7のトランジスタのコレクタ及び前記第8のトランジスタのコレクタに定電圧が印加される請求項1に記載の分周器The frequency divider according to claim 1, wherein a constant voltage is applied to a collector of the fifth transistor, a collector of the sixth transistor, a collector of the seventh transistor, and a collector of the eighth transistor. 差動対を構成する第1の信号入力トランジスタ及び第2の信号入力トランジスタ並びに差動対を構成する第3の信号入力トランジスタ及び第4の信号入力トランジスタを有し電圧信号である入力信号とその相補信号を電流信号に変換する電圧−電流変換部と、前記電圧−電流変換部から出力される電流信号を用いて互いに位相が90°異なるふたつの信号を生成するラッチ部と備えた90度移相器において、
前記第1の信号入力トランジスタ及び前記第2の信号入力トランジスタによって構成される差動対と前記第3の信号入力トランジスタ及び前記第4の信号入力トランジスタによって構成される差動対それぞれにデジェネレーション抵抗を設けることを特徴とする分周器
An input signal which is a voltage signal having a first signal input transistor and a second signal input transistor constituting a differential pair, and a third signal input transistor and a fourth signal input transistor constituting a differential pair, and A 90-degree shift provided with a voltage-current converter that converts a complementary signal into a current signal and a latch that generates two signals that are 90 ° out of phase using the current signal output from the voltage-current converter. In the phaser,
A degeneration resistor is provided for each of the differential pair constituted by the first signal input transistor and the second signal input transistor and the differential pair constituted by the third signal input transistor and the fourth signal input transistor. A frequency divider is provided .
前記ラッチ部の出力負荷抵抗に並列接続される容量を備える請求項1〜4のいずれかに記載の分周器The frequency divider according to claim 1, further comprising a capacitor connected in parallel to the output load resistance of the latch unit. 請求項1〜5のいずれかに記載の分周器を有することを特徴とする携帯機器。A portable device comprising the frequency divider according to claim 1.
JP2004019449A 2004-01-28 2004-01-28 Divider Expired - Fee Related JP4416523B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004019449A JP4416523B2 (en) 2004-01-28 2004-01-28 Divider

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004019449A JP4416523B2 (en) 2004-01-28 2004-01-28 Divider

Publications (3)

Publication Number Publication Date
JP2005217576A JP2005217576A (en) 2005-08-11
JP2005217576A5 true JP2005217576A5 (en) 2006-10-12
JP4416523B2 JP4416523B2 (en) 2010-02-17

Family

ID=34903655

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004019449A Expired - Fee Related JP4416523B2 (en) 2004-01-28 2004-01-28 Divider

Country Status (1)

Country Link
JP (1) JP4416523B2 (en)

Similar Documents

Publication Publication Date Title
JP5229298B2 (en) Class D amplifier
Contaldo et al. A 2.4-GHz BAW-based transceiver for wireless body area networks
JP2006042296A (en) Class-d amplifier
US11101778B2 (en) Class D amplifiers
JP2004523830A5 (en)
ATE460775T1 (en) ANALOG/DIGITAL CONVERTER
KR20110005056A (en) Unit inverter cell with linearly varying delay response characteristics and digitally controlled oscillator including the unit inverter cell
US7528670B2 (en) Sine wave oscillator having a self-startup circuit
CN113094022B (en) Analog multiplier
JP2005217576A5 (en)
Sotner et al. Practical aspects of operation of simple triangular and square wave generator employing diamond transistor and controllable amplifiers
EP1737128A3 (en) Impedance conversion circuit and integrated circuit including the same
JP2016076779A (en) Diversity receiver
TW200709541A (en) DC/DC converter with improved stability
JPH05191238A (en) Pwm circuit
JP2007129719A5 (en)
JP2008539653A5 (en)
JP6046536B2 (en) FM demodulator
JP2005236600A (en) High frequency 2 multiplication circuit
US9246465B2 (en) Mixer
CN202405999U (en) Frequency converter and voltage-to-current converting circuit
JP6871055B2 (en) Frequency modulator
JP2006067481A5 (en)
JPH0253304A (en) Phase shift type oscillation circuit
TWI331846B (en)