JP2005215478A - Tft substrate and method of manufacturing the same, organic el display device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method which prevents the corrosion of a metal wiring during an ITO (indium tin oxide) wet etching process and conducts in-plane uniform patterning of ITO. <P>SOLUTION: A TFT (thin film transistor) substrate, having a plurality of TFT elements, disposed on a display area and a conductive part 112 connected to the specified TFT element and having a connection terminal for the external connection, in a non-display area, is provided with a silicon nitride film 380 disposed on the overall surface of the display area and the non-display area and a silicon oxide film 600 disposed on the silicon nitride film. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a TFT substrate and a manufacturing method thereof, an organic EL display device, and an electronic apparatus.

For example, in recent years, in electronic devices such as notebook computers, mobile phones, electronic notebooks, etc., display such as an organic EL display device provided with a plurality of organic electroluminescence (hereinafter referred to as organic EL) elements corresponding to pixels as means for displaying information A device has been proposed. Such an organic EL display device includes a display area having a plurality of organic EL elements and a sealing member arrangement area in which a sealing member for sealing the organic EL elements between the substrates is arranged on a predetermined substrate. In preparation.
Japanese Patent Laid-Open No. 2003-186420 Japanese Patent Laid-Open No. 2002-323705

  By the way, such a substrate is generally provided with a TFT element for driving each pixel. In order to reduce defects in the semiconductor layer of the TFT element, hydrogen ions may be implanted into the insulating layer of the TFT element. In such a case, a film made of silicon nitride is formed on the entire surface of the substrate in order to prevent leakage of hydrogen ions implanted into the insulating layer.

  However, a film made of silicon nitride may cause defects such as pinholes, and if a wet etching method, for example, is performed on the silicon nitride film in a subsequent manufacturing process, the defects such as pinholes of the silicon nitride film are caused. When the etching solution penetrates and forms other members or the like, there is a case where a defect such as deterioration of the metal wiring (conductive portion) occurs. In addition, for example, when the organic EL display device has a planarization film for planarizing the arrangement region of the organic EL elements, it is displayed as ITO (Indium Tin Oxide) on the planarization film. If the ITO outside the region is simultaneously etched by the wet etching method, there will be a difference in the etching rate between the ITO on the planarizing film and the ITO outside the display region, and it is difficult to pattern both ITO with the same accuracy. There was a case.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to eliminate problems caused by poor film properties of a silicon nitride film and pattern controllability of wet etching.

  In order to achieve the above object, a TFT substrate according to the present invention has a plurality of TFT elements arranged in a display area and a connection terminal connected to a predetermined TFT element and connected to the outside in a non-display area. A TFT substrate including a conductive portion, comprising: a silicon nitride film disposed on the entire surface of the display region and the non-display region; and a silicon oxide film disposed on the silicon nitride film. And

  The TFT substrate manufacturing method according to the present invention includes a plurality of TFT elements arranged in a display area, a conductive portion connected to a predetermined TFT element and having a connection terminal for external connection to a non-display area. A method of manufacturing a TFT substrate comprising: a step of disposing a silicon nitride film over the entire surface of the non-display region and the display region where the TFT element is disposed; and a silicon oxide film on the silicon nitride film. And a disposing step.

  According to the TFT substrate and the manufacturing method thereof according to the present invention having such characteristics, the silicon oxide film is disposed on the silicon nitride film. Since the silicon oxide film has better film properties than the silicon nitride film, by disposing the silicon oxide film on the silicon nitride film, it is possible to prevent deterioration of the conductive portion in a later process, and the silicon nitride film It is possible to eliminate the problems caused by the poor film properties.

  In the TFT substrate according to the present invention, the TFT element may include a semiconductor layer and an insulating layer formed on the semiconductor layer and implanted with hydrogen ions. By adopting such a configuration, defects in the semiconductor layer can be reduced. In addition, since the silicon nitride film is disposed on the entire surface of the non-display area and the display area where the TFT element is disposed as described above, the TFT substrate according to the present invention prevents leakage of hydrogen ions. can do.

  In addition, the TFT substrate according to the present invention may employ a configuration in which an auxiliary connection terminal made of ITO is disposed on the connection terminal. As described above, since ITO has a high work function, it is possible to easily supply a predetermined signal or potential from the outside to the TFT element by arranging the auxiliary connection terminal made of such ITO on the connection terminal. It becomes possible.

  Next, an organic EL display device according to the present invention includes a display area having a plurality of organic EL elements, and a sealing member arrangement area in which a sealing member for sealing the organic EL elements between substrates is arranged. Is provided on a predetermined substrate, and the TFT substrate according to the present invention is used as the substrate.

  According to the TFT substrate according to the present invention, it is possible to eliminate the problems caused by the poor film properties of the silicon nitride film. Therefore, the organic EL display device according to the present invention has excellent reliability. It becomes.

  In addition, the organic EL display device according to the present invention can employ a configuration in which an arrangement region of the organic EL element is flattened and a flattening film formed in the display region is provided. For example, such a planarization film is formed of an acrylic resin, and the film properties of the acrylic resin and ITO on the silicon oxide film are almost the same. This is because the ITO on the acrylic resin and silicon oxide has a characteristic that tends to be an amorphous structure. For this reason, for example, even when the ITO on the planarizing film and the ITO outside the display area are simultaneously etched by the wet etching method, the etching rate of the ITO on the planarizing film and the ITO outside the display area is increased. A difference does not arise and both ITO can be patterned with the same precision. Actually, the just etching time for ITO having a film thickness of 50 nm on the acrylic resin is about 100 seconds, whereas the just etching time for ITO on the silicon nitride film takes about 170 seconds. Note that the just etching time in this case refers to the time until the ITO film is etched in the film thickness direction and the lower surface is exposed. With this just etching time as a boundary, the progress of etching of the ITO film becomes a plane direction perpendicular to the film thickness direction.

Next, an electronic apparatus according to the present invention includes the organic EL display device according to the present invention as a display unit.
Since the organic EL display device according to the present invention has excellent reliability as described above, the reliability of an electronic apparatus including the organic EL display device as a display unit is also improved.

  Hereinafter, with reference to the drawings, an embodiment of a TFT substrate and a manufacturing method thereof, an organic EL display device, and an electronic apparatus according to the present invention will be described. In the following drawings, the scale of each member and each layer is appropriately changed in order to make each member and each layer recognizable.

FIG. 1 is a schematic diagram showing a wiring structure of the organic EL display device according to this embodiment.
The organic EL display device 1 is an active matrix organic EL display device having a thin film transistor (hereinafter abbreviated as TFT) as a switching element.

  As shown in FIG. 1, the organic EL display device 1 includes a plurality of scanning lines 101 (conductive portions), a plurality of signal lines 102 (conductive portions) extending in a direction perpendicular to the respective scanning lines 101, and A plurality of power supply lines 103 (conductive portions) extending in parallel with each signal line 102 are respectively wired, and a pixel region X is provided in the vicinity of each intersection of the scanning line 101 and the signal line 102.

  A data line driving circuit 100 including a shift register, a level shifter, a video line, and an analog switch is connected to the signal line 102. Further, a scanning line driving circuit 80 including a shift register and a level shifter is connected to the scanning line 101.

  Further, in each of the pixel regions X, a switching TFT 112 (TFT element) to which a scanning signal is supplied to the gate electrode via the scanning line 101 and a pixel signal shared from the signal line 102 via the switching TFT 112 are provided. , A driving TFT 123 (TFT element) to which the pixel signal held by the holding capacitor 113 is supplied to the gate electrode, and the power supply line 103 through the driving TFT 123. An anode (electrode) 23 into which a drive current flows from the power supply line 103 and a functional layer 111 sandwiched between the anode 23 and the cathode 50 are provided. The anode 23, the cathode 50, and the functional layer 111 constitute a light emitting element (organic EL element).

  According to the organic EL display device 1, when the scanning line 101 is driven and the switching TFT 112 is turned on, the potential of the signal line 102 at that time is held in the holding capacitor 113, and according to the state of the holding capacitor 113. Thus, the on / off state of the driving TFT 123 is determined. Then, current flows from the power supply line 103 to the anode 23 through the channel of the driving TFT 123, and further current flows to the cathode 50 through the functional layer 111. The functional layer 111 emits light according to the amount of current flowing through it. Therefore, since light emission is controlled on and off for each anode 23, the anode 23 is a pixel electrode.

  Next, specific modes of the organic EL display device 1 of the present embodiment will be described with reference to FIGS. FIG. 2 is a plan view schematically showing the configuration of the organic EL display device 1. 3 is a cross-sectional view taken along line AB in FIG. 2, and FIG. 4 is a cross-sectional view taken along line CD in FIG.

  As shown in FIG. 2, the organic EL display device 1 according to this embodiment includes a substrate 20 having electrical insulation and pixel electrodes connected to a switching TFT (not shown) arranged in a matrix on the substrate 20. An unillustrated pixel electrode area (display area), a power supply line 103 (see FIG. 1) arranged around the pixel electrode area and connected to each pixel electrode, and a plan view located at least on the pixel electrode area A substantially rectangular pixel portion 3 (inside the dashed-dotted line frame in the figure) is provided. In addition, the pixel unit 3 includes a real display area 4 (inside the two-dot chain line in the drawing) at the center and a dummy area 5 (area between the one-dot chain line and the two-dot chain line) arranged around the real display area 4. It is divided into and.

In the actual display area 4, display areas R, G, and B each having a pixel electrode are arranged apart from each other in the AB direction and the CD direction.
Further, scanning line driving circuits 80 are arranged on both sides of the actual display region 4 in the drawing. The scanning line driving circuit 80 is provided below the dummy area 5.

  Further, an inspection circuit 90 is arranged on the upper side of the actual display area 4 in the figure. The inspection circuit 90 is provided below the dummy area 5. The inspection circuit 90 is a circuit for inspecting the operating state of the organic EL display device 1 and includes, for example, inspection information output means (not shown) for outputting the inspection result to the outside, and is a display device during manufacture or at the time of shipment. The quality and defect inspection can be performed.

  The driving voltages of the scanning line driving circuit 80 and the inspection circuit 90 are applied from a predetermined power supply unit through the driving voltage conduction unit and the driving voltage conduction unit. Further, the drive control signal and drive voltage to the scanning line drive circuit 80 and the inspection circuit 90 are supplied from a predetermined main driver that controls the operation of the organic EL display device 1 from the drive control signal conduction unit and the drive voltage conduction unit. Are transmitted and applied. The drive control signal in this case is a command signal from a main driver or the like related to control when the scanning line drive circuit 80 and the inspection circuit 90 output signals.

  Further, the data line driving circuit 100 is disposed on a flexible substrate 200 that is separate from the substrate 20, and the data line driving circuit 100 and the signal line 102 are electrically connected by connecting the flexible substrate 200 and the substrate 20. Connected.

  As shown in FIGS. 3 and 4, the organic EL display device 1 includes a substrate 20 and a sealing substrate 30 bonded together with a sealing resin 40 interposed therebetween. In a region surrounded by the substrate 20, the sealing substrate 30 and the sealing resin 40, a desiccant 45 is inserted and an inert gas filling layer 46 filled with an inert gas such as nitrogen gas is formed. Has been. In addition, the sealing member in this invention is comprised from the sealing substrate 30 and the sealing resin 40 in this embodiment.

  As the substrate 20, either a transparent substrate or an opaque substrate can be used. Examples of the opaque substrate include a thermosetting resin and a thermoplastic resin in addition to a ceramic sheet such as alumina and a metal sheet such as stainless steel that has been subjected to an insulation treatment such as surface oxidation. Further, examples of the transparent substrate or translucent substrate include glass, quartz, resin (plastic, plastic film) and the like, and an inexpensive soda glass substrate is particularly preferably used.

  As the sealing substrate 30, for example, a plate-like member having electrical insulation can be adopted. The sealing resin 40 is made of, for example, a thermosetting resin or an ultraviolet curable resin, and is preferably made of an epoxy resin that is a kind of thermosetting resin. And this sealing substrate 30 is arrange | positioned through the sealing resin 40 on the sealing substrate arrangement | positioning area | region A formed around the pixel electrode area | region of the board | substrate 20. As shown in FIG.

  A circuit unit 11 including a driving TFT 123 for driving the anode 23 and the like is formed on the substrate 20, and each anode 23 connected to the driving TFT 123 is formed on the circuit unit 11 in FIG. Are formed corresponding to the positions of the display areas R, G and B. A functional layer 111 is formed on the upper layer of the anode 23 in the actual display area 4, and a cathode 50 is formed on the upper layer. The circuit unit 11 includes a scanning line driving circuit 80, an inspection circuit 90, a driving voltage passing unit for connecting and driving them, a driving control signal conducting unit, and the like.

Next, a schematic configuration of the functional layer 111 will be described with reference to FIG.
FIG. 5 is a conceptual diagram for explaining a schematic configuration of the functional layer 111 of the present embodiment. The functional layer 111 has a multilayer structure sandwiched between the anode 23 and the cathode 50, and a hole transport / injection layer 71, an organic EL layer 60, and an electron transport layer 52 are formed in this order from the anode 23 side. Is.

  The anode 23 is configured by laminating a reflective metal layer 23a and an ITO 23b, and injects holes toward the organic EL layer 60 by an applied voltage. As the material of the ITO 23b, ITO (Indium Tin Oxide: Indium Tin Oxide) is suitable. O) (registered trademark) or the like can be used. In the present embodiment, ITO is used. In order to inject holes toward the organic EL layer 60, the work function is preferably 4.5 eV (electron volts) or more. Thus, by forming the anode 23 with the reflective metal layer 23a and the ITO 23b, it is possible to obtain an electrode having excellent reflectivity by the 23a and a high work function by the ITO 23b.

The hole transport / injection layer 71 is one of conductive polymer materials, and constitutes a hole injection layer for injecting holes of the anode 23 into the organic EL layer 60. , 30 nm.
As an example of a material for forming such a hole injection layer, various kinds of conductive polymer materials are preferably used. For example, polythiophene, polyaniline, polypyrrole, or the like can be employed. Specifically, 3,4-polyethylenediosithiophene / polystyrene sulfonic acid (PEDOT / PSS) dispersion, that is, 3,4-polyethylenediosithiophene is dispersed in polystyrene sulfonic acid as a dispersion medium. A dispersion in which water is dispersed in water is used.

  In the organic EL layer 60, holes injected from the anode 23 via the hole transport / injection layer 71 and electrons injected from the cathode 50 are combined to generate fluorescence. As a material for forming the organic EL layer 60, a known light emitting material capable of emitting fluorescence or phosphorescence can be used. Specifically, polyfluorene derivative (PF), (poly) paraphenylene vinylene derivative (PPV), polyphenylene derivative (PP), polyparaphenylene derivative (PPP), polyvinyl carbazole (PVK), polythiophene derivative, polymethylphenylsilane A polysilane such as (PMPS) is preferably used. In addition, these polymer materials include polymer materials such as perylene dyes, coumarin dyes, rhodamine dyes, such as rubrene, perylene, 9,10-diphenylanthracene, tetraphenylbutadiene, Nile red, coumarin 6, A material such as quinacridone can be doped.

  The electron transport layer 52 plays a role of injecting electrons into the organic EL layer 60, and the forming material is not particularly limited, and includes oxadiazole derivatives, anthraquinodimethane and derivatives thereof, benzoquinone and Examples thereof include naphthoquinone and derivatives thereof, anthraquinone and derivatives thereof, tetracyanoanthraquinodimethane and derivatives thereof, fluorenone derivatives, diphenyldicyanoethylene and derivatives thereof, diphenoquinone derivatives, and metal complexes of 8-hydroxyquinoline and derivatives thereof. The Specifically, as with the material for forming the hole transport layer, JP-A-63-70257, JP-A-63-175860, JP-A-2-135359, JP-A-2-135361, and JP-A-2-209888 are disclosed. And the like described in JP-A-3-379992 and 3-152184, particularly 2- (4-biphenylyl) -5- (4-t-butylphenyl) -1,3,4. -Oxadiazole, benzoquinone, anthraquinone, tris (8-quinolinol) aluminum are preferred. In addition, the electron transport layer 52 may be formed of various conductive materials such as various simple materials such as aluminum, magnesium, lithium, and calcium, and alloys containing these materials as main components. The electron transport layer 52 is preferably made of a material having a work function of 3 eV (Eletron volts) or less in order to inject electrons into the organic EL layer 60.

  The cathode 50 is made of a light-transmitting metal material, and is made of ITO or a material containing zinc (Zn) in a metal oxide, for example, an indium oxide / zinc oxide-based amorphous transparent conductive film (Indium). An oxide conductive film such as “Zinc Oxide: IZO / I (registered trademark)” (manufactured by Idemitsu Kosan) can be used. In order to prevent a reaction between the electron transport layer 52 and the oxide conductive film, it is preferable to use a layer having a relatively low reactivity such as aluminum for at least the cathode 50 side of the electron transport layer 52.

Next, the configuration of the driving TFT 123 will be described with reference to FIG. FIG. 6 is a cross-sectional view showing a schematic configuration of the driving TFT 123.
A driving transistor 123 shown in FIG. 6 is an n-channel polycrystalline silicon TFT, and includes a polycrystalline silicon film (semiconductor layer) 220 on a substrate 20 with a base protective film 110 interposed therebetween. The crystalline silicon film 220 includes a high concentration source region 220d, a low concentration source region 220b, a channel region 220a, a low concentration drain region 220c, and a high concentration drain region 220e.

  On the channel region 220a of the polycrystalline silicon film 220, a gate electrode 320 is formed in a predetermined pattern via a gate insulating film 310, and further on the polycrystalline silicon film 220 including the gate electrode 320 (specifically, On the gate insulating film 310, an interlayer insulating film 330 made of silicon oxide (silicon oxide) is formed. A source electrode 360 and a drain electrode 370 are formed in a predetermined pattern on the interlayer insulating film 330, and the source electrode 360 is formed on the polysilicon film 220 through a contact hole 340 formed in the interlayer insulating film 330. Connected to the concentration source region 220 d, the drain electrode 370 is connected to the high concentration drain region 220 e of the polycrystalline silicon film 220 through a contact hole 350 formed in the interlayer insulating film 330. In such an interlayer insulating film 330 (insulating layer), hydrogen ions are implanted to reduce defects in the polycrystalline silicon film 220 (semiconductor layer). In order to prevent detachment of hydrogen ions implanted into the interlayer insulating film 330, silicon nitride (silicon nitride) is formed on the interlayer insulating film 330 so as to cover all regions including the source electrode 360 and the drain electrode 370. The 1st insulating layer 380 which consists of is arrange | positioned. In the organic EL display device 1 according to this embodiment, the second insulating layer 600 made of silicon oxide is disposed on the first insulating layer 380. In addition, an acrylic layer 400 (a planarization film) for ensuring flatness on the actual display region 4 is disposed on the second insulating layer 600, and the acrylic layer 400, the first insulating layer 380, and the second insulating layer 600 are arranged. The anode 23 is connected to the drain electrode 370 through a contact hole 390 formed through the insulating layer 600.

  As shown in FIGS. 3 and 4, the surface of the acrylic layer 400 on which the anode 23 is formed has the anode 23, a lyophilic control layer 222 mainly composed of a lyophilic material such as silicon oxide, and an acrylic layer. And an organic bank layer 221 made of polyimide or the like. The organic bank layer 221 is two-dimensionally arranged so as to surround the anode 23, and light emitted upward from the functional layer 111 is partitioned by the organic bank layer 221. Yes.

  Next, with reference to FIG. 7, the structure of the part where the substrate 20 and the flexible substrate 200 are connected will be described. FIG. 7 is a cross-sectional view showing a schematic configuration of the substrate 20 in a part (B in FIG. 2) where the substrate 20 and the flexible substrate 200 are connected.

  As shown in this figure, an opening is formed in the first insulating layer 380 and the second insulating layer 600 in the non-display area of the substrate 20, which is a portion where the substrate 20 and the flexible substrate 200 are connected. The signal line 102 is exposed, and a portion of the exposed signal line 102 is used as the connection terminal 102c. On the connection terminal 102c, a transparent connection terminal 105 (auxiliary connection terminal) made of ITO is disposed so as to be in contact with the second insulating film 600. The flexible substrate 200 is connected to the substrate 20 through the transparent connection terminal 105. As described above, by disposing the transparent connection terminal 105 on the connection terminal 102c, the work function of the connection terminal is increased, and current can be flowed satisfactorily.

  Next, a method for manufacturing the organic EL display device 1 according to this embodiment will be described with reference to FIGS.

First, as shown in FIG. 8A, after preparing the substrate 20 cleaned by ultrasonic cleaning or the like, the entire surface of the substrate 20 is made of silicon oxide under the condition that the substrate temperature is 150 to 450 ° C. A base protective film 110 is formed. Specifically, the film is formed to a thickness of less than 10 μm (for example, about 500 nm) by a plasma CVD method or the like. As the source gas used in this step, a mixed gas of monosilane and dinitrogen monoxide, TEOS (tetraethoxysilane, Si (OC ₂ H ₅ ) ₄ ) and oxygen, disilane and ammonia, and the like are preferable.

  Next, as shown in FIG. 8B, an amorphous silicon film (amorphous semiconductor film) is formed on the entire surface of the substrate 20 on which the base protective film 110 is formed under the condition that the substrate temperature is 150 to 450 ° C. ) 210 is formed to a thickness of, for example, 30 to 100 nm by a plasma CVD method or the like. As the source gas used in this step, disilane or monosilane is suitable.

  Next, the amorphous silicon film 210 is irradiated with excimer laser light L (wavelength 308 nm for XeCl excimer laser, wavelength 249 nm for KrF excimer laser) as shown in FIG. 8C. Laser annealing is performed to produce a polycrystalline silicon film 220.

  Next, as shown in FIG. 8D, the polycrystalline silicon film 220 is patterned into the shape of the active layer to be formed by photolithography. That is, after a photoresist is applied on the polycrystalline silicon film 220, the polycrystalline silicon film 220 is patterned by exposing and developing the photoresist, etching the polycrystalline silicon film 220, and removing the photoresist. Note that the polycrystalline silicon film 220 may be formed by patterning the amorphous silicon film 210 and then performing laser annealing.

  Next, as shown in FIG. 9E, a gate insulation made of a silicon oxide film and / or a silicon nitride film is formed on the entire surface of the substrate 20 on which the polycrystalline silicon film 220 is formed under a temperature condition of 350 ° C. or less. The film 310 is formed to a thickness of 50 to 150 nm (in this embodiment, 50 nm), for example. As the source gas used in this step, a mixed gas of TEOS and oxygen gas or the like is suitable.

  Next, as shown in FIG. 9 (f), a metal such as aluminum, tantalum, or molybdenum, or any of these metals as a main component is formed on the entire surface of the substrate 20 on which the gate insulating film 310 is formed by a sputtering method or the like. After forming a conductive material such as an alloy as a film, patterning is performed by a photolithography method to form a gate electrode 320 having a thickness of 300 to 800 nm. That is, after applying a photoresist on the substrate 20 on which a conductive material is formed, the conductive material is patterned by exposing and developing the photoresist, etching the conductive material, and removing the photoresist. An electrode 320 is formed.

Next, as shown in FIG. 9G, low concentration impurity ions (phosphorus ions) are implanted with a dose of about 0.1 × 10 ¹³ to about 10 × 10 ¹³ / cm ^{2 using} the gate electrode 320 as a mask. The low concentration source region 220b and the low concentration drain region 220c are formed in a self-aligned manner with respect to the gate electrode 320. Here, a portion that is located immediately below the gate electrode 320 and into which impurity ions are not introduced becomes a channel region 220a. Note that a gate wiring connected to the gate electrode 320 is also formed simultaneously with the step shown in FIG.

Further, as shown in FIG. 9H, a resist mask (not shown) wider than the gate electrode 320 is formed, and high-concentration impurity ions (phosphorus ions) are about 0.1 × 10 ¹⁵ to about 10 × 10 ^15. A high concentration source region 220d and a high concentration drain region 220e are formed by implanting at a dose of / cm ² .

  Next, the substrate 20 having the polycrystalline silicon film 220 as shown in FIG. 9H is annealed by irradiating the lamp light SL as shown in FIG. Specifically, the impurities injected into the source regions 220b and 220d and the drain regions 220c and 220e are activated by performing excimer laser annealing in a nitrogen atmosphere under a reduced pressure atmosphere.

  Next, as shown in FIG. 10J, an interlayer insulating film 330 made of silicon oxide is formed to a thickness of, for example, 800 to 1000 nm on the surface side of the gate electrode 320 (side different from the substrate 20) by a CVD method or the like. Form a film. After the film formation, a resist mask (not shown) having a predetermined pattern is formed, and the interlayer insulating film 330 is dry-etched through the resist mask. In the interlayer insulating film 330, the high concentration source region 220d and the high concentration drain region 220e are formed. Contact holes 340 and 350 are formed in the portions corresponding to.

  Next, as shown in FIG. 10 (k), aluminum, titanium, titanium nitride, tantalum, molybdenum, or an alloy containing any one of these metals as a main component is formed on the entire surface of the substrate 20 through the interlayer insulating film 330. A conductive material such as a film is formed by sputtering or the like and then patterned by photolithography to form a source electrode 360 and a drain electrode 370 having a thickness of 400 to 800 nm, for example. That is, after applying a photoresist on the substrate 20 on which a conductive material is formed, the conductive material is patterned by exposing and developing the photoresist, dry etching the conductive material, and removing the photoresist. A source electrode 360 and a drain electrode 370 are formed.

  Here, as shown in FIG. 10L, the signal line 102 is formed simultaneously with the process shown in FIG. Specifically, the signal line 102 is formed by patterning a conductive material disposed on the substrate 20 by a photolithography method. Note that a source wiring and a drain wiring connected to the source electrode 360 and the drain electrode 370 are formed simultaneously with the steps shown in FIGS.

  After that, as shown in FIG. 11M, hydrogen ions are implanted into the polycrystalline silicon film 220 by hydrogen plasma treatment PT, and termination treatment is performed on the polycrystalline silicon film 220. As a result, defects in the polycrystalline silicon film 220 are repaired, and the source electrode 360 and the drain electrode 370 are formed by the polycrystalline silicon film 220, the polycrystalline silicon film 220, and the gate insulating film 310 that are generated when dry etching is performed. Damage to the interface or the gate insulating film 310 is also repaired.

  After performing the hydrogen ion implantation process, as shown in FIG. 11N, a first insulating film 380 made of a silicon nitride film is formed so as to cover the source electrode 360 and the drain electrode 370, and the first insulating film 380 is formed. A second insulating film 600 made of a silicon oxide film is formed on the film 380. Then, an acrylic layer 400 is formed on the second insulating film 600 in the display region. Thereafter, a contact hole 390 is formed, and a reflective metal layer 23a of the anode 23 is formed so as to be connected to the drain electrode 370 through the contact hole 390. Specifically, a reflective metal material 23a is formed by disposing a reflective metal material on the acrylic layer 400 by sputtering or the like, and patterning the reflective metal material corresponding to each pixel.

  Next, as shown in FIG. 11 (o), an ITO 23b is formed on the reflective metal layer 23a. Specifically, ITO is disposed on the entire surface of the substrate 20 through the reflective metal layer 23a and the acrylic layer 400, and then ITO is patterned by a wet etching method to dispose the ITO 23b on the reflective metal layer 23a. .

  Here, as shown in FIG. 12 (p), the transparent connecting terminal 105 made of ITO is formed on the connecting terminal 102c simultaneously with the step shown in FIG. 11 (o). Specifically, the transparent connection terminal 105 is formed on the connection terminal 102c by patterning the ITO arranged on the substrate 20 by a wet etching method so that an opening is formed in the sealing member arrangement region A. . At this time, the ITO in the sealing member arrangement region A and the outer region thereof is arranged on the second insulating layer 600 made of silicon oxide, and the ITO in the display region is arranged on the acrylic layer 400 through the reflective metal layer 23a. Has been. As described above, the acrylic resin and silicon oxide have substantially the same film properties. Therefore, the ITO in the sealing member arrangement region A and the outer region thereof and the ITO in the display region can be patterned with substantially the same accuracy.

  Further, since the silicon oxide film has better film properties than the silicon nitride film, the functional liquid used in the wet etching method is blocked by the second insulating layer 600 and does not come into contact with the signal line 102. For this reason, for example, deterioration of the signal line 102 in the sealing member arrangement region A can be prevented.

Then, the lyophilic control layer 222 and the organic bank layer 221 are formed on the acrylic layer 400, and the functional layer 111 is formed on the anode 23. Thereafter, the sealing substrate 30 is arranged in the sealing member arrangement region A on the substrate 20 via the sealing resin 40, and further, the flexible substrate 300 and other predetermined wirings are connected to the present embodiment. The organic EL display device 1 is manufactured.
Note that the TFT substrate of the present invention is a substrate having at least TFTs. Further, the TFT substrate is the lyophilic control layer provided for forming the electrode such as the anode, the insulating layer such as the first insulating layer 380 and the second insulating layer 600, or the functional layer 111 described in this embodiment. 222 formed with the organic bank layer 221 or the like may be included. In the present embodiment, an intermediate product for manufacturing an organic EL display device is referred to as a TFT substrate.

FIG. 13 is a diagram illustrating a specific example of an electronic apparatus including the organic EL device 1 according to the present embodiment as a display unit.
FIG. 13A is a perspective view showing an example of a mobile phone. In FIG. 13A, reference numeral 1000 denotes a mobile phone body, and reference numeral 1001 denotes a display unit using the above organic EL device.
FIG. 13B is a perspective view illustrating an example of a wristwatch type electronic device. In FIG. 13B, reference numeral 1100 denotes a watch body, and reference numeral 1101 denotes a display unit using the organic EL device.
FIG. 13C is a perspective view illustrating an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 13C, reference numeral 1200 denotes an information processing apparatus, reference numeral 1201 denotes an input unit such as a keyboard, reference numeral 1202 denotes a display unit using the above organic EL device, and reference numeral 1203 denotes an information processing apparatus main body.

  As described above, the organic EL display device according to the present invention has a long lifetime by preventing deterioration of the signal line 102 and has excellent light emission characteristics. Therefore, according to the electronic device according to the present embodiment, the lifetime of the electronic device is improved and the electronic device has excellent light emission characteristics.

The preferred embodiments of the organic EL display device, the manufacturing method thereof, and the electronic apparatus according to the present invention have been described above with reference to the accompanying drawings. Needless to say, the present invention is not limited to the above-described embodiments. Various shapes, combinations, and the like of the constituent members shown in the above-described embodiments are examples, and various modifications can be made based on design requirements and the like without departing from the gist of the present invention.

  For example, in the above embodiment, the organic EL display device according to the present invention has been described as a so-called top emission type organic EL display device. However, the present invention is not limited to this, and can be applied to a so-called bottom emission type organic EL display device. In this case, the reflective metal layer 23a is not provided, and the substrate 20 is a transparent or translucent substrate.

It is a schematic diagram which shows the wiring structure of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a top view which shows typically the structure of the organic electroluminescence display which concerns on one Embodiment of this invention. It is sectional drawing which follows the AB line | wire of FIG. It is sectional drawing which follows the CD line of FIG. It is a schematic block diagram of a functional layer. It is a schematic block diagram of drive TFT. It is sectional drawing of the connection site | part of a board | substrate and a flexible substrate. It is a figure for demonstrating the manufacturing method of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the organic electroluminescence display which concerns on one Embodiment of this invention. It is a figure which shows the specific example of the electronic device which concerns on one Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Organic EL display device, 20 ... Board | substrate, 102 ... Signal line (conductive part), 105 ... Transparent connection terminal (connection terminal), 123 ... Driving TFT (TFT element), 300 ... Protective film 380... First insulating film (silicon nitride film) 400... Acrylic layer (flattening film) 600... Second insulating film (silicon oxide film) A.

Claims (7)

A TFT substrate comprising a plurality of TFT elements arranged in a display area, and a conductive portion connected to a predetermined TFT element and having a connection terminal for connecting to the outside in a non-display area,
A silicon nitride film disposed over the entire surface of the display region and the non-display region;
A TFT substrate comprising: a silicon oxide film disposed on the silicon nitride film. 2. The TFT substrate according to claim 1, wherein the TFT element includes a semiconductor layer and an insulating layer formed on the semiconductor layer and implanted with hydrogen ions. 3. The TFT substrate according to claim 1, further comprising an auxiliary connection terminal disposed on the connection terminal and made of ITO. A method of manufacturing a TFT substrate comprising a plurality of TFT elements arranged in a display area, and a conductive portion having a connection terminal connected to a predetermined TFT element and connected to the outside in a non-display area,
Disposing a silicon nitride film over the entire surface of the non-display region and the display region where the TFT element is disposed;
And a step of disposing a silicon oxide film on the silicon nitride film. An organic EL display device comprising a display area having a plurality of organic EL elements and a sealing member arrangement area in which a sealing member for sealing the organic EL elements between substrates is arranged on a predetermined substrate. And
An organic EL display device using the TFT substrate according to claim 1 as the substrate. The organic EL display device according to claim 5, further comprising a planarizing film that planarizes a region in which the organic EL element is disposed and is formed in the display region. An electronic apparatus comprising the organic EL display device according to claim 5 as a display unit.

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