JP2005210396A - A/d conversion circuit and output correcting method thereof, imaging apparatus using the same, apparatus and system for radiographic imaging - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the error correcting method of an A/D conversion circuit preferable to a radiographic imaging apparatus for medical use requiring high image quality. <P>SOLUTION: The output signal of an A/D converter is connected synchronously with the output signal of any one of a plurality of A/D converters. A means for performing this correction is configured by a differentiator 805 for detecting the difference between outputs of the plurality of A/D converters, a memory 807 for storing the output of the differentiator 805 so that it is associated to the output of any one of the plurality of A/D converters, and a differentiator 806 for detecting the difference between the A/D converter and an output of the memory 807. With this configuration, a sense of incongruity of an image generated due to the non-linear error of the A/D converter can be reduced, and high image quality can be realized. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an A / D conversion circuit and an output correction method thereof, an imaging apparatus using the same, a radiation imaging apparatus, and a radiation imaging system, and more particularly to a technique for correcting output characteristics of an A / D conversion circuit.

  In recent years, a digital X-ray imaging apparatus using a photoelectric conversion apparatus that converts light into an electric signal, called a flat panel detector (FPD), has been put into practical use due to progress in semiconductor technology. Digital X-ray imaging devices have better sensitivity and image quality than film-type cameras. Furthermore, various image processing can be easily performed after shooting, so images necessary for the diagnostician can be easily obtained. Conventionally, such as the development of new medical services such as improved diagnostic accuracy and efficiency, such as the ability to manage images by digitizing images, the possibility of new medical services such as remote diagnosis using a network, etc. It has many advantages over the X-ray imaging apparatus.

  FIG. 11 is a circuit diagram showing an example of such an FPD. First, one pixel is composed of a photoelectric conversion element and a TFT (thin film transistor) that transfers the signal, and a two-dimensional sensor is configured by arranging the pixels in two dimensions. As the photoelectric conversion element, an MIS type photoelectric conversion element is used, but a PIN type photoelectric conversion element may be used.

  Reference numeral 105 denotes a vertical drive circuit mainly composed of a shift register that controls the gate voltage of the TFT of the two-dimensional sensor, and reference numeral 104 denotes a signal amplifier circuit that amplifies the charge transferred from the TFT via the signal line. Reference numerals 605-1 and 605-2 denote A / D converters for converting a signal from the signal amplifier circuit 104 into a digital signal.

  The signal amplifier circuit 104 includes a signal amplifier 601, a sample hold circuit 602 that holds the output of the amplifier 601 for a predetermined time, and a multiplexer circuit 603 that serially transfers a signal held in the sample hold circuit 602. Since a plurality of A / D converters are used, a multiplexer circuit 604 is provided for converting signals output from the individual A / D converters into one serial data. A refresh power source 606 applies a bias voltage to the sensor bias line of the two-dimensional sensor. The refresh power supply 606 switches the bias voltage between the accumulation operation and the refresh operation.

  When reading the image signal of the FPD, the vertical drive circuit 105 operates the gate line voltage to turn on the TFT, and transfers the charge accumulated in the photoelectric conversion element to the signal amplifier 601. At this time, as shown in FIG. 11, since the TFTs of one horizontal line share the same gate line, the signal is transferred to the signal amplifier 601 simultaneously with the horizontal one line. The signal amplified by the signal amplifier 601 is transferred to the sample hold circuit 602 and held by the sample hold circuit 602 until it is transferred to the A / D converter 605 by the subsequent multiplexer circuit 603. Finally, the signal is transferred to the A / D converters 605-1 and 605-2 in a time series by the multiplexer circuit 603 and digitized. The digitized image signal is sent to an image processing device (not shown), and is stored and displayed as a diagnostic image by performing image processing such as offset and gain correction.

  As described above, the FPD can read out a digital image from the electric charge accumulated in the photoelectric conversion element. However, since the signal held in the sample hold circuit 602 is transferred to the A / D converter 605 in time series, one line If the number of pixels is large, it takes a long time to read an image. In particular, since an X-ray imaging apparatus is required to image the chest of a human body, the size of a two-dimensional sensor is desired to be 40 cm square or more. On the other hand, for detecting small lesions and observing body tissues. Therefore, the smaller the pixel pitch, the better. Therefore, the number of pixels of the sensor is larger in the X-ray imaging apparatus than in a general imaging apparatus, and the readout time tends to be longer.

  For example, when calculating the transfer time of all pixels of a horizontal line of 2500 pixels and a vertical 2500 line of FPD, if the transfer of one pixel is 200 nsec (5 MHz drive), the transfer time of the horizontal line is 500 μsec. Yes, it takes 1.25 seconds to read out all pixels.

  If reading takes a long time, the dark current accumulation time will be different from the beginning and after the reading, so image shading will occur, image quality problems such as video and other high frame rate applications, or shooting There is a problem that it takes a long time to display an image from the beginning.

  In order to solve such a problem, for example, as described in Japanese Patent Application Laid-Open No. 4-212456 (Patent Document 1) or Japanese Patent Application Laid-Open No. 11-150255 (Patent Document 2), a plurality of A / A method of processing in parallel using a D converter has been proposed.

  Specifically, in Patent Document 1, an amplifier is provided for each readout line (signal wiring) of a two-dimensional sensor, and one line of amplifier is divided into a predetermined number of amplifier groups. A multiplexer is provided for converting the parallel signal at the amplifier output into a serial signal. An A / D converter is provided for each output of each multiplexer, and each multiplexer is configured to perform A / D conversion processing in parallel.

  The A / D converter of FIG. 11 corresponds to this, and the multiplexer circuit 603 outputs the signal of the even line of the signal line of the two-dimensional sensor to the A / D converter 605-1, and the signal of the odd line is the A / D converter. The A / D conversion processing is performed in parallel by the two A / D converters 605-1 and 605-2. Digital signals from the even and odd lines of the two A / D converters 605-1 and 605-2 are alternately output by the multiplexer circuit 604 and supplied to an image processing apparatus (not shown).

Further, in Patent Document 2, a plurality of signal wirings of a two-dimensional sensor are divided into a plurality of wiring groups, and an amplifier group, an S / H circuit group that is an analog storage circuit, and an S / H circuit for each signal wiring group. An A / D converter group is provided for digitizing the group output signals. In the thing of patent document 2, it parallel-processes with an A / D converter group for every S / H circuit group.
JP-A-4-212456 JP-A-11-150255

  When an image signal is digitized using a plurality of A / D converters as described in Patent Documents 1 and 2, there arises a problem that a difference in characteristics of each A / D converter appears in an image. Generally, an A / D converter cannot output digital data linearly with respect to an analog input, and an integral nonlinearity error as shown in FIG. 12 (a) or a differentiation as shown in FIG. 12 (b). It has a non-linearity error called non-linearity error.

  Since such error characteristics have individual differences even in the same type of A / D converter, in the case of an FPD using a plurality of A / D converters, the integral non-integration of the plurality of A / D converters is not possible. Vertical streak-like image discomfort occurs due to the difference between the linearity error and the differential nonlinearity error. Further, when the upper and lower sides or the left and right sides of one image are digitized by separate A / D converters, an uncomfortable image in which the boundary line can be seen occurs.

  When such a plurality of A / D converters are used, the image discomfort due to the difference in non-linearity error characteristics is about several LSBs, but it is a big problem in applications that read subtle shadows such as medical image diagnosis. Become. In addition, a radiation detection apparatus used for medical image diagnosis requires higher resolution than an imaging apparatus, and therefore, a higher resolution is also required for the A / D converter used. In a high-resolution A / D converter, it is difficult to manufacture a plurality of A / D converters in one semiconductor chip. In the current radiation detection apparatus, a semiconductor having one A / D converter is used. A plurality of chips are provided. However, when a plurality of A / D converters are formed on different semiconductor chips as described above, the difference in non-linearity error characteristics of the A / D converters becomes very significant. When a plurality of A / D converters are used in this way, there is no effective correction method due to the non-linear characteristics.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an A / D conversion circuit capable of easily correcting a non-linearity error, an output correction method thereof, and an image using the same. It is an object of the present invention to provide an imaging apparatus, a radiation imaging apparatus, and a radiation imaging system that can significantly improve the quality of the apparatus.

  In order to achieve the above object, the present invention provides an A / D conversion circuit having a plurality of A / D conversion means, wherein an output signal of the plurality of A / D conversion means is output from the plurality of A / D conversion means. It has a correction means which corrects according to the output signal of any one A / D conversion means.

  The present invention is also an output correction method for correcting output characteristics of an A / D conversion circuit having a plurality of A / D conversion means, wherein the output signals of the plurality of A / D conversion means are converted to the plurality of A / D conversion means. The correction is performed in accordance with the output signal of any one of the D conversion means.

  In addition, the present invention provides a pixel portion in which pixels including a photoelectric conversion element that converts incident light into an electric signal and a switch element that transfers the electric signal are two-dimensionally arranged, and a plurality of the pixels in a row direction. A conversion circuit unit including a plurality of control wirings to be connected, a plurality of signal wirings for reading out electrical signals from the photoelectric conversion elements via the switch elements of the plurality of pixels, and the plurality of control wirings in order In the imaging apparatus including a driving circuit unit to be driven and a readout circuit unit that is connected to the plurality of signal wirings and reads out an electric signal from the photoelectric conversion element for each row, the readout circuit unit includes the plurality of readout circuit units. The output signals of a plurality of A / D conversion means for converting a signal from the signal wiring into a digital signal are corrected in accordance with the output signal of any one of the plurality of A / D conversion means. It characterized by having a that correction means.

  The present invention also provides a pixel unit in which pixels including a conversion unit that converts incident radiation into an electric signal and a switch element that transfers the electric signal are two-dimensionally arranged, and a plurality of the pixels are connected in a row direction. A plurality of control wirings, a plurality of signal wirings that read electrical signals from the conversion means via the switch elements of the plurality of pixels, and a plurality of control wirings that are sequentially driven. In the radiation imaging apparatus, comprising: a driving circuit unit; and a readout circuit unit that is connected to the plurality of signal wirings and reads out an electrical signal from the conversion unit for each row, the readout circuit unit includes the plurality of signals. The output signal of the plurality of A / D conversion means for converting the signal from the wiring into a digital signal is corrected in accordance with the output signal of any one of the plurality of A / D conversion means. Characterized in that it has a correction means.

  The present invention also displays the radiation imaging apparatus, processing means for processing a signal from the radiation imaging apparatus as an image, recording means for recording a signal from the processing means, and a signal from the processing means. It is characterized by comprising display means, transmission means for transmitting signals from the processing means, and a radiation source for generating the radiation.

  According to the present invention, an integral nonlinearity error or a differential nonlinearity error of an A / D converter when a plurality of A / D converters are used can be easily corrected. Therefore, by using this A / D converter non-linearity correction technology in an imaging device or the like, vertical streak-like image discomfort or when one image is digitized by separate A / D converters. Occurrence of image discomfort that allows the boundary to be seen can be eliminated, and the quality of the image can be significantly improved. Therefore, it can be suitably used for applications that read subtle shadows in the field of medical image diagnosis that requires high image quality, and can contribute to improvement of diagnostic ability.

  Next, the best mode for carrying out the invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 is a circuit diagram showing a first embodiment of the present invention. First, in this embodiment, the basic configuration is the same as that of the FPD shown in FIG. 11, but the output characteristics of one A / D converter are combined with the output characteristics of the other A / D converters, so It is characterized by suppressing an uncomfortable image due to a difference in non-linearity error. For example, the A / D converters 605-1 and 605-2 in FIG. 11 will be described as corresponding to the A / D converters 801 and 802 in FIG.

  Although detailed description of the configuration of the FPD in FIG. 11 is omitted, as described above, a two-dimensional sensor in which pixels composed of photoelectric conversion elements and TFTs are two-dimensionally arranged, a vertical drive circuit 105 for driving a two-dimensional sensor, and a signal amplifier The signal amplifying circuit 104 includes a 601, a sample hold circuit 602, and a multiplexer circuit 603, a refresh power supply 606, A / D converters 605-1 and 605-2, a maltoplexer circuit 604, and the like. A detailed description of the FPD image signal reading operation in FIG. 11 is omitted.

  First, a difference unit 805 performs a difference between outputs of the two A / D converters 801 and 802, and a memory 807 stores data obtained by the difference unit 805. In FIG. 1, for example, the A / D converter 802 is a reference side A / D converter, and the A / D converter 801 is an A / D converter on the side whose characteristics are aligned with the reference side A / D converter 802. Further, for example, the A / D converter 801 handles even lines of signal lines from the two-dimensional sensor of FIG. 11, and the A / D converter 802 handles odd lines, and performs A / D conversion processing in parallel. The multiplexer circuit 808 corresponds to the multiplexer circuit 604 in FIG. 11, and alternately outputs signals of even lines and odd lines of the signal lines of the two-dimensional sensor from the A / D converters 801 and 802.

  Reference numeral 806 denotes a differentiator that makes a difference between the correction value output from the memory 807 and the output of the A / D converter 801 whose characteristics are aligned. Reference numeral 803 denotes a D / A converter that outputs an analog reference signal to the A / D converters 801 and 802. , 804 is a counter. The D / A converter 803 and the counter 804 constitute a reference signal generator. As will be described later, the reference signal generator supplies stepped signals that are analog reference signals to the two A / D converters 801 and 802 in the calibration mode.

  SW1 and SW3 are switches that are switched between the calibration mode and the A / D conversion mode, as will be described later, and SW2 is a switch that turns on / off the connection between the data line of the memory 807 and GND. Reference numeral 809 denotes a multiplexer circuit that switches connection between the memory 807 and the A / D converter 801 or the counter 804. A thick line in FIG. 1 indicates a bus.

  Here, FIG. 1 shows an example in which two A / D converters are used, but the present invention is not limited to this. For example, as will be described later, three A / D converters are used. Alternatively, more A / D converters may be used.

  In the present invention, a calibration mode (output characteristic difference acquisition operation) for examining characteristics of a plurality of A / D converters and making preparations necessary to match the characteristics of the plurality of A / D converters, and a two-dimensional sensor It has two operation modes of A / D conversion mode (actual drive operation) for digitizing analog signals, and correction of output characteristics of a plurality of A / D converters is realized using the two operation modes. Here, the correction principle of the non-linearity error of the A / D converter of the present invention will be described with reference to FIG. The circuit shown in FIG. 2 is a simplified representation of the electrical circuit of FIG. FIG. 2A illustrates the calibration mode, and FIG. 2B illustrates the A / D conversion mode.

  First, in the calibration mode, the switch SW1 is turned on and the switch SW3 is turned off, and step-like signals are sent from the reference signal generator of FIG. 1 to the A / D converters 801 and 802. FIG. 3 shows signals of respective parts of the reference signal generator. 3A is a clock CLK_count1 supplied to the counter 804, FIG. 3B is an N-bit output of the counter 804, FIG. 3C is a clock CLK_DA supplied to the counter 804, and FIG. A step-like analog reference signal output from the D / A converter 803 to the two A / D converters 801 and 802 is shown.

  Here, the output of the D / A converter 803 is equivalent to 1 LSB of the A / D converter in one step, and the minimum value and the maximum value are the input range of the A / D converter. The reference signal generator operates the D / A converter 803 and the two A / D converters 801 and 802 in synchronization using the same clock (CLK_DA, CLK_AD1, and CLK_AD2 in FIG. 1). The / D converter simultaneously A / D converts analog signals at the same level. In this case, since the minimum value and the maximum value of the signal voltage output from the reference signal generator are the minimum value and the maximum value of the input range of the A / D converter, the A / D converter 801 and the A / D converter 802 are 00. ... outputs codes in the range of 000 to 11 ... 111.

  Description will be made assuming that the input to each of the A / D converters 801 and 802 is x, the output characteristic of the A / D converter 801 is f (x), and the output characteristic of the A / D converter 802 is g (x). The outputs of the two A / D converters 801 and 802 are subtracted by the subtractor 805. The output of the A / D converter 801 at that time is used as address information, and the output f (x) −g (x) of the subtractor 805 is stored in the memory 807. Record the value of. In this way, as shown in FIG. 3D, the stepped signal x is changed to x0, x1, x2,..., Xn, and the output of the differentiator 805 at that time is f (x0) −g (x0). , F (x1) −g (x1) f (x2) −g (x2),..., F (xn) −g (xn) are recorded in the memory 807. As a result, as shown in FIG. 2A, the output data of the differentiator 805 is written in the memory 807 using the output of the A / D converter 801 as an address, and the output of the A / D converter 801 and the output of the differentiator 805 This table is created.

  Next, error correction operations of the two A / D converters in the A / D conversion mode will be described. FIG. 2B is a diagram for explaining the operation in the A / D conversion mode in which an analog signal from the two-dimensional sensor is converted into a digital signal. In the A / D conversion mode, the switch SW1 is turned off and the switch SW3 is turned on. In the A / D conversion mode, the memory 807 is in the output mode and outputs data recorded in the input address value.

  Here, for example, it is assumed that the signal x1 is input to the A / D converter 801. At this time, f (x1) output from the A / D converter 801 is input to the differentiator 806, and at the same time, the memory 807 is instructed to read the information of the address of f (x1), and as described above, the differencer 805 The data f (x1) −g (x1) corresponding to f (x1) obtained and held from the memory 807 is read from the memory 807 and input to the differentiator 806.

  The subtractor 806 subtracts the output f (x1) of the A / D converter 801 and the output f (x1) −g (x1) from the memory 807, and the subtraction result is f (x1) − [ f (x1) −g (x1)] = g (x1), and this g (x1) is output from the differentiator 806. That is, the output of the A / D converter 801 is corrected to g (x1) and is combined with the output g (x1) of the other A / D converter 802. This is nothing other than correcting the characteristic difference between the A / D converter 801 and the A / D converter 802 and matching the output characteristic of the A / D converter 801 with the output characteristic of the A / D converter 802. In this way, the output characteristics of a plurality of A / D converters can be made uniform.

  Next, each operation in the apparatus of FIG. 1 will be described. In the calibration mode, first, the memory 807 is initialized. In the initialization operation, the control signal init is set to the low level, and the counter 804 is selected by the multiplexer circuit 809, whereby the address line of the memory 807 and the counter 804 are connected. At this time, the data line of the memory 807 is connected to the low level (GND) by the switch SW2. In this state, the counter 804 is counted up from 0 to the maximum value, and “0” is input to all data of all addresses in the memory 807.

  Next, the control signal init is set to the high level, the switch SW2 is turned off, the data line of the memory 807 and GND are disconnected, and the address line of the memory 807 and the A / D converter 801 are connected. Further, the control signal Cal / Read is set to a low level to connect the D / A converter 803 and each of the A / D converters 801 and 802, and to turn on the switch SW1 and turn off the switch SW3. In this state, clock signals having the same frequency are input to the A / D converters 801 and 802, the D / A converter 803, and the counter 804, and are operated in synchronization with each other.

  A step-like signal shown in FIG. 3D is output from the D / A converter 803, and each of the A / D converters 801 and 802 performs A / D conversion on the signal of the D / A converter 803. Here, one step-like step output from the D / A converter 803 is the same as the voltage corresponding to 1 LSB of the A / D converter being used. Also, it is set to be the lower limit of the output of the A / D converter when the output of the counter 804 is all “0”, and the upper limit of the output of the A / D converter when the output of the counter 804 is all “1”. Yes.

  The signals A / D converted by the A / D converters 801 and 802 are subtracted by the differencer 805 as described above, and the output data of the differencer 805 is written using the output of the A / D converter 801 as an address. A table of the output of the / D converter 801 and the output of the differentiator 805 is created. This completes the calibration mode.

  Since the D / A converter generally has higher accuracy than the A / D converter, a D / A converter having the same number of bits as the A / D converter used may be used. The reference signal input to the A / D converter only needs to satisfy the above condition, and can be realized by using a D / A converter having a higher bit number than the A / D converter and attaching an attenuator to the output stage. good.

  Next, in the case of the A / D conversion mode, the control signal Cal / Read is set to the high level, and the output from the two-dimensional sensor shown in FIG. 11 and the A / D converters 801 and 802 are connected. Further, the switch SW1 is turned off to disconnect the data line of the differencer 805 and the memory 807, and the switch SW3 is turned on to connect the data line of the memory 807 and the differencer 806.

  In this state, the vertical drive circuit 105 and signal amplification circuit 104 connected to the two-dimensional sensor and the A / D converters 801 and 802 are operated in synchronization to convert an analog signal from the pixel into a digital signal. That is, the A / D converters 801 and 802 perform parallel A / D conversion processing and output each A / D conversion signal to the multiplexer circuit 808.

  The output correction operation of the A / D converter at this time is performed in the above-described calibration mode and A / D conversion mode, and as a result, the output characteristics of the A / D converter 801 are aligned with the output characteristics of the A / D converter 802. be able to.

  If calibration is performed once, it is not necessary to perform calibration every time shooting is performed. However, since the characteristics of the A / D converter change with temperature, it is desirable to perform a calibration operation periodically. The memory 807 used in the present embodiment may be a volatile memory such as a DRAM or a non-volatile memory such as an SRAM. Furthermore, by using a memory that does not require a power source for holding recorded data, such as a flash memory, it is possible to save the trouble of performing the calibration mode when the apparatus is turned on.

  As described above, in this embodiment, the output characteristics of a plurality of A / D converters can be easily corrected, and the image quality can be remarkably improved by using this correction technique for an imaging apparatus or a radiation imaging apparatus. In particular, in a radiation detection apparatus used for medical image diagnosis that reads a delicate shadow, a marked improvement in image quality can be obtained, which can contribute to an improvement in diagnostic accuracy. Further, in a radiation detection apparatus using a plurality of A / D converters formed on different semiconductor chips and requiring a high-performance A / D converter, non-linearity caused by being formed on different semiconductor chips. Therefore, it is possible to remarkably improve the image quality due to the difference in the characteristic error characteristics. In addition, since the characteristics of a plurality of A / D converters are corrected in real time, it is possible to deal with applications such as moving images that require real-time characteristics.

(Second Embodiment)
FIG. 4 is a circuit diagram showing a second embodiment of the present invention. In FIG. 4, the same parts as those in FIG. In this embodiment, an A / D converter 810 is provided in addition to the A / D converters 801 and 802 and three A / D converters are used. In the embodiment of FIG. 1, the A / D converter 802 is the reference side, and the A / D converter 801 is the side to match the characteristics. However, in the present embodiment, the A / D converter 802 is also the reference side, and the A / D converter 801 and 810 are the sides to match the characteristics.

  A differencer 811 is a differencer for differentiating the outputs of the A / D converters 802 and 810, 812 is a memory for storing the output of the differencer 811 using the output of the A / D converter 810 as an address, and 813 is an output of the A / D converter 810. And the memory 812.

  The calibration mode and A / D conversion mode operations of the A / D converters 801 and 802 are the same as those in the first embodiment. The operation of the A / D converters 802 and 810 in the calibration mode and the A / D conversion mode is exactly the same as when the A / D converter 810 is replaced with the A / D converter 801.

  In the present embodiment, the signal line signals from the two-dimensional sensor are distributed in the order of A / D converters 801, 802, and 810, and the A / D converters 801, 802, and 810 perform parallel processing of these signals. The multiplexer circuit 808 outputs the digital signals from the three A / D converters as the original serial signals. In the present embodiment, the output characteristics of the A / D converters 801 and 810 can be corrected to the output characteristics of the A / D converter 802.

  As described above, in this embodiment, similarly to the first embodiment, output characteristics of a plurality of A / D converters can be easily corrected, and image quality can be improved by using this correction technique for an imaging apparatus or a radiation imaging apparatus. It can be significantly improved. In particular, in a radiation detection apparatus used for medical image diagnosis that reads a delicate shadow, a marked improvement in image quality can be obtained, which can contribute to an improvement in diagnostic accuracy. Further, in a radiation detection apparatus using a plurality of A / D converters formed on different semiconductor chips and requiring a high-performance A / D converter, non-linearity caused by being formed on different semiconductor chips. Therefore, it is possible to remarkably improve the image quality due to the difference in the characteristic error characteristics. In addition, since the characteristics of a plurality of A / D converters are corrected in real time, it is possible to deal with applications such as moving images that require real-time characteristics.

(Third embodiment)
FIG. 5 is a circuit diagram showing a third embodiment of the present invention. In FIG. 5, the same parts as those in FIG. In the present embodiment, software and a processing device are used as means for aligning the characteristics of a plurality of A / D converters with the characteristics of one A / D converter. In the present embodiment, for example, software and a processing device stored in the control PC 111 illustrated in FIG. 8 are used. FIG. 8 shows an embodiment of a radiation imaging system using the imaging apparatus according to the present invention, which will be described later.

  Further, FIG. 5 shows two A / D converters 801 and 802. Of the signals sent from the signal line of the two-dimensional sensor in FIG. The A / D converter 802 takes charge and performs A / D conversion in parallel. The two-dimensional sensor signals digitized by the A / D converters 801 and 802 are alternately output by the digital multiplexer circuit 815 as even lines and odd lines, and recorded in the image processing device 109 of the control PC 111. A reference signal generator including a D / A converter 803 and a counter 804 is used to obtain data for correcting the A / D converter.

  Next, the correction method in this embodiment will be described. First, as in the first embodiment, information necessary for aligning the characteristics of the A / D converter is obtained in the calibration mode. In this case, the control signal Cal / Read signal is set to a low level, and the D / A converter 803 and the A / D converters 801 and 802 are connected. Next, the same clock signal is input to each of the A / D converters 801 and 802 and the D / A converter 803 to operate them in synchronization. A step signal is output from the D / A converter 803 as shown in FIG. 3D, and each of the A / D converters 801 and 802 A / D converts the step signal.

  At this time, the digital multiplexer circuit 815 alternately outputs the outputs of the A / D converters 801 and 802 to the image processing device 109 as in the case of obtaining an image. The image processing device 109 sequentially records the sent digital data in a memory. When the counter 804 outputs all 1s, the data processing device finishes taking data, and the operations of the D / A converter 803, the counter 804, and the A / D converters 801 and 802 are stopped.

  FIG. 6A is a graph showing an example of data obtained at this time. The horizontal axis represents the order in which signals are taken, and the vertical axis represents the output of the A / D converter. In the graph of FIG. 6A, 0 and even numbers on the horizontal axis are outputs of the A / D converter 801, and odd numbers are outputs of the A / D converter 802. Therefore, when the even and odd numbers on the horizontal axis are divided, the output of the A / D converter 801 is as shown in FIG. 6B, and the output of the A / D converter 802 is as shown in FIG. 6C.

Here, the 0th and 1st, 2nd and 3rd,... 2n and 2n + 1 on the horizontal axis of FIG. 6A are subtracted, and the data of these subtractions and the data of the A / D converter 801 are obtained. Associate. That is, the 0th and 1st subtracted values and the 0th value on the horizontal axis, and the 2nth and 2n + 1th subtracted values and the 2nth value are stored in association with each other. The same data as recorded in the memory 807 is obtained. The broken lines in FIGS. 3A to 3C indicate ideal A / D outputs when there is no error.
The correction table formed with the above data is defined as an array Lut (a, b) (a = 2 ⁿ : n is the number of bits of the A / D converter mounted on the FPD, b = 2). An example of this correction table is shown in FIG. The column of the array Lut (a, 1) has a 2nth value (value of the A / D converter 801) in the graph of FIG. 6A, and the column of Lut (a, 2) has “2n-2n + 1” (A / D converter 801 -A / D converter 802 value) is stored.

  Correction processing for aligning the characteristics of the two A / D converters 801 and 802 to one of the characteristics is performed by software as shown in the flowchart of FIG. In FIG. 7, it is assumed that one image is digitized by the circuit of FIG. 5, and the A / D converter 801 is responsible for the even-numbered line and the A / D converter 802 is responsible for the odd-numbered line. The digitized image of the two-dimensional sensor is stored in an array called Image (X, Y) shown in FIG.

  In FIG. 7A, first, a = 0, X = 0, and Y = 0 are set (S101). Next, the pixel values (Image (2X, Y) of the even-numbered columns of the digitized image data stored in Image (X, Y) are collated with the values of the a column of the correction table Lut (a, 1). (S102) At this time, if there is a match, the correction value, Lut (a, 2) and Image (2X, Y) are subtracted and substituted into Image (2X, Y) (S103).

Next, “a = 0” is set, and 2X + 1 = X _MAX or 2X = X _MAX is determined (S104), and the processes of S102 to S104 are performed until 2X + 1 = X _MAX or 2X = X _MAX . When S104 becomes YES, “X = 0” is set, it is determined whether Y = Y _MAX (S105), and the processes of S102 to S105 are performed until Y = Y _MAX . In this way, the digital values of the even columns, that is, the output of the A / D converter 801 are corrected by repeating the processing of S102 to S105.

  By this process, the characteristics of the A / D converter 801 responsible for digitizing an even-numbered column of the image can be corrected to be the same as the characteristics of the A / D converter 802 in exactly the same manner as in the first embodiment. Can be improved. The above processing is performed by software recorded in the control PC, and image data and correction table data are stored in a memory of the image processing device 109 (not shown).

  In the present embodiment, a D / A converter and a counter are added to the control board of an existing FPD, and it is possible to correct non-linearity errors of a plurality of A / D converters with a small change by simply changing software. It is a feature.

  As described above, in this embodiment, similarly to the first embodiment, output characteristics of a plurality of A / D converters can be easily corrected, and image quality can be improved by using this correction technique for an imaging apparatus or a radiation imaging apparatus. It can be significantly improved. In particular, in a radiation detection apparatus used for medical image diagnosis that reads a delicate shadow, a marked improvement in image quality can be obtained, which can contribute to an improvement in diagnostic accuracy. In addition, since the characteristics of a plurality of A / D converters are corrected in real time, it is possible to deal with applications such as moving images that require real-time characteristics.

(Fourth embodiment)
FIG. 8 is a block diagram showing an embodiment of a radiation imaging system using an imaging apparatus having a function of correcting output characteristics of a plurality of A / D converters as described above. In FIG. 8, the same parts as those in the FPD of FIG. In the figure, reference numeral 101 denotes a phosphor that converts radiation transmitted through the human body into visible light 102. Although X-rays are used as radiation, α rays, β rays, γ, etc. can also be used. Reference numeral 119 denotes an X-ray source that emits X-rays 120.

  Reference numeral 103 denotes a two-dimensional sensor manufactured on an unillustrated glass substrate using an amorphous silicon process, and reads visible light from the phosphor 101 at an equal magnification. The two-dimensional sensor 103 is the same as the two-dimensional sensor of FIG. 11, converts light carrying information on the human body emitted from the phosphor 101 into an electrical signal, stores the photoelectric conversion element, and the signal of the photoelectric conversion element Pixels having TFTs to be transferred are two-dimensionally arranged. The two-dimensional sensor is provided with a gate line, a signal line, and a sensor bias line.

  The vertical drive circuit 105 drives the TFT by supplying a drive signal from the gate line of the two-dimensional sensor 103, and the electric signal read from the TFT is amplified by the signal amplification circuit 104 and then passed through the relay substrate 123. It is sent to the control board 124 and converted into a digital signal by the A / D converter 106. As described above, the A / D converter 106 performs parallel processing using a plurality of A / D converters, and matches the output characteristics of the other A / D converters to any one A / D converter. It has a function of correcting the output characteristics of the / D converter.

  The control board 124 is necessary for the control computer 108 for sending a control signal for driving the two-dimensional sensor 103 to the signal amplification circuit 104 and the vertical drive circuit 105, as well as the two-dimensional sensor 103, the vertical drive circuit 105, and the signal amplification circuit 104. It includes a regulator 107 that creates a simple power source. Here, the FPD 112 includes a phosphor 101, a two-dimensional sensor 103, a signal amplification circuit 104, a vertical drive circuit 105, a relay board 123, and a control board 124.

  The image data converted into a digital signal by the A / D converter 106 is sent to the image processing device 109 in the control PC 111, processed into an image suitable for diagnosis, and displayed on the monitor 118. The displayed image can be output to the printer 116 by the operation of the operator. Further, the image data is appropriately stored in the recording device 122 in the control PC 111, the external recording device 117, or a recording device on the hospital network. The control PC 111 includes a program / control board 110 that controls the entire system, in addition to the image processing device 109 and the recording device 122.

  Control of these radiation imaging systems is all performed by the control PC 111, and synchronization with the X-ray source 119, image storage, image printing, connection to the hospital network 126, and the like can also be performed by the control PC 111. The control console 113 inputs patient ID registration, imaging part information input, image processing method of the captured image, and the like. These input information is sent to the control PC 111. The operation state of the FPD is displayed by the operation indicator lamp 125 and the monitor 118. The X-ray source control console 115 sets the X-ray source 119, and the power source 114 supplies power to the regulator 107.

  As the photoelectric conversion element used for the two-dimensional sensor 103, a MIS (Metal-Insulator-Semiconductor) type photoelectric conversion element or a PIN type photoelectric conversion element is used, and these photoelectric conversion elements and TFTs can be uniformly formed in a large area. Fabricated by silicon process. Further, other photoelectric conversion elements such as a CCD or a CMOS sensor may be used. Note that a conversion element made of amorphous selenium (a-Se), polycrystalline CdS, or the like that directly converts radiation into an electrical signal can be used instead of the photoelectric conversion element. In that case, the phosphor 101 is unnecessary.

FIG. 9 is a cross-sectional view showing a pixel using a TFT and a MIS photoelectric conversion element. In FIG. 9, a TFT 219 is formed on a glass substrate 201, and includes a gate electrode 202 made of chromium, aluminum, or an alloy of aluminum, an insulating film 203 formed of an amorphous silicon nitride film, and hydrogenated amorphous silicon (a-Si: H). A channel layer 204 formed by the above, an N ⁺ amorphous silicon layer 205 for making ohmic contact between the channel layer 204 and the metal electrode, a source electrode 206 formed by a metal such as aluminum or an alloy of aluminum, and a drain electrode 207 Has been.

The MIS type photoelectric conversion element 220 has a sensor lower electrode 209 formed of a metal such as chromium, aluminum or an aluminum alloy on the glass substrate 201 as in the TFT 219, and an insulating layer made of a silicon nitride thin film as an insulating layer of the MIS type photosensor. 210. Photoelectric conversion layer 211 that converts visible light formed by hydrogenated amorphous silicon into an electrical signal, making ohmic contact between the photoelectric conversion layer 211 and the electrode, and blocking injection of holes from the sensor bias line An N ⁺ type amorphous silicon layer 212, a transparent electrode 213 made of ITO for supplying a voltage to the MIS type photosensor, and a sensor bias line 214 formed of aluminum or chromium.

  Further, a protective layer 215 for protecting the photoelectric conversion element 220 and the TFT 219 from humidity and foreign matter, a phosphor 217 for converting radiation into visible light, an adhesive layer 216 for adhering the phosphor, and protecting the phosphor from humidity. The phosphor protective layer 218 for this purpose. In FIG. 9, the phosphor 101 of FIG. 8 is incorporated as a phosphor 217 inside the device.

FIG. 10 is a cross-sectional view of a pixel using a TFT and a PIN photoelectric conversion element. In FIG. 10, a TFT 419 is formed on a glass substrate 401 by a gate electrode 402 made of chromium, aluminum, or an alloy of aluminum, an insulating film 403 formed of an amorphous silicon nitride film, and hydrogenated amorphous silicon (a-Si: H). Channel layer 404, N ⁺ amorphous silicon layer 405 having negative conductivity for making ohmic contact between channel layer 404 and the metal electrode, source electrode 406 formed of metal such as aluminum or aluminum alloy, and drain electrode 407 and a signal line 408.

The PIN type photoelectric conversion element 420 includes a sensor lower electrode layer 409 made of aluminum or an alloy of aluminum, and an N ⁺ amorphous silicon layer having negative conductivity to prevent injection of holes from the sensor lower electrode layer 409 to the photoelectric conversion layer 411. 410, a photoelectric conversion layer 411 that converts visible light formed by hydrogenated amorphous silicon into an electrical signal, a positive conductivity that prevents injection of electrons from the sensor bias line 414 and the transparent electrode 413 to the photoelectric conversion layer 411. It is composed of a P ⁺ type amorphous silicon layer 412.

  The sensor bias line 414 supplies a voltage to the PIN photoelectric conversion unit and is made of aluminum or an aluminum alloy, and the transparent electrode 413 is formed of a transparent electrode material such as ITO. Further, a protective layer 415 for protecting the photoelectric conversion element 420 and the TFT 419 from humidity and foreign matter, a phosphor 417 for converting radiation into visible light, an adhesive layer 416 for bonding the phosphor, and protecting the phosphor from humidity. The phosphor protective layer 418 is provided. In FIG. 10, the phosphor 101 of FIG. 8 is incorporated as a phosphor 417 inside the device.

1 is a circuit diagram showing a first embodiment of the present invention. It is a figure explaining the calibration operation | movement and A / D conversion operation | movement of 1st Embodiment. It is a figure which shows the signal of each part of the reference signal generator of 1st Embodiment. It is a circuit diagram which shows the 2nd Embodiment of this invention. It is a circuit diagram which shows the 3rd Embodiment of this invention. It is a figure which shows an example of the data obtained at the time of the calibration of 3rd Embodiment. It is a flowchart which shows the output characteristic correction process of the A / D converter of 3rd Embodiment. 1 is a block diagram showing an embodiment of a radiation imaging system having an A / D converter output characteristic correction function of the present invention. It is sectional drawing which shows the MIS type photoelectric conversion element and TFT used for a two-dimensional sensor. It is sectional drawing which shows the PIN type photoelectric conversion element and TFT used for a two-dimensional sensor. It is a circuit diagram which shows an example of FPD. It is a figure which shows the error characteristic of an A / D converter.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Phosphor 102 Visible light 103 Two-dimensional sensor 104 Signal amplification circuit 105 Vertical drive circuit 106 A / D converter 107 Regulator 108 Control computer 109 Image processing apparatus 110 Program / control board 111 Control PC
112 FPD
113 Control console 115 X-ray control console 117 External recording device 118 Monitor 119 X-ray source 123 Relay board 124 Control board 801, 802, 810 A / D converter 803 D / A converter 804 Counter 805, 806 Differentiator 807 Memory 808, 809 , 815 Multiplexer circuit 811, 813 Differentiator 812 Memory 814 Multiplexer circuit SW1 to SW4 switch

Claims (15)

In an A / D conversion circuit having a plurality of A / D conversion means, an output signal of the plurality of A / D conversion means is output from any one of the plurality of A / D conversion means. An A / D conversion circuit comprising correction means for correcting according to a signal. The correction means is associated with an output of any one of the plurality of A / D conversion means and a first difference detection means for detecting a difference between outputs of the plurality of A / D conversion means. Storage means for storing the output from the first difference detection means, and second difference detection means for detecting a difference between the output of the A / D conversion means and the output of the storage means. The A / D conversion circuit according to claim 1. 3. The A / D conversion circuit according to claim 2, wherein the correction unit further includes a reference signal generation unit that outputs a reference signal to the plurality of A / D conversion units. An output correction method for correcting an output characteristic of an A / D conversion circuit having a plurality of A / D conversion means, wherein an output signal of the plurality of A / D conversion means is selected from among the plurality of A / D conversion means. An output correction method for an A / D conversion circuit, wherein the correction is made in accordance with the output signal of one A / D conversion means. A pixel portion in which pixels including a photoelectric conversion element that converts incident light into an electric signal and a switch element that transfers the electric signal are two-dimensionally arranged, and a plurality of control wirings that connect the plurality of pixels in a row direction And a plurality of signal wirings that read electrical signals from the photoelectric conversion elements through the switch elements of the plurality of pixels, and a conversion circuit unit comprising:
A drive circuit section for sequentially driving the plurality of control wirings;
In the imaging device having a readout circuit unit connected to the plurality of signal wirings and reading out an electrical signal from the photoelectric conversion element for each row,
The read circuit unit outputs an output signal of a plurality of A / D conversion units that convert signals from the plurality of signal wirings into digital signals, and outputs one of the A / D conversion units. An imaging apparatus comprising correction means for correcting in accordance with an output signal of the conversion means. The correction means is associated with an output of any one of the plurality of A / D conversion means and a first difference detection means for detecting a difference between outputs of the plurality of A / D conversion means. Storage means for storing the output from the first difference detection means, and second difference detection means for detecting a difference between the output of the A / D conversion means and the output of the storage means. The A / D conversion circuit according to claim 5. The A / D conversion circuit according to claim 6, wherein the correction unit further includes a reference signal generation unit that outputs a reference signal to the plurality of A / D conversion units. The correction means inputs the reference signal to the plurality of A / D conversion means, and outputs the output of any one of the plurality of A / D conversion means and the remaining A / D conversion means. Corresponding to the output of the remaining A / D conversion means and the output of the remaining A / D conversion means from the storage means. An actual drive operation for correcting the output of the remaining A / D conversion means by reading the output value and subtracting the output value from the output of the remaining A / D conversion output stage is performed. The imaging device according to claim 6. A pixel unit in which pixels including a conversion unit that converts incident radiation into an electrical signal and a switch element that transfers the electrical signal are two-dimensionally arranged; a plurality of control wirings that connect the plurality of pixels in a row direction; A plurality of signal wirings for reading out electrical signals from the conversion means via the switch elements of the plurality of pixels, and a conversion circuit unit comprising:
A drive circuit section for sequentially driving the plurality of control wirings;
In a radiation imaging apparatus having a readout circuit unit connected to the plurality of signal wirings and reading out an electrical signal from the photoelectric conversion means for each row,
The reading circuit unit outputs an output signal of a plurality of A / D conversion units that convert signals from the plurality of signal wirings into digital signals, and outputs one of the A / D conversion units. A radiation imaging apparatus comprising correction means for correcting in accordance with an output signal of the conversion means. The correction means is associated with an output of any one of the plurality of A / D conversion means and a first difference detection means for detecting a difference between outputs of the plurality of A / D conversion means. Storage means for storing the output from the first difference detection means, and second difference detection means for detecting a difference between the output of the A / D conversion means and the output of the storage means. The A / D conversion circuit according to claim 9. 11. The A / D conversion circuit according to claim 10, wherein the correction unit further includes a reference signal generation unit that outputs a reference signal to the plurality of A / D conversion units. The said conversion means has the fluorescent substance which converts a radiation into visible light, and the photoelectric conversion element which converts the light from this fluorescent substance into an electrical signal, The any one of Claims 9-11 characterized by the above-mentioned. The radiation imaging apparatus described. The radiation imaging apparatus according to claim 9, wherein the conversion unit includes a conversion element that directly converts radiation into an electrical signal. The correction means inputs the plurality of A / D conversion means while changing the reference signal, and outputs the output of any one of the plurality of A / D conversion means and the remaining A / D. An output characteristic difference acquisition operation for causing the storage means to record the difference from the output of the D conversion means in association with the output of the remaining A / D conversion means; and the output of the remaining A / D conversion means from the storage means And an actual driving operation for correcting the output of the remaining A / D conversion means by subtracting the output value from the output of the remaining A / D conversion output stage. The imaging apparatus according to claim 10, wherein 15. The radiation imaging apparatus according to claim 9, a processing unit that processes a signal from the radiation imaging apparatus as an image, a recording unit that records a signal from the processing unit, and the processing unit. A radiation imaging system comprising: display means for displaying a signal from the transmission means; transmission means for transmitting the signal from the processing means; and a radiation source for generating the radiation.

Images