JP2005210295A - Thin-film surface acoustic wave device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin-film surface acoustic wave device capable of improving resonator characteristics or filter characteristics by reducing parasitic capacitance generated between the piezoelectric thin film and a substrate or a conductive film to be arranged below a piezoelectric thin film. <P>SOLUTION: This thin-film surface acoustic wave device 100 has the substrate 101 having a circuit 110 formed thereon, a piezoelectric thin film 104 disposed on the substrate and electrodes 105Ax, 105Ay and 105B formed on the surface of the piezoelectric thin film. The electrodes are conductively connected to the circuit via wirings 106Ax, 106Ay, 106B, 107Ax, 107Ay, 107B, 108x, 108y, 109x, 109y via through holes 104a, 104b formed on the piezoelectric thin film. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a thin film surface acoustic wave device, and more particularly to a wiring structure of a thin film surface acoustic wave device.

  In general, surface acoustic wave devices that form resonators, filters, and the like are used for communication equipment and various signal processing. As such a surface acoustic wave device, a thin film surface acoustic wave device in which a piezoelectric thin film such as a ZnO thin film is formed on a substrate such as a silicon substrate is known (for example, see Non-Patent Document 1 below). In a conventional thin film surface acoustic wave device, an IDT (interdigital converter, for example, comb-like electrode) and a reflector are formed on a piezoelectric thin film, and a bus bar for connecting these IDTs and reflectors to each other Wiring for connecting the bus bar to the bonding pad is provided. In a normal surface acoustic wave device, a device chip is disposed in a sealed state inside a casing, and a bonding pad formed on the device chip and an external terminal provided on the casing are conductively connected by a conductive wire. It has become.

In particular, a general semiconductor integrated circuit forms various semiconductor elements and wirings by monolithically forming various semiconductor elements on the surface region of a silicon substrate or by forming a thin film structure on the silicon substrate. Usually, in communication circuits and various signal processing circuits, many parts are configured as semiconductor integrated circuits. For example, the above-described surface acoustic wave device is formed on a silicon substrate on which a semiconductor integrated circuit is configured. It is considered that the configuration is an important point in promoting the miniaturization of the communication circuit and the signal processing circuit. For this reason, conventionally, surface acoustic wave devices formed on a silicon substrate constituting a semiconductor integrated circuit have been proposed (for example, see Patent Documents 1 and 2 below).
Tsutsuo Sanro and 4 others “Thin Film Surface Acoustic Wave Devices” Matsushita Technical Report Vol.22 No.6 Dec 1976 P.905-923 JP-A-6-125226 JP 2000-151451 A

  However, as described above, in a surface acoustic wave device formed on a conductive substrate such as a silicon substrate or a substrate having a conductive film on the surface, the surface acoustic wave element structure is not between the substrate and the conductive film. There is a problem that the parasitic capacitance is increased, and the resonator and filter characteristics are deteriorated by the parasitic capacitance.

  Therefore, the present invention solves the above-mentioned problems, and the problem is that by reducing the parasitic capacitance generated between the substrate and the conductive film disposed under the piezoelectric thin film, the resonator characteristics and the filter are reduced. An object of the present invention is to provide a thin film surface acoustic wave device capable of improving characteristics.

  In view of such circumstances, the thin film surface acoustic wave device of the present invention comprises a substrate on which a circuit is formed, a piezoelectric thin film disposed on the substrate, and an electrode formed on the surface of the piezoelectric thin film. In the thin film surface acoustic wave device, the electrode is conductively connected to the circuit through a wiring penetrating the piezoelectric thin film.

  According to the present invention, since the electrodes are conductively connected to the circuit through the wiring penetrating the piezoelectric thin film, the electrodes formed on the surface of the piezoelectric thin film and the wiring conductively connected to the electrodes are planar. Since it is possible to reduce the occupied area, it is possible to reduce the parasitic capacitance generated between the electrode and the wiring and the substrate or the conductive film arranged thereunder. In particular, since there is no need to provide a connection terminal (such as a conductive pad) directly connected to the electrode, the effect of reducing the occupied area is great. Therefore, the characteristics of the thin film surface acoustic wave device can be improved. Specifically, the insertion loss and impedance of the thin film surface acoustic wave device can be reduced.

  Here, the electrode according to the present invention may be formed on the surface of the piezoelectric thin film. That is, an electrode may be formed on the surface of the piezoelectric thin film opposite to the substrate, and an electrode may be formed on the surface of the piezoelectric thin film on the substrate side. Examples of the electrode include an excitation electrode for generating surface acoustic waves and a detection electrode for detecting surface acoustic waves. Usually, these electrodes are preferably comb-like electrodes constituting an IDT (interdigital converter). Moreover, the reflective electrode which comprises the reflector for reflecting a surface acoustic wave may be sufficient. The circuit provided on the substrate is preferably a semiconductor integrated circuit.

  In the present invention, it is preferable that an insulating layer is provided between the substrate and the piezoelectric thin film, and the wiring is conductively connected to the circuit through the insulating layer. In particular, in order to insulate a portion of a circuit (for example, a semiconductor integrated circuit) formed on a substrate other than a portion that should be conductively connected to the wiring from the wiring, a plurality of components are formed on the main constituent base material of the substrate. It is desirable that the insulating layers are laminated. For example, a part of the wiring that conductively connects the electrode and the circuit through the through-hole is configured as a wiring layer disposed between the upper insulating layer and the lower insulating layer, so that the wiring can be routed. The degree of freedom can be increased.

  Another thin film surface acoustic wave device of the present invention is a thin film having a substrate on which a circuit is formed, a piezoelectric thin film disposed on the substrate, and an electrode formed on the surface of the piezoelectric thin film. In the surface acoustic wave device, an insulating layer is provided between the substrate and the piezoelectric thin film, and the electrode is connected to the circuit via a wiring penetrating a region overlapping the piezoelectric thin film of the insulating layer. And conductively connected.

  According to the present invention, the electrode formed on the surface of the piezoelectric thin film is electrically connected to the circuit through the wiring penetrating the region overlapping the piezoelectric thin film of the insulating layer. Since it is possible to reduce the planar area occupied by conductively connected wiring, etc., it is possible to reduce the parasitic capacitance generated between the electrode and wiring and the substrate or conductive film arranged in the lower layer. become. In particular, since there is no need to provide a connection terminal (such as a conductive pad) directly connected to the electrode, the effect of reducing the occupied area is great. Therefore, the characteristics of the thin film surface acoustic wave device can be improved. Specifically, the insertion loss and impedance of the thin film surface acoustic wave device can be reduced.

  In the present invention, the substrate is preferably a semiconductor substrate. As a result, the circuit can be constituted by a semiconductor integrated circuit, and the thin film surface acoustic wave device can be made more compact and have higher performance. Examples of the semiconductor substrate include a silicon substrate and a compound semiconductor (GaAs, GaP, InP, SiGe, ZnS, etc.) substrate. In particular, by using a silicon substrate, an inexpensive semiconductor integrated circuit can be easily formed by general-purpose technology.

  In each of the above inventions, it is preferable that at least a part of the wiring is arranged in a region overlapping with the electrode in a plane. Further, it is preferable that the through hole is provided in a region overlapping the electrode in a plan view. Furthermore, in each of the above inventions, various filter circuits such as various oscillation circuits such as a VCO (Voltage Controlled Oscillator; VCSO) and band-pass filters can be constituted by the thin film surface acoustic wave element structure and the above circuit. In addition, a main part of a large-scale integrated circuit such as a transmission / reception circuit is formed on the substrate, and one or a plurality of thin film surface acoustic wave elements on the substrate are incorporated in the main part to form an integrated large-scale integrated circuit. You may do it.

  Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[First Embodiment]
FIG. 1 is a schematic longitudinal sectional view showing a schematic structure of a thin film surface acoustic wave device 100 according to a first embodiment of the present invention, and FIG. 2 is a schematic plan view of the thin film surface acoustic wave device 100. The thin film surface acoustic wave device 100 includes a semiconductor substrate made of silicon (Si), a compound semiconductor (GaAs, GaP, InP, SiGe, ZnS, etc.), a glass substrate, a quartz substrate, a ceramic substrate, or the like. An insulating layer 102 composed of a metal oxide such as SiO ₂ , PSG (phosphorus doped glass), TiO ₂ , and Ta ₂ O ₅ , silicon nitride such as Si ₃ N ₄ , and a synthetic resin such as an acrylic resin. Is formed. The insulating layer 102 is used to insulate between the substrate and the upper conductor when the substrate 101 is a conductor substrate or a semiconductor substrate.

  Even if the substrate 101 is a silicon substrate, it may be a conductor or a semiconductor and has a certain degree of conductivity and may have an insulating property such as an intrinsic semiconductor. In particular, the insulating layer 102 is required. In the latter case, the insulating layer 102 is not always necessary. Furthermore, an insulator such as a glass substrate, a quartz substrate, or a ceramic substrate can be used as the substrate 101. Even in such a case, the insulating layer 102 is not necessary. Even when the insulating substrate 101 is used, if a conductive film such as a wiring pattern is formed on the surface thereof, the insulating layer 102 is necessary to ensure insulation from the upper layer. There is a case. As the insulating layer 102, an insulating layer for surface coating on a semiconductor substrate such as silicon on which a semiconductor integrated circuit is formed can be used as it is.

  On the insulating layer 102, wiring layers 107Ax, 107Ay, 107B, 108x, and 108y are partially formed. These wiring layers are made of aluminum, aluminum alloy, Cu, Cu alloy, Au, Au alloy, Cr, Cr alloy, or the like.

  An insulating layer 103 is formed on the wiring layer. The insulating layer 103 can also be made of the same material as the insulating layer 102. Although the insulating layer 103 can be omitted, it is preferable to provide the insulating layer 103 in order to relax the potential distribution on the lower surface of the piezoelectric thin film 104 described later. When the insulating layer 103 is not present, the wiring layers 107Ax, 107Ay, and 107B are on the lower surface of the piezoelectric thin film 104 described later, that is, on the side opposite to the surface on which electrodes 105Ax, 105Ay, and 105B described later are formed. It will be in contact with the surface.

Surface acoustic waves such as ZnO, AlN, PZT (Pb—Zr—Ti), CdS, ZnS, Bi—Pb—O, LiNbO ₃ , TaNbO ₃ , and KNbO ₃ can be excited on the insulating layer 103. A piezoelectric thin film 104 composed of various piezoelectric bodies is formed. The piezoelectric thin film 104 may be formed over the entire surface of the substrate 101, but is preferably formed on a part of the substrate 101 as in the illustrated example. This is because the substrate 101 may have an area necessary for forming other circuit structures such as a semiconductor integrated circuit, whereas the piezoelectric thin film 104 is necessary for forming a surface acoustic wave device. This is because a minimum area is sufficient, and in the case of the present embodiment, a connection terminal (conductive pad) of a circuit, which will be described later, is formed in a region away from the piezoelectric thin film.

  The piezoelectric thin film 104 has an appropriate thickness according to its material and crystallinity. For example, the thickness is generally about 0.1 to 5 μm, and particularly preferably about 0.5 to 1.5 μm. If the piezoelectric thin film 104 is too thin, the surface acoustic wave propagation mode is easily affected by the lower layer, and the surface of the piezoelectric thin film (upper surface in the illustrated example) may have insufficient crystallinity. Usually, it is desirable that the thickness of the piezoelectric thin film be one or more wavelengths of the excited surface acoustic wave. Conversely, if the piezoelectric thin film is too thick, the manufacturing process takes time and the manufacturing cost increases, so that the merit of the thin film surface acoustic wave device is reduced.

  Electrodes 105Ax, 105Ay, and 105B are formed on the surface (upper surface) of the piezoelectric thin film 104. Electrode 105Ax. 105Ay is an excitation electrode for exciting the surface acoustic wave. Each of the electrodes 105Ax and 105Ay is provided in a comb-like shape, and the electrodes 105Ax and 105Ay are alternately arranged at a constant interval in the propagation direction of the surface acoustic wave (the left-right direction in the drawing). The electrode 105B is a reflective electrode for constituting a reflector. A reflector (a so-called grating reflector) is configured by arranging a plurality of electrodes 105B at the predetermined intervals in the propagation direction. These reflectors are respectively arranged on both sides in the propagation direction of the arrangement region of the electrodes 105Ax and 105Ay.

  In this embodiment, the electrodes 105Ax, 105Ay, and 105B are formed on the upper surface of the piezoelectric thin film 104. However, as described in another embodiment described later, the electrodes are formed on the lower surface of the piezoelectric thin film 104. May be formed. In this case, the surface acoustic wave propagates on the lower surface of the piezoelectric thin film 104.

  Through holes 104 a and 104 b are formed in the piezoelectric thin film 104. Conductive materials 106Ax and 106Ay are disposed inside the through-hole 104a, and these conductive materials also penetrate the insulating layer 103 and are conductively connected to the wiring layers 107Ax and 107Ay. The wiring layer 107Ax is conductively connected to the wiring layer 108x, and the wiring layer 108x is conductively connected to the circuit 110 provided on the substrate 101 via a conductive material 109x filled in a through hole formed in the insulating layer 102. ing. The wiring layer 107Ay is conductively connected to the wiring layer 108y, and the wiring layer 108y is conductively connected to the circuit 110 via a conductive material 109y disposed in a through hole formed in the insulating layer 102. A conductive material 106B is disposed inside the through hole 104b, and these conductive materials also penetrate the insulating layer 103 and are conductively connected to the wiring layer 107B.

  The circuit 110 is configured by a monolithic integrated circuit configured inside (surface layer part) of the substrate 101, a hybrid integrated circuit configured on the surface, or the like. The circuit 110 includes a plurality of connection terminals (conductive pads) 111 exposed on the insulating layer 103. For example, various lines such as a control line for supplying a control signal to the circuit 110 and a power supply line for supplying a power supply potential to the circuit 110 are connected to these connection terminals 111 via wire bonding or a solder ball. The conductive connection is made by various methods such as a heat-press contact using a crimp contact, an ACF (anisotropic conductive film) or the like.

  At least a part of the wiring layers 107Ax, 107Ay, and 107B is disposed so as to overlap the electrodes 105Ax, 105Ay, and 105B in a plane. In the case of the present embodiment, the wiring layers 107Ax, 107Ay, 107B are configured so that regions that do not overlap with the electrodes 105Ax, 105Ay, 105B in a plane are as small as possible. The wiring layers 107Ax, 107Ay, and 107B are formed so as to conductively connect the plurality of conductive materials that are conductively connected to a plurality of electrodes, respectively, and are conductively connected to the common conductive layers 108x and 108y. It is also formed to do. In this embodiment, the portions where the plurality of electrodes 105Ax, 105Ay, and 105B are conductively connected to each other are wiring layers 107Ax, 107Ay, and 107B disposed below the piezoelectric thin film 104. Such a portion may be formed on the upper surface of the piezoelectric thin film 104.

  Although not shown in the above embodiment, it is preferable that the electrode 105B is also conductively connected to the circuit 110. In the above embodiment, the electrodes 105Ax, 105Ay, and 105B are formed on the surface of the piezoelectric thin film 104 opposite to the substrate 101. On the contrary, the electrodes are disposed on the lower surface of the piezoelectric thin film 104 (substrate May be formed on the side surface). In this case, the electrode can be configured to be conductively connected to the circuit via a wiring that extends downward without passing through the piezoelectric thin film. Even in this case, at least a part of the electrode and the wiring layer is configured to overlap each other in a plane.

[Second Embodiment]
FIG. 3 is a schematic longitudinal sectional view showing the surface acoustic wave device 200 according to the second embodiment. In the second embodiment, the substrate 201, the insulating layer 202, the insulating layer 203, the piezoelectric thin film 204, the electrodes 205Ax, 205Ay, 205B, the conductive materials 206Ax, 206Ay, 206B, the wiring layers 207Ax, 207Ay, and the connection terminal 211 are as described above. Since it is basically the same as that of the first embodiment (that is, except for the plane pattern, size, and shape), description thereof will be omitted.

  In the surface acoustic wave device 200, the wiring layers 207 </ b> Ax, 207 </ b> Ay, 207 </ b> Ay, 207 </ b> Ay, 207 </ b> Ay, 207 </ b> Ay, 207B is different from the first embodiment in that 207B is conductively connected to the circuit 210 via conductive materials 209Ax, 209Ay, and 209B disposed in the through holes provided in the insulating layer 202. Therefore, in the second embodiment, the planar occupation area of the electrode and the wiring layer can be further reduced as compared with the first embodiment.

  In addition, the circuit 210 is formed in a region that substantially overlaps the piezoelectric thin film 204 in a plane, and the circuit 110 is provided in a region that is shifted in a plane with respect to the formation region of the piezoelectric thin film 104. Different from one embodiment. However, the internal structure of the circuit 210 itself is configured similarly to the circuit 110 of the first embodiment. If the circuit 210 and at least a part of the piezoelectric thin film 204 are configured to overlap each other in a planar manner, the device can be made compact, but the circuit 210 is completely within the region where the piezoelectric thin film 204 is formed. By being configured, the entire device can be configured more compactly.

  Further, the circuit 210 is formed on the insulating layer 202 (that is, in the same level region as the wiring layers 207Ax, 207Ay, and 207B) via the conductive material 212 disposed in the through hole provided in the insulating layer 202. The wiring layer 213 is conductively connected, and the wiring layer 213 is conductively connected to the connection terminal 211 on the insulating layer 203. Such a structure is preferable in order to increase the degree of freedom of the positional relationship between the circuit 210 and the connection terminal 211, but the circuit 210 and the connection terminal 211 do not pass through the wiring layer 213 but only through the conductive material 212 in the through hole. May be electrically connected.

  FIG. 4 is an equivalent circuit diagram of the surface acoustic wave device according to each of the above embodiments. In FIG. 4, reference numerals 109x and 109y at both ends of the equivalent circuit are assigned to those corresponding to the first embodiment, and the following description will also explain the first embodiment. The same applies to the embodiment.

  The equivalent circuit of the thin film surface acoustic wave device 100 includes a series circuit of an electrostatic capacitance Ca, an inductance La, and a resistor Ra between connection terminals 109x and 109y, and a parallel capacitance (short capacitance) connected in parallel with the series circuit. ) Cs. Here, the series circuit portion is a portion that provides the input / output characteristics of the surface acoustic wave device via the surface acoustic wave, and the parallel capacitance Cs corresponds to the stationary component of the capacitance between the electrodes 105Ax and 105Ay. It is. The above components are the same as the equivalent circuit of a normal surface acoustic wave device. However, in the thin film surface acoustic wave device of this embodiment, the thin film surface acoustic wave element structure and the substrate are further parallel to the above circuit configuration. There is a parasitic capacitance Co that is a capacitance between the capacitor 101 and the terminal 101. The parasitic capacitance Co is generated between the electrodes 105Ax and 105Ay and the wiring layers 107Ax and 107Ay and the wiring pattern formed on the substrate 101 itself or on the surface or inside thereof. On the other hand, in the surface acoustic wave device having a conventional structure, a portion from the electrode to the connection terminal via the wiring generates a parasitic capacitance between the substrate and the conductive pattern.

  On the other hand, in the surface acoustic wave device having a conventional structure, the portion from the electrode to the connection terminal via the wiring contributes to the parasitic capacitance between the substrate and the conductive pattern. That is, a parasitic capacitance corresponding to the entire conductor area from the electrode to the connection terminal via the wiring is generated between the substrate and the substrate. Further, in the case of the conventional structure, not only the electrode but also the wiring routing portion is formed on the surface of the piezoelectric thin film, so that a piezoelectric thin film having a high dielectric constant may be interposed between the electrode and the wiring and the substrate. This causes the parasitic capacitance to increase.

  In the present embodiment, in the thin film surface acoustic wave device structure, since the electrode is connected to the circuit 110 via the wiring, it is not necessary to form a portion from the wiring to the connection terminal. Since the electric energy is reduced, more electric energy distributed to the capacitors Co, Cs, and Ca is distributed to Cs and Ca. As a result, the insertion loss and impedance of the thin film surface acoustic wave device 100 can be reduced.

  In the present embodiment, since the electrode is conductively connected to the wiring layer through a through-hole provided in the piezoelectric thin film 104, at least a part of the electrode and the wiring layer overlaps in a plane. Therefore, the planar occupation area combining the electrode and the wiring layer is reduced, and furthermore, there is no piezoelectric body having a high dielectric constant between the wiring layer and the substrate. Get smaller.

  FIG. 5 is a graph schematically showing the frequency dependence of the insertion loss and impedance of the thin film surface acoustic wave device 100 of the present embodiment. Here, the illustrated solid line indicates the insertion loss of the present embodiment, the illustrated alternate long and two short dashes line indicates the impedance of the present embodiment, and the illustrated dotted line indicates the insertion loss and impedance of the thin film surface acoustic wave device having a conventional structure. Since the parasitic capacitance Co can be reduced by configuring as described above, in this embodiment, the insertion loss and the impedance are reduced as compared with the conventional structure.

  In the first embodiment, the wiring layers 107Ax and 107Ay and the wiring layers 108x and 108y are conductively connected, and the wiring layers 108x and 108y and the circuit 110 are conductively connected. In the second embodiment, the wiring layers Since the conductive material extending downward from 207Ax and 207Ay is directly conductively connected to the circuit 210, the planar occupation area of the electrode and the wiring layer can be further reduced. It is considered that the impedance can be further reduced.

[Third Embodiment]
Next, a third embodiment according to the present invention will be described with reference to FIG. This embodiment has substantially the same cross-sectional structure as the first and second embodiments, whereas the first and second embodiments are thin film surface acoustic wave devices having a resonator structure. The third embodiment is a transversal type thin film surface acoustic wave device 300 that constitutes a surface acoustic wave filter having an excitation electrode pair and a detection electrode pair.

  In this thin film surface acoustic wave device 300, insulating layers 302 and 303 similar to the above are laminated on a substrate 301, and a piezoelectric thin film 304 is formed thereon, and a wiring layer 307Ax is formed on the insulating layer 302. , 307Ay, 307Bx, 307By are formed, and the wiring layer is formed on the electrodes 305Ax, 305Ay, 305Bx, 305By on the piezoelectric thin film 304 via the conductive materials 306Ax, 306Ay, 306Bx, 306By in the through holes of the piezoelectric thin film 304. Conductive connection. The wiring layers 307Ax, 307Ay, 307Bx, and 307By are conductively connected to a circuit 310 provided on the substrate 301 through conductive materials 308Ax, 308Ay, 308Bx, and 308By. The circuit 310 is conductively connected to a plurality of connection terminals 311 provided on the insulating layer 303.

  In the present embodiment, surface acoustic waves are excited by the electrodes 305Ax and 305Ay constituting the pair of excitation electrode pairs, and this is propagated on the surface of the piezoelectric thin film 304 by the electrodes 305Bx and 305By constituting the pair of detection electrode pairs. It differs from the said 1st and 2nd embodiment by the point comprised so that it may be detected.

  Also in this embodiment, since the electrodes 305Ax, 305Ay, 305Bx, and 305By formed on the surface of the piezoelectric thin film 304 are conductively connected to the circuit 310 through the through holes provided in the piezoelectric thin film 304, Since the planar occupation area of the conductor in the thin film surface acoustic wave element structure can be reduced, the parasitic capacitance can be reduced, thereby improving the performance as a thin film surface acoustic wave device. become.

[Fourth Embodiment]
Next, a thin film surface acoustic wave device 400 according to a fourth embodiment of the present invention will be described with reference to FIG. In this embodiment, insulating layers 402 and 403 are formed on a substrate 401, and a piezoelectric thin film 404 is formed thereon. In this embodiment, electrodes 405Ax, 405Ay, and 405B are formed between the insulating layer 403 and the piezoelectric thin film 404, that is, electrodes are formed on the surface of the piezoelectric thin film 404 on the substrate 401 side. Thus, it is different from the above-described embodiments.

  Through holes 403a and 403b are formed in the insulating layer 403, conductive materials 406Ax, 406Ay, and 406B are disposed in the through holes 403a and 403b, and the wiring layers 407Ax, 407Ay, 407B is formed. The wiring layer 407Ax is conductively connected to the electrode 405Ax through the conductive material 406Ax, the wiring layer 407Ay is conductively connected to the electrode 405Ay through the conductive material 406Ay, and the wiring layer 407B is connected to the conductive material 406Ax. The electrode 405B is conductively connected through the material 406B. The wiring layers 407Ax, 407Ay, and 407B are conductively connected to the circuit 410 provided on the substrate 401.

  In the present embodiment, through holes 403a and 403b are formed in the insulating layer 403 provided below the piezoelectric thin film 404, not the piezoelectric thin film 404, and the electrodes 405Ax, 405Ay, 405B is conductively connected to circuit 410. Therefore, it is not necessary to provide a conductor from these electrodes to the connection terminal via the wiring, and the planar occupation area of the electrodes and the wiring can be reduced, so that the parasitic capacitance can be reduced as described above. it can.

  In the case of the present embodiment, connection terminals connected to the circuit 410 are not shown, but these connection terminals can be provided at appropriate places as necessary. For example, it may be provided on the upper surface side of the substrate 401 as in the first to third embodiments, or may be provided on the lower surface side of the substrate 401.

[Production method]
Finally, the manufacturing method of the first embodiment will be described with reference to FIG. First, as shown in FIG. 8A, a circuit 110 is formed on the substrate 101. The circuit 110 can be easily formed by using a normal monolithic semiconductor circuit manufacturing process technology or a hybrid circuit manufacturing process technology. Further, the insulating layer 102 is formed on the surface of the substrate 101 formed with the circuit 110 in this way. The insulating layer 102 may be directly formed by a CVD method or the like, or a liquid or pasty base material may be applied by a spin coating method, a roll coating method, a printing method, or the like and cured by a heat treatment or the like. Good. Next, a conductive film such as aluminum is formed on the insulating layer 102 by using a vapor deposition method, a sputtering method, or the like, and this is patterned by a photolithography method or the like to form the wiring layers 107Ax, 107Ay, 107B, 108x, and 108y. To do. Here, the wiring layers 107Ax and 107Ay are configured to be conductively connected to the wiring layers 108x and 108y, and the wiring layers 108x and 108y are configured to be conductively connected to the circuit 110.

  Next, as shown in FIG. 8B, an insulating layer 103 is formed on the wiring layer. This insulating layer 103 can be formed by a method similar to that for the insulating layer 102. Next, a piezoelectric thin film 104 is formed on the insulating layer 103. The piezoelectric thin film 104 can be formed by a CVD method such as an MOCVD method (CVD method using an organic metal raw material) or a sputtering method such as an RF sputtering method (applied by applying an RF high frequency electric field).

Further, as shown in FIG. 8C, through holes 104a, 104b, 103a, 103b, and 103c are formed in the piezoelectric thin film 104 and the insulating layer 103. Each through hole can be easily formed using a dry etching method. In particular, in order to form a high aspect ratio through-hole, it is preferable to use a Deep-RIE (reactive ion etching) method. In this method, dry etching is performed while alternately supplying an etching gas (for example, SF ₆ ) and a prepolymer gas (for example, C ₄ H ₈ ) for forming a polymer film covering the inner surface of the hole formed by the etching. Is the law.

  Thereafter, the conductive material 106Ax, 106Ay, 106B shown in FIG. 1 is disposed in the above-described through holes by filling the conductive paste using a printing method or the like, or using an electroless plating method, and then vapor deposition. The electrodes 105Ax, 105Ay, 105B and the connection terminal 111 shown in FIG. 1 are formed using a method, a sputtering method, a photolithography method, or the like.

  In each of the embodiments described above, the parasitic capacitance Co is reduced by changing the electrode area S according to the general formula Co = ε × S / d (ε is the dielectric constant, S is the electrode area, and d is the electrode interval). It may be reduced or the electrode interval d may be increased. In the present embodiment, the parasitic capacitance is reduced by reducing the substantial electrode area S, but conversely, the electrode interval d acting in the direction of increasing the parasitic capacitance is also reduced. However, since the dielectric constant of the piezoelectric body is generally several times to several tens of times higher than the dielectric constant of dielectrics other than the piezoelectric body, in this embodiment, a portion where no piezoelectric body is interposed is generated in the parasitic capacitance Co. (In other words, the dielectric constant is substantially lowered) also has the effect of reducing the capacitance. Therefore, in the parasitic capacitance Co, the capacitance reduction effect that the dielectric constant is substantially reduced and the capacitance reduction effect due to the substantial reduction in the electrode area S are substantially reduced in the electrode spacing d (for example, some conductors (for example, If the capacitance increase effect due to the fact that the wiring layer) approaches the substrate), the parasitic capacitance Co will decrease as a result.

  Note that the thin film surface acoustic wave device of the present invention is not limited to the illustrated examples described above, and it is needless to say that various modifications can be made without departing from the gist of the present invention. For example, the IDT (interdigital electrode) of the above embodiment is drawn as a single electrode structure, but various electrode structures such as those having a double (split) electrode structure can be used. Further, in the above embodiment, the description has been given as having a one-terminal pair resonator structure or a transversal filter structure, but various schematic surface acoustic wave device structures such as a two-terminal pair resonator structure are employed. can do.

1 is a schematic longitudinal sectional view of a first embodiment according to the present invention. 1 is a schematic plan view of a first embodiment. The schematic longitudinal cross-sectional view of 2nd Embodiment. FIG. 3 is an equivalent circuit diagram of the first embodiment. The graph which shows the frequency characteristic of the insertion loss and impedance of 1st Embodiment. The schematic plan view of 3rd Embodiment. The schematic longitudinal cross-sectional view of 4th Embodiment. Schematic process sectional drawing (a)-(c) which shows the manufacturing method of 1st Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Thin film surface acoustic wave device, 101 ... Board | substrate, 102 ... Insulating layer, 103 ... Insulating layer, 104 ... Piezoelectric thin film, 105Ax, 105Ay, 105B ... Electrode, 105a, 105b ... Through-hole, 106Ax, 106Ay, 106B ... Conductive 107Ax, 107Ay, 107B, 108x, 108y ... wiring layer, 109x, 109y ... conductive material, 110 ... circuit, 111 ... connection terminal

Claims (5)

In a thin film surface acoustic wave device having a substrate on which a circuit is formed, a piezoelectric thin film disposed on the substrate, and an electrode formed on the surface of the piezoelectric thin film,
The thin-film surface acoustic wave device, wherein the electrode is conductively connected to the circuit through a wiring penetrating the piezoelectric thin film.   A thin film surface acoustic wave device, wherein an insulating layer is provided between the substrate and the piezoelectric thin film, and the wiring is conductively connected to the circuit through the insulating layer. In a thin film surface acoustic wave device having a substrate on which a circuit is formed, a piezoelectric thin film disposed on the substrate, and an electrode formed on the surface of the piezoelectric thin film,
An insulating layer is provided between the substrate and the piezoelectric thin film;
The thin film surface acoustic wave device, wherein the electrode is conductively connected to the circuit through a wiring penetrating a region overlapping the piezoelectric thin film of the insulating layer.   4. The thin film surface acoustic wave device according to claim 1, wherein at least a part of the circuit is formed in a region overlapping with the piezoelectric thin film in a plane. 5. 5. The thin film surface acoustic wave device according to claim 1, wherein the substrate is a semiconductor substrate.

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