JP2005209855A - Method for forming resist pattern, method for manufacturing semiconductor device and photoresist applicator/developer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for forming a resist pattern, a method for manufacturing a semiconductor device and a photoresist applicator/developer, whereby variations of a line width dimension of the resist pattern can be reduced. <P>SOLUTION: The method for forming the resist pattern contains the step (step A1) of arranging a wafer 1 coated with photoresist in a chamber 51; the step (step A2) of determining whether or not a last wafer which is finally subjected to heat treatment in the chamber 51 and the wafer 1 are at an identical lot by comparison; the step (step A3) of replacing the atmosphere in the chamber 51 when not determined as the identical lot, and not replacing the atmosphere when determined as the identical lot; and the step (step A4) of replacing the atmosphere, or determining as the identical lot at step A2, and thereafter heating the wafer 1 in the chamber 51. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a resist pattern forming method, a semiconductor device manufacturing method, and a photoresist coating and developing apparatus, and more particularly, to a technique for reducing variations in line width dimensions of a resist pattern.

  Conventionally, in a semiconductor device manufacturing process, a resist is used as a mask when etching a silicon oxide film, a silicon nitride film, a polysilicon film, or ion-implanting a conductive impurity into a wafer made of silicon or the like. A pattern is used. This resist pattern is formed by applying a photoresist on the surface of the wafer, exposing the predetermined pattern to the applied photoresist, and developing it (that is, a photolithography process).

  In recent years, with the miniaturization of semiconductor devices, the minimum line width required for a resist pattern is becoming smaller. Against this background, in the photolithography process, short wavelength excimer lasers such as KrF and ArF are becoming the mainstream of exposure light sources. In addition, chemical amplification type photoresists are often used in correspondence with the shortening of the wavelength of the exposure light source.

  This chemically amplified photoresist has a high reactivity with acids and alkalis, and may react sensitively with, for example, a small amount of ammonia and greatly affect its characteristics. For this reason, it is preferable that the chemically amplified photoresist is exposed and developed in a clean room for a short time, particularly in a clean atmosphere through a chemical filter, from the viewpoint of maintaining its characteristics stably.

Therefore, in particular, in a photolithography process that handles a chemically amplified photoresist, a resist coater that coats the photoresist, an exposure device 25 such as a stepper, a baking device that heat-treats the photoresist, and a developer 22 that performs development processing. A so-called resist coating and developing apparatus is used in which a wafer conveying apparatus for conveying a wafer between these apparatuses is integrated (for example, see Patent Document 1). This resist coating and developing apparatus is generally a single-wafer processing type apparatus and is also called an inline photo apparatus. With this inline photo apparatus, a resist pattern can be formed from a chemically amplified photoresist, for example, in a predetermined short time. Moreover, the heat treatment process by the above-described baking apparatus is provided, for example, between the exposure process and the development process, and plays a role of clarifying a reaction boundary line with or without exposure by a thermal reaction (for example, Patent Document 1, 2).
JP 2001-160580 A JP 2001-305516 A

  By the way, according to the in-line photo apparatus according to the conventional example, the chemically amplified photoresist after the exposure is subjected to a heat treatment, and the reaction boundary line with and without exposure is clarified by the thermal reaction.

  However, in particular, in a so-called multi-product low-volume production type line in which various types of semiconductor devices are produced little by little, different types of chemically amplified photoresists are often used depending on the type of semiconductor device to be produced. For example, a wafer coated with a chemically amplified photoresist of type “A” (hereinafter referred to as “resist A”) and a chemically amplified photoresist of type “B” (hereinafter referred to as “resist B”). In some cases, wafers coated with the same are mixed in the same production line, and these wafers are successively heat-treated one by one in the same baking apparatus.

  Here, when the wafer coated with the resist A is heat-treated in the baking apparatus, and then the wafer coated with the resist B is continuously heat-treated in the same baking apparatus, the line width of the resist pattern formed by the resist B There has been a problem that there is a tendency that etc. vary more than usual.

  FIG. 9 is a scatter diagram showing the problems of the conventional example. FIG. 9 shows a case in which the heat treatment of the wafer (previous lot) coated with resist A is finished in the baking apparatus, and the wafer (following lot) coated with resist B is subsequently heat-treated in the same baking apparatus. This shows the fluctuation of the line width dimension of the resist pattern. The horizontal axis in FIG. 9 indicates the wafer number in the subsequent lot. The vertical axis in FIG. 9 indicates the line width dimension of the resist pattern. The line width dimension of the resist pattern made of the resist B is normally in the range of 0.2200 to 0.2400 [μm] (hereinafter referred to as “normal range”).

  However, as shown in FIG. 9, from the end of the processing of the preceding lot and the processing of the succeeding lot to the fifth wafer, that is, the wafers with the numbers 1 to 5, the line width dimension of the resist pattern is in the normal range. There was a tendency to deviate from. Such a variation in the line width dimension is usually most noticeable in the wafer of the number 1 that is first processed by the baking apparatus after the heat treatment of the preceding lot, and the variation gradually increases as the processing of the subsequent lot proceeds. Get smaller.

  If the line width dimension of the resist pattern deviates greatly from the normal range in this way, the shape after etching of the film to be etched using this resist pattern as a mask, the impurity ion implantation region, etc. will fluctuate. In addition, the characteristics of the semiconductor device and the like may fluctuate.

  Accordingly, the present invention solves such a problem, and provides a resist pattern forming method, a semiconductor device manufacturing method, and a photoresist coating and developing apparatus capable of reducing variations in the line width dimension of the resist pattern. With the goal.

  In order to solve the above-described problems, a first resist pattern forming method according to the present invention includes applying a photoresist on one substrate, exposing the applied photoresist to a predetermined pattern, and developing the resist. A method of forming a resist pattern, the step of placing the one substrate coated with the photoresist in a chamber for heat treatment, and a lot to which another substrate thermally treated in the chamber belongs, Comparing the lot to which the one substrate belongs to determine whether or not they are the same, and the lot to which the one substrate belongs in the determining step and the lot to which the other substrate belongs are not the same When the determination is made, the atmosphere in the chamber is replaced, and when it is determined that the atmosphere is the same, the atmosphere is not replaced, and after the atmosphere is replaced, Heating the one substrate in the chamber after determining that the lot to which the one substrate belongs and the lot to which the other substrate belongs are the same in the determining step. It is characterized by this.

  Here, a lot is a collection of identical products as a unit of production. Photoresists applied on a plurality of wafers belonging to the same lot are usually of the same type. The substrate of the present invention is, for example, a silicon wafer, an SOI wafer, a glass wafer for TFT (thin film transistor), or the like.

  According to the first resist pattern forming method of the present invention, the atmosphere in the chamber is changed (that is, forced exhaustion) only at the time of lot switching. For example, as shown in FIG. 7, after the heat treatment of a plurality of wafers (preceding lots) coated with resist A is completed in the chamber, the exhaust flow rate from the chamber to the outside is increased by a certain amount for a certain time. Thereby, the component of the resist A remaining in the chamber is removed from the chamber. Thereafter, the heat treatment of the wafer (following lot) coated with the resist B is started in this chamber. As a result, it is possible to reduce variations in the line width dimension of the resist pattern, which is a problem in the initial plurality of heat treatments in the subsequent lot, while suppressing the temperature change in the chamber as much as possible.

  A second resist pattern forming method according to the present invention is a method of applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the resist pattern to form a resist pattern. A step of placing the one substrate coated with the photoresist in a chamber for heat treatment, a type of the photoresist coated on the one substrate, and another one that has been heat-treated last in the chamber. Comparing the type of photoresist on the substrate to determine whether they are the same, the type of the photoresist on the one substrate in the determining step, and the photoresist on the other substrate The atmosphere in the chamber is replaced when it is determined that the types are not the same, and the atmosphere in the chamber is replaced when it is determined that the types are the same. And the type of the photoresist on the one substrate and the type of the photoresist on the other substrate are the same after the atmosphere is replaced and after the atmosphere is replaced or in the determining step And performing a heat treatment on the one substrate in the chamber after the determination.

  Here, even if the lot to which the one substrate belongs and the lot to which the other substrate belongs are different from each other, the types of photoresist applied to the wafers constituting each lot are the same. There is a case.

  According to the second resist pattern forming method of the present invention, the atmosphere in the chamber is changed only when the type of photoresist is switched. For example, as shown in FIG. 8, after the heat treatment of a plurality of wafers (preceding lots) coated with resist A is completed, the exhaust flow rate from the chamber to the outside is increased by a certain amount for a certain time. Thereby, the component of the resist A remaining in the chamber is removed from the chamber. Thereafter, the heat treatment of the wafer (following lot) coated with the resist B is started in this chamber. As a result, it is possible to suppress the variation in the line width dimension of the resist pattern, which is a problem in the initial plurality of heat treatments in the subsequent lot, while suppressing the temperature change in the chamber as much as possible.

  Further, according to the second resist pattern forming method of the present invention, for example, when both the preceding lot and the succeeding lot are composed of a plurality of wafers coated with resist B, the chamber is used when the lot is switched. Do not replace the atmosphere inside. Therefore, as can be seen by comparing FIG. 7 and FIG. 8, first, the number of forced exhausts can be reduced and the temperature change in the chamber can be further suppressed as compared with the resist pattern forming method. .

  A third resist pattern forming method according to the present invention is a method of applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the resist pattern to form a resist pattern. A step of placing the one substrate coated with the photoresist in a chamber for heat treatment, a type of the photoresist coated on the one substrate, and another one that has been heat-treated last in the chamber. A step of selecting whether or not to replace the atmosphere in the chamber based on a combination with the type of photoresist on the substrate, and when the replacement in the selecting step is selected. After replacing the atmosphere and after replacing the atmosphere, or after selecting not to replace the atmosphere in the selecting step And it is characterized in that it comprises a step of the heat treatment on one substrate in the chamber.

  Here, even if the type of the photoresist applied on the one substrate is different from the type of the photoresist on the other substrate, depending on the combination of these photoresist types, forced exhaust is not performed. In some cases, however, the line width of the resist pattern does not vary.

  FIG. 3 is a table showing an example of the influence on the line width dimension of the resist pattern in each combination of resists A, B, and C. As shown in FIG. 3, when the photoresist applied on the wafer belonging to the preceding lot is the resist A and the photoresist applied on the wafer belonging to the subsequent lot is the resist B, as shown in FIG. As described above, the line width dimension of the resist pattern made of the resist B varies. However, other combinations (ie, resist A → resist C group, resist B → resist A, resist B → resist C group, resist C group → resist A, resist C group → resist B; “on the wafer belonging to the preceding lot” In the form of “type of photoresist applied to” → “type of photoresist applied to wafer belonging to subsequent lot”)), there is no variation in the line width dimension of the resist pattern in the subsequent lot. There is.

  According to the third resist pattern forming method of the present invention, for example, the photoresist applied on the wafer of the preceding lot is the resist A, and the photoresist applied on the wafer of the subsequent lot is the resist. Only in the case of B, the atmosphere in the chamber is changed when the lot is switched. As a result, it is possible to reduce the variation in the line width dimension of the resist pattern, which has been a problem in the initial plurality of heat treatments in the subsequent lot, while suppressing the temperature change in the chamber as much as possible. In addition, the number of forced exhausts can be reduced and the temperature change in the chamber can be further suppressed as compared with the first and second resist pattern forming methods described above.

  According to a fourth resist pattern forming method of the present invention, in the first to third resist pattern forming methods described above, before placing the one substrate coated with the photoresist in the chamber, The predetermined pattern is exposed to the photoresist on the one substrate.

  According to the fourth resist pattern forming method of the present invention, in the post-baking step of clarifying the reaction boundary line of the presence or absence of exposure by a thermal reaction, in the chamber at the time of lot switching or photoresist type switching. Therefore, it is possible to contribute to a reduction in variation in reaction boundary lines with and without exposure.

  The method of manufacturing a semiconductor device according to the present invention includes any one of the first to fourth resist pattern forming methods described above. According to the semiconductor device manufacturing method of the present invention, since the first to fourth resist pattern forming methods described above are applied, variations in the line width dimension of the resist pattern can be reduced. Therefore, for example, it is possible to reduce variations in the shape and size after etching of the film to be etched using this resist pattern as a mask, and the shape and size of the region to be implanted after ion implantation of conductive impurities. it can.

  A photoresist coating apparatus according to the present invention is a photoresist coating and developing apparatus for coating a photoresist on one substrate, exposing a predetermined pattern to the coated photoresist, and developing the resist pattern to form a resist pattern. , A heat treatment chamber for accommodating the one substrate coated with the photoresist, an exhaust means for exhausting the gas in the chamber to the outside of the chamber, the one substrate, and finally in the chamber. A selection means for selecting whether or not to change the atmosphere in the chamber by comparing with another substrate that has been heat-treated, and the exhaust means when the selection means selects to change the atmosphere. And an exhaust control means for replacing the atmosphere in the chamber by controlling the atmosphere, and the atmosphere is replaced by the exhaust control means. In, or after not to interchange the atmosphere selected by the selection means, it is characterized in that the heat treatment to the one substrate accommodated in the chamber.

  According to the photoresist coating and developing apparatus of the present invention, the lot to which one substrate belongs and the lot to which another substrate belongs are compared, or the type of photoresist applied on one substrate and the other substrate. Compare the type of applied photoresist. Then, based on the comparison result, the atmosphere in the chamber is changed. As a result, it is possible to reduce the variation in the line width dimension of the resist pattern, which has been a problem in the initial plurality of heat treatments in the subsequent lot, while suppressing the temperature change in the chamber as much as possible.

  The present invention is extremely suitable when applied to a photolithography process of a so-called high-mix low-volume production type line in which a wide variety of semiconductor devices are produced little by little.

Hereinafter, a resist pattern forming method, a semiconductor device manufacturing method, and a photoresist coating and developing apparatus according to an embodiment of the present invention will be described with reference to the drawings.
(1) First Embodiment FIG. 1 is a block diagram showing a configuration example of an inline photo device 100 according to an embodiment of the present invention. This in-line photo device 100 is, for example, a single wafer that performs a chemical amplification type photoresist (hereinafter simply referred to as “resist”) application, exposure, and development processing on a wafer in a short time. It is a processing type device.

  As shown in FIG. 1, the in-line photo apparatus 100 includes a cassette block, a coater block, an exposure apparatus process block, a developer block, and between these blocks, and within each block in the order indicated by the arrows in FIG. It is comprised from the conveying apparatus (not shown) etc. which convey a wafer.

  The cassette block includes, for example, a stage for placing a cassette 11 capable of accommodating a lot of 25 wafers, a loader for loading the wafers one by one on the transfer device, and an unloader for receiving the wafers one by one from the transfer device. Etc. are provided. The coater block includes a first baking device 12, an adobe unit 13, a first cooling unit 14, a resist coater 15, a second baking device 16, a second cooling unit 17, and a peripheral exposure unit 18. And are provided.

  The first baking device 12 constituting the coater block is a device that heats the wafer to, for example, 130 to 190 [° C.] to sublimate moisture on the wafer in order to improve the adhesion between the wafer and the resist. The first baking apparatus 12 includes a chamber and a hot plate provided in the chamber. The wafers are heated one by one on this hot plate.

  The adobe unit 13 is an apparatus for spraying mist-like HMDS (hexyldisilazane) onto the surface of the wafer and subjecting the surface of the wafer to a hydrophobic treatment. In this hydrophobic treatment, the wafer is heated to about 110 to 130 [° C.], for example. Further, the first cooling unit 14 is a device that cools the wafer heated by the adobe unit 13 to a normal temperature of about 23 [° C.], for example. The first cooling unit 14 is composed of a cooling plate or the like. The wafers are cooled one by one on the cooling plate. As is well known, the resist coater 15 is a device that drops a resist on a wafer, rotates the wafer at a high speed, and thinly coats the resist on the wafer.

  The second baking apparatus 16 shown in FIG. 1 is an apparatus that heats the wafer to, for example, 90 to 120 [° C.] in order to evaporate the solvent content of the resist applied on the wafer. Similar to the first baking device 12, the second baking device 16 includes a chamber and a hot plate. The wafers are heated one by one on the hot plate. The second cooling unit 17 is a device that cools the wafer heated by the second baking device 16 to a normal temperature of about 23 [° C.], for example. The second cooling unit 17 is composed of a cooling plate or the like, similar to the first cooling unit 14, and the wafers are cooled one by one on the cooling plate. The peripheral exposure unit 18 is a device that registers the number on the wafer and exposes only the peripheral part of the wafer in order to prevent resist adhesion to the transfer device and other devices.

  Further, the exposure apparatus process block shown in FIG. 1 is provided with an exposure apparatus 25 such as a stepper. Further, the developer block shown in FIG. 1 is provided with a third baking device 50, a third cooling unit 21, a developer 22, a fourth baking device 23, and a fourth cooling unit 24.

  The 3rd baking apparatus 50 is an apparatus which heats a wafer to 90-120 [degreeC], for example in order to clarify the reaction boundary line of the presence or absence of exposure by thermal reaction. Similar to the first and second baking apparatuses 16, the third baking apparatus 50 includes a chamber, a hot plate, and the like, and the wafers are heated one by one on the hot plate. A configuration example of the third baking apparatus 50 will be described later with reference to FIG.

  The 3rd cooling part 21 is an apparatus which cools the wafer heated with the 3rd baking apparatus 50 to the normal temperature of about 23 [degreeC], for example. The third cooling unit 21 is composed of a cooling plate or the like, similar to the first and second cooling units, and the wafers are cooled one by one on the cooling plate.

  As is well known, the developer 22 forms a resist pattern by applying a developing solution to the resist coated and developed on the wafer, and then cleaning the resist pattern with pure water (ie, pure water rinsing). It is a device to do.

  The fourth baking device 23 is a device that heats the wafer to, for example, 90 to 120 [° C.] in order to bake and harden the resist pattern formed on the wafer. Similar to the first to third baking apparatuses 50, the fourth baking apparatus 23 includes a chamber and a hot plate. The wafers are heated one by one on the hot plate. The fourth cooling unit 24 is a device that cools the wafer heated by the fourth baking device 23 to a normal temperature of about 23 [° C.], for example. The fourth cooling unit 24 is formed of a cooling plate or the like as in the first to third cooling units, and the wafer is cooled one by one on the cooling plate.

  Further, the inline photo device 100 controls the wafer processing in each device in each block described above and the transport operation by the transport device, and the status of the wafer (lot) being processed or waiting in each device. Is provided with a main body control unit 70 (see FIG. 2). A storage device 80 (see FIG. 2) or the like is connected to the main body control unit 70, and the lot number of the wafer being processed or on standby by the in-line photo device 100, the type of resist dropped on the wafer, and the like. Information about is stored. These pieces of information can be read and written as needed by the main body control unit 70.

  FIG. 2 is a conceptual diagram illustrating a configuration example of the third baking apparatus 50. As shown in FIG. 2, the third baking apparatus 50 includes a chamber 51, an exhaust pipe 55 having one end connected to the chamber 51 and the other end connected to an exhaust system of the factory, and an exhaust gas in the exhaust pipe 55. The flow rate sensor 57 for measuring the flow rate (hereinafter referred to as “exhaust flow rate”), the variable damper 59 for adjusting the exhaust flow rate, the exhaust control unit 61, and the like.

  A chamber 51 shown in FIG. 2 is a processing chamber for storing and heating the wafer 1 coated with a resist. The chamber 51 is provided with a hot plate having a heater inside. Further, the exhaust control unit 61 adjusts the opening of the variable damper 59 based on information on the flow rate obtained from the flow sensor 57 and selection information from the main body control unit 70 that controls the main body of the inline photo device 100, thereby It has a function of controlling the flow rate. The selection information from the main body control unit 70 will be described later. The wafer 1 to which the resist is applied is accommodated in the chamber 51 and placed on a hot plate. Next, the wafer 1 is heated by this hot plate. As a result, the solvent contained in the resist evaporates in the chamber 51. The evaporated solvent and the like are discharged through the exhaust pipe 55 to the outside of the inline photo apparatus 100, that is, to the exhaust system of the factory.

  Next, a method for forming a resist pattern on the wafer 1 using the above-described inline photo apparatus 100 will be described. First, for example, a cassette 11 containing a lot of 25 wafers 1 is placed on the stage of the cassette block. Next, the wafers 1 accommodated in the cassette 11 are placed one by one on a transport device (not shown) by a loader (not shown). In the following, it is assumed that the wafers 1 are sequentially processed in the order of the arrows in FIG.

  First, the wafer 1 is heated to, for example, 130 to 190 [° C.] by the first baking device 12 of the coater block, and the moisture on the wafer 1 is sublimated. Next, in the adobe part 13, mist-like HMDS is sprayed on the surface of the wafer 1, and the surface of the wafer 1 is subjected to hydrophobic treatment. Further, the first cooling unit 14 cools the wafer 1 to a normal temperature of about 23 [° C.]. Then, a thin resist film is formed on the wafer 1 by the resist coater 15.

  Next, the wafer 1 is heated to, for example, 90 to 120 [° C.] by the second baking device 16 to evaporate the solvent content of the resist applied on the wafer 1 (pre-baking). Thereafter, the wafer 1 is cooled to a normal temperature of about 23 [° C.] by the second cooling unit 17. Then, the peripheral exposure unit 18 exposes only the peripheral part of the wafer 1.

  Next, a predetermined pattern is exposed to the resist coated on the wafer 1 by the exposure device 25 of the exposure device process block. Then, the wafer 1 is heated by the third baking device 50 of the developer block to clarify the reaction boundary line with and without exposure (post-baking).

  FIG. 4 is a flowchart showing a post bake processing method according to the first embodiment of the present invention. In this post-baking, first, the wafer 1 is placed in the chamber 51 of the third baking apparatus 50 shown in FIG. 2, and the wafer 1 is placed on a hot plate (step A1). Next, it is determined whether or not the lot to which the wafer thermally treated in the chamber 51 last (hereinafter referred to as “last wafer”) belongs and the lot to which the wafer 1 disposed in the chamber 51 belongs is the same. The main body control unit 70 determines (Step A2). This determination is made based on information stored in the storage device 80.

  If it is determined in step A2 that the lot to which the last wafer belongs and the lot to which the wafer 1 placed in the chamber 51 belongs, the process proceeds to step A4 without changing the atmosphere in the chamber 51. . Further, when it is determined that the lot to which the last wafer belongs and the lot to which the wafer 1 disposed in the chamber 51 belongs are not the same, that is, the lot is switched between the previous post-baking and the current post-baking. When it determines, it progresses to step A3.

  In step A3, a predetermined signal is transmitted from the main body control unit 70 to the exhaust control unit 61, and the exhaust control unit 61 receives this signal and greatly opens the variable damper 59 for a predetermined time. Thereby, the exhaust flow rate in the exhaust pipe increases, and the atmosphere in the chamber 51 is replaced. After the atmosphere in the chamber 51 is sufficiently changed, the process proceeds to Step A4. In step A4, the wafer 1 placed on the hot plate is heated to, for example, 90 to 120 [° C.], and the reaction boundary line with and without exposure is clarified on the resist. This completes the flowchart shown in FIG.

  Returning to FIG. 1, the third cooling unit 21 cools the wafer 1 to a normal temperature of about 23 [° C.]. Next, the developer 22 applies a developer to the resist on the wafer 1 to form a resist pattern, and pure water rinsing is performed on the resist pattern. And with the 4th baking apparatus 23, the wafer 1 is heated to 90-120 [degreeC], for example, and a resist pattern is baked and hardened. Next, the wafer 1 is cooled to a normal temperature of about 23 [° C.] by the fourth cooling unit 24. Further, the wafer 1 is transported to the cassette block by the transport device. Thereafter, the wafer 1 is stored in the cassette 11 by the unloader.

  As described above, according to the method for forming a resist pattern according to the first embodiment of the present invention, the atmosphere in the chamber 51 is changed only at the time of lot switching in the post-baking process for clarifying the reaction boundary line of the presence or absence of exposure by thermal reaction. Replace (that is, forced exhaust). Therefore, while suppressing the temperature change in the chamber 51 as much as possible, it is possible to reduce the variation in the reaction boundary line with and without exposure in the initial plurality of post-bake of the subsequent lot, and to reduce the variation in the line width dimension of the resist pattern. be able to.

  In the baking apparatus 50 shown in FIG. 2, the solvent or the like contained in the resist evaporates in the chamber 51 by heating the wafer 1 with the hot plate 53. Then, the evaporated solvent is discharged to the outside of the inline photo device 100 through the exhaust pipe 55. Here, since the temperature inside the exhaust pipe 55 at a distance from the hot plate 53 is lower than that in the chamber 51 around the hot plate 53, a part of the evaporated solvent or the like is solidified inside the exhaust pipe 55. End up. The exhaust flow rate in the exhaust pipe 55 gradually decreases with time and tends to decrease to the vicinity of the lower management line.

  Therefore, for example, the inside of the exhaust pipe 55 and the variable damper 59 may be washed at a rate of about once every three months to remove the solidified solvent. Further, as the number of processing lots increases, the opening of the variable damper 59 may be gradually increased to adjust the exhaust flow rate in the exhaust pipe 55 to be substantially constant. For example, the exhaust sensor 61 reads the measured value from the flow sensor 57, and the exhaust controller 61 automatically adjusts the opening of the variable damper 59 so that the measured value is always substantially constant. Further, in spite of the control by the variable damper 59, when the measured value by the flow sensor 57 becomes an abnormal value, the exhaust control unit 61 or the like is notified so as to generate an alarm to the operator. It is good to attach an alarm device.

According to such a configuration, the heat in the chamber 51 can be continuously discharged by a certain amount through the exhaust pipe 55, and the gas flow in the chamber 51 can be stabilized. Thereby, the temperature in the chamber 51 can be further stabilized.
(2) Second Embodiment FIG. 5 is a flowchart showing a post bake processing method according to a second embodiment of the present invention. In the second embodiment, a description will be given of a case where forced exhaust in the third baking apparatus 50 shown in FIG. 1 is performed not at the time of lot switching but at the time of switching the type of photoresist. Other configurations (that is, the configuration of the inline photo device 100, the configuration of the third baking device 50, and the like) are the same as those in the first embodiment. Accordingly, in FIG. 5, the same parts as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In this post-baking, first, the wafer 1 is placed in the chamber 51 of the third baking apparatus 50 shown in FIG. 2, and the wafer 1 is placed on a hot plate (step B1). Next, the main body determines whether the type of resist on the wafer (last wafer) finally heat-treated in the chamber 51 is the same as the type of resist applied on the wafer 1 disposed in the chamber 51. The control unit 70 determines (Step B2). This determination is made based on information stored in the storage device 80.

  If it is determined in step B2 that the resist on the last wafer and the resist applied on the wafer 1 arranged in the chamber 51 are the same type, the atmosphere in the chamber 51 is not changed. Proceed to step B4. Further, when it is determined that the resist on the last wafer and the resist applied on the wafer 1 arranged in the chamber 51 are not the same type, that is, between the previous post-baking and the current post-baking, If it is determined that the resist type has changed, the process proceeds to step B3.

  In step B3, a predetermined signal is transmitted from the main body control unit 70 to the exhaust control unit 61, and the exhaust control unit 61 receives this signal and greatly opens the variable damper 59 for a predetermined time. Thereby, the exhaust flow rate in the exhaust pipe increases, and the atmosphere in the chamber 51 is replaced. After the atmosphere in the chamber 51 is sufficiently changed, the process proceeds to Step B4. In Step B4, the wafer 1 placed on the hot plate is heated to, for example, 90 to 120 [° C.], and the reaction boundary line with and without exposure is clarified on the resist. This completes the flowchart shown in FIG.

  Thus, according to the method for forming a resist pattern according to the second embodiment of the present invention, as shown in FIG. 5, for example, the atmosphere in the chamber 51 is only changed when the resist type is changed from the resist A to the resist B. Replace. Accordingly, it is possible to suppress the variation in the line width dimension of the resist pattern with a plurality of initial heat treatments in subsequent lots while suppressing the temperature change in the chamber 51 as much as possible.

Further, according to the second embodiment, as shown in FIG. 8, when both resists applied in the preceding lot and the succeeding lot are both resist B, the atmosphere in the chamber 51 is changed. Do not swap. Therefore, as can be seen by comparing FIG. 8 and FIG. 9, the number of forced exhausts can be reduced as compared with the first embodiment, so that the temperature change in the chamber 51 can be further suppressed.
(3) Third Embodiment FIG. 6 is a flowchart showing a post bake processing method according to a third embodiment of the present invention. In the third embodiment, the forced evacuation in the third baking apparatus 50 shown in FIG. 1 is performed by using the type of resist applied to the wafer of the preceding lot and the type of resist applied to the wafer 1 of the subsequent lot. The case where it performs based on the combination of is demonstrated. As the types of photoresist, three types of resists A, B, and C are assumed as shown in FIG. Other configurations (that is, the configuration of the inline photo device 100, the configuration of the third baking device 50, and the like) are the same as those in the first embodiment. Therefore, in FIG. 6, the same parts as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In this post-baking, first, the wafer 1 is placed in the chamber 51 of the third baking apparatus 50 shown in FIG. 2, and the wafer 1 is placed on a hot plate (step C1). Next, based on the combination of the type of resist on the wafer (last wafer) that was last heat-treated in the chamber 51 and the type of resist applied on the wafer 1 disposed in the chamber 51, the chamber The main body control unit 70 selects whether or not to change the atmosphere in 51. This selection is performed based on information stored in the storage device 80.

  In this step C2, for example, it is determined that the resist on the last wafer is the resist A and the resist on the wafer 1 arranged in the chamber 51 is the resist B (hereinafter referred to as “combination of forced exhaust”). If so, go to Step C3. On the other hand, if it is determined in step C2 that it is not “combination of forced exhaust”, the process proceeds to step C4 without changing the atmosphere in the chamber 51.

  In step C3, a predetermined signal is transmitted from the main body control unit 70 to the exhaust control unit 61, and the exhaust control unit 61 receives this signal, and greatly opens the variable damper 59 for a predetermined time. Thereby, the exhaust flow rate in the exhaust pipe increases, and the atmosphere in the chamber 51 is replaced. After the atmosphere in the chamber 51 is sufficiently changed, the process proceeds to Step C4. In Step C4, the wafer 1 placed on the hot plate is heated to, for example, 90 to 120 [° C.], and the reaction boundary line with and without exposure is clarified on the resist. This completes the flowchart shown in FIG.

  Thus, according to the method for forming a resist pattern according to the third embodiment of the present invention, the resist applied to the wafer of the preceding lot is the resist A, and the resist applied to the wafer 1 of the subsequent lot is Only in the case of the resist B, the atmosphere in the chamber 51 is switched when the lot is switched. Accordingly, it is possible to reduce the variation in the line width dimension of the resist pattern in the initial plurality of heat treatments in the subsequent lot while suppressing the temperature change in the chamber 51 as much as possible. In addition, since the number of forced exhausts can be reduced as compared with the first and second embodiments, the temperature change in the chamber 51 can be further suppressed.

  In addition, by incorporating any one of the resist pattern forming methods described in the first to third embodiments into a manufacturing process of an arbitrary semiconductor device, for example, after etching a film to be etched using the resist pattern as a mask Variations in the shape and size thereof, and the shape and size of the implanted region after ion implantation of conductive impurities can be reduced.

  In the first to third embodiments, the case where the resist pattern forming method of the present invention is applied to the post-baking process in the third baking apparatus 50 has been described. However, the application of the present invention is limited to this. There is nothing. For example, the resist pattern forming method of the present invention may be applied to a pre-baking process in the second baking device 16. Also in this case, it is possible to suppress variations in the line width dimension of the resist pattern with a plurality of initial heat treatments in subsequent lots while suppressing temperature changes in the chamber as much as possible.

  In the first to third embodiments, the chemically amplified photoresist corresponds to the photoresist of the present invention, and the inline photo apparatus 100 corresponds to the photoresist coating and developing apparatus of the present invention. The wafer 1 corresponds to one substrate of the present invention, and the last wafer corresponds to another substrate of the present invention. Further, the chamber 51 corresponds to the heat treatment chamber of the present invention, and the exhaust pipe 55 and the variable damper 59 correspond to the exhaust means of the present invention. The main body control unit 70 corresponds to the selection unit of the present invention, and the exhaust control unit 61 corresponds to the exhaust control unit of the present invention.

1 is a block diagram showing a configuration example of an inline photo device 100 according to an embodiment of the present invention. The conceptual diagram which shows the structural example of the 3rd baking apparatus. The table | surface figure which shows the example of influence to the line | wire width dimension of a resist pattern in each combination of resist A, B, and C groups. The flowchart which shows the processing method of the post bake which concerns on 1st Embodiment. The flowchart which shows the processing method of the post bake which concerns on 2nd Embodiment. The flowchart which shows the processing method of the post bake which concerns on 3rd Embodiment. The conceptual diagram which shows the timing of the forced exhaustion which concerns on 1st Embodiment. The conceptual diagram which shows the timing of the forced exhaustion which concerns on 2nd Embodiment. The scatter diagram which shows the problem of a prior art example.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Wafer, 11 Cassette, 12 1st baking apparatus, 13 Adventure part, 14 1st cooling part, 15 Resist coater, 16 2nd baking apparatus, 17 2nd cooling part, 18 Peripheral exposure part, 21 3rd cooling part, 22 Developer, 23 4th baking device, 24 4th cooling unit, 25 Exposure device, 50 3rd baking device, 51 Chamber, 53 Hot plate, 55 Exhaust pipe, 57 Flow rate sensor, 59 Variable damper, 61 Exhaust control unit 61 Main body Control unit, 80 storage device, 100 in-line photo device

Claims (6)

A method of applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the resist pattern to form a resist pattern,
Placing the one substrate coated with the photoresist in a chamber for heat treatment;
Comparing the lot to which the other substrate heat-treated last in the chamber belongs and the lot to which the one substrate belongs to determine whether they are the same;
When it is determined in the determining step that the lot to which the one substrate belongs and the lot to which the other substrate belongs are not the same, the atmosphere in the chamber is replaced and the lot is determined to be the same. A process that does not replace the atmosphere;
After replacing the atmosphere or after determining that the lot to which the one substrate belongs and the lot to which the other substrate belongs are the same in the determining step, the one substrate is transferred to the chamber. And a step of heating inside the resist pattern. A method of applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the resist pattern to form a resist pattern,
Placing the one substrate coated with the photoresist in a chamber for heat treatment;
Comparing the type of the photoresist applied on the one substrate with the type of the photoresist on the other substrate that was last heat-treated in the chamber to determine whether they are the same;
If it is determined in the determining step that the type of the photoresist on the one substrate and the type of the photoresist on the other substrate are not the same, the atmosphere in the chamber is switched and the same A step of not replacing the atmosphere in the chamber when it is determined that
After replacing the atmosphere or after determining that the type of the photoresist on the one substrate and the type of the photoresist on the other substrate are the same in the determining step. And a step of subjecting the one substrate in the chamber to a heat treatment. A method of applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the resist pattern to form a resist pattern,
Placing the one substrate coated with the photoresist in a chamber for heat treatment;
Whether to change the atmosphere in the chamber based on the combination of the type of the photoresist applied on the one substrate and the type of the photoresist on the other substrate that is finally heat-treated in the chamber A process of selecting
Replacing the atmosphere in the chamber when it is selected to replace in the selecting step;
A step of performing a heat treatment on the one substrate in the chamber after replacing the atmosphere or after selecting not to replace the atmosphere in the selecting step. Forming method.   2. The predetermined pattern is exposed to the photoresist on the one substrate before the one substrate coated with the photoresist is placed in the chamber. 4. The method for forming a resist pattern according to any one of 3 above.   A method for manufacturing a semiconductor device, comprising the method for forming a resist pattern according to any one of claims 1 to 4. A photoresist coating and developing apparatus for applying a photoresist on one substrate, exposing a predetermined pattern to the applied photoresist, and developing the photoresist pattern to form a resist pattern,
A chamber for heat treatment containing the one substrate coated with the photoresist;
Exhaust means for exhausting the gas in the chamber out of the chamber;
A selection means for comparing whether or not to change the atmosphere in the chamber by comparing the one substrate with another substrate that has been heat-treated last in the chamber;
An exhaust control means for controlling the exhaust means to replace the atmosphere in the chamber when the selection means selects to replace the atmosphere;
After the atmosphere is replaced by the exhaust control unit or after the selection unit is selected not to replace the atmosphere, the one substrate accommodated in the chamber is subjected to a heat treatment. Photoresist coating and developing device.

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