JP2005208837A5 - - Google Patents
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- Publication number
- JP2005208837A5 JP2005208837A5 JP2004013387A JP2004013387A JP2005208837A5 JP 2005208837 A5 JP2005208837 A5 JP 2005208837A5 JP 2004013387 A JP2004013387 A JP 2004013387A JP 2004013387 A JP2004013387 A JP 2004013387A JP 2005208837 A5 JP2005208837 A5 JP 2005208837A5
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- JP
- Japan
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Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004013387A JP2005208837A (ja) | 2004-01-21 | 2004-01-21 | レイアウト検証装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004013387A JP2005208837A (ja) | 2004-01-21 | 2004-01-21 | レイアウト検証装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005208837A JP2005208837A (ja) | 2005-08-04 |
JP2005208837A5 true JP2005208837A5 (fr) | 2006-09-07 |
Family
ID=34899463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004013387A Pending JP2005208837A (ja) | 2004-01-21 | 2004-01-21 | レイアウト検証装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2005208837A (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008009964A (ja) * | 2006-05-31 | 2008-01-17 | Toshiba Corp | 半導体集積回路のレイアウト作成装置及び作成方法 |
JP2008097541A (ja) * | 2006-10-16 | 2008-04-24 | Renesas Technology Corp | レイアウト検証方法およびレイアウト検証装置 |
JP4843583B2 (ja) * | 2007-09-10 | 2011-12-21 | 株式会社東芝 | 情報処理装置、電源系統ツリー作成方法およびプログラム |
JP4819074B2 (ja) * | 2008-02-18 | 2011-11-16 | ルネサスエレクトロニクス株式会社 | レイアウト検証装置及びレイアウト検証方法 |
JP2010211315A (ja) | 2009-03-06 | 2010-09-24 | Fujitsu Semiconductor Ltd | レイアウト検証方法、およびレイアウト検証装置 |
KR102686725B1 (ko) * | 2023-10-06 | 2024-07-19 | 위더맥스(주) | 소자 영역간 전압차에 따른 반도체 레이아웃 drc 검증 장치 및 방법 |
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2004
- 2004-01-21 JP JP2004013387A patent/JP2005208837A/ja active Pending