JP2005208837A5 - - Google Patents

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Publication number
JP2005208837A5
JP2005208837A5 JP2004013387A JP2004013387A JP2005208837A5 JP 2005208837 A5 JP2005208837 A5 JP 2005208837A5 JP 2004013387 A JP2004013387 A JP 2004013387A JP 2004013387 A JP2004013387 A JP 2004013387A JP 2005208837 A5 JP2005208837 A5 JP 2005208837A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004013387A
Other languages
Japanese (ja)
Other versions
JP2005208837A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2004013387A priority Critical patent/JP2005208837A/ja
Priority claimed from JP2004013387A external-priority patent/JP2005208837A/ja
Publication of JP2005208837A publication Critical patent/JP2005208837A/ja
Publication of JP2005208837A5 publication Critical patent/JP2005208837A5/ja
Pending legal-status Critical Current

Links

JP2004013387A 2004-01-21 2004-01-21 レイアウト検証装置 Pending JP2005208837A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004013387A JP2005208837A (ja) 2004-01-21 2004-01-21 レイアウト検証装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004013387A JP2005208837A (ja) 2004-01-21 2004-01-21 レイアウト検証装置

Publications (2)

Publication Number Publication Date
JP2005208837A JP2005208837A (ja) 2005-08-04
JP2005208837A5 true JP2005208837A5 (cg-RX-API-DMAC10.html) 2006-09-07

Family

ID=34899463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004013387A Pending JP2005208837A (ja) 2004-01-21 2004-01-21 レイアウト検証装置

Country Status (1)

Country Link
JP (1) JP2005208837A (cg-RX-API-DMAC10.html)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008009964A (ja) * 2006-05-31 2008-01-17 Toshiba Corp 半導体集積回路のレイアウト作成装置及び作成方法
JP2008097541A (ja) * 2006-10-16 2008-04-24 Renesas Technology Corp レイアウト検証方法およびレイアウト検証装置
JP4843583B2 (ja) * 2007-09-10 2011-12-21 株式会社東芝 情報処理装置、電源系統ツリー作成方法およびプログラム
JP4819074B2 (ja) * 2008-02-18 2011-11-16 ルネサスエレクトロニクス株式会社 レイアウト検証装置及びレイアウト検証方法
JP2010211315A (ja) 2009-03-06 2010-09-24 Fujitsu Semiconductor Ltd レイアウト検証方法、およびレイアウト検証装置
JP7696283B2 (ja) * 2021-11-30 2025-06-20 エイブリック株式会社 レイアウト設計支援装置、レイアウト設計支援方法、レイアウト設計支援装置及び半導体装置の製造方法
CN114186525A (zh) * 2021-12-15 2022-03-15 四川创安微电子有限公司 一种mos耐压及漏电流验证方法、系统和计算机终端
KR102686725B1 (ko) * 2023-10-06 2024-07-19 위더맥스(주) 소자 영역간 전압차에 따른 반도체 레이아웃 drc 검증 장치 및 방법

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