JP2005198134A - Interface device and interface control method - Google Patents

Interface device and interface control method Download PDF

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JP2005198134A
JP2005198134A JP2004003732A JP2004003732A JP2005198134A JP 2005198134 A JP2005198134 A JP 2005198134A JP 2004003732 A JP2004003732 A JP 2004003732A JP 2004003732 A JP2004003732 A JP 2004003732A JP 2005198134 A JP2005198134 A JP 2005198134A
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capacitor
switch
transformer
control method
terminal
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JP4718780B2 (en
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Toshihiro Miyamoto
十四広 宮本
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Fujitsu Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To enable a capacitor to be made adaaptable to both of connection and elimination automatically in accordance with conditions of an opposite device in an interface device for a LAN with which an information processor performs a communication with other devices via pair wire terminating by transformer coupling and an interface control method. <P>SOLUTION: In the interface device, one terminal of the capacitor is connected to a mid-point tap on a present device side of the transformer coupling, a switch is provided between another terminal of the capacitor and a ground terminal, and a means for setting information for controlling on/off of the switch is provided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は情報処理装置に接続されたLANの伝送路としてトランス結合のペア線を用いたインタフェース装置及びインタフェース制御方法に関する。   The present invention relates to an interface apparatus and an interface control method using a transformer coupled pair line as a LAN transmission path connected to an information processing apparatus.

複数の情報処理装置(コンピュータ)をLAN(Local Area Network) により接続してデータの送受信を行う場合,電気的な信号伝送を行う伝送路として2本のペア線(線路対)を用いた平衡伝送が用い,トランス結合により終端する技術が使用されている。   When transmitting and receiving data by connecting multiple information processing devices (computers) via a LAN (Local Area Network), balanced transmission using two pair wires (line pairs) as the transmission path for electrical signal transmission Is used, and the technique of terminating by transformer coupling is used.

このようなペア線(平衡対線)を用いてトランスで終端する伝送路において,不平衡雑音の影響を軽減する技術として,トランス結合の一方の巻線の中点タップを接地する技術が知られている(特許文献1参照)。また,平衡伝送回路において,トランスの中点タップにコンデンサを接続して接地することによりノイズを除去する技術が知られており(特許文献2参照),図4を用いて説明する。   As a technique for reducing the effect of unbalanced noise in a transmission line that terminates in a transformer using such a paired wire (balanced paired wire), a technology for grounding the center tap of one winding of the transformer coupling is known. (See Patent Document 1). In a balanced transmission circuit, a technique for removing noise by connecting a capacitor to the center tap of a transformer and grounding is known (see Patent Document 2), and will be described with reference to FIG.

図4はペア線を用いたLANのインタフェースの構成例を示す。図中,80は機器A側(送信側)のパルストランス,80aが1次側の巻線,80bが2次側の巻線,81,82はペア線,83は機器B側(受信側)のパルストランス,83aは1次側の巻線,83bは2次側の巻線である。また,84は送信側のパルストランス80の1次側の巻線の中点タップとグランド間に設けたコンデンサC1,85は受信側のパルストランス83の2次側の巻線の中点タップとグランド間に設けたコンデンサC2であるが,84,85を設けない場合もある。なお,図4には一方の伝送方向の伝送のための構成だけ示すが,実際には逆方向の伝送のためにこれと同様の構成が設けられ,図示省略された各パルストランスへの送信信号及びパルストランスからの受信信号を送受するインタフェース(物理レイヤ及びMAC(メディアアクセスコントロール)レイヤ等の制御機能を持つ)を介してコンピュータのIOコントローラに接続される。   FIG. 4 shows a configuration example of a LAN interface using a pair line. In the figure, 80 is a pulse transformer on the device A side (transmission side), 80a is a primary winding, 80b is a secondary winding, 81 and 82 are pair wires, and 83 is a device B side (reception side). , 83a is a primary winding, and 83b is a secondary winding. Reference numeral 84 denotes a midpoint tap of the primary side winding of the transmission-side pulse transformer 80 and a capacitor C1, 85 provided between the ground and a midpoint tap of the secondary side winding of the receiving-side pulse transformer 83. Although the capacitor C2 is provided between the grounds, 84 and 85 may not be provided. Note that FIG. 4 shows only the configuration for transmission in one transmission direction, but in reality a similar configuration is provided for transmission in the reverse direction, and transmission signals to each pulse transformer not shown are shown. And an interface (which has control functions such as a physical layer and a MAC (Media Access Control) layer) that transmits and receives a reception signal from the pulse transformer, is connected to the IO controller of the computer.

図4のようなパルストランスを使いペア線81,82で信号を伝送すると,コモンノイズが乗ることがある。このようなコモンノイズによるエラーが多い相手機器のための対策として,機器A側のパルストランス80の1次側の巻線の中点タップとグランド間にコンデンサ84を設け,機器B側のパルストランス83の2次側の巻線の中点タップとグランド間にコンデンサ85を設け,コモンノイズをそれぞれのコンデンサを通して除去するようにした。
特開昭58−141038号公報 特許第2670166号公報(第3図〜第5図)
When a signal is transmitted through the pair wires 81 and 82 using a pulse transformer as shown in FIG. 4, common noise may be applied. As a countermeasure for the counterpart device having many errors due to common noise, a capacitor 84 is provided between the center tap of the primary winding of the pulse transformer 80 on the device A side and the ground, and the pulse transformer on the device B side is provided. A capacitor 85 is provided between the midpoint tap of the secondary winding of 83 and the ground so that common noise is removed through each capacitor.
JP 58-1441038 A Japanese Patent No. 2670166 (FIGS. 3 to 5)

一方,LANの標準的な仕様には,パルストランスの中点にコンデンサを接続してグランドに接続しなければならないという規定はない。   On the other hand, the standard specification of LAN does not stipulate that a capacitor must be connected to the center of the pulse transformer and connected to the ground.

ところが,離れた機器同士を上記図4のようにペア線で接続しパルストランスで終端した時,機器同士のグランド間にノイズがあり,且つシールドやFG線(フレームグランド:機器のグランド端子)が無いケーブルを使用すると,コンデンサを備えた機器が逆にノイズ源になる。この,コンデンサの有無によるノイズの影響について図5に示すコンデンサによる影響を説明する図を用いて説明する。   However, when distant devices are connected with a pair of wires as shown in FIG. 4 and terminated with a pulse transformer, there is noise between the grounds of the devices, and there is a shield or FG line (frame ground: device ground terminal). If a cable with no cable is used, a device with a capacitor becomes a noise source. The influence of noise due to the presence or absence of a capacitor will be described with reference to the diagram for explaining the influence of the capacitor shown in FIG.

図5において,機器A側と機器B側はペア線81,82により接続され,パルストランスは図示省略され,RAはコモンノイズの機器A側のルートに存在する等価的な抵抗を表し,RBはコモンノイズの機器B側のルートに存在する等価的な抵抗を表し,84は機器A側に設けたコンデンサC1であり,85は機器B側のコンデンサC2であるが,点線で示すように機器B側に設ける場合と設けない場合がある。86はペア線82上のノイズ源である。なお,FG(フレームグランド)とSG(シグナルグランド)は各機器内でショートしている。   In FIG. 5, the device A side and the device B side are connected by paired wires 81 and 82, the pulse transformer is not shown, RA represents an equivalent resistance existing in the route on the device A side of common noise, and RB is It represents an equivalent resistance existing in the route on the device B side of common noise, 84 is a capacitor C1 provided on the device A side, and 85 is a capacitor C2 on the device B side, but as shown by a dotted line, the device B May or may not be provided on the side. 86 is a noise source on the pair wire 82. Note that FG (frame ground) and SG (signal ground) are short-circuited in each device.

機器A側と機器B側の間にノイズ源86があり,機器A側にコンデンサC1があり,機器B側にコンデンサC2が無い場合は,機器B側のノイズの逃げ場がなくなり,矢印(→)で示すようにノイズが大回りし,機器B側でエラーが多発する可能性がある。この場合,機器AにコンデンサC1を備えることが,逆に機器Bに対し余計なコモンモードのノイズを増大させる,ノイズ源を提供する結果になる。これに対処するため,機器A側のコンデンサC1を除去した場合,相手側(機器B側)としてコンデンサを備えた機器と接続すると,今度は上記に説明した機器Bの立場になってしまい逆にノイズの影響を受けることになる。   When there is a noise source 86 between the device A side and the device B side, the capacitor C1 is on the device A side, and the capacitor C2 is not on the device B side, there is no noise escape on the device B side, and the arrow (→) As shown in Fig. 8, there is a possibility that the noise becomes large and errors occur frequently on the device B side. In this case, the provision of the capacitor C1 in the device A results in providing a noise source that increases the extra common mode noise to the device B. In order to cope with this, when the capacitor C1 on the device A side is removed, if it is connected to a device equipped with a capacitor on the other side (device B side), this time, it becomes the position of the device B described above. It will be affected by noise.

すなわち,図5に示すモードのノイズによる問題を生じないパターンは,次の2つのケースの何れかになる。   That is, a pattern that does not cause a problem due to noise in the mode shown in FIG. 5 is one of the following two cases.

(1) 両機器共コンデンサを設けない。   (1) Do not install capacitors on both devices.

(2) 両機器共コンデンサを設ける。   (2) Install capacitors on both devices.

上記(1) の両機器共コンデンサを設けないケースはコモンモード対策としては最良では無いが,ノイズが双方で大回りする結果,ノイズが下がり,図5に示す(1) のパターンによるノイズの問題は顕在化しにくい。また, 上記(2) の双方にコンデンサを設けたケースでは,図5の(2) に示すパターンでコンデンサによって両機器間が交流的にショートされた状態となり,ノイズがコンデンサの外側に波及せず,コモンノイズによる不具合は起こらない。   The case (1) where no capacitor is provided for both devices is not the best as a countermeasure for common mode. However, as a result of the large noise in both sides, the noise decreases, and the problem of noise due to the pattern (1) shown in FIG. Difficult to manifest. In addition, in the case where capacitors are provided in both of the above (2), the two devices are short-circuited in an alternating current by the capacitors in the pattern shown in (2) of Fig. 5, and noise does not spread outside the capacitors. , No trouble caused by common noise.

一方,コンデンサをパルストランスの中点に付けるか付けないか仕様の定まらない不特定の機器との接続において,コモンノイズによる影響を無くすには相手側の状態を確認して,コンデンサを付けるか,外すかという作業をしなければならないという問題があった。   On the other hand, in order to eliminate the influence of common noise when connecting to an unspecified device whose specifications are not fixed or whether a capacitor is attached to the middle point of the pulse transformer, check the other party's condition and attach a capacitor. There was a problem of having to work to remove it.

コンデンサを備えた機器及び備えない機器が既に市場に出回っている現状では,対策として,コンデンサを固定的に付けるか,付けないかのいずれかにすることでは対応市場を狭めてしまい,オプショナルな機器選定と構成を前提としたパーソナルコンピュータのビジネスの実態に合わない。   At present, devices with and without capacitors are already on the market. As a countermeasure, either the fixed mounting or non-mounting of the capacitors narrows the corresponding market, and optional devices. It does not match the actual situation of personal computer business based on selection and configuration.

本発明は相手機器の条件に応じてコンデンサを自動的に接続/除去のどちらにでも対応することができるLANのインタフェース装置及びインタフェース制御方法を提供することを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to provide a LAN interface device and an interface control method capable of automatically connecting / removing a capacitor according to the conditions of a counterpart device.

図1は本発明の原理構成を示す。図中,1はLANの伝送路を形成するペア線3a,3bがトランス結合により終端する終端部,2はトランス結合の終端部1と後述する入出力制御部5の間のインタフェース,20はトランス結合の装置側の中点タップに一方の端子が接続されたコンデンサ,21はコンデンサ20の他方の端子とグランド(接地)端子の間を電気的にオン(接続)またはオフ(切断)の状態に切替えるスイッチ,3a,3bはペア線,4はLANを介して他装置との間でデータを送受し,処理を行う情報処理部,40はLANのトランス結合の終端部のコンデンサを接続するか否かの調整を行うコンデンサ調整部,40aはスイッチ状態別テスト手段,40bはテスト結果判別手段,40cはテスト結果判別手段40bにより良好な品質と判別したスイッチ状態にスイッチ設定部51を設定する制御を行うスイッチ制御手段,5はLANを介してデータの送受信の制御を行う入出力制御部,50はLANを介した他装置との通信を行う通信部,51は情報処理部4からの指示が設定され,その設定状態によりスイッチ21を制御する出力を発生するスイッチ設定部,6はペア線3a,3bで接続する相手機器のトランス結合の終端部である。   FIG. 1 shows the principle configuration of the present invention. In the figure, reference numeral 1 denotes a termination unit in which the pair lines 3a and 3b forming the LAN transmission line are terminated by transformer coupling, 2 is an interface between the transformer coupling termination unit 1 and an input / output control unit 5 described later, and 20 is a transformer. A capacitor having one terminal connected to a midpoint tap on the coupling device side, and 21 is electrically on (connected) or off (disconnected) between the other terminal of the capacitor 20 and a ground (ground) terminal Switches to be switched, 3a and 3b are paired wires, 4 is an information processing unit that transmits and receives data to and from other devices via the LAN, and 40 is a capacitor that connects or disconnects a LAN transformer coupling termination unit. A capacitor adjusting unit for adjusting the above, 40a is a test means for each switch state, 40b is a test result determining means, and 40c is a switch that has been determined to be of good quality by the test result determining means 40b. Switch control means for performing control to set the switch setting unit 51 in the state, 5 is an input / output control unit for controlling transmission and reception of data via the LAN, 50 is a communication unit for communicating with other devices via the LAN, 51 is a switch setting unit for generating an output for controlling the switch 21 according to the setting state, and 6 is a transformer coupling termination unit of the counterpart device connected by the pair wires 3a and 3b. .

本発明はLANの伝送路をペア線で構成してトランス結合で終端する場合に,トランスの一次側の中点にコンデンサを接続し,コンデンサとグランドの間をオン・オフするスイッチを設け,そのスイッチをオン及びオフにした時の通信の状態をチェックして,良好な通信特性が得られる状態を識別して,その状態にスイッチを切替えることで,ペア線の相手方の状態に合わせることができ,良好なデータの伝送が可能になる。   In the present invention, when a LAN transmission line is configured with a pair of wires and terminated with a transformer coupling, a capacitor is connected to the midpoint of the primary side of the transformer, and a switch for turning on and off between the capacitor and the ground is provided. By checking the state of communication when the switch is turned on and off, identifying the state where good communication characteristics can be obtained, and switching the switch to that state, it is possible to match the state of the counterpart of the paired wire , Good data transmission becomes possible.

情報処理部4のコンデンサ調整部40が駆動されると,スイッチ状態別テスト手段40aによるテストが行われる。この場合,最初に入出力制御部5のスイッチ設定部51をオン状態に設定することで,スイッチ21をオンにして,コンデンサ20がトランス結合の終端部1のトランスの中点に接続される。この状態でスイッチ状態別テスト手段40aにより終端部1,ペア線3a,3bを介する相手装置とのテストの通信を行って,通信の品質を表す結果を得て保存する。次にスイッチ状態別テスト手段40aは,入出力制御部5に対してスイッチ設定部51の設定情報をオフ状態に設定してスイッチ21をオフにし,トランスの中点にコンデンサが接続されてないのと同じ状態にして,ペア線3a,3bを介して上記のスイッチ21をオンにした時に行ったのと同様のテストの通信を行い,通信品質を表す結果を得て保存する。次にスイッチ状態別テスト手段40aによるテスト結果をテスト結果判別手段40bで判別し,良好な結果を得られたスイッチ状態を検出するとスイッチ制御手段40cにその状態を通知し,スイッチ制御手段40cは入出力制御部5のスイッチ設定部51を通知された状態に設定する。これにより,スイッチ21がオンまたはオフに切替えられる。   When the capacitor adjustment unit 40 of the information processing unit 4 is driven, a test is performed by the switch state test means 40a. In this case, by first setting the switch setting unit 51 of the input / output control unit 5 to the on state, the switch 21 is turned on and the capacitor 20 is connected to the middle point of the transformer of the termination unit 1 of the transformer coupling. In this state, the test means 40a according to the switch state performs test communication with the counterpart device via the termination unit 1 and the paired wires 3a and 3b, and obtains and stores a result representing the quality of communication. Next, the switch state-specific test means 40a sets the setting information of the switch setting unit 51 to the OFF state for the input / output control unit 5 to turn off the switch 21, and the capacitor is not connected to the midpoint of the transformer. The same test communication as that performed when the switch 21 is turned on via the paired wires 3a and 3b is performed, and a result representing the communication quality is obtained and stored. Next, the test result discriminating means 40b discriminates the test result by the switch state-specific test means 40a. When a switch state with a good result is detected, the switch control means 40c is notified of the state, and the switch control means 40c is turned on. The switch setting unit 51 of the output control unit 5 is set to the notified state. As a result, the switch 21 is switched on or off.

本発明によればLANのようなパルストランスを使ったペア線により相手機器と接続する場合に,自装置のパルストランスの中点にコンデンサを接続してコンデンサを接地するか否かの各状態による通信のテストを行うことで,相手機器側のパルストランスの中点へのコンデンサが接続されているか否か判別することができ,相手機器側に対応して自装置側の状態を切替えることで,良好な通信品質により通信の信頼性を向上することができる。   According to the present invention, when connecting to a counterpart device by a paired line using a pulse transformer such as a LAN, depending on each state whether or not the capacitor is connected to the midpoint of the pulse transformer of the own device and the capacitor is grounded. By performing a communication test, it is possible to determine whether or not a capacitor to the middle point of the pulse transformer on the other device side is connected. By switching the state on the own device corresponding to the other device side, Communication reliability can be improved with good communication quality.

図2は実施例の構成である。1はトランス結合の終端部,1aは受信用のトランス,1bは送信用のトランス,2aは物理レイヤ制御部,20a,20bはそれぞれ一方の端末をトランス1a,1bの中点タップと接続したコンデンサ,21a,21bは上記図1のスイッチ21を構成し,コンデンサ20a,20bの他端をそれぞれアースに接続するか否かのスイッチングを行うFET(Field Effect Transistor),2bはMACレイヤ制御部,3a,3bは受信用のペア線,3c,3dは送信用のペア線である。4aはCPU,4bはメモリ制御部,4cはプログラム及びデータを格納するメモリ,5は入出力制御部(IO制御部),50は通信部,51aは入出力制御部5内に設けられたGPIO(General Purpose Input Output: 汎用目的入出力) と呼ばれる入出力ピンの情報を設定するレジスタであり,その中の1ビットによりスイッチを構成するFET21a,21bを制御する情報が設定される。   FIG. 2 shows the configuration of the embodiment. 1 is a transformer coupling termination unit, 1a is a reception transformer, 1b is a transmission transformer, 2a is a physical layer control unit, and 20a and 20b are capacitors each having one terminal connected to a midpoint tap of the transformers 1a and 1b. , 21a, 21b constitute the switch 21 of FIG. 1, FETs (Field Effect Transistors) for switching whether or not the other ends of the capacitors 20a, 20b are connected to the ground, 2b, a MAC layer control unit, 3a , 3b are receiving pair wires, and 3c, 3d are transmitting pair wires. 4a is a CPU, 4b is a memory control unit, 4c is a memory for storing programs and data, 5 is an input / output control unit (IO control unit), 50 is a communication unit, 51a is a GPIO provided in the input / output control unit 5 This is a register for setting information of an input / output pin called “General Purpose Input Output”, and information for controlling the FETs 21a and 21b constituting the switch is set by one bit therein.

なお,メモリ制御部4bと入出力制御部5はCPU4aの周辺回路でありチップセットと呼ばれる集積回路であり,メモリ制御部4bはメモリ制御機能を備え,入出力制御部5はハードディスクやプロッピーディスク等の制御機能を備え,GPIOはシステム固有の信号を入出力を行うための入出力ピンであり,入力用,出力用の固定または指定によって入力,出力が切り換えられるものである。この実施例では,レジスタ51aの1ビットがGPIOの信号線の一本の信号としてコンデンサの切替え用に使用する。   The memory control unit 4b and the input / output control unit 5 are peripheral circuits of the CPU 4a and are integrated circuits called chip sets. The memory control unit 4b has a memory control function, and the input / output control unit 5 is a hard disk or a propppy disk. The GPIO is an input / output pin for inputting / outputting a system-specific signal, and can be switched between input and output depending on whether input or output is fixed or designated. In this embodiment, one bit of the register 51a is used for switching the capacitor as one signal of the GPIO signal line.

トランス結合の中点タップに一方の端子が接続されたコンデンサ20a,20bの他端をスイッチとして設けられたFET21aに接続し,FET21aに直列接続されたFET21bの他端をグランド端子と接続して,入出力制御部5のレジスタ51aからのGPIOの1ビットの信号を切り替えることで,コンデンサを付加した状態か,削除した状態に設定される。   The other ends of the capacitors 20a and 20b having one terminal connected to the center tap of the transformer coupling are connected to the FET 21a provided as a switch, and the other end of the FET 21b connected in series to the FET 21a is connected to the ground terminal. By switching a 1-bit GPIO signal from the register 51a of the input / output control unit 5, a state in which a capacitor is added or a state in which the capacitor is deleted is set.

図3はコンデンサ切替制御の処理フローであり,上記図2のCPU4aにおいてメモリ4cに格納されたプログラムにより実行される。   FIG. 3 is a processing flow of the capacitor switching control, which is executed by the program stored in the memory 4c in the CPU 4a of FIG.

最初に,レジスタRa,Rbを0にセットし,コンデンサを除去した状態(スイッチ21a,21bをオフにするよう入出力制御部5のレジスタ51aの制御用ビットに“0”をセットする)にする(図3のS1)。次に伝送品質を確認するためのコマンドを実行する(図3のS2)。伝送品質を確認するためのコマンドとして,この実施例では相手に対しエコー要求メッセージを送って,相手からエコー応答メッセージを受け取るためのメッセージを入出力制御部5から,MACレイヤ制御部2b,物理レイヤ制御部2aを介してトランス結合の終端部1を通って送信され,その送信を実行した時間から相手側からの応答が返ってくるまでのレスポンスタイム(応答時間)を測定し,レジスタRaに保持する(図3のS3)。次にコンデンサを付加した状態(スイッチ21a,21bをオンにするよう入出力制御部5のレジスタ51aの制御用ビットに“1”をセットする)にして(図3のS4),上記のS2と同様のコマンドを実行し(同S5),相手からのレスポンスタイムを測定して,その結果をレジスタRbに保持する(同S6)。   First, the registers Ra and Rb are set to 0, and the capacitor is removed (the control bit of the register 51a of the input / output control unit 5 is set to “0” to turn off the switches 21a and 21b). (S1 in FIG. 3). Next, a command for confirming transmission quality is executed (S2 in FIG. 3). In this embodiment, as a command for confirming transmission quality, an echo request message is sent to the partner and a message for receiving an echo response message from the partner is sent from the input / output control unit 5 to the MAC layer control unit 2b, physical layer. The response time (response time) from the time when the transmission is transmitted through the control unit 2a to the time when the response from the other party is returned is measured and held in the register Ra. (S3 in FIG. 3). Next, the capacitor is added ("1" is set to the control bit of the register 51a of the input / output control unit 5 so as to turn on the switches 21a and 21b) (S4 in FIG. 3). A similar command is executed (S5), the response time from the other party is measured, and the result is held in the register Rb (S6).

続いて,Ra≦Rbであるかを判別し(図3のS7),成立する場合(コンデンサ20a,20bを除去した時のレスポンスタイムRaの方が短い)は,コンデンサを除去する制御を行い(同S8),成立しない場合(コンデンサを付加した状態)は,そのまま(上記のS4でコンデンサが付加された状態になっている)で終了する。   Subsequently, it is determined whether or not Ra ≦ Rb (S7 in FIG. 3), and if it is established (response time Ra when the capacitors 20a and 20b are removed is shorter), control for removing the capacitor is performed ( In the case of S8), if it is not established (a state in which a capacitor is added), the processing ends as it is (a state in which a capacitor is added in S4).

上記のステップS2とS5において実行されるテスト通信の例として説明した,エコー要求メッセージは,送信したデータが,正しく相手コンピュータに到達したことをチェックするICMP(Internet Control Message Protocol)というプロトコルの中のエコー要求メッセージを使用する。この要求を受け取った相手先の装置はエコー応答メッセージを送り返すことになっている。このようなメッセージを用いたコマンド(ツール)をPING(Packet InterNetwork Groper) と呼ばれる。   The echo request message described as an example of the test communication executed in the above steps S2 and S5 is an ICMP (Internet Control Message Protocol) protocol that checks whether the transmitted data has correctly reached the partner computer. Use echo request messages. The counterpart device that has received this request is to send back an echo reply message. A command (tool) using such a message is called PING (Packet InterNetwork Groper).

(付記1) 情報処理部がトランス結合で終端するペア線を介して他装置と通信を行うためのLANのインタフェース装置において,前記トランス結合の自装置側の中点タップにコンデンサの一方の端子を接続し,前記コンデンサの他方の端子とグランド端子との間にスイッチを設け,前記スイッチのオン・オフを制御する情報を設定する手段を備えたことを特徴とするLANのインタフェース装置。   (Supplementary note 1) In a LAN interface device in which an information processing unit communicates with other devices via a pair of wires terminated with transformer coupling, one terminal of a capacitor is connected to a midpoint tap on the transformer coupling own device side. A LAN interface apparatus comprising a means for connecting and providing a switch between the other terminal of the capacitor and a ground terminal, and setting information for controlling on / off of the switch.

(付記2) 前記スイッチのオン・オフを制御する情報を設定する手段は,前記情報処理部から設定される入出力制御用の情報を設定するレジスタにより構成されることを特徴とするLANのインタフェース装置。   (Supplementary Note 2) A LAN interface characterized in that the means for setting information for controlling on / off of the switch is constituted by a register for setting information for input / output control set by the information processing section. apparatus.

(付記3) 情報処理部がトランス結合で終端するペア線を介して他装置と通信を行うためのLANのインタフェース制御方法において,前記トランス結合の中点タップと接続されたコンデンサの他端にグランド端子との接続を制御するスイッチを設け,情報処理部は,前記スイッチをオン及びオフのそれぞれの状態において前記ペア線を介した他装置とテスト通信を行って各状態における通信の品質を表す結果を求め,前記テスト通信の品質を表す結果を評価し,良好な結果が得られた状態に前記スイッチを制御することを特徴とするLANのインタフェース制御方法。   (Supplementary Note 3) In the LAN interface control method for the information processing unit to communicate with other devices via a pair of wires terminated by transformer coupling, a ground is connected to the other end of the capacitor connected to the midpoint tap of the transformer coupling. A switch for controlling connection with a terminal, and the information processing unit performs a test communication with the other device via the pair line in each of the on and off states of the switch to express the communication quality in each state A LAN interface control method, wherein the switch is controlled in a state where a good result is obtained by evaluating a result representing the quality of the test communication.

(付記4) 請求項2において,前記ペア線を介した他装置とのテスト通信として,前記他装置に対する呼び出しを行ってから,前記他装置からの応答が返ってくるまでの時間を測定することを特徴とするLANのインタフェース制御方法。   (Additional remark 4) In Claim 2, as test communication with the other apparatus via the pair line, measuring a time from when a call is made to the other apparatus until a response is returned from the other apparatus A LAN interface control method.

本発明の原理構成を示す図である。It is a figure which shows the principle structure of this invention. 実施例の構成を示す図である。It is a figure which shows the structure of an Example. コンデンサ切替制御の処理フローを示す図である。It is a figure which shows the processing flow of capacitor | condenser switching control. ペア線を用いたLANのインタフェースの構成例を示す図である。It is a figure which shows the structural example of the interface of LAN using a pair line. コンデンサによる影響を説明する図である。It is a figure explaining the influence by a capacitor | condenser.

符号の説明Explanation of symbols

1 トランス結合の終端部
2 インタフェース
20 コンデンサ
21 スイッチ
3a,3b ペア線
4 情報処理部
40 コンデンサ調整部
40a スイッチ状態別テスト手段
40b テスト結果判別手段
40c スイッチ制御手段
5 入出力制御部
50 通信部
51 スイッチ設定部
6 相手機器のトランス結合の終端部
DESCRIPTION OF SYMBOLS 1 Transformer termination | terminus part 2 Interface 20 Capacitor 21 Switch 3a, 3b Pair line 4 Information processing part 40 Capacitor adjustment part 40a Switch state test means 40b Test result discrimination means 40c Switch control means 5 Input / output control part 50 Communication part 51 Switch Setting part 6 Termination part of transformer coupling of counterpart device

Claims (3)

情報処理装置がトランス結合で終端するペア線を介して他装置と通信を行うためのLANのインタフェース装置において,
前記トランス結合の自装置側の中点タップにコンデンサの一方の端子を接続し,前記コンデンサの他方の端子とグランド端子との間にスイッチを設け,
前記スイッチのオン・オフを制御する情報を設定する手段を備えたことを特徴とするLANのインタフェース装置。
In a LAN interface device for communicating with other devices via a pair line terminated by a transformer coupling in an information processing device,
One terminal of a capacitor is connected to a midpoint tap on the transformer-coupled device side, and a switch is provided between the other terminal of the capacitor and a ground terminal,
A LAN interface device comprising means for setting information for controlling on / off of the switch.
情報処理装置がトランス結合で終端するペア線を介して他装置と通信を行うためのLANのインタフェース制御方法において,
前記トランス結合の中点タップと接続されたコンデンサの他端にグランド端子との接続を制御するスイッチを設け,
情報処理装置は,前記スイッチをオン及びオフのそれぞれの状態において前記ペア線を介した他装置とテスト通信を行って各状態における通信の品質を表す結果を求め,
前記テスト通信の品質を表す結果を評価し,良好な結果が得られた状態に前記スイッチを制御することを特徴とするLANのインタフェース制御方法。
In a LAN interface control method for communicating with other devices via a pair line terminated by a transformer coupling of an information processing device,
A switch for controlling the connection to the ground terminal is provided at the other end of the capacitor connected to the center tap of the transformer coupling,
The information processing device obtains a result representing the communication quality in each state by performing test communication with the other device via the pair line in each of the on and off states of the switch,
A LAN interface control method comprising: evaluating a result representing the quality of the test communication; and controlling the switch so that a good result is obtained.
請求項2において,
前記ペア線を介した他装置とのテスト通信として,前記他装置に対する呼び出しを行ってから,前記他装置からの応答が返ってくるまでの時間を測定することを特徴とするLANのインタフェース制御方法。
In claim 2,
A LAN interface control method, comprising: measuring a time from when a call is made to another device as a test communication with the other device via the pair line until a response is returned from the other device. .
JP2004003732A 2004-01-09 2004-01-09 Interface device and interface control method Expired - Fee Related JP4718780B2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105700658A (en) * 2015-12-31 2016-06-22 联想(北京)有限公司 Electronic equipment and control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105700658A (en) * 2015-12-31 2016-06-22 联想(北京)有限公司 Electronic equipment and control method
CN105700658B (en) * 2015-12-31 2018-08-10 联想(北京)有限公司 Electronic equipment and control method

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