JP2005175226A - Manufacturing method of semiconductor device, solid-state imaging element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device for forming a recombination layer which restrains a dark current, without raising the manufacturing cost, and to provide a manufacturing method of a solid-state image sensing element, and the solid-state imaging element. <P>SOLUTION: A resist mask, whose isolation layer is opened, is provided to the upper surface of the semiconductor substrate provided with an isolation layer, and an isolation diffusion layer, consisting of an impurity layer, is formed by implanting impurities to the lower side of the isolation layer, and impurities are implanted from the opening of the resist mask in an oblique direction to the semiconductor substrate. Consequently, a recombination layer, consisting of an impurity layer which is formed by extending the edge of the isolation diffusion impurity layer, is formed. Especially, the size of the recombination layer, consisting of the impurity layer, is adjusted by changing the end edge shape of the opening provided to the resist mask. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device manufacturing method, a solid-state image sensor manufacturing method, and a solid-state image sensor.

  Conventionally, an element isolation layer made of LOCOS (local oxidation of silicon) or STI (Shallow Trench Isolation) is formed at a required position on a semiconductor substrate to be a semiconductor device, and impurities are implanted into a lower portion of the element isolation layer. By forming an impurity layer composed of an element isolation diffusion layer, each element formed on the semiconductor substrate is electrically isolated.

  Here, since the element isolation layer is configured using an oxide film, lattice defects are likely to occur at the boundary between the element isolation layer and the semiconductor substrate, and electrons or holes are generated based on the lattice defects. It is known that noise current is generated due to this.

  Therefore, when forming the element isolation diffusion layer, an opening is formed in the resist mask used to form the element isolation diffusion layer so that not only the element isolation layer portion but also the periphery thereof can be implanted with impurities. Is formed, and impurities are implanted into the opening to suppress generation of electrons or holes around the element isolation layer, thereby suppressing noise current.

  In such a semiconductor device, due to the recent demand for higher integration, it has become difficult to make the element isolation diffusion layer sufficiently large to suppress the noise current, and it is difficult to suppress the noise current. There was a risk of becoming.

  In particular, when the semiconductor device is a solid-state image sensor, there is a possibility that image quality deterioration may occur due to dark current that could not be suppressed. In addition, in the case of a solid-state imaging device, the area of the sensor portion adjacent to the element isolation layer is suppressed by providing an element isolation diffusion layer by extending the periphery of the element isolation layer, resulting in a decrease in photoelectric conversion efficiency. There was also a risk of inviting.

Therefore, the element isolation diffusion layer is formed only immediately below the element isolation layer, and then a resist mask is formed immediately above the element isolation layer, so that the impurity having the same conductivity type as the impurity used for forming the element isolation diffusion layer is formed. Is injected into the surface layer of the light receiving portion to form a recombination layer, and electrons or holes generated due to lattice defects are recombined in the recombination layer (for example, see Patent Document 1). .)
JP 2001-28433 A

  However, when the resist mask for forming the recombination layer is formed after the formation of the element isolation diffusion layer, there is a problem that the manufacturing cost increases due to an increase in the number of work steps.

  In addition, the resist mask used for forming the element isolation diffusion layer must be formed without positional deviation with respect to the previously formed element isolation layer and element isolation diffusion layer. In the case of misalignment, there is a possibility that a thin region consisting of a region without impurities to diffuse between the recombination layer and the element isolation diffusion layer may be generated, and it is difficult to suppress noise current due to this region. There was also a risk of becoming.

  Therefore, in the method for manufacturing a semiconductor device of the present invention, a resist mask having an element isolation layer portion opened is provided on the upper surface of a semiconductor substrate provided with an element isolation layer, and ions are obliquely formed with respect to the semiconductor substrate from the opening of the resist mask. It was decided to inject. Further, the present invention is characterized in that the implantation range by ion implantation is adjusted by forming the edge shape of the opening provided in the resist mask into a desired shape.

  In the solid-state imaging device manufacturing method of the present invention, a resist mask having an element isolation layer portion opened is provided on an upper surface of a semiconductor substrate provided with an element isolation layer, and impurities are implanted by injecting impurities below the element isolation layer. In the method for manufacturing a solid-state imaging device in which a layer is formed, an impurity layer is formed by extending the edge of the impurity layer by injecting impurities in an oblique direction with respect to the semiconductor substrate from the opening of the resist mask. Further, the present invention is characterized in that the size or shape of the impurity layer is adjusted by changing the edge shape of the opening provided in the resist mask.

  In the solid-state imaging device of the present invention, a resist mask having an element isolation layer portion opened is provided on the upper surface of a semiconductor substrate provided with an element isolation layer, and an impurity layer is formed by implanting impurities below the element isolation layer. In the solid-state imaging device, an impurity layer was formed by extending the edge of the impurity layer by injecting impurities in an oblique direction with respect to the semiconductor substrate from the opening of the resist mask.

  According to the first aspect of the present invention, the resist mask having the element isolation layer portion opened is provided on the upper surface of the semiconductor substrate provided with the element isolation layer, and ions are implanted into the semiconductor substrate obliquely from the opening of the resist mask. Thus, ions can be implanted into the edge portion of the element isolation layer covered with the resist mask without forming a new resist mask, and generation of dark current can be suppressed by the implanted ions.

  According to the second aspect of the invention, the distribution of ions to be implanted into the edge portion of the element isolation layer can be made extremely by adjusting the implantation range by ion implantation by changing the edge shape of the opening provided in the resist mask. It can be easily optimized.

  According to the third aspect of the present invention, the resist mask having the element isolation layer portion opened is provided on the upper surface of the semiconductor substrate provided with the element isolation layer, and the impurity layer is formed by implanting the impurity below the element isolation layer. In the manufacturing method of a solid-state imaging device, a recombination layer is formed by forming an impurity layer in which an edge of the impurity layer is extended by injecting an impurity obliquely with respect to the semiconductor substrate from an opening of a resist mask Thus, an impurity layer that serves as a recombination layer can be formed without providing a resist mask. In addition, since the element isolation diffusion layer and the recombination layer are formed of the impurity layer with one resist mask, the recombination layer and the element isolation diffusion layer can be reliably connected to each other. Can be reliably covered with the recombination layer and the element isolation diffusion layer to suppress the generation of dark current.

  According to the invention described in claim 4, the recombination layer can be optimized very easily by adjusting the size of the impurity layer to be the recombination layer by changing the edge shape of the opening provided in the resist mask. It can be carried out.

  According to the fifth aspect of the present invention, the resist mask having the element isolation layer portion opened is provided on the upper surface of the semiconductor substrate provided with the element isolation layer, and the impurity layer is formed by implanting impurities below the element isolation layer. In the solid-state imaging device, the recombination layer and the element isolation diffusion layer are formed by forming an impurity layer in which the edge of the impurity layer is extended by injecting impurities from the opening of the resist mask in an oblique direction with respect to the semiconductor substrate. Can be formed integrally with the impurity layer, and the element isolation layer can be reliably covered with the recombination layer composed of the impurity layer and the element isolation diffusion layer, thereby reliably preventing the occurrence of dark current. In addition, the recombination layer can be formed without providing a resist mask for forming the impurity layer to be the recombination layer, and the manufacturing cost can be reduced.

  In the method for manufacturing a semiconductor device of the present invention, particularly the method for manufacturing a solid-state imaging device, an element isolation layer made of an oxide film is formed on the semiconductor substrate in order to form an element isolation structure on the semiconductor substrate. An element isolation diffusion layer made of an impurity layer is formed by ion implantation of an impurity having a required conductivity type on the side, and an element isolation layer portion is opened on the upper surface of the semiconductor substrate when ion implantation is performed. The resist mask is provided, and ion implantation is also performed obliquely with respect to the semiconductor substrate from the opening of the resist mask.

  By implanting ions in an oblique direction, an impurity layer is formed by extending the edge of the element isolation diffusion layer made of the impurity layer, and a new resist mask is also applied to the edge of the element isolation layer covered with the resist mask. An impurity layer can be formed without forming a recombination layer made of an impurity layer.

  Therefore, it is possible to omit the process of creating a resist mask, which has been conventionally provided for forming the recombination layer, and to reduce the manufacturing cost.

  In addition, since the recombination layer and the element isolation diffusion layer are integrally formed from the impurity layer, the recombination layer and the element isolation diffusion layer can be formed without being separated from each other. The element isolation layer can be reliably covered with the recombination layer and the element isolation diffusion layer to reliably suppress the occurrence of dark current.

  Furthermore, when the edge shape of the opening provided in the resist mask is changed, the implantation range by ion implantation can be easily adjusted, and the ion implantation range can be easily optimized.

  The edge shape of the opening provided in the resist mask can be formed to have a required taper by adjusting the etching condition of the resist mask, and the resist can be formed across the resist mask by adjusting the taper shape. The amount of ions implanted into the semiconductor substrate under the mask can be easily adjusted.

  Further, by reflowing the resist mask after the opening is formed, the edge shape of the opening can be a curved shape having a required curvature instead of the inclined surface. By reflowing the resist mask, variations in the etching process of the resist mask can be eliminated, and a uniform recombination layer can be formed over the entire semiconductor substrate.

  By using a resist mask as a mask for ion implantation in this manner, ion implantation into the semiconductor substrate below the mask can be performed and ion implantation can be performed with relatively low energy. And a recombination layer can be formed efficiently.

  In the following, embodiments of the present invention will be described in more detail based on the drawings. Here, a description will be given using a solid-state imaging device, particularly a solid-state imaging device manufactured by a CMOS manufacturing process, as a semiconductor device, but the present invention can be applied not only to a solid-state imaging device but also to a required semiconductor device. In addition, although the description will be made assuming that the photoelectric conversion unit and the charge storage unit of the solid-state imaging device are configured by the N-type impurity region, the photoelectric conversion unit and the charge storage unit may be configured by the P-type impurity region, When the photoelectric conversion unit and the charge storage unit are configured by P-type impurity regions, the conductivity types described below are all reversed.

  As shown in FIG. 1, the solid-state imaging device is configured by using an N-type semiconductor substrate 1 having a P-type well region 2 formed on the surface, and the semiconductor substrate 1 is an element formed by LOCOS at a required position. A separation layer 3 is provided. The element isolation layer 3 is not limited to the one formed by LOCOS, and may be formed by STI.

  After the element isolation layer 3 is formed, a first resist mask 4 is applied onto the semiconductor substrate 1, and a sensor portion forming opening 4a is provided at a required position of the first resist mask 4, and the sensor portion forming opening 4a is provided. The sensor portion 5 is formed by ion implantation of N-type impurities into the semiconductor substrate 1 to form a PN junction.

  After the formation of the sensor unit 5, the first resist mask 4 is removed, and as shown in FIG. 2, a second resist mask 6 is applied on the semiconductor substrate 1, and the element isolation layer 3 of the second resist mask 6 is applied. An element isolation diffusion layer forming opening 6a is provided immediately above, and P type impurities are ion-implanted into the semiconductor substrate 1 from the element isolation diffusion layer forming opening 6a to form an element isolation diffusion layer 7 below the element isolation layer 3. Forming. The element isolation diffusion layer 7 and the element isolation layer 3 perform element isolation, and this element isolation structure is formed so as to surround the sensor unit 5. In FIG. 2, A is an arrow indicating the direction of impurity implantation.

  After the formation of the element isolation diffusion layer 7, as shown in FIG. 3, a P-type impurity is ion-implanted into the semiconductor substrate 1 from the element isolation diffusion layer formation opening 6a in an oblique direction with respect to the semiconductor substrate, A recombination layer 8 is formed on the edge portion of the element isolation layer 3 that is under the second resist mask 6. In FIG. 3, A ′ is an arrow indicating the direction of impurity implantation.

  Here, the impurity implanted obliquely with respect to the semiconductor substrate may be the same type of impurity as that used for forming the element isolation diffusion layer 7 or a different type of impurity as long as the conductivity type is the same. May be.

  Impurity implantation conditions for forming the recombination layer 8 may be conditions such as an appropriate acceleration voltage and implantation direction according to the size of the recombination layer 8 to be formed. The implantation direction is also limited by the thickness dimension of the second resist mask 6, the opening area and shape of the element isolation diffusion layer forming opening 6a, and the manufacturing apparatus. It is desirable that the angle formed is 45 to 85 °. Incidentally, the implantation direction when forming the element isolation diffusion layer 7 is 90 °.

  In this embodiment, after the element isolation diffusion layer 7 is formed, the recombination layer 8 is formed by implanting impurities in an oblique direction with respect to the semiconductor substrate. By implanting, the element isolation diffusion layer 7 and the recombination layer 8 may be formed simultaneously.

  Further, the concentration of the impurity implanted into the recombination layer 8 may be adjusted by implanting while sequentially changing the angle formed by the implantation direction and the flat semiconductor substrate 1.

  By forming the recombination layer 8 in this way, the recombination layer 8 can be formed without forming a new resist mask also on the edge portion of the element isolation layer 3 covered with the second resist mask 6. Therefore, the manufacturing cost can be reduced.

  In addition, since the recombination layer 8 can be formed without separating the recombination layer 8 and the element isolation diffusion layer 7 from each other, the element isolation layer 3 can be reliably formed by the recombination layer 8 and the element isolation diffusion layer 7. It is possible to reliably suppress the generation of dark current by covering.

  Furthermore, since the element isolation diffusion layer 7 can be formed relatively small, the decrease in the sensor unit 5 can be suppressed in the case of a solid-state image sensor, and the integration degree in the case of a general semiconductor device. Can be improved.

  After the recombination layer 8 is formed as described above, the second resist mask 6 is removed, and a gate oxide film 9 is formed on the upper surface of the semiconductor substrate 1 as shown in FIG. A gate electrode 10 is formed by forming a polycrystalline silicon layer on the upper surface and patterning the polycrystalline silicon layer.

  Thereafter, a low impurity concentration region 11 in which N-type impurities are implanted at a low concentration is formed in the readout region portion of the solid-state imaging device, and a high impurity concentration region 12 in which N-type impurities are implanted at a high concentration is formed in the low impurity concentration region 11. Thus, a readout switch composed of an NMOS transistor is formed. Thereafter, an interlayer insulating film (not shown) and appropriate wiring (not shown) are formed to form a solid-state imaging device.

  As another embodiment, as shown in FIG. 5, when the second resist mask 6 is etched to form the element isolation diffusion layer formation opening 6a, the etching conditions are adjusted to adjust the element isolation diffusion layer formation. A taper can be formed at the edge of the opening 6a. In particular, the inclination angle of the inclined surface 6b of the taper can be appropriately changed by adjusting the etching conditions.

  By changing the inclination angle of the inclined surface 6b, the impurity passing distance through the second resist mask 6 can be adjusted when impurities are implanted in the oblique direction with respect to the semiconductor substrate. 8 size or impurity concentration distribution can be adjusted.

  Therefore, the size of the recombination layer 8 or the distribution of impurity concentration in the recombination layer 8 can be adjusted by using the edge shape of the element isolation diffusion layer forming opening 6a provided in the second resist mask 6, so that the optimization is further improved. The recombination layer 8 thus made can be performed very easily.

  The edge shape of the element isolation diffusion layer forming opening 6a is changed not only by forming the inclined surface 6b by etching but also by reflowing the second resist mask 6 after the element isolation diffusion layer forming opening 6a is formed. It is good also as a shape.

  When the second resist mask 6 is reflowed, as shown in FIG. 6, the edge of the element isolation diffusion layer forming opening 6a can be constituted by a curved surface 6c, and impurities can be implanted relatively shallowly. .

It is explanatory drawing of the manufacturing process of the solid-state image sensor concerning this invention. It is explanatory drawing of the manufacturing process of the solid-state image sensor concerning this invention. It is explanatory drawing of the manufacturing process of the solid-state image sensor concerning this invention. It is explanatory drawing of the manufacturing process of the solid-state image sensor concerning this invention. It is explanatory drawing of other embodiment. It is explanatory drawing of other embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Well area | region 3 Element isolation layer 5 Sensor part 6 2nd resist mask
6a Element isolation diffusion layer formation opening 7 Element isolation diffusion layer 8 Recombination layer 9 Gate oxide film
10 Gate electrode
11 Low impurity concentration region
12 High impurity concentration region

Claims (5)

  A semiconductor device comprising: a semiconductor substrate provided with an element isolation layer; and a resist mask having an opening in the element isolation layer portion is provided on an upper surface of the semiconductor substrate, and ions are implanted into the semiconductor substrate obliquely from the opening of the resist mask. Production method.   2. The method for manufacturing a semiconductor device according to claim 1, wherein an implantation range by the ion implantation is adjusted by changing an edge shape of an opening provided in the resist mask. In a method of manufacturing a solid-state imaging device, a resist mask having an opening for the element isolation layer is provided on an upper surface of a semiconductor substrate provided with an element isolation layer, and an impurity layer is formed by implanting impurities below the element isolation layer. ,
A method of manufacturing a solid-state imaging device, wherein an impurity layer is formed by extending an edge of the impurity layer by implanting impurities in an oblique direction with respect to the semiconductor substrate from an opening of the resist mask.   4. The method of manufacturing a solid-state imaging device according to claim 3, wherein the size of the impurity layer is adjusted by changing an edge shape of an opening provided in the resist mask. In a solid-state imaging device in which a resist mask having an opening in the element isolation layer is provided on the upper surface of a semiconductor substrate provided with an element isolation layer, and an impurity layer is formed by injecting an impurity below the element isolation layer.
A solid-state imaging device, wherein an impurity layer is formed by extending an edge of the impurity layer by implanting impurities from the opening of the resist mask in an oblique direction with respect to the semiconductor substrate.