JP2005172866A - Encryption/decryption system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an encryption/decryption system capable of preventing leakage of information held by an HDD. <P>SOLUTION: The encryption/decryption system includes an arithmetic processing section 101, a hard disk 102, and a bus 104. Between the hard disk 102 and the bus, an integrated circuit 103 capable of encrypting data to be written on the hard disk 102 and decrypting the data to be read is provided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an encryption / decryption system in an electronic device such as a personal computer or an image forming apparatus equipped with a hard disk (hereinafter referred to as HDD).

In recent years, not only personal computers but also image forming apparatuses such as copying machines and printing machines that are found in offices, many systems equipped with HDDs have been seen. The HDD mounted in such a system is initialized and discarded in order to prevent information leakage along with the destruction of the machine.
However, even though the HDD is initialized, it is possible to restore and retrieve the discarded data by using dedicated software, and information leakage often occurs.
An object of the present invention is to provide an encryption / decryption system capable of preventing leakage of information held in an HDD.

In order to achieve the above object, an invention according to claim 1 is an integrated circuit including a hard disk for information storage and a bus controller, and encrypts data to be written to the hard disk and decrypts data to be read. An encryption / decryption integrated circuit, and the encryption / decryption integrated circuit is provided between the hard disk and the bus, whereby the data controlled by the bus controller is encrypted and decrypted in hardware. Features.
The invention described in claim 2 is an integrated circuit including a hard disk for information storage and a bus controller, and a storage medium for storing secret key data, and a logic circuit based on a variable stored in the storage medium. An encryption / decryption integrated circuit that encrypts data that is formed and written to the hard disk and decrypts data that is read out, and includes the encryption / decryption integrated circuit between the hard disk and the bus. Thus, the logic circuit is formed based on the variable recorded on the recording medium, and the data controlled by the bus controller is hardware-encrypted and decrypted.
The invention according to claim 3 is the encryption / decryption system according to claim 1 or 2, further comprising selection means for selecting whether or not to operate the encryption / decryption integrated circuit. To do.

As described above, according to the invention of claim 1, since the encryption / decryption IC is provided between the bus and the HDD, the data controlled by the bus controller is encrypted and stored in the HDD, so that the HDD is discarded. After that, you can keep the secret because you can't decrypt the data.
Further, in claim 2, since an FPGA circuit is provided in the storage medium for storing the secret key and the encryption / decryption IC, the data in the HDD cannot be decrypted without the secret key. Will improve.
According to the third aspect of the present invention, since the selection means that can select whether or not to operate the encryption / decryption IC is provided, only data that needs to be encrypted can be selected, and the data processing time can be shortened.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a functional block diagram of an encryption system according to the first embodiment of the present invention. An arithmetic processing unit 101 composed of a CPU, an HDD 102 serving as a main memory for storing programs and data, an integrated circuit (IC) 103 for encrypting data written to the HDD 102, and decrypting data read from the HDD 102, an address A bus 104 in which lines, data lines, and signal control lines are bundled, an operation unit 105, a display unit 106, and an engine control unit 107 that manages a power source and the like are provided.
FIG. 2 is an internal block diagram of the integrated circuit shown in FIG. The integrated circuit 103 in the HDD 102 connected to the ATA has a circuit as shown in FIG. That is, buffers 201 and 204, an expansion bus interface 202, and an HDD interface 203 are provided.
The data sent to the HDD 102 is used not only to write data to the magnetic disk but also to read a register in which the status of the HDD 102 is managed. Therefore, it is necessary to connect without swapping. Therefore, it is necessary to branch and connect the data. When the arithmetic processing unit 101 writes data to the magnetic disk of the HDD 102, access to the data register is determined by the logic of the control line, so that it is fetched by AND and its output is set to OE (output enable) to control the signal. Decide. As a result, only data to be written to the magnetic disk can be shifted by 1 bit.
FIG. 3 is a functional block diagram of an encryption system according to the second embodiment of the present invention. An arithmetic processing unit 101, an HDD 102, a bus 104, an encryption IC 301, and a nonvolatile memory 302 such as an EEPROM are provided.

FIG. 4 is an internal block diagram of the encryption IC shown in FIG. An FPGA (Floring Programmable Gate Array) 401, an expansion bus interface 402, an HDD interface 403, a buffer 404, and a nonvolatile memory 405 for storing the 401 circuit program of the FPGA are provided.
The encryption IC 301 loads variables from the nonvolatile memory 302 when the power is turned on. The variable in this case is a value of how much the data line is shifted. In the case of a 16-bit bus, any value from 0 to 15 is held. Next, the FPGA 401 inside the encryption IC 301 forms a logic based on the value. As a result, 15 types of encryption are possible. In this case, the variable of the non-volatile memory 302 becomes the “secret key”. Further, depending on the program of the FPGA 401 and the variables of the nonvolatile memory 302, it is possible to connect randomly rather than shifting, and it is possible to form a more complicated data arrangement.
FIG. 5 is a functional block diagram of an encryption system according to the third embodiment of the present invention. An arithmetic processing unit 101, an HDD 102, a bus 104, an encryption IC 301, a nonvolatile memory 302 such as an EEPROM, and a select signal 501 for determining whether to encrypt / decrypt data.
This signal does not need to have a dedicated line for the arithmetic processing unit 101 and may be controlled by a general-purpose I / O line. As a result, not all data is encrypted, but only confidential information that is not to be leaked to others can be encrypted.
In the HDD data encryption / decryption system of the present invention, since processing is performed in hardware, encryption / decryption can be easily performed without imposing a load on the CPU.
Further, since the user of the IC can easily customize it, it becomes possible to make it more complicated at the time of encryption / decryption. Also, it is possible to encrypt / decrypt only important data, not all data. Furthermore, data cannot be extracted from the discarded HDD, and information leakage can be prevented.

The functional block diagram of the encryption system which concerns on the 1st Embodiment of this invention. FIG. 2 is an internal block diagram of the integrated circuit shown in FIG. 1. The functional block diagram of the encryption system which concerns on the 2nd Embodiment of this invention. FIG. 4 is an internal block diagram of the encryption IC shown in FIG. 3. The functional block diagram of the encryption system which concerns on the 3rd Embodiment of this invention.

Explanation of symbols

101 arithmetic processing unit 102 hard disk 103 integrated circuit 104 bus

Claims (3)

An integrated circuit comprising a hard disk for information storage and a bus controller, comprising an encryption / decryption integrated circuit for encrypting data to be written to the hard disk and decrypting the read data;
An encryption / decryption system characterized in that, by providing the encryption / decryption integrated circuit between the hard disk and the bus, the data controlled by the bus controller is encrypted and decrypted in hardware. . An integrated circuit comprising a hard disk for information storage and a bus controller, a storage medium for storing secret key data, and data to be written to the hard disk by forming a logic circuit based on variables stored in the storage medium An encryption / decryption integrated circuit for encrypting and decrypting data to be read,
By providing the encryption / decryption integrated circuit between the hard disk and the bus, the logic circuit is formed based on the variables recorded on the recording medium, and the data controlled by the bus controller is hardware An encryption / decryption system characterized in that encryption / decryption is performed.   3. The encryption / decryption system according to claim 1, further comprising selection means for selecting whether or not to operate the encryption / decryption integrated circuit.

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