JP2005158973A - Multi-layer circuit board and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a multi-layer circuit board by which an insulating layer having no irregular surface can be formed, no step for polishing the surface of the insulating layer is required, and a circuit can be accurately formed on the insulting layer. <P>SOLUTION: The manufacturing method includes a step to form a plating base layer 2 on the surface of an insulating substrate 1 or an insulting layer 7, a step to remove the plating base layer 2 on a boundary between a circuit 3 and a non-circuit 4 by applying an electromagnetic wave along the boundary therebetween, a step to form a circuit 11 comprised of the plating base layer 1 and a plating layer 5 in the circuit part 3, by applying plating respectively to the plating base layer 2 of the circuit part 3 and the plating base layer 2 remaining in the non-circuit 4 so as to form the plating layer 5, and a step to form an insulating layer 7 by adhering an insulative material 6 from the upper side of the plating layers 5 of the circuit 3 and the non-circuit 4. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method of manufacturing a multilayer circuit board mainly having a three-dimensional shape and a multilayer circuit board manufactured by this method.

In manufacturing a multilayer circuit board, after forming a thin plating base layer on the surface of the insulating substrate and irradiating electromagnetic waves along the boundary between the circuit part and the non-circuit part, the plating base layer of this part is removed. A method has been conventionally provided in which a circuit comprising a plating base layer and a plating layer is formed by electroplating the plating base layer of the circuit portion to form a plating layer (for example, Patent Document 1). Etc.)
FIGS. 6 to 8 show an example of this method. First, as shown in FIG. 6A, a thin plating base layer 2 is formed on the surface of the insulating substrate 1, and the circuit 11 is formed on the insulating substrate 1. By irradiating an electromagnetic wave L such as a laser along the boundary between the circuit part 3 which is a part forming the non-circuit part 4 other than the circuit part 3, the circuit part 3 and the non-circuit as shown in FIG. The plating base layer 2 at the boundary with the part 4 is removed. Next, the plating layer 5 is formed on the plating base layer 2 of the circuit part 3 as shown in FIG. At this time, since the non-circuit portion 4 is insulated from the circuit portion 3 and is not energized to the plating base layer 2 of the non-circuit portion 4, the plating layer 5 is formed on the plating base layer 2 of the non-circuit portion 4. Not. Next, by etching, the thin plating base layer 2 remaining in the non-circuit portion 4 is removed as shown in FIG. Although the plating layer 5 of the circuit portion 3 is also subjected to the etching action, the plating layer 5 is not lost because the plating layer 5 is thick. In this way, the circuit 11 including the plating base layer 2 and the plating layer 5 can be formed in the circuit portion 3.

  The first-layer circuit 11 can be formed as described above. In forming the second-layer circuit 11 on the first-layer circuit 11, first, as shown in FIG. The insulating layer 6 covering the circuit 11 and the non-circuit portion 4 of the circuit portion 3 is formed by dropping the insulating material 6 from the nozzle 15 and extending and hardening the insulating material 6 by spin coating or the like, as shown in FIG. To form. At this time, since the thick circuit 11 exists in the circuit unit 3 and the circuit 11 does not exist in the non-circuit unit 4, the insulating layer 7 formed in the circuit unit 3 and the insulation formed in the non-circuit unit 4. A difference in height occurs between the layers 7 and large irregularities are generated on the surface of the insulating layer 7 as seen in FIG. And when such large unevenness | corrugation arises in the insulating layer 7, the problem that it becomes difficult to form the circuit 11 on the insulating layer 7 with high precision, and the mounting defect at the time of mounting mounting components are easy to generate | occur | produce. The problem of becoming will occur.

Therefore, after the insulating layer 7 is formed, the surface of the insulating layer 7 is polished by the polishing apparatus 16 as shown in FIG. 7C, thereby flattening the surface of the insulating layer 7 as shown in FIG. A circuit 11 is formed thereon. That is, after the via hole 17 is processed at the position of the first circuit 11 in the insulating layer 7 whose surface is flattened, the plating base layer 2 including the inner periphery of the via hole 17 is formed on the insulating layer 7 as shown in FIG. Form as follows. After that, similarly to the above, an electromagnetic wave L such as a laser is irradiated along the boundary between the circuit unit 3 and the non-circuit unit 4, and the boundary between the circuit unit 3 and the non-circuit unit 4 as shown in FIG. The plating base layer 2 is removed, and the plating layer 5 is formed by electroplating on the plating base layer 2 of the circuit portion 3 and then etched to remove the plating base layer 2 of the non-circuit portion 4. As shown in FIG. 8C, the second-layer circuit 11 that is conductively connected to the first-layer circuit 11 through the via hole 17 can be formed on the insulating layer 7. Further, when the circuit 11 is formed in multiple layers, the insulating layer 7 is formed on the second-layer circuit 11 as shown in FIG. 8D, and the circuit 11 is formed on the insulating layer 7 in the same manner as described above. This can be done by forming. Since the insulating layer 7 formed on the circuit 11 is uneven as in the case of FIG. 7B, a polishing step similar to that in FIG. 7C is required.
JP 7-66533 A

  Thus, by forming the circuit 11 via the insulating layer 7, a multilayer circuit board provided with the multilayer circuit 11 can be formed. As described above, the circuit unit 3 and the non-circuit unit 4 are When the insulating layer 7 is formed so as to cover the surface, the surface of the insulating layer 7 is largely uneven between the circuit portion 3 where the thick circuit 11 exists and the non-circuit portion 4 where the circuit 11 does not exist. There was a problem that a process for polishing the surface and flattening the unevenness was required, resulting in an increase in man-hours. In particular, in the case of a three-dimensional circuit board having a three-dimensional shape, the polishing itself cannot be performed, and as a result, there is a problem in the accuracy of the circuit 11 formed on the insulating layer 7 having large irregularities.

  The present invention has been made in view of the above points, and can form an insulating layer with small surface irregularities, eliminates the need for the step of polishing the surface of the insulating layer, and provides high accuracy on the insulating layer. An object of the present invention is to provide a method for manufacturing a multilayer circuit board capable of forming a circuit and a multilayer circuit board.

  The method for manufacturing a multilayer circuit board according to claim 1 of the present invention includes the step of forming a plating base layer 2 on the surface of the insulating base material 1 or the insulating layer 7 described later, and the boundary between the circuit portion 3 and the non-circuit portion 4. The step of removing the plating base layer 2 at the boundary between the circuit portion 3 and the non-circuit portion 4 by irradiating electromagnetic waves along the lines, and the plating base layer 2 remaining in the plating base layer 2 and the non-circuit portion 4 of the circuit portion 3 The plating layer 5 is formed by plating each of the circuit board 3 to form the circuit 11 including the plating base layer 2 and the plating layer 5 on the circuit part 3, and the plating layer 5 of the circuit part 3 and the non-circuit part 4. And a step of forming an insulating layer 7 by attaching an insulating material 6 from above.

  According to this invention, the circuit 11 can be formed with a predetermined thickness in the circuit portion 3, and the non-circuit portion 4 can be formed with a layer made of the plating underlayer 2 and the plating layer 5 with the same thickness. The difference in height between the insulating layer 7 formed in the circuit portion 3 and the layer formed in the non-circuit portion 4 is eliminated, and the unevenness of the insulating layer 7 can be reduced. This eliminates the need for polishing and flattening the surface of the surface, and allows the circuit 11 to be formed with high accuracy on the insulating layer 7 having small irregularities.

  Further, the invention of claim 2 is that in claim 1, the protrusion 8 surrounding the portion where the insulating layer 7 is formed is formed in the insulating base 1 and the suction hole 9 opened at the top of the protrusion 8 is formed. Insulating with the thickness of the height of the projection 8 by filling the inside of the projection 8 with the liquid insulating material 6 and sucking and removing the insulating material 6 exceeding the height of the projection 8 through the suction hole 9. The layer 7 is formed.

  According to the present invention, the insulating layer 7 can be formed with the same thickness as the height of the protruding portion 8, and the insulating layer 7 can be formed with high thickness accuracy, so that the interlayer insulation performance of the circuit 11 can be increased. It is.

  The invention of claim 3 is characterized in that, in claim 1 or 2, an insulating substrate 1 having a surface provided with a protrusion 10 is used.

  According to the present invention, the insulating layer 7 can be formed around the protrusion 10, and the protrusion 10 can act as an anchor to prevent the insulating layer 7 from being delaminated.

  According to a fourth aspect of the present invention, in any one of the first to third aspects, a liquid material is used as the insulating material 6, and the insulating material 6 is applied to the insulating base material 1 and then the insulating base material 1 is used. The insulating layer 7 is formed by sonic-vibrating and thereafter curing the insulating material 6.

  According to this invention, the insulating material 6 can be surely permeated into a narrow gap between the circuit unit 3 and the non-circuit unit 4, and the circuit 11 of the circuit unit 3 and the plating base layer 2 of the non-circuit unit 4 and The insulation between the plating layers 5 can be reliably ensured by the insulation layer 7.

  A multilayer circuit board according to a fifth aspect of the present invention is manufactured by the method according to any one of the first to fourth aspects.

  According to the present invention, a multilayer circuit board on which the circuit 11 is formed with high accuracy can be obtained.

  According to the present invention, the circuit 11 can be formed with a predetermined thickness in the circuit portion 3, and the non-circuit portion 4 can be formed with a layer including the plating base layer 2 and the plating layer 5 with the same thickness. . For this reason, there is no difference in height between the insulating layer 7 formed in the circuit portion 3 and the insulating layer 7 formed in the non-circuit portion 4, and the unevenness of the insulating layer 7 can be reduced. In addition, the process of polishing and flattening the surface of the insulating layer 7 becomes unnecessary, and the circuit 11 can be formed with high accuracy on the insulating layer 7 having small unevenness. In particular, the effect of the present invention is significant in a three-dimensional circuit board that cannot be polished.

  Hereinafter, the best mode for carrying out the present invention will be described.

  In the present invention, any material such as a flat substrate can be used as the insulating substrate 1, but in the present invention, for example, by injecting a molten resin into a mold having a cavity having a surface with irregularities. The obtained three-dimensional substrate having a three-dimensional surface can be used (FIG. 1 shows a flat substrate). For example, PPA (aromatic polyamide) is used as the resin, and the insulating base material 1 can be molded under conditions of a cylinder temperature of 300 to 350 ° C., a mold temperature of 100 to 200 ° C., and an injection speed of 2 to 80 cc / sec.

  First, the plating base layer 2 is formed on the surface of the insulating substrate 1 as shown in FIG. The plating underlayer 2 can be formed by sputtering of a metal such as copper, and the thickness is preferably about 0.1 to 1 μm. If the plating base layer 2 is formed of copper in this way, when an electromagnetic wave such as a laser is applied to the boundary between the circuit part 3 and the non-circuit part 4 as described later, the vicinity of the part irradiated with the electromagnetic wave is oxidized. It becomes non-conductive and can improve the insulation between the circuit portion 3 and the non-circuit portion 4.

  Next, an electromagnetic wave L such as a laser is irradiated to a boundary region between the circuit portion 3 which is a portion where the circuit 11 is formed on the surface of the insulating substrate 1 and the non-circuit portion 4 which is a portion where the circuit 11 is not formed. As shown in FIG. 1B, the plating base layer 2 at the boundary between the circuit portion 3 and the non-circuit portion 4 is removed. When a laser is used as the electromagnetic wave, when the plating base layer 2 is a copper film, it is preferable to use an SHG-YAG laser (wavelength: 532 nm) capable of removing copper, and the laser irradiation conditions are, for example, an output of 3 W and a pulse number Three shots and an irradiation time of 0.1 seconds can be set. The irradiation of the electromagnetic wave L is performed while scanning along the outer shape of the pattern of the circuit 11 to be formed, that is, along the contour of the circuit unit 3. The plating base layer 2 is removed only at the contour portion, and the plating base layer 2 at portions other than the contour portion of the circuit portion 3 is left. The width for removing the plating base layer 2 at the boundary between the circuit portion 3 and the non-circuit portion 4 is preferably set to a narrow width of about 50 to 200 μm.

  Next, by performing electroplating by immersing the insulating substrate 1 in an electroplating bath such as a copper plating bath while energizing the plating base layer 2 of the circuit portion 3 and the plating base layer 2 of the non-circuit portion 4 respectively. As shown in FIG. 1C, the plating layer 5 is deposited on the plating base layer 2 of the circuit portion 3 and on the plating base layer 2 of the non-circuit portion 4. The plating layers 5 are preferably formed with a thickness of about 10 μm. Thus, by providing the plating layer 5 on the plating base layer 2 of the circuit portion 3, the circuit 11 having a thickness can be formed. The non-circuit portion 4 also has a metal layer 20 composed of the plating base layer 2 and the plating layer 5, but there is a gap between the metal layer 20 and the circuit 11, so the circuit 11 is completely connected to the metal layer 20. Is insulated.

  In this way, the first-layer circuit 11 can be formed in the circuit portion 3 of the insulating substrate 1. In forming a second layer circuit 11 thereon, a liquid insulating material 6 made of an insulating resin such as polyimide is first formed on the circuit portion 3 and the non-circuit portion 4 as shown in FIG. The insulating layer 7 that covers the circuit 11 of the circuit portion 3 and the metal layer 20 of the non-circuit portion 4 is formed by dropping from the nozzle 15 onto the substrate 15 and extending and curing the insulating material 6 by spin coating or the like, as shown in FIG. Form as follows. The insulating layer 7 can also be formed by depositing an insulating material 6 such as polyimide by vapor deposition. The insulating layer 7 is formed with a thickness that completely covers the circuit 11 of the circuit portion 3 and the metal layer 20 of the non-circuit portion 4, and at least a thickness of 5 μm is necessary.

  Here, a thick circuit 11 exists in the circuit portion 3, but the non-circuit portion 4 also includes the metal layer 20 including the plating base layer 2 and the plating layer 5 having the same thickness as the circuit 11. No difference in height occurs between the insulating layer 7 formed on the insulating layer 7 and the insulating layer 7 formed on the non-circuit portion 4, and the surface of the insulating layer 7 is large as shown in FIG. Unevenness will not occur. Between the circuit 11 of the circuit unit 3 and the metal layer 20 of the non-circuit unit 4, there is a gap whose bottom surface becomes the surface of the insulating base material 1, but since this gap is very narrow, the surface of the insulating layer 7 is large. There is no unevenness. Therefore, it is unnecessary to polish and flatten the surface after forming the insulating layer 7.

  After forming the insulating layer 7 as described above, the insulating layer 7 is drilled by laser irradiation or the like at the position of the first-layer circuit 11 so that the diameter reaching the first-layer circuit 11 is 0.2-0. A via hole 17 of about 6 mmφ is formed as shown in FIG. Next, the plating base layer 2 including the inner peripheral surface of the via hole 17 is formed on the insulating layer 7 as shown in FIG. The plating underlayer 2 can be formed by sputtering copper as described above, and the thickness is preferably about 0.1 to 1 μm. After that, the electromagnetic wave L such as a laser is irradiated along the boundary between the circuit unit 3 and the non-circuit unit 4 forming the second layer circuit 11, and the circuit as shown in FIG. The plating base layer 2 at the boundary between the part 3 and the non-circuit part 4 is removed, and electroplating is performed in the same manner as described above, and the plating base layer 2 of the non-circuit part 4 and the plating base layer 2 of the non-circuit part 4 A plating layer 5 having a thickness of about 10 μm is formed on the substrate. By providing the plating layer 5 on the plating base layer 2 of the circuit portion 3 in this manner, the second-layer circuit 11 that is conductively connected to the first-layer circuit 11 and the via hole 17 as shown in FIG. Can be formed on the insulating layer 7. The non-circuit portion 4 also has a metal layer 20 composed of the plating base layer 2 and the plating layer 5, but there is a gap between the metal layer 20 and the second-layer circuit 11. 11 is completely insulated from the metal layer 20.

  In forming the second layer circuit 11 on the insulating layer 7 in this way, the insulating layer 7 is formed on a flat surface without large irregularities as described above. The circuit 11 can be formed with high accuracy. Further, by repeating the steps of FIGS. 1D to 2D, the circuit 11 can be formed in three or more layers.

  FIG. 3 shows another embodiment of the present invention, in which a frame-like projection 8 is integrally projected on the surface on the upper surface side of the insulating substrate 1. A frame-shaped damming projection 21 is provided on the outer periphery. The protrusion 8 is provided with a suction hole 9 that opens between the upper surface thereof and the lower surface of the insulating substrate 1. Then, the plating base layer 2 is formed on the surface of the insulating base material 1 by sputtering in the same manner as described above, and then an electromagnetic wave such as a laser along the boundary between the circuit portion 3 and the non-circuit portion 4 in the same manner as described above. L is irradiated, and the plating base layer 2 at the boundary between the circuit portion 3 and the non-circuit portion 4 is removed as shown in FIG. Further, in the same manner as described above, electroplating is performed on the plating base layer 2 of the circuit portion 3 and the plating base layer 2 of the non-circuit portion 4 to form a plating layer 5, as shown in FIG. As described above, the first circuit 11 including the plating base layer 2 and the plating layer 5 is formed on the circuit portion 3, and the metal layer 20 including the plating base layer 2 and the plating layer 5 is formed on the non-circuit portion 4. Thereafter, the liquid insulating material 6 is injected from the nozzle 15 into the inner side surrounded by the protrusions 8 as shown in FIG. The filling amount of the insulating material 6 is preferably set so that the liquid level of the insulating material 6 exceeds the upper surface of the protrusion 8 and is lower than the height of the damming protrusion 21. Next, when suction is performed from the opening at the lower end of the suction hole 9 with a suction force of a vacuum pressure of about 0.01 MPa, a portion of the insulating material 6 filled on the inner side surrounded by the protrusion 8 exceeds the upper surface of the protrusion 8. It is discharged through the suction hole 9 as shown by the arrow in FIG. 3C, and the liquid level of the insulating material 6 becomes equal to the upper surface of the protrusion 8. Then, the insulating layer 7 can be formed by curing the insulating material 6 thereafter.

  Here, the portion of the insulating material 6 that exceeds the upper surface of the protruding portion 8 is discharged through the suction hole 9, so that the thickness of the insulating layer 7 is equal to the height of the protruding portion 8. It can be formed with high thickness accuracy. Thereafter, the second and subsequent circuits 11 can be formed in the same manner as described above. That is, a via hole 17 is formed in the insulating layer 7 at the position of the first layer circuit 11 in the same manner as described above, and after the plating base layer 2 including the inner peripheral surface of the via hole 17 is formed on the insulating layer 7, two layers are formed. An electromagnetic wave such as a laser is irradiated along the boundary between the circuit part 3 and the non-circuit part 4 forming the circuit 11 of the eye to remove the plating base layer 2 at the boundary between the circuit part 3 and the non-circuit part 4, and By providing the plating layer 5 on the plating base layer 2 of the circuit unit 3 and the plating base layer 2 of the non-circuit unit 4 by performing electroplating, as shown in FIG. Thus, the second-layer circuit 11 that is conductively connected to the first-layer circuit 11 through the via hole 17 can be formed.

  The embodiment shown in FIG. 4 is an improved form of the embodiment shown in FIG. 3, and uses the insulating base material 1 having the protrusions 8 provided with the suction holes 9 as described above. 3A, 3B, and 3C, after forming the plating base layer 2, the electromagnetic wave is irradiated along the boundary between the circuit portion 3 and the non-circuit portion 4, and the circuit portion 3 and the non-circuit portion 3 are not exposed. A plating layer 5 is provided on the plating base layer 2 of the circuit part 4 to form a circuit on the first circuit 11 and the metal layer 20, and the insulating material 6 is filled inside the protrusion 8 and sucked from the suction hole 9. After that, the insulating material 6 is cured to form the insulating layer 7, and the circuit 11 of the circuit portion 3 and the metal layer 20 of the non-circuit portion 4 are covered with the insulating layer 7. Then, as shown in FIG. 4A, via holes 17 having a diameter of about 0.6 mm are formed in the insulating layer 7 at the position of the first circuit 11 in the same manner as described above. The via hole 17 can be formed by laser irradiation as described above. Thereafter, the entire surface of the insulating substrate 1 is sputtered to form the plating base layer 2 on the surface of the insulating layer 7 including the inner peripheral surface of the via hole 17. When the entire surface of the insulating base material 1 is thus sputtered, the plating base layer 2 is also formed on the inner periphery of the upper portion of the suction hole 9 opened on the upper surface of the protrusion 8 as shown in FIG. It is formed.

  Then, after irradiating the plating base layer 2 with an electromagnetic wave along the boundary between the circuit unit 3 and the non-circuit unit 4 forming the second layer circuit 11, each plating base layer 2 of the circuit unit 3 and the non-circuit unit 4 is used. 4 is immersed in an electroplating bath such as a copper plating bath to form a plating layer 5 having a thickness of about 20 μm on each plating base layer 2 of the circuit portion 3 and the non-circuit portion 4 as shown in FIG. c). When electroplating is performed in this way, the plating base layer 2 is also attached to the inner periphery of the via hole 17 and the upper periphery of the suction hole 9, so that the plating is also performed in the via hole 17 and the upper portion of the suction hole 9. Is deposited and filled with the plating layer 5. Therefore, the upper part of the suction hole 9 can be closed with the plating layer 5 as shown in FIG. 4C by plating for forming the circuit 11 of the second layer. In order to form the third layer circuit 11, it is necessary to fill the insulating material 6 on the second layer circuit 11 to form the insulating layer 7, but the suction hole 9 is blocked by the plating layer 5. Therefore, it is possible to prevent the filled insulating material 6 from leaking out from the suction hole 9, and the suction hole 9 does not hinder the formation of the second and subsequent insulating layers 7. It becomes easy to make.

  FIG. 5 shows another embodiment of the present invention, in which protrusions 10 are provided on the surface of the insulating substrate 1. Although it is preferable to provide a large number of protrusions 10 over the entire surface of the insulating base material 1, FIG. 5 shows only a portion where one protrusion 10 is provided. First, sputtering is performed on the surface of the insulating base material 1 in the same manner as described above, and the plating base layer 2 is formed on the entire surface including the upper surface and side surfaces of the protrusion 10 as shown in FIG. Next, an electromagnetic wave such as a laser is irradiated along the boundary between the circuit portion 3 and the non-circuit portion 4 forming the first layer circuit 11 to remove the plating base layer 2 at the boundary, and Similarly, electroplating is performed on the plating base layer 2 of the circuit part 3 and the plating base layer 2 of the non-circuit part 4 to form a plating layer 5, as shown in FIG. A first layer circuit 11 composed of the plating base layer 2 and the plating layer 5 is formed on the circuit part 3, and a metal layer 20 composed of the plating base layer 2 and the plating layer 5 is formed on the protrusion 10 serving as the non-circuit part 4. To do.

  After forming the first layer circuit 11 in the circuit portion 3 of the insulating base material 1 in this way, when forming the second layer circuit 11 on this, first, as shown in FIG. An insulating layer 7 is formed so as to cover the first circuit 11 of the circuit portion 3 around the circuit 10. The formation of the insulating layer 7 can be performed in the same manner as described above. Then, via holes 17 are formed in the insulating layer 7 at the position of the circuit 11 in the first layer in the same manner as described above, and the entire surface including the inner periphery of the via holes 17 is sputtered to form the plating base layer 2 as shown in FIG. To do. Thereafter, electromagnetic wave is irradiated along the boundary between the circuit portion 3 and the non-circuit portion 4 forming the second layer circuit 11 to remove the plating base layer 2 at the boundary, and the plating base layer 2 of the circuit portion 3 is further removed. By providing electroplating on the plating base layer 2 of the non-circuit portion 4 and providing the plating layer 5, the circuit portion 3 is electrically connected to the circuit portion 3 through the via hole 17 as shown in FIG. The second layer circuit 11 can be formed. In the case of forming the circuit 11 after the third layer, the insulating layer 7 is formed on the circuit 11 around the protrusion 10, and thereafter, the circuit is formed by the same process as described above. Is.

  When the insulating base material 1 provided with the protrusions 10 is used as described above, the insulating layer 7 is formed of the protrusions 10 protruding on the surface of the insulating base material 1 as seen in FIGS. Protrusions 10 are formed around the insulating layer 7 like a wedge, and the insulating layer 7 is not only on the surface of the insulating substrate 1 or the surface of the circuit 11 but also on the outer periphery of the protrusion 10. It is glued. Therefore, the anchoring action by the outer peripheral portion of the protrusion 10 being adhered to the insulating layer 7 can improve the adhesive strength of the insulating layer 7 and prevent the insulating layer 7 from delamination.

  Here, as in each of the above-described embodiments, the liquid insulating material 6 is supplied to the insulating substrate 1 and the insulating material 6 is cured to form the insulating layer 7. After supplying 6, it is preferable to ultrasonically vibrate the insulating substrate 1 using an ultrasonic vibration device or the like. The gap between the circuit 11 of the circuit portion 3 and the metal layer 20 of the non-circuit portion 4 is narrow, and the insulating material 6 formed of a liquid resin is difficult to enter the gap, resulting in poor filling. If there is such a filling defect, there is a possibility that the insulating layer 7 cannot secure insulation between the circuit 11 of the circuit unit 3 and the metal layer 20 of the non-circuit unit 4. Therefore, the insulating substrate 1 is ultrasonically vibrated after the liquid insulating material 6 is supplied, so that the liquid insulating material 6 is placed between the circuit 11 of the circuit unit 3 and the metal layer 20 of the non-circuit unit 4. It penetrates into a narrow gap to prevent the occurrence of poor filling, and the insulating layer 7 ensures the insulation between the circuit 11 of the circuit part 3 and the metal layer 20 of the non-circuit part 4 with certainty. It is something that can be done. The ultrasonic vibration is preferably performed for about 2 minutes at a frequency of about 60 kHz.

  In each of the above embodiments, the metal layer 20 of the non-circuit portion 4 is not conductively connected to the circuit 11 of the circuit portion 3 and is formed as a so-called dummy circuit that does not have a function as a circuit. Since the metal layer 20 is disposed on the entire surface of the insulating substrate 1, the metal layer 20 can be used as a high-frequency shield layer. In this case, high-frequency shielding characteristics of the metal layer 20 can be obtained by electrically connecting the plating base layers 2 of the non-circuit portion 4 to each other. In addition, the metal layer 20 can be used as a power supply circuit, a ground circuit, or the like.

An example of embodiment of this invention is shown, (a)-(e) is sectional drawing of each process, respectively. An example of embodiment of this invention is shown and (a)-(d) is sectional drawing of each process, respectively. An example of other embodiment of this invention is shown, (a)-(d) is sectional drawing of each process, respectively. An example of other embodiment of this invention is shown, (a)-(c) is sectional drawing of each process, respectively. An example of other embodiment of this invention is shown, (a)-(e) is sectional drawing of each process, respectively. It shows a conventional example, (a), (c), (d) is a sectional view, respectively, (b) is a sectional view and a plan view. A prior art example is shown, (a)-(d) is sectional drawing of each process, respectively. A prior art example is shown, (a)-(d) is sectional drawing of each process, respectively.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulating base material 2 Plating underlayer 3 Circuit part 4 Non-circuit part 5 Plating layer 6 Insulating material 7 Insulating layer 8 Protruding part 9 Suction hole 10 Protruding 11 Circuit

Claims (5)

  A step of forming a plating base layer on the surface of the insulating base or the insulating layer described later, and a plating base layer at the boundary between the circuit portion and the non-circuit portion by irradiating electromagnetic waves along the boundary between the circuit portion and the non-circuit portion And forming a plating layer by plating each of the plating base layer in the circuit part and the plating base layer remaining in the non-circuit part, thereby forming a circuit composed of the plating base layer and the plating layer in the circuit part. And a step of forming an insulating layer by depositing an insulating material on the plating layer of the circuit portion and the non-circuit portion.   Protrusions that surround the part where the insulating layer is to be formed are formed in the insulating base material, suction holes are formed at the tops of the projecting parts, a liquid insulating material is filled inside the projecting parts, and the height of the projecting parts is increased. 2. The method of manufacturing a multilayer circuit board according to claim 1, wherein an insulating layer having a thickness as high as the protrusion is formed by sucking and removing an insulating material exceeding the thickness through a suction hole.   The method for producing a multilayer circuit board according to claim 1 or 2, wherein an insulating substrate having a protrusion on its surface is used.   A liquid material is used as an insulating material, the insulating material is adhered to the insulating base material, the insulating base material is ultrasonically vibrated, and then the insulating material is cured to form an insulating layer. A method for manufacturing a multilayer circuit board according to any one of claims 1 to 3. A multilayer circuit board manufactured by the method according to any one of claims 1 to 4.

Images