JP2005157344A - Dry etching method and diffraction type optical component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dry etching method whose etching rate is made stable and a diffraction type optical component manufactured by using the dry etching method. <P>SOLUTION: Disclosed is the dry etching method in which dry etching is carried out while a conductor 6 on which an insulating substrate 4 is stuck is brought into electric contact with an electrode 7. The drying method is characterized in that the insulating substrate 4 and conductor 6 are stuck by using conductive grease 50. Further, disclosed is the diffraction optical component which is manufactured by using the dry etching method. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a dry etching method and a diffractive optical element (DOE), and more particularly, to a dry etching method with a stable etching rate and a DOE manufactured using the method.

  In recent years, electronic components and devices used in mobile phones, personal computers, and the like have been miniaturized, and increasingly finer and faster drilling is required. The DOE is a key device that satisfies this requirement. Unlike conventional optical components that use refraction and reflection, DOE is an optical component that can be expected to have a wide range of application fields, such as multipoint spectroscopic functions, by using the light diffraction phenomenon and directly controlling the phase. Become. As an application example of DOE, there is an application example as a laser optical component. This is to realize high speed of fine drilling by irradiating a DOE with one processing laser beam, branching the laser beam into multiple points, and simultaneously opening a plurality of holes.

  In the manufacture of DOE, a dry etching method capable of making a fine hole with high accuracy is used. FIG. 4 shows a schematic diagram of an example of a dry etching apparatus used in a conventional dry etching method. In the drawings of the present application, the same reference numerals denote the same or corresponding parts. This dry etching apparatus includes an RF power source 1a, 1b, an ICP coil 2, a chamber 3, a conductor 6 made of a conductive Si wafer, an electrode 7 cooled by He gas or the like, and a blocking capacitor 8. Including. Then, the insulating substrate 4 which is a raw material of the DOE is attached to the conductor 6 using the vacuum grease 5, and the conductor 6 and the cooled electrode 7 are electrically in close contact with each other in the chamber 3. Installed.

  Gas is supplied into the chamber 3, and positive ions in the plasma 9 generated by applying high-frequency power by the RF power sources 1 a and 1 b are insulated by a strong electric field in the sheath region 10 generated above the insulating substrate 4. The insulating substrate 4 is dry etched by colliding with the surface of the substrate 4.

  In dry etching, the temperature of the insulating substrate rises due to collisions of positive ions with the insulating substrate and chemical reactions. Therefore, when a photoresist is used as a mask for the insulating substrate, the photoresist is baked due to a rise in temperature of the insulating substrate, making it impossible to remove the photoresist. Will occur. Therefore, as shown in FIG. 4, the insulating substrate 4 is attached to the conductor 6 using the vacuum grease 5, and the conductor 6 is electrically adhered to the cooled electrode 7 by electrostatic adsorption or the like. The entire insulating substrate 4 is uniformly cooled through the body 6 to suppress an increase in the temperature of the insulating substrate 4.

However, this conventional dry etching method has a problem that the etching rate is not stable. In addition, it is preferable to dry-etch a plurality of insulating substrates simultaneously from the viewpoint of efficiency, but there is a problem that the etching rate between the insulating substrates varies and the etching depth of the insulating substrates also varies. It was.
JP-A-63-31726 JP-A-5-136253

  When the inventor examined the relationship between the thickness of the vacuum grease and the sheath voltage using the dry etching apparatus shown in FIG. 4, as shown in FIG. 1, the sheath voltage decreases as the thickness of the vacuum grease increases. It has been found. Therefore, in order to stabilize the etching rate, it is necessary to precisely align the thickness of the vacuum grease installed between the insulating substrate and the conductor every time the DOE is manufactured. Also, when dry etching multiple insulating substrates at the same time, the thickness of the vacuum grease installed between the insulating substrate and the conductor must be precisely aligned so that there is no difference between the insulating substrates. was there. In FIG. 1, the horizontal axis indicates the thickness of the vacuum grease, and the vertical axis indicates the ratio of the sheath voltage to the voltage input into the chamber. Here, it is assumed that the capacity change accompanying the increase in the thickness of the vacuum grease is compensated by the blocking capacitor so that the capacity of the entire system is kept constant.

  In addition, a method of suppressing an increase in temperature of the insulating substrate by pressing the insulating substrate against the cooled electrode with a clamp is also conceivable. However, this method has a problem that the insulating substrate is deformed, the insulating substrate is damaged, and the configuration of the dry etching apparatus is complicated.

  An object of the present invention is to provide a dry etching method with a stable etching rate and a DOE manufactured using the dry etching method.

  The present invention relates to a dry etching method for performing dry etching by electrically contacting a conductor with an insulating substrate attached thereto with an electrode, and the insulating substrate and the conductor are attached with conductive grease. This is a dry etching method.

  Here, the dry etching method of the present invention is preferably performed using at least one selected from the group of ICP plasma, CCP plasma, ECR plasma, and NLD plasma.

  In the dry etching method of the present invention, the insulating substrate is preferably made of ZnSe polycrystal.

Further, in the dry etching method of the present invention, the insulating substrate is preferably made of SiO _2.

  In the dry etching method of the present invention, it is preferable that a photoresist is formed on the surface of the insulating substrate.

  In the dry etching method of the present invention, a plurality of insulating substrates can be simultaneously dry etched.

  Furthermore, this invention is DOE manufactured using said dry etching method.

  Since the etching rate can be stabilized according to the dry etching method of the present invention, a high quality DOE is manufactured with good reproducibility by using the dry etching method of the present invention and managing the dry etching time. Will be able to. In addition, according to the dry etching method of the present invention, even when a plurality of insulating substrates are simultaneously dry etched, variation in etching rate between insulating substrates can be suppressed. Variation in thickness can also be suppressed.

  The present invention relates to a dry etching method for performing dry etching by electrically contacting a conductor with an insulating substrate attached thereto with an electrode, and the insulating substrate and the conductor are attached with conductive grease. This is a dry etching method.

  The inventor has focused on the fact that the sheath voltage generated in the sheath region that affects the stability of the etching rate varies depending on the thickness of the vacuum grease between the insulating substrate and the conductor.

  That is, as shown in the schematic diagram of FIG. 2, the present inventor reduces the voltage applied to the conductive grease 50 to such an extent that the conductive grease 50 is substantially eliminated by using the conductive grease 50 instead of the vacuum grease. Even when the thickness fluctuated, the sheath voltage did not fluctuate, and the stability of the etching rate of the insulating substrate 4 was successfully improved.

  Here, the conductive grease is a paste-like substance that generates a direct current when an electrostatic field is applied. From the viewpoint of improving the stability of the etching rate, the resistivity of the conductive grease is preferably 100 Ω · cm or less, and more preferably 50 Ω · cm or less. An insulating substrate refers to a substrate that generates dielectric polarization when an electrostatic field is applied but does not generate a direct current.

  The dry etching method of the present invention is preferably performed using at least one selected from the group of ICP plasma, CCP plasma, ECR plasma, and NLD plasma. In this case, since fine and highly anisotropic dry etching is possible, a higher quality DOE tends to be manufactured. Here, the ICP plasma is an inductively coupled plasma, and is a plasma generated by applying high frequency power to the ICP coil. The CCP plasma is a capacitively coupled plasma, which is a plasma generated by an electrostatic field generated by charges on the electrodes. The ECR plasma is an electron cyclotron resonance plasma, which is a plasma generated by applying an alternating electric field to electrons and positive ions that are in cyclotron motion in a magnetic field. The NLD plasma is a magnetic neutral line discharge plasma, which is a plasma generated along a loop of a magnetic neutral point where the magnetic field becomes zero.

  Here, an example of the mechanism of the dry etching method of the present invention will be described. First, an insulating substrate is placed on a conductor on an electrode in the chamber via conductive grease. Next, an etching gas is introduced into the chamber, high frequency power is applied to the chamber to generate a plasma of the etching gas, and active species and positive ions are generated. At this time, a strong electric field sheath region is formed above the insulating substrate. Then, the active species chemically reacts with the insulating substrate to generate a secondary product, and the secondary product is sputtered by positive ions accelerated by the electric field in the sheath region, so that the etching of the insulating substrate proceeds. Therefore, for example, when a plurality of insulating substrates are simultaneously dry-etched, the sheath voltage does not fluctuate even if the thickness of the conductive grease under each insulating substrate is different. Can be suppressed.

  The insulating substrate used in the dry etching method of the present invention is preferably made of ZnSe polycrystal. This is because the ZnSe polycrystal has good infrared light transmission, so that the DOE made of ZnSe polycrystal is suitably used for processing electronic components using a carbon dioxide laser that emits infrared light.

The insulating substrate used in the dry etching method of the present invention is preferably made of SiO ₂ such as synthetic quartz. This is because the DOE made of SiO ₂ is suitably used for processing electronic components using a YAG laser (fundamental wave, second harmonic, third harmonic, or fourth harmonic).

  In addition, it is preferable that a photoresist having a hole in a portion corresponding to a portion where dry etching is performed is formed on the surface of the insulating substrate used in the dry etching method of the present invention. In this case, it is because there exists a tendency which can manufacture high quality DOE by carrying out dry etching only of the part of the hole opened by the photoresist.

  When the insulating substrate is dry-etched using the dry etching method of the present invention, a high-quality DOE having an etching groove with a predetermined depth can be manufactured with good reproducibility. The surface of the DOE can be coated with a substance that suppresses reflection of light.

Example 1
The insulating substrate 4 made of synthetic quartz was etched by ICP plasma using the dry etching apparatus shown in FIG.

  First, a photoresist having a hole in a predetermined shape was formed on the surface of a disc-shaped insulating substrate 4 (diameter: 50 mm, thickness: 5 mm) made of synthetic quartz.

  Next, a conductive body 6 made of a conductive Si wafer is placed on the electrode 7 of the dry etching apparatus shown in FIG. 2, and conductive grease 50 (resistivity: 49 Ω · cm, manufactured by Shin-Etsu Silicone Co., Ltd.) in which carbon is mixed with silicone oil. The insulating substrate 4 was pasted on the conductor 6 by KS660 ").

Then, the chamber 3 was evacuated until the pressure in the chamber 3 reached about 10 ⁻⁵ Pa, and CHF ₃ (flow rate: 5 sccm) and Ar (flow rate: 70 sccm) were introduced into the chamber 3. Subsequently, the depth of the etching groove is reduced by the plasma 9 generated by applying high-frequency power to the RF power supplies 1a and 1b (ICP power: 200 W, RF power: 300 W) while the pressure in the chamber 3 is 1 Pa. Dry etching was performed for 17 times (batch Nos. 1 to 17) of the insulating substrates 4 one by one so as to be 1 μm for the same time. The result is shown in FIG. In FIG. 3, the horizontal axis indicates the batch number of the insulating substrate. 1 to 17, and the vertical axis represents the difference (etching depth accuracy) between the target etching groove depth of 1 μm and the actual etching groove depth.

  As shown in FIG. 3, in Example 1 using the conductive grease 50, it was found that the etching depth accuracy was within 10 nm and the etching rate was stable. In addition, it can be seen that the temperature of the insulating substrate 4 during the dry etching is between 93 ° C. and 121 ° C., and is cooled compared to a temperature of 171 ° C. or higher when the insulating substrate 4 is not cooled. It was. Further, the photoresist on the surface of the insulating substrate 4 could be easily peeled off by applying acetone after the dry etching.

(Comparative Example 1)
Using a dry etching apparatus shown in FIG. 4, vacuum grease 5 (resistivity: 10 ¹⁴ Ω · cm, manufactured by Toray Dow Corning Silicone Co., Ltd., “H” manufactured by mixing fine powdered silica with dimethyl silicone oil instead of conductive grease. V.G ") in the same manner as in Example 1 except that the batch No. The insulating substrate 4 made of synthetic quartz 1 to 13 was dry-etched. The result is shown in FIG. As shown in FIG. 3, in Comparative Example 1 using vacuum grease, it was found that the etching depth accuracy was 100 nm or more, and the etching rate was not stable as compared with Example 1.

(Example 2)
As shown in FIG. 5 (A), three insulating substrates 4 (A to C) made of synthetic quartz were placed on the conductor 6 made of a conductive Si wafer shown in FIG. Here, as shown in FIG. 5B, each of the three insulating substrates 4 passes through conductive grease 50 (resistivity: 49 Ω · cm, Shin-Etsu Silicone “KS660”) in which carbon is mixed with silicone oil. It was installed on the conductor 6. The three insulating substrates 4 (A to C) each had a diameter of 50 mm and a thickness of 5 mm.

  Thereafter, in the same manner as in Example 1, the insulating substrate 4 (A to C) was dry-etched. And the depth of the etching groove | channel of each insulating board | substrate 4 (A-C) after dry etching was measured. Table 1 shows the depth of the etching groove measured in Example 2.

  Here, in Example 2, dry etching was performed so that the depths of the etching grooves of the three insulating substrates 4 (A to C) were 1200 nm, respectively. The dry etching and the measurement of the depth of the etching groove were each performed 6 times. Batch No. of Example 2 in Table 1 1 to 6 represent the dry etching of each of the six dry etchings. Numerical values below 1 to 6 represent the depths of the respective etching grooves of the three insulating substrates A to C in each dry etching.

(Comparative Example 2)
Except for using vacuum grease (resistivity: 10 ¹⁴ Ω · cm, “HVG” manufactured by Toray Dow Corning Silicone Co., Ltd.) in which dimethyl silicone oil is mixed with fine powder silica instead of conductive grease In the same manner as in Example 2, three insulating substrates 4 (A to C) made of synthetic quartz were dry-etched. And the depth of each etching groove | channel of the insulating board | substrate 4 (A-C) was measured like Example 2. FIG. Table 1 shows the etching groove depth measured in Comparative Example 2.

  Here, in Comparative Example 2, the dry etching and the measurement of the depth of the etching groove were each performed twice. Batch No. of Comparative Example 2 in Table 1. 1 and 2 represent the dry etching of each of the two dry etchings. Numerical values below 1 and 2 represent the depths of the respective etching grooves of the three insulating substrates A to C in each dry etching.

  As shown in Table 1, in the dry etching in Example 2 using conductive grease, compared to the dry etching in Comparative Example 2 using vacuum grease, the etching groove depth of the insulating substrate (A to C) It was confirmed that the variation could be reduced.

(Example 3)
As shown in FIG. 6A, 19 insulating substrates 4 (A to S) made of synthetic quartz were placed on the conductor 6 made of a conductive Si wafer shown in FIG. Here, as shown in FIG. 6B, each of the 19 insulating substrates 4 (A to S) is made of conductive grease 50 (resistivity: 49 Ω · cm, manufactured by Shin-Etsu Silicone, “KS660”, in which carbon is mixed with silicone oil. ”) On the conductor 6. The 19 insulating substrates 4 (A to S) each had a diameter of 20 mm and a thickness of 3 mm.

  Thereafter, in the same manner as in Example 1, the insulating substrate 4 (A to S) was dry-etched. And the depth of the etching groove | channel of each insulating board | substrate 4 (A-S) after dry etching was measured. Table 2 shows the depth of the etching groove measured in Example 3.

  Here, in Example 3, dry etching was performed so that the depth of the etching grooves of the 19 insulating substrates 4 (A to S) was 1200 nm, respectively. The dry etching and the measurement of the depth of the etching groove were each performed twice. Batch No. of Example 3 in Table 2. 1 and 2 represent the dry etching of each of the two dry etchings. The numerical value below 1-2 represents the depth of each etching groove of 19 insulating substrates A to S in each dry etching.

(Comparative Example 3)
Except for using vacuum grease (resistivity: 10 ¹⁴ Ω · cm, “HVG” manufactured by Toray Dow Corning Silicone Co., Ltd.) in which dimethyl silicone oil is mixed with fine powder silica instead of conductive grease In the same manner as in Example 3, 19 insulating substrates 4 (A to S) made of synthetic quartz were dry-etched. Then, the depth of each etching groove of the insulating substrate 4 (A to S) was measured in the same manner as in Example 3. Table 2 shows the etching groove depth measured in Comparative Example 3.

  Here, in Comparative Example 3, the dry etching and the measurement of the depth of the etching groove were performed once. Batch No. of Comparative Example 3 in Table 2. 1 represents the one dry etching, and batch No. 1 in Table 2 is shown. The numerical value below 1 represents the depth of each etching groove of the 19 insulating substrates A to S.

  As shown in Table 2, in the dry etching in Example 3 using conductive grease, variation in the depth of the etching groove of the insulating substrate can be reduced as compared with the dry etching in Comparative Example 3 using vacuum grease. I was able to confirm.

(Example 4)
As shown in FIG. 7A, four insulating substrates 4 (A to D) made of ZnSe polycrystal were placed on the conductor 6 made of a conductive Si wafer shown in FIG. Here, as shown in FIG. 7B, each of the four insulating substrates 4 (A to D) is made of conductive grease 50 (resistivity: 49 Ω · cm, manufactured by Shin-Etsu Silicone, “KS660”, which contains carbon in silicone oil. ”) On the conductor 6. The four insulating substrates 4 (A to D) each had a diameter of 50 mm and a thickness of 5 mm.

Then, the chamber 3 was evacuated until the pressure in the chamber 3 reached about 10 ⁻⁵ Pa, and BCl ₃ (flow rate: 10 sccm) and Ar (flow rate: 20 sccm) were introduced into the chamber 3. Subsequently, four insulating substrates are generated by plasma 9 generated by applying high-frequency power to the RF power supplies 1a and 1b (ICP power: 200 W, RF power: 300 W) while the pressure in the chamber 3 is 3 Pa. 4 (A to D) was dry-etched. And the depth of the etching groove | channel of each insulating board | substrate AD after dry etching was measured. Table 3 shows the etching groove depths measured in Example 4.

  Here, in Example 4, dry etching was performed so that the depths of the etching grooves of the four insulating substrates 4 (A to D) were 3800 nm, respectively. Further, the dry etching and the measurement of the depth of the etching groove were each performed three times. Batch No. of Example 4 in Table 3 1 to 3 represent the dry etching of each of the three dry etchings. Numerical values below 1 to 3 represent the depths of the respective etching grooves of the four insulating substrates A to D in each dry etching.

(Comparative Example 4)
Except for using vacuum grease (resistivity: 10 ¹⁴ Ω · cm, “HVG” manufactured by Toray Dow Corning Silicone Co., Ltd.) in which dimethyl silicone oil is blended with fine powder silica instead of conductive grease In the same manner as in Example 4, four insulating substrates 4 (A to D) made of ZnSe polycrystal were dry-etched. Then, the depth of each etching groove of the insulating substrate 4 (A to D) was measured in the same manner as in Example 4. Table 3 shows the etching groove depth measured in Comparative Example 4.

  Here, in Comparative Example 4, the dry etching of the four insulating substrates 4 (A to D) and the measurement of the depth of the etching groove were performed once. Batch No. of Comparative Example 4 in Table 3. 1 represents the dry etching of one time. The numerical value below 1 represents the depth of each etching groove of the four insulating substrates A to D.

  As shown in Table 3, in the dry etching in Example 4 using conductive grease, the variation in the depth of the etching groove of the insulating substrate can be reduced as compared with the dry etching in Comparative Example 4 using vacuum grease. It was confirmed that

  In Examples 1 to 4 and Comparative Examples 1 to 4, the depth of the etching groove of the insulating substrate was measured using a stylus type step meter.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The dry etching method of the present invention is suitably used not only for manufacturing DOE but also for manufacturing semiconductor devices.

It is the figure which showed the relationship between the thickness of vacuum grease, and sheath voltage. It is a schematic diagram of a preferable example of the dry etching apparatus of the present invention. It is the figure which contrasted the etching depth precision of the Example and the comparative example. It is a schematic diagram of an example of the conventional dry etching apparatus. (A) is a schematic plan view of a conductor provided with three insulating substrates, and (B) is a cross-sectional view taken along VB-VB in (A). (A) is a typical top view of the conductor with which 19 insulating substrates were installed, (B) is sectional drawing along VIB-VIB of (A). (A) is a schematic plan view of a conductor provided with four insulating substrates, and (B) is a cross-sectional view taken along VIIB-VIIB in (A).

Explanation of symbols

  1a, 1b RF power source, 2 ICP coil, 3 chamber, 4 insulating substrate, 5 vacuum grease, 50 conductive grease, 6 conductor, 7 electrode, 8 blocking capacitor, 9 plasma, 10 sheath region.

Claims (7)

  A dry etching method for performing dry etching by electrically contacting a conductor with an insulating substrate attached thereto with an electrode, wherein the insulating substrate and the conductor are attached with conductive grease. A dry etching method that is characterized.   The dry etching method according to claim 1, wherein the dry etching method is performed using at least one selected from the group consisting of ICP plasma, CCP plasma, ECR plasma, and NLD plasma.   The dry etching method according to claim 1, wherein the insulating substrate is made of ZnSe polycrystal. The dry etching method according to claim 1, wherein the insulating substrate is made of SiO ₂ .   The dry etching method according to claim 1, wherein a photoresist is formed on a surface of the insulating substrate.   6. The dry etching method according to claim 1, wherein a plurality of insulating substrates are simultaneously dry etched.   A diffractive optical component manufactured using the dry etching method according to claim 1.

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